[PATCH 61/74] drm/amd/display: Read DRAM channel width from SMU init table

[Wayne Lin <Wayne.Lin@amd.com>]

From: Wenjing Liu <wenjing.liu@amd.com>

[Why]
The channel count came from the SMU init table but the channel
width came from VBIOS vram info. Both values need to describe the
same memory type.

[How]
Add DramChannelWidthBytes to MemoryConfig_t, using a reserved slot
so the layout is unchanged. Populate the channel width in bw_params
from the init table instead of VBIOS vram info.

Cc: Dillon Varone <dillon.varone@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
---
 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dalsmc.h        | 3 ++-
 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c | 3 +--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dalsmc.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dalsmc.h
index 234777bdd183..ea3927223117 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dalsmc.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dalsmc.h
@@ -77,7 +77,8 @@ typedef struct {
 
 typedef struct {
 	uint32_t NumUmcChannels;
-	uint32_t Reserved[3];
+	uint32_t DramChannelWidthBytes;
+	uint32_t Reserved[2];
 } MemoryConfig_t;
 
 /**
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c
index 8eee54c7d5d5..c5d56757eafd 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c
@@ -747,8 +747,7 @@ static bool dcn60_fetch_dal_init_table(struct clk_mgr_internal *clk_mgr)
 	//dcn60_populate_dc_mode_limit(&bw_params->dc_mode_limit, init_table);
 
 	bw_params->num_channels = init_table->MemoryConfig.NumUmcChannels;
-	bw_params->dram_channel_width_bytes =
-			clk_mgr->base.ctx->dc_bios->vram_info.dram_channel_width_bytes;
+	bw_params->dram_channel_width_bytes = init_table->MemoryConfig.DramChannelWidthBytes;
 
 	dcn60_populate_utm_qos_model(clk_mgr, &bw_params->utm_qos_model, init_table);
 
-- 
2.43.0