From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 07/12] ARM: socfpga: Add DRAM bank size initialization function
Date: Sat, 12 May 2018 22:30:15 +0200 [thread overview]
Message-ID: <20180512203020.17422-7-marex@denx.de> (raw)
In-Reply-To: <20180512203020.17422-1-marex@denx.de>
From: Tien Fong Chee <tien.fong.chee@intel.com>
Add function for both multiple DRAM bank and single DRAM bank size
initialization. This common functionality could be used by every single
SOCFPGA board.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tested-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
arch/arm/mach-socfpga/board.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index c23ac4ead3..38e12a41a3 100644
--- a/arch/arm/mach-socfpga/board.c
+++ b/arch/arm/mach-socfpga/board.c
@@ -28,6 +28,13 @@ int board_init(void)
return 0;
}
+int dram_init_banksize(void)
+{
+ fdtdec_setup_memory_banksize();
+
+ return 0;
+}
+
#ifdef CONFIG_USB_GADGET
struct dwc2_plat_otg_data socfpga_otg_data = {
.usb_gusbcfg = 0x1417,
--
2.16.2
next prev parent reply other threads:[~2018-05-12 20:30 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-12 20:30 [U-Boot] [PATCH 01/12] ARM: socfpga: Sync A10 clock manager binding parser Marek Vasut
2018-05-12 20:30 ` [U-Boot] [PATCH 02/12] ARM: socfpga: Sort the DT Makefile Marek Vasut
2018-05-16 10:13 ` Ley Foon Tan
2018-05-12 20:30 ` [U-Boot] [PATCH 03/12] ARM: socfpga: Synchronize Arria10 DTs Marek Vasut
2018-05-12 20:30 ` [U-Boot] [PATCH 04/12] ARM: socfpga: Synchronize Arria10 SoCDK SDMMC handoff Marek Vasut
2018-05-12 20:30 ` [U-Boot] [PATCH 05/12] ARM: socfpga: Repair A10 EMAC reset handling Marek Vasut
2018-05-16 10:24 ` Ley Foon Tan
2018-05-12 20:30 ` [U-Boot] [PATCH 06/12] ARM: socfpga: Rename the gen5 sdram driver to more specific name Marek Vasut
2018-05-12 20:30 ` Marek Vasut [this message]
2018-05-12 20:30 ` [U-Boot] [PATCH 08/12] ARM: socfpga: Add DDR driver for Arria 10 Marek Vasut
2018-05-12 20:30 ` [U-Boot] [PATCH 09/12] configs: Add DDR Kconfig support " Marek Vasut
2018-05-12 20:30 ` [U-Boot] [PATCH 10/12] ARM: socfpga: Enable SPL memory allocation Marek Vasut
2018-05-16 10:26 ` Ley Foon Tan
2018-05-12 20:30 ` [U-Boot] [PATCH 11/12] ARM: socfpga: Adding clock frequency info for U-Boot Marek Vasut
2018-05-12 20:30 ` [U-Boot] [PATCH 12/12] ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot Marek Vasut
2018-05-17 4:38 ` [U-Boot] [PATCH 01/12] ARM: socfpga: Sync A10 clock manager binding parser Chee, Tien Fong
2018-05-17 8:24 ` Marek Vasut
2018-05-17 8:44 ` Chee, Tien Fong
2018-05-17 9:38 ` Marek Vasut
2018-05-18 4:41 ` Chee, Tien Fong
2018-05-18 7:50 ` Marek Vasut
2018-05-18 8:39 ` Chee, Tien Fong
2018-05-18 8:42 ` Marek Vasut
2018-05-18 8:53 ` Chee, Tien Fong
2018-05-18 8:58 ` Marek Vasut
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