[U-Boot-Users] u-boot 834x spd_ram

[U-Boot-Users] u-boot 834x spd_ram

[Aziz Mzili]

Hi 

I'm wondering why in cpu/83xx/spd_ram.c we expect the DDR ram to be on cs2 and cs3. Is there any issue with it on cs0 and cs1 ?

thank you

Aziz Mzili




-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.denx.de/pipermail/u-boot/attachments/20060417/9706a2db/attachment.htm 

[U-Boot-Users] u-boot 834x spd_ram

[Kumar Gala]

On Apr 17, 2006, at 6:09 PM, Aziz Mzili wrote:

>
> Hi
>
> I'm wondering why in cpu/83xx/spd_ram.c we expect the DDR ram to be  
> on cs2 and cs3. Is there any issue with it on cs0 and cs1 ?
I'm not aware of any.  I'm just guessing the boards people have were  
built this way.

- kumar

[U-Boot-Users] u-boot 834x spd_ram

[Meszaros, Lajos]

On Apr 17, 2006, at 6:09 PM, Aziz Mzili wrote:

>
> Hi
>
> I'm wondering why in cpu/83xx/spd_ram.c we expect the DDR ram to be  
> on cs2 and cs3. Is there any issue with it on cs0 and cs1 ?

These processors start after reset in memory controlled
by CS0. There should be nonvolatile - readonly - memory
(generally flash). Very few board use CS0 for RAM, they have 
special hardware to "steal in" the flash to this address range.

    Ludwig

[U-Boot-Users] u-boot 834x spd_ram

[Dan Malek]

On Apr 18, 2006, at 9:51 AM, Kumar Gala wrote:

> I'm not aware of any.  I'm just guessing the boards people have  
> were built this way.

I have a board that doesn't use CS2/CS3.  Once I get it running
well I'll submit the patches.  Basically, I created a  #define
in the board configuration header file that indicates the base chip
select used.  I then use this base and base+1 in the code in place of
the hard coded assumption of CS2/3 in the spd_sdram.c file.


	-- Dan

[U-Boot-Users] u-boot 834x spd_ram

[Jerry Van Baren]

Aziz Mzili wrote:
> 
> Hi
> 
> I'm wondering why in cpu/83xx/spd_ram.c we expect the DDR ram to be on 
> cs2 and cs3. Is there any issue with it on cs0 and cs1 ?
> 
> thank you
> 
> Aziz Mzili

I'm not a 834x expert, but all my experience is that CS0 is used to boot 
the processor.  If it is DDR RAM rather than flash, someone other than 
the 834x must initialize the DDR RAM and load it with the boot program. 
  That is possible, but very uncommon.

gvb

[U-Boot-Users] u-boot 834x spd_ram

[Ben Warren]

Jerry,

The 83xx chips have a separate memory bus for DDR, with its own chip
selects.  For these chips, you do in fact need to use the local bus CS0
for your boot flash/EEPROM.

I can't find anything in the manual that differentiates between the DDR
chip selects, so using CS2/3 was probably just a design choice.

regards,
Ben

On Tue, 2006-04-18 at 10:02 -0400, Jerry Van Baren wrote:

> Aziz Mzili wrote:
> > 
> > Hi
> > 
> > I'm wondering why in cpu/83xx/spd_ram.c we expect the DDR ram to be on 
> > cs2 and cs3. Is there any issue with it on cs0 and cs1 ?
> > 
> > thank you
> > 
> > Aziz Mzili
> 
> I'm not a 834x expert, but all my experience is that CS0 is used to boot 
> the processor.  If it is DDR RAM rather than flash, someone other than 
> the 834x must initialize the DDR RAM and load it with the boot program. 
>   That is possible, but very uncommon.
> 
> gvb
> 
> 
> -------------------------------------------------------
> This SF.Net email is sponsored by xPML, a groundbreaking scripting language
> that extends applications into web and mobile media. Attend the live webcast
> and join the prime developer group breaking into this new coding territory!
> http://sel.as-us.falkag.net/sel?cmd=lnk&kid=110944&bid=241720&dat=121642
> _______________________________________________
> U-Boot-Users mailing list
> U-Boot-Users at lists.sourceforge.net
> https://lists.sourceforge.net/lists/listinfo/u-boot-users
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.denx.de/pipermail/u-boot/attachments/20060418/a8733983/attachment.htm 

[U-Boot-Users] u-boot 834x spd_ram

[Aziz Mzili]

 
When is mentioned "cs" i meant the DDR bank cs bounds. In cpu/mpc83xx/spd_ram.c.
They are hardcoded to be 2 and 3. Shouldn't this come from the config ? 
cpu/mpc83xx/spd_ram.c  should be a common code for any 83xx based board not only the freescale board which have the DDR module in the back of the board.
 
cheers
 
 
-----Original Message-----
From: u-boot-users-admin@lists.sourceforge.net [mailto:u-boot-users-admin at lists.sourceforge.net]On Behalf Of Ben Warren
Sent: Tuesday, April 18, 2006 10:08 AM
To: Jerry Van Baren
Cc: u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] u-boot 834x spd_ram


Jerry,

The 83xx chips have a separate memory bus for DDR, with its own chip selects.  For these chips, you do in fact need to use the local bus CS0 for your boot flash/EEPROM.

I can't find anything in the manual that differentiates between the DDR chip selects, so using CS2/3 was probably just a design choice.

regards,
Ben

On Tue, 2006-04-18 at 10:02 -0400, Jerry Van Baren wrote: 

Aziz Mzili wrote:

> 

> Hi

> 

> I'm wondering why in cpu/83xx/spd_ram.c we expect the DDR ram to be on 

> cs2 and cs3. Is there any issue with it on cs0 and cs1 ?

> 

> thank you

> 

> Aziz Mzili



I'm not a 834x expert, but all my experience is that CS0 is used to boot 

the processor.  If it is DDR RAM rather than flash, someone other than 

the 834x must initialize the DDR RAM and load it with the boot program. 

  That is possible, but very uncommon.



gvb





-------------------------------------------------------

This SF.Net email is sponsored by xPML, a groundbreaking scripting language

that extends applications into web and mobile media. Attend the live webcast

and join the prime developer group breaking into this new coding territory!

http://sel.as-us.falkag.net/sel?cmd=lnk <http://sel.as-us.falkag.net/sel?cmd=lnk&kid=110944&bid=241720&dat=121642> &kid=110944&bid=241720&dat=121642

_______________________________________________

U-Boot-Users mailing list

U-Boot-Users at lists.sourceforge.net

https://lists.sourceforge.net/lists/listinfo/u-boot-users

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.denx.de/pipermail/u-boot/attachments/20060418/b1843f14/attachment.htm 

[U-Boot-Users] u-boot 834x spd_ram

[Aziz Mzili]

Ok
thank you

That's what i thought it should be




-----Original Message-----
From: Dan Malek [mailto:dan at embeddededge.com]
Sent: Tuesday, April 18, 2006 11:45 AM
To: Kumar Gala
Cc: Aziz Mzili; u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] u-boot 834x spd_ram



On Apr 18, 2006, at 9:51 AM, Kumar Gala wrote:

> I'm not aware of any.  I'm just guessing the boards people have  
> were built this way.

I have a board that doesn't use CS2/CS3.  Once I get it running
well I'll submit the patches.  Basically, I created a  #define
in the board configuration header file that indicates the base chip
select used.  I then use this base and base+1 in the code in place of
the hard coded assumption of CS2/3 in the spd_sdram.c file.


	-- Dan