* [PATCH 0/9] Support stm32h747-discovery board
@ 2025-06-07 9:37 Dario Binacchi
2025-06-07 9:37 ` [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles Dario Binacchi
` (9 more replies)
0 siblings, 10 replies; 38+ messages in thread
From: Dario Binacchi @ 2025-06-07 9:37 UTC (permalink / raw)
To: u-boot
Cc: linux-amarula, Dario Binacchi, Alexandre Torgue, Dillon Min,
Ilias Apalodimas, Jerome Forissier, Krzysztof Kozlowski,
Lukasz Majewski, Patrice Chotard, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, Sumit Garg, Tom Rini,
uboot-stm32
The series adds support for stm32h747-discovery board.
Detailed information can be found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
Dario Binacchi (9):
ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
ARM: dts: stm32: add uart8 node for stm32h743 MCU
ARM: dts: stm32: add pin map for UART8 controller on stm32h743
ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
ARM: dts: stm32: support STM32h747i-disco board
ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
board: stm32: add stm32h747-discovery board support
arch/arm/dts/stm32h747i-disco-u-boot.dtsi | 104 ++++++++++++++
arch/arm/mach-stm32/stm32h7/Kconfig | 4 +
board/st/stm32h747-disco/Kconfig | 15 ++
board/st/stm32h747-disco/MAINTAINERS | 7 +
board/st/stm32h747-disco/Makefile | 6 +
board/st/stm32h747-disco/stm32h747-disco.c | 42 ++++++
configs/stm32h747-disco_defconfig | 35 +++++
drivers/clk/stm32/clk-stm32h7.c | 5 +
dts/upstream/Bindings/arm/stm32/stm32.yaml | 4 +
.../include/dt-bindings/clock/stm32h7-clks.h | 4 +-
dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 34 ++++-
dts/upstream/src/arm/st/stm32h743.dtsi | 8 ++
dts/upstream/src/arm/st/stm32h743i-disco.dts | 2 +-
dts/upstream/src/arm/st/stm32h743i-eval.dts | 2 +-
dts/upstream/src/arm/st/stm32h747i-disco.dts | 136 ++++++++++++++++++
dts/upstream/src/arm/st/stm32h750i-art-pi.dts | 6 +-
include/configs/stm32h747-disco.h | 32 +++++
17 files changed, 435 insertions(+), 11 deletions(-)
create mode 100644 arch/arm/dts/stm32h747i-disco-u-boot.dtsi
create mode 100644 board/st/stm32h747-disco/Kconfig
create mode 100644 board/st/stm32h747-disco/MAINTAINERS
create mode 100644 board/st/stm32h747-disco/Makefile
create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
create mode 100644 configs/stm32h747-disco_defconfig
create mode 100644 dts/upstream/src/arm/st/stm32h747i-disco.dts
create mode 100644 include/configs/stm32h747-disco.h
--
2.43.0
base-commit: b3f69c14187d413610abbc2b82d1a3752cb342c1
branch: stm32h747i-disco
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
@ 2025-06-07 9:37 ` Dario Binacchi
2025-06-09 7:55 ` Patrice CHOTARD
2025-06-09 13:20 ` Sumit Garg
2025-06-07 9:37 ` [PATCH 2/9] dt-bindings: arm: stm32: add compatible for stm32h747i-disco board Dario Binacchi
` (8 subsequent siblings)
9 siblings, 2 replies; 38+ messages in thread
From: Dario Binacchi @ 2025-06-07 9:37 UTC (permalink / raw)
To: u-boot
Cc: linux-amarula, Dario Binacchi, Alexandre Torgue, Patrice Chotard,
Patrick Delaunay, Sumit Garg, Tom Rini, uboot-stm32
Allow expanding possible configurations for the same peripheral,
consistent with the scheme adopted in Linux.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: 6a36dca4375fce51b627f5a985a79fc8b8bd7f55 ]
---
dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 8 ++++----
dts/upstream/src/arm/st/stm32h743i-disco.dts | 2 +-
dts/upstream/src/arm/st/stm32h743i-eval.dts | 2 +-
dts/upstream/src/arm/st/stm32h750i-art-pi.dts | 6 +++---
4 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
index 7f1d234e1024..ad00c1080a96 100644
--- a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
+++ b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
@@ -198,7 +198,7 @@
};
};
- uart4_pins: uart4-0 {
+ uart4_pins_a: uart4-0 {
pins1 {
pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
bias-disable;
@@ -211,7 +211,7 @@
};
};
- usart1_pins: usart1-0 {
+ usart1_pins_a: usart1-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
bias-disable;
@@ -224,7 +224,7 @@
};
};
- usart2_pins: usart2-0 {
+ usart2_pins_a: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
bias-disable;
@@ -237,7 +237,7 @@
};
};
- usart3_pins: usart3-0 {
+ usart3_pins_a: usart3-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
<STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */
diff --git a/dts/upstream/src/arm/st/stm32h743i-disco.dts b/dts/upstream/src/arm/st/stm32h743i-disco.dts
index 2b452883a708..8451a54a9a08 100644
--- a/dts/upstream/src/arm/st/stm32h743i-disco.dts
+++ b/dts/upstream/src/arm/st/stm32h743i-disco.dts
@@ -105,7 +105,7 @@
};
&usart2 {
- pinctrl-0 = <&usart2_pins>;
+ pinctrl-0 = <&usart2_pins_a>;
pinctrl-names = "default";
status = "okay";
};
diff --git a/dts/upstream/src/arm/st/stm32h743i-eval.dts b/dts/upstream/src/arm/st/stm32h743i-eval.dts
index 5c5d8059bdc7..4b0ced27b80e 100644
--- a/dts/upstream/src/arm/st/stm32h743i-eval.dts
+++ b/dts/upstream/src/arm/st/stm32h743i-eval.dts
@@ -145,7 +145,7 @@
};
&usart1 {
- pinctrl-0 = <&usart1_pins>;
+ pinctrl-0 = <&usart1_pins_a>;
pinctrl-names = "default";
status = "okay";
};
diff --git a/dts/upstream/src/arm/st/stm32h750i-art-pi.dts b/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
index 44c307f8b09c..00d195d52a45 100644
--- a/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
+++ b/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
@@ -197,14 +197,14 @@
};
&usart2 {
- pinctrl-0 = <&usart2_pins>;
+ pinctrl-0 = <&usart2_pins_a>;
pinctrl-names = "default";
status = "disabled";
};
&usart3 {
pinctrl-names = "default";
- pinctrl-0 = <&usart3_pins>;
+ pinctrl-0 = <&usart3_pins_a>;
dmas = <&dmamux1 45 0x400 0x05>,
<&dmamux1 46 0x400 0x05>;
dma-names = "rx", "tx";
@@ -221,7 +221,7 @@
};
&uart4 {
- pinctrl-0 = <&uart4_pins>;
+ pinctrl-0 = <&uart4_pins_a>;
pinctrl-names = "default";
status = "okay";
};
--
2.43.0
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 2/9] dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
2025-06-07 9:37 ` [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles Dario Binacchi
@ 2025-06-07 9:37 ` Dario Binacchi
2025-06-09 7:55 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 3/9] dt-bindings: clock: stm32h7: rename USART{7, 8}_CK to UART{7, 8}_CK Dario Binacchi
` (7 subsequent siblings)
9 siblings, 1 reply; 38+ messages in thread
From: Dario Binacchi @ 2025-06-07 9:37 UTC (permalink / raw)
To: u-boot
Cc: linux-amarula, Dario Binacchi, Krzysztof Kozlowski,
Alexandre Torgue, Patrice Chotard, Patrick Delaunay, Sumit Garg,
Tom Rini, uboot-stm32
The board includes an STM32H747XI SoC with the following resources:
- 2 Mbytes Flash
- 1 MByte SRAM
- LCD-TFT controller
- MIPI-DSI interface
- FD-CAN
- USB 2.0 high-speed/full-speed
- Ethernet MAC
- camera interface
Detailed information can be found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250427074404.3278732-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[upstream commit: 815d49f61ea049075482161f897aa13e1ae30cbb ]
---
dts/upstream/Bindings/arm/stm32/stm32.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/dts/upstream/Bindings/arm/stm32/stm32.yaml b/dts/upstream/Bindings/arm/stm32/stm32.yaml
index b6c56d4ce6b9..a0660a0b494f 100644
--- a/dts/upstream/Bindings/arm/stm32/stm32.yaml
+++ b/dts/upstream/Bindings/arm/stm32/stm32.yaml
@@ -42,6 +42,10 @@ properties:
- st,stm32h743i-disco
- st,stm32h743i-eval
- const: st,stm32h743
+ - items:
+ - enum:
+ - st,stm32h747i-disco
+ - const: st,stm32h747
- items:
- enum:
- st,stm32h750i-art-pi
--
2.43.0
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 3/9] dt-bindings: clock: stm32h7: rename USART{7, 8}_CK to UART{7, 8}_CK
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
2025-06-07 9:37 ` [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles Dario Binacchi
2025-06-07 9:37 ` [PATCH 2/9] dt-bindings: arm: stm32: add compatible for stm32h747i-disco board Dario Binacchi
@ 2025-06-07 9:37 ` Dario Binacchi
2025-06-09 7:55 ` [PATCH 3/9] dt-bindings: clock: stm32h7: rename USART{7, 8}_CK to UART{7,8}_CK Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 4/9] ARM: dts: stm32: add uart8 node for stm32h743 MCU Dario Binacchi
` (6 subsequent siblings)
9 siblings, 1 reply; 38+ messages in thread
From: Dario Binacchi @ 2025-06-07 9:37 UTC (permalink / raw)
To: u-boot
Cc: linux-amarula, Dario Binacchi, Krzysztof Kozlowski,
Alexandre Torgue, Patrice Chotard, Patrick Delaunay, Sumit Garg,
Tom Rini, uboot-stm32
As stated in the reference manual RM0433, the STM32H743 MCU has
USART1/2/3/6, UART4/5/7/8, and LPUART1. The patches make all the clock
macros for the serial ports consistent with the documentation.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250427074404.3278732-5-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: ecab3c40fa49a2073c4c916ebff9496a6b5db7bd ]
---
dts/upstream/include/dt-bindings/clock/stm32h7-clks.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/dts/upstream/include/dt-bindings/clock/stm32h7-clks.h b/dts/upstream/include/dt-bindings/clock/stm32h7-clks.h
index 6637272b3242..330b39c2c303 100644
--- a/dts/upstream/include/dt-bindings/clock/stm32h7-clks.h
+++ b/dts/upstream/include/dt-bindings/clock/stm32h7-clks.h
@@ -126,8 +126,8 @@
#define ADC3_CK 128
#define DSI_CK 129
#define LTDC_CK 130
-#define USART8_CK 131
-#define USART7_CK 132
+#define UART8_CK 131
+#define UART7_CK 132
#define HDMICEC_CK 133
#define I2C3_CK 134
#define I2C2_CK 135
--
2.43.0
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 4/9] ARM: dts: stm32: add uart8 node for stm32h743 MCU
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
` (2 preceding siblings ...)
2025-06-07 9:37 ` [PATCH 3/9] dt-bindings: clock: stm32h7: rename USART{7, 8}_CK to UART{7, 8}_CK Dario Binacchi
@ 2025-06-07 9:37 ` Dario Binacchi
2025-06-09 7:56 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 5/9] ARM: dts: stm32: add pin map for UART8 controller on stm32h743 Dario Binacchi
` (5 subsequent siblings)
9 siblings, 1 reply; 38+ messages in thread
From: Dario Binacchi @ 2025-06-07 9:37 UTC (permalink / raw)
To: u-boot
Cc: linux-amarula, Dario Binacchi, Alexandre Torgue, Patrice Chotard,
Patrick Delaunay, Sumit Garg, Tom Rini, uboot-stm32
Add support for UART8 by applying the settings specified in the
reference manual RM0433.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-6-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: 07aa43adae2363c3734055aeba0789536fa0f8f2 ]
---
dts/upstream/src/arm/st/stm32h743.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/dts/upstream/src/arm/st/stm32h743.dtsi b/dts/upstream/src/arm/st/stm32h743.dtsi
index b8d4c44c8a82..2f19cfbc57ad 100644
--- a/dts/upstream/src/arm/st/stm32h743.dtsi
+++ b/dts/upstream/src/arm/st/stm32h743.dtsi
@@ -211,6 +211,14 @@
};
};
+ uart8: serial@40007c00 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x40007c00 0x400>;
+ interrupts = <83>;
+ status = "disabled";
+ clocks = <&rcc UART8_CK>;
+ };
+
usart1: serial@40011000 {
compatible = "st,stm32h7-uart";
reg = <0x40011000 0x400>;
--
2.43.0
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 5/9] ARM: dts: stm32: add pin map for UART8 controller on stm32h743
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
` (3 preceding siblings ...)
2025-06-07 9:37 ` [PATCH 4/9] ARM: dts: stm32: add uart8 node for stm32h743 MCU Dario Binacchi
@ 2025-06-07 9:37 ` Dario Binacchi
2025-06-09 7:56 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 6/9] ARM: dts: stm32: add an extra pin map for USART1 " Dario Binacchi
` (4 subsequent siblings)
9 siblings, 1 reply; 38+ messages in thread
From: Dario Binacchi @ 2025-06-07 9:37 UTC (permalink / raw)
To: u-boot
Cc: linux-amarula, Dario Binacchi, Alexandre Torgue, Patrice Chotard,
Patrick Delaunay, Sumit Garg, Tom Rini, uboot-stm32
Add a pin map configuration for using the UART8 controller on the
stm32h743 MCU.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-7-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: 47d16ab94b8e5e85aedba3cd22cfdf3877bf1dfb ]
---
dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
index ad00c1080a96..96022afd0168 100644
--- a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
+++ b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
@@ -211,6 +211,19 @@
};
};
+ uart8_pins_a: uart8-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('J', 8, AF8)>; /* UART8_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('J', 9, AF8)>; /* UART8_RX */
+ bias-disable;
+ };
+ };
+
usart1_pins_a: usart1-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
--
2.43.0
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 6/9] ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
` (4 preceding siblings ...)
2025-06-07 9:37 ` [PATCH 5/9] ARM: dts: stm32: add pin map for UART8 controller on stm32h743 Dario Binacchi
@ 2025-06-07 9:37 ` Dario Binacchi
2025-06-09 7:56 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 7/9] ARM: dts: stm32: support STM32h747i-disco board Dario Binacchi
` (3 subsequent siblings)
9 siblings, 1 reply; 38+ messages in thread
From: Dario Binacchi @ 2025-06-07 9:37 UTC (permalink / raw)
To: u-boot
Cc: linux-amarula, Dario Binacchi, Alexandre Torgue, Patrice Chotard,
Patrick Delaunay, Sumit Garg, Tom Rini, uboot-stm32
Add an additional pin map configuration for using the USART1 controller
on the stm32h743 MCU.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-8-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: 8e71dfe46a4a1e9505b1a327470f879b63388968 ]
---
dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
index 96022afd0168..8a6db484383d 100644
--- a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
+++ b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
@@ -237,6 +237,19 @@
};
};
+ usart1_pins_b: usart1-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 10, AF7)>; /* USART1_RX */
+ bias-disable;
+ };
+ };
+
usart2_pins_a: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
--
2.43.0
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 7/9] ARM: dts: stm32: support STM32h747i-disco board
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
` (5 preceding siblings ...)
2025-06-07 9:37 ` [PATCH 6/9] ARM: dts: stm32: add an extra pin map for USART1 " Dario Binacchi
@ 2025-06-07 9:37 ` Dario Binacchi
2025-06-09 7:57 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 8/9] ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file Dario Binacchi
` (2 subsequent siblings)
9 siblings, 1 reply; 38+ messages in thread
From: Dario Binacchi @ 2025-06-07 9:37 UTC (permalink / raw)
To: u-boot
Cc: linux-amarula, Dario Binacchi, Alexandre Torgue, Patrice Chotard,
Patrick Delaunay, Sumit Garg, Tom Rini, uboot-stm32
The board includes an STM32H747XI SoC with the following resources:
- 2 Mbytes Flash
- 1 Mbyte SRAM
- LCD-TFT controller
- MIPI-DSI interface
- FD-CAN
- USB 2.0 high-speed/full-speed
- Ethernet MAC
- camera interface
Detailed information can be found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-9-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ backport upstream commit: 49ba8fc6eab63165639ffbb9f976222d39739cab ]
---
dts/upstream/src/arm/st/stm32h747i-disco.dts | 136 +++++++++++++++++++
1 file changed, 136 insertions(+)
create mode 100644 dts/upstream/src/arm/st/stm32h747i-disco.dts
diff --git a/dts/upstream/src/arm/st/stm32h747i-disco.dts b/dts/upstream/src/arm/st/stm32h747i-disco.dts
new file mode 100644
index 000000000000..99f0255dae8e
--- /dev/null
+++ b/dts/upstream/src/arm/st/stm32h747i-disco.dts
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ */
+
+/dts-v1/;
+#include "stm32h743.dtsi"
+#include "stm32h7-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "STMicroelectronics STM32H747i-Discovery board";
+ compatible = "st,stm32h747i-disco", "st,stm32h747";
+
+ chosen {
+ bootargs = "root=/dev/ram";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@d0000000 {
+ device_type = "memory";
+ reg = <0xd0000000 0x2000000>;
+ };
+
+ aliases {
+ serial0 = &usart1;
+ serial1 = &uart8;
+ };
+
+ v3v3: regulator-v3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "v3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led-green {
+ gpios = <&gpioi 12 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+ led-orange {
+ gpios = <&gpioi 13 GPIO_ACTIVE_LOW>;
+ };
+ led-red {
+ gpios = <&gpioi 14 GPIO_ACTIVE_LOW>;
+ };
+ led-blue {
+ gpios = <&gpioi 15 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ autorepeat;
+ button-0 {
+ label = "User";
+ linux,code = <KEY_WAKEUP>;
+ gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
+ };
+ button-1 {
+ label = "JoySel";
+ linux,code = <KEY_ENTER>;
+ gpios = <&gpiok 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+ button-2 {
+ label = "JoyDown";
+ linux,code = <KEY_DOWN>;
+ gpios = <&gpiok 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+ button-3 {
+ label = "JoyUp";
+ linux,code = <KEY_UP>;
+ gpios = <&gpiok 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+ button-4 {
+ label = "JoyLeft";
+ linux,code = <KEY_LEFT>;
+ gpios = <&gpiok 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+ button-5 {
+ label = "JoyRight";
+ linux,code = <KEY_RIGHT>;
+ gpios = <&gpiok 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+ };
+};
+
+&clk_hse {
+ clock-frequency = <25000000>;
+};
+
+&mac {
+ status = "disabled";
+ pinctrl-0 = <ðernet_rmii>;
+ pinctrl-names = "default";
+ phy-mode = "rmii";
+ phy-handle = <&phy0>;
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
+
+&sdmmc1 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc1_b4_pins_a>;
+ pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
+ pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
+ cd-gpios = <&gpioi 8 GPIO_ACTIVE_LOW>;
+ broken-cd;
+ st,neg-edge;
+ bus-width = <4>;
+ vmmc-supply = <&v3v3>;
+ status = "okay";
+};
+
+&usart1 {
+ pinctrl-0 = <&usart1_pins_b>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&uart8 {
+ pinctrl-0 = <&uart8_pins_a>;
+ pinctrl-names = "default";
+ status = "okay";
+};
--
2.43.0
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 8/9] ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
` (6 preceding siblings ...)
2025-06-07 9:37 ` [PATCH 7/9] ARM: dts: stm32: support STM32h747i-disco board Dario Binacchi
@ 2025-06-07 9:37 ` Dario Binacchi
2025-06-09 7:57 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 9/9] board: stm32: add stm32h747-discovery board support Dario Binacchi
2025-06-09 13:15 ` [PATCH 0/9] Support stm32h747-discovery board Patrice CHOTARD
9 siblings, 1 reply; 38+ messages in thread
From: Dario Binacchi @ 2025-06-07 9:37 UTC (permalink / raw)
To: u-boot
Cc: linux-amarula, Dario Binacchi, Dillon Min, Patrice Chotard,
Patrick Delaunay, Tom Rini, uboot-stm32
Add stm32h747i-disco-u-boot DTS file with FMC SDRAM node and its
pinmux settings.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
arch/arm/dts/stm32h747i-disco-u-boot.dtsi | 104 ++++++++++++++++++++++
1 file changed, 104 insertions(+)
create mode 100644 arch/arm/dts/stm32h747i-disco-u-boot.dtsi
diff --git a/arch/arm/dts/stm32h747i-disco-u-boot.dtsi b/arch/arm/dts/stm32h747i-disco-u-boot.dtsi
new file mode 100644
index 000000000000..ff297cc91fa8
--- /dev/null
+++ b/arch/arm/dts/stm32h747i-disco-u-boot.dtsi
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2025 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ */
+
+#include <stm32h7-u-boot.dtsi>
+
+&fmc {
+
+ /*
+ * Memory configuration from sdram datasheet IS42S32800G-6BLI
+ * first bank is bank@0
+ * second bank is bank@1
+ */
+ bank1: bank@1 {
+ st,sdram-control = /bits/ 8 <NO_COL_9
+ NO_ROW_12
+ MWIDTH_32
+ BANKS_4
+ CAS_2
+ SDCLK_3
+ RD_BURST_EN
+ RD_PIPE_DL_0>;
+ st,sdram-timing = /bits/ 8 <TMRD_1
+ TXSR_1
+ TRAS_1
+ TRC_6
+ TRP_2
+ TWR_1
+ TRCD_1>;
+ st,sdram-refcount = <1539>;
+ };
+};
+
+&pinctrl {
+ fmc_pins: fmc@0 {
+ pins {
+ pinmux = <STM32_PINMUX('D', 0, AF12)>,
+ <STM32_PINMUX('D', 1, AF12)>,
+ <STM32_PINMUX('D', 8, AF12)>,
+ <STM32_PINMUX('D', 9, AF12)>,
+ <STM32_PINMUX('D',10, AF12)>,
+ <STM32_PINMUX('D',14, AF12)>,
+ <STM32_PINMUX('D',15, AF12)>,
+
+ <STM32_PINMUX('E', 0, AF12)>,
+ <STM32_PINMUX('E', 1, AF12)>,
+ <STM32_PINMUX('E', 7, AF12)>,
+ <STM32_PINMUX('E', 8, AF12)>,
+ <STM32_PINMUX('E', 9, AF12)>,
+ <STM32_PINMUX('E',10, AF12)>,
+ <STM32_PINMUX('E',11, AF12)>,
+ <STM32_PINMUX('E',12, AF12)>,
+ <STM32_PINMUX('E',13, AF12)>,
+ <STM32_PINMUX('E',14, AF12)>,
+ <STM32_PINMUX('E',15, AF12)>,
+
+ <STM32_PINMUX('F', 0, AF12)>,
+ <STM32_PINMUX('F', 1, AF12)>,
+ <STM32_PINMUX('F', 2, AF12)>,
+ <STM32_PINMUX('F', 3, AF12)>,
+ <STM32_PINMUX('F', 4, AF12)>,
+ <STM32_PINMUX('F', 5, AF12)>,
+ <STM32_PINMUX('F',11, AF12)>,
+ <STM32_PINMUX('F',12, AF12)>,
+ <STM32_PINMUX('F',13, AF12)>,
+ <STM32_PINMUX('F',14, AF12)>,
+ <STM32_PINMUX('F',15, AF12)>,
+
+ <STM32_PINMUX('G', 0, AF12)>,
+ <STM32_PINMUX('G', 1, AF12)>,
+ <STM32_PINMUX('G', 2, AF12)>,
+ <STM32_PINMUX('G', 4, AF12)>,
+ <STM32_PINMUX('G', 5, AF12)>,
+ <STM32_PINMUX('G', 8, AF12)>,
+ <STM32_PINMUX('G',15, AF12)>,
+
+ <STM32_PINMUX('H', 5, AF12)>,
+ <STM32_PINMUX('H', 6, AF12)>,
+ <STM32_PINMUX('H', 7, AF12)>,
+ <STM32_PINMUX('H', 8, AF12)>,
+ <STM32_PINMUX('H', 9, AF12)>,
+ <STM32_PINMUX('H',10, AF12)>,
+ <STM32_PINMUX('H',11, AF12)>,
+ <STM32_PINMUX('H',12, AF12)>,
+ <STM32_PINMUX('H',13, AF12)>,
+ <STM32_PINMUX('H',14, AF12)>,
+ <STM32_PINMUX('H',15, AF12)>,
+
+ <STM32_PINMUX('I', 0, AF12)>,
+ <STM32_PINMUX('I', 1, AF12)>,
+ <STM32_PINMUX('I', 2, AF12)>,
+ <STM32_PINMUX('I', 3, AF12)>,
+ <STM32_PINMUX('I', 4, AF12)>,
+ <STM32_PINMUX('I', 5, AF12)>,
+ <STM32_PINMUX('I', 6, AF12)>,
+ <STM32_PINMUX('I', 7, AF12)>,
+ <STM32_PINMUX('I', 9, AF12)>,
+ <STM32_PINMUX('I',10, AF12)>;
+
+ slew-rate = <3>;
+ };
+ };
+};
--
2.43.0
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 9/9] board: stm32: add stm32h747-discovery board support
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
` (7 preceding siblings ...)
2025-06-07 9:37 ` [PATCH 8/9] ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file Dario Binacchi
@ 2025-06-07 9:37 ` Dario Binacchi
2025-06-09 7:58 ` Patrice CHOTARD
2025-06-09 13:15 ` [PATCH 0/9] Support stm32h747-discovery board Patrice CHOTARD
9 siblings, 1 reply; 38+ messages in thread
From: Dario Binacchi @ 2025-06-07 9:37 UTC (permalink / raw)
To: u-boot
Cc: linux-amarula, Dario Binacchi, Ilias Apalodimas, Jerome Forissier,
Lukasz Majewski, Patrice Chotard, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, Tom Rini, uboot-stm32
The board includes an STM32H747XI SoC with the following resources:
- 2 Mbytes Flash
- 1 Mbyte SRAM
- LCD-TFT controller
- MIPI-DSI interface
- FD-CAN
- USB 2.0 high-speed/full-speed
- Ethernet MAC
- camera interface
Detailed information can be found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
arch/arm/mach-stm32/stm32h7/Kconfig | 4 +++
board/st/stm32h747-disco/Kconfig | 15 ++++++++
board/st/stm32h747-disco/MAINTAINERS | 7 ++++
board/st/stm32h747-disco/Makefile | 6 ++++
board/st/stm32h747-disco/stm32h747-disco.c | 42 ++++++++++++++++++++++
configs/stm32h747-disco_defconfig | 35 ++++++++++++++++++
drivers/clk/stm32/clk-stm32h7.c | 5 +++
include/configs/stm32h747-disco.h | 32 +++++++++++++++++
8 files changed, 146 insertions(+)
create mode 100644 board/st/stm32h747-disco/Kconfig
create mode 100644 board/st/stm32h747-disco/MAINTAINERS
create mode 100644 board/st/stm32h747-disco/Makefile
create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
create mode 100644 configs/stm32h747-disco_defconfig
create mode 100644 include/configs/stm32h747-disco.h
diff --git a/arch/arm/mach-stm32/stm32h7/Kconfig b/arch/arm/mach-stm32/stm32h7/Kconfig
index 70233a4b23cd..72f20c477d04 100644
--- a/arch/arm/mach-stm32/stm32h7/Kconfig
+++ b/arch/arm/mach-stm32/stm32h7/Kconfig
@@ -6,11 +6,15 @@ config TARGET_STM32H743_DISCO
config TARGET_STM32H743_EVAL
bool "STM32H743 Evaluation board"
+config TARGET_STM32H747_DISCO
+ bool "STM32H747 Discovery board"
+
config TARGET_STM32H750_ART_PI
bool "STM32H750 ART Pi board"
source "board/st/stm32h743-eval/Kconfig"
source "board/st/stm32h743-disco/Kconfig"
+source "board/st/stm32h747-disco/Kconfig"
source "board/st/stm32h750-art-pi/Kconfig"
endif
diff --git a/board/st/stm32h747-disco/Kconfig b/board/st/stm32h747-disco/Kconfig
new file mode 100644
index 000000000000..a7b2c09a327f
--- /dev/null
+++ b/board/st/stm32h747-disco/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_STM32H747_DISCO
+
+config SYS_BOARD
+ default "stm32h747-disco"
+
+config SYS_VENDOR
+ default "st"
+
+config SYS_SOC
+ default "stm32h7"
+
+config SYS_CONFIG_NAME
+ default "stm32h747-disco"
+
+endif
diff --git a/board/st/stm32h747-disco/MAINTAINERS b/board/st/stm32h747-disco/MAINTAINERS
new file mode 100644
index 000000000000..d48649f773f3
--- /dev/null
+++ b/board/st/stm32h747-disco/MAINTAINERS
@@ -0,0 +1,7 @@
+STM32H747 DISCOVERY BOARD
+M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+S: Maintained
+F: board/st/stm32h747-disco
+F: include/configs/stm32h747-disco.h
+F: configs/stm32h747-disco_defconfig
+F: arch/arm/dts/stm32h747*
diff --git a/board/st/stm32h747-disco/Makefile b/board/st/stm32h747-disco/Makefile
new file mode 100644
index 000000000000..e11f052cc88f
--- /dev/null
+++ b/board/st/stm32h747-disco/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2025 Dario Binacchi <dario.binacchi@amarulasolutions.com>
+#
+
+obj-y := stm32h747-disco.o
diff --git a/board/st/stm32h747-disco/stm32h747-disco.c b/board/st/stm32h747-disco/stm32h747-disco.c
new file mode 100644
index 000000000000..be0884bdeb4d
--- /dev/null
+++ b/board/st/stm32h747-disco/stm32h747-disco.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * stm32h747i-disco support
+ *
+ * Copyright (C) 2025 Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ */
+
+#include <dm.h>
+#include <init.h>
+#include <log.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+ if (ret) {
+ debug("DRAM init failed: %d\n", ret);
+ return ret;
+ }
+
+ if (fdtdec_setup_mem_size_base() != 0)
+ ret = -EINVAL;
+
+ return ret;
+}
+
+int dram_init_banksize(void)
+{
+ fdtdec_setup_memory_banksize();
+
+ return 0;
+}
+
+int board_init(void)
+{
+ return 0;
+}
diff --git a/configs/stm32h747-disco_defconfig b/configs/stm32h747-disco_defconfig
new file mode 100644
index 000000000000..8a0c72450d1e
--- /dev/null
+++ b/configs/stm32h747-disco_defconfig
@@ -0,0 +1,35 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STM32=y
+CONFIG_TEXT_BASE=0x08000000
+CONFIG_SYS_MALLOC_LEN=0x100000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32h747i-disco"
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SYS_LOAD_ADDR=0xd0400000
+CONFIG_STM32H7=y
+CONFIG_TARGET_STM32H747_DISCO=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTDELAY=3
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_DEFAULT_FDT_FILE="stm32h747i-disco"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=282
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="U-Boot > "
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_ISO_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NO_NET=y
+CONFIG_STM32_SDMMC2=y
+# CONFIG_PINCTRL_FULL is not set
diff --git a/drivers/clk/stm32/clk-stm32h7.c b/drivers/clk/stm32/clk-stm32h7.c
index 6acf2ff0a8fb..aa3be414a29f 100644
--- a/drivers/clk/stm32/clk-stm32h7.c
+++ b/drivers/clk/stm32/clk-stm32h7.c
@@ -114,6 +114,7 @@
#define QSPISRC_PER_CK 3
#define PWR_CR3 0x0c
+#define PWR_CR3_LDOEN BIT(1)
#define PWR_CR3_SCUEN BIT(2)
#define PWR_D3CR 0x18
#define PWR_D3CR_VOS_MASK GENMASK(15, 14)
@@ -375,7 +376,11 @@ int configure_clocks(struct udevice *dev)
clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK,
VOS_SCALE_1 << PWR_D3CR_VOS_SHIFT);
/* Lock supply configuration update */
+#if IS_ENABLED(CONFIG_TARGET_STM32H747_DISCO)
+ clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_LDOEN);
+#else
clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN);
+#endif
while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY))
;
diff --git a/include/configs/stm32h747-disco.h b/include/configs/stm32h747-disco.h
new file mode 100644
index 000000000000..393445a8ae1f
--- /dev/null
+++ b/include/configs/stm32h747-disco.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2025 Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <config.h>
+#include <linux/sizes.h>
+
+/* For booting Linux, use the first 16MB of memory */
+#define CFG_SYS_BOOTMAPSZ SZ_16M
+
+#define CFG_SYS_FLASH_BASE 0x08000000
+
+#define CFG_SYS_HZ_CLOCK 1000000
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0)
+
+#include <config_distro_bootcmd.h>
+#define CFG_EXTRA_ENV_SETTINGS \
+ "kernel_addr_r=0xD0008000\0" \
+ "fdtfile=stm32h747i-disco.dtb\0" \
+ "fdt_addr_r=0xD0408000\0" \
+ "scriptaddr=0xD0418000\0" \
+ "pxefile_addr_r=0xD0428000\0" \
+ "ramdisk_addr_r=0xD0438000\0" \
+ BOOTENV
+
+#endif /* __CONFIG_H */
--
2.43.0
^ permalink raw reply related [flat|nested] 38+ messages in thread
* Re: [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
2025-06-07 9:37 ` [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles Dario Binacchi
@ 2025-06-09 7:55 ` Patrice CHOTARD
2025-06-09 13:20 ` Sumit Garg
1 sibling, 0 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 7:55 UTC (permalink / raw)
To: Dario Binacchi, u-boot
Cc: linux-amarula, Alexandre Torgue, Patrick Delaunay, Sumit Garg,
Tom Rini, uboot-stm32
On 6/7/25 11:37, Dario Binacchi wrote:
> Allow expanding possible configurations for the same peripheral,
> consistent with the scheme adopted in Linux.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> Link: https://lore.kernel.org/r/20250427074404.3278732-2-dario.binacchi@amarulasolutions.com
> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
>
> [ upstream commit: 6a36dca4375fce51b627f5a985a79fc8b8bd7f55 ]
>
> ---
>
> dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 8 ++++----
> dts/upstream/src/arm/st/stm32h743i-disco.dts | 2 +-
> dts/upstream/src/arm/st/stm32h743i-eval.dts | 2 +-
> dts/upstream/src/arm/st/stm32h750i-art-pi.dts | 6 +++---
> 4 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> index 7f1d234e1024..ad00c1080a96 100644
> --- a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> +++ b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> @@ -198,7 +198,7 @@
> };
> };
>
> - uart4_pins: uart4-0 {
> + uart4_pins_a: uart4-0 {
> pins1 {
> pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
> bias-disable;
> @@ -211,7 +211,7 @@
> };
> };
>
> - usart1_pins: usart1-0 {
> + usart1_pins_a: usart1-0 {
> pins1 {
> pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
> bias-disable;
> @@ -224,7 +224,7 @@
> };
> };
>
> - usart2_pins: usart2-0 {
> + usart2_pins_a: usart2-0 {
> pins1 {
> pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
> bias-disable;
> @@ -237,7 +237,7 @@
> };
> };
>
> - usart3_pins: usart3-0 {
> + usart3_pins_a: usart3-0 {
> pins1 {
> pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
> <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */
> diff --git a/dts/upstream/src/arm/st/stm32h743i-disco.dts b/dts/upstream/src/arm/st/stm32h743i-disco.dts
> index 2b452883a708..8451a54a9a08 100644
> --- a/dts/upstream/src/arm/st/stm32h743i-disco.dts
> +++ b/dts/upstream/src/arm/st/stm32h743i-disco.dts
> @@ -105,7 +105,7 @@
> };
>
> &usart2 {
> - pinctrl-0 = <&usart2_pins>;
> + pinctrl-0 = <&usart2_pins_a>;
> pinctrl-names = "default";
> status = "okay";
> };
> diff --git a/dts/upstream/src/arm/st/stm32h743i-eval.dts b/dts/upstream/src/arm/st/stm32h743i-eval.dts
> index 5c5d8059bdc7..4b0ced27b80e 100644
> --- a/dts/upstream/src/arm/st/stm32h743i-eval.dts
> +++ b/dts/upstream/src/arm/st/stm32h743i-eval.dts
> @@ -145,7 +145,7 @@
> };
>
> &usart1 {
> - pinctrl-0 = <&usart1_pins>;
> + pinctrl-0 = <&usart1_pins_a>;
> pinctrl-names = "default";
> status = "okay";
> };
> diff --git a/dts/upstream/src/arm/st/stm32h750i-art-pi.dts b/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
> index 44c307f8b09c..00d195d52a45 100644
> --- a/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
> +++ b/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
> @@ -197,14 +197,14 @@
> };
>
> &usart2 {
> - pinctrl-0 = <&usart2_pins>;
> + pinctrl-0 = <&usart2_pins_a>;
> pinctrl-names = "default";
> status = "disabled";
> };
>
> &usart3 {
> pinctrl-names = "default";
> - pinctrl-0 = <&usart3_pins>;
> + pinctrl-0 = <&usart3_pins_a>;
> dmas = <&dmamux1 45 0x400 0x05>,
> <&dmamux1 46 0x400 0x05>;
> dma-names = "rx", "tx";
> @@ -221,7 +221,7 @@
> };
>
> &uart4 {
> - pinctrl-0 = <&uart4_pins>;
> + pinctrl-0 = <&uart4_pins_a>;
> pinctrl-names = "default";
> status = "okay";
> };
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 2/9] dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
2025-06-07 9:37 ` [PATCH 2/9] dt-bindings: arm: stm32: add compatible for stm32h747i-disco board Dario Binacchi
@ 2025-06-09 7:55 ` Patrice CHOTARD
0 siblings, 0 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 7:55 UTC (permalink / raw)
To: Dario Binacchi, u-boot
Cc: linux-amarula, Krzysztof Kozlowski, Alexandre Torgue,
Patrick Delaunay, Sumit Garg, Tom Rini, uboot-stm32
On 6/7/25 11:37, Dario Binacchi wrote:
> The board includes an STM32H747XI SoC with the following resources:
> - 2 Mbytes Flash
> - 1 MByte SRAM
> - LCD-TFT controller
> - MIPI-DSI interface
> - FD-CAN
> - USB 2.0 high-speed/full-speed
> - Ethernet MAC
> - camera interface
>
> Detailed information can be found at:
> https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Link: https://lore.kernel.org/r/20250427074404.3278732-3-dario.binacchi@amarulasolutions.com
> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
>
> [upstream commit: 815d49f61ea049075482161f897aa13e1ae30cbb ]
>
> ---
>
> dts/upstream/Bindings/arm/stm32/stm32.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/dts/upstream/Bindings/arm/stm32/stm32.yaml b/dts/upstream/Bindings/arm/stm32/stm32.yaml
> index b6c56d4ce6b9..a0660a0b494f 100644
> --- a/dts/upstream/Bindings/arm/stm32/stm32.yaml
> +++ b/dts/upstream/Bindings/arm/stm32/stm32.yaml
> @@ -42,6 +42,10 @@ properties:
> - st,stm32h743i-disco
> - st,stm32h743i-eval
> - const: st,stm32h743
> + - items:
> + - enum:
> + - st,stm32h747i-disco
> + - const: st,stm32h747
> - items:
> - enum:
> - st,stm32h750i-art-pi
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 3/9] dt-bindings: clock: stm32h7: rename USART{7, 8}_CK to UART{7,8}_CK
2025-06-07 9:37 ` [PATCH 3/9] dt-bindings: clock: stm32h7: rename USART{7, 8}_CK to UART{7, 8}_CK Dario Binacchi
@ 2025-06-09 7:55 ` Patrice CHOTARD
0 siblings, 0 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 7:55 UTC (permalink / raw)
To: Dario Binacchi, u-boot
Cc: linux-amarula, Krzysztof Kozlowski, Alexandre Torgue,
Patrick Delaunay, Sumit Garg, Tom Rini, uboot-stm32
On 6/7/25 11:37, Dario Binacchi wrote:
> As stated in the reference manual RM0433, the STM32H743 MCU has
> USART1/2/3/6, UART4/5/7/8, and LPUART1. The patches make all the clock
> macros for the serial ports consistent with the documentation.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Link: https://lore.kernel.org/r/20250427074404.3278732-5-dario.binacchi@amarulasolutions.com
> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
>
> [ upstream commit: ecab3c40fa49a2073c4c916ebff9496a6b5db7bd ]
>
> ---
>
> dts/upstream/include/dt-bindings/clock/stm32h7-clks.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/dts/upstream/include/dt-bindings/clock/stm32h7-clks.h b/dts/upstream/include/dt-bindings/clock/stm32h7-clks.h
> index 6637272b3242..330b39c2c303 100644
> --- a/dts/upstream/include/dt-bindings/clock/stm32h7-clks.h
> +++ b/dts/upstream/include/dt-bindings/clock/stm32h7-clks.h
> @@ -126,8 +126,8 @@
> #define ADC3_CK 128
> #define DSI_CK 129
> #define LTDC_CK 130
> -#define USART8_CK 131
> -#define USART7_CK 132
> +#define UART8_CK 131
> +#define UART7_CK 132
> #define HDMICEC_CK 133
> #define I2C3_CK 134
> #define I2C2_CK 135
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 4/9] ARM: dts: stm32: add uart8 node for stm32h743 MCU
2025-06-07 9:37 ` [PATCH 4/9] ARM: dts: stm32: add uart8 node for stm32h743 MCU Dario Binacchi
@ 2025-06-09 7:56 ` Patrice CHOTARD
0 siblings, 0 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 7:56 UTC (permalink / raw)
To: Dario Binacchi, u-boot
Cc: linux-amarula, Alexandre Torgue, Patrick Delaunay, Sumit Garg,
Tom Rini, uboot-stm32
On 6/7/25 11:37, Dario Binacchi wrote:
> Add support for UART8 by applying the settings specified in the
> reference manual RM0433.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> Link: https://lore.kernel.org/r/20250427074404.3278732-6-dario.binacchi@amarulasolutions.com
> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
>
> [ upstream commit: 07aa43adae2363c3734055aeba0789536fa0f8f2 ]
>
> ---
>
> dts/upstream/src/arm/st/stm32h743.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/dts/upstream/src/arm/st/stm32h743.dtsi b/dts/upstream/src/arm/st/stm32h743.dtsi
> index b8d4c44c8a82..2f19cfbc57ad 100644
> --- a/dts/upstream/src/arm/st/stm32h743.dtsi
> +++ b/dts/upstream/src/arm/st/stm32h743.dtsi
> @@ -211,6 +211,14 @@
> };
> };
>
> + uart8: serial@40007c00 {
> + compatible = "st,stm32h7-uart";
> + reg = <0x40007c00 0x400>;
> + interrupts = <83>;
> + status = "disabled";
> + clocks = <&rcc UART8_CK>;
> + };
> +
> usart1: serial@40011000 {
> compatible = "st,stm32h7-uart";
> reg = <0x40011000 0x400>;
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 5/9] ARM: dts: stm32: add pin map for UART8 controller on stm32h743
2025-06-07 9:37 ` [PATCH 5/9] ARM: dts: stm32: add pin map for UART8 controller on stm32h743 Dario Binacchi
@ 2025-06-09 7:56 ` Patrice CHOTARD
0 siblings, 0 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 7:56 UTC (permalink / raw)
To: Dario Binacchi, u-boot
Cc: linux-amarula, Alexandre Torgue, Patrick Delaunay, Sumit Garg,
Tom Rini, uboot-stm32
On 6/7/25 11:37, Dario Binacchi wrote:
> Add a pin map configuration for using the UART8 controller on the
> stm32h743 MCU.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> Link: https://lore.kernel.org/r/20250427074404.3278732-7-dario.binacchi@amarulasolutions.com
> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
>
> [ upstream commit: 47d16ab94b8e5e85aedba3cd22cfdf3877bf1dfb ]
>
> ---
>
> dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> index ad00c1080a96..96022afd0168 100644
> --- a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> +++ b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> @@ -211,6 +211,19 @@
> };
> };
>
> + uart8_pins_a: uart8-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('J', 8, AF8)>; /* UART8_TX */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('J', 9, AF8)>; /* UART8_RX */
> + bias-disable;
> + };
> + };
> +
> usart1_pins_a: usart1-0 {
> pins1 {
> pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 6/9] ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
2025-06-07 9:37 ` [PATCH 6/9] ARM: dts: stm32: add an extra pin map for USART1 " Dario Binacchi
@ 2025-06-09 7:56 ` Patrice CHOTARD
0 siblings, 0 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 7:56 UTC (permalink / raw)
To: Dario Binacchi, u-boot
Cc: linux-amarula, Alexandre Torgue, Patrick Delaunay, Sumit Garg,
Tom Rini, uboot-stm32
On 6/7/25 11:37, Dario Binacchi wrote:
> Add an additional pin map configuration for using the USART1 controller
> on the stm32h743 MCU.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> Link: https://lore.kernel.org/r/20250427074404.3278732-8-dario.binacchi@amarulasolutions.com
> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
>
> [ upstream commit: 8e71dfe46a4a1e9505b1a327470f879b63388968 ]
>
> ---
>
> dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> index 96022afd0168..8a6db484383d 100644
> --- a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> +++ b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> @@ -237,6 +237,19 @@
> };
> };
>
> + usart1_pins_b: usart1-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('A', 10, AF7)>; /* USART1_RX */
> + bias-disable;
> + };
> + };
> +
> usart2_pins_a: usart2-0 {
> pins1 {
> pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 7/9] ARM: dts: stm32: support STM32h747i-disco board
2025-06-07 9:37 ` [PATCH 7/9] ARM: dts: stm32: support STM32h747i-disco board Dario Binacchi
@ 2025-06-09 7:57 ` Patrice CHOTARD
0 siblings, 0 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 7:57 UTC (permalink / raw)
To: Dario Binacchi, u-boot
Cc: linux-amarula, Alexandre Torgue, Patrick Delaunay, Sumit Garg,
Tom Rini, uboot-stm32
On 6/7/25 11:37, Dario Binacchi wrote:
> The board includes an STM32H747XI SoC with the following resources:
> - 2 Mbytes Flash
> - 1 Mbyte SRAM
> - LCD-TFT controller
> - MIPI-DSI interface
> - FD-CAN
> - USB 2.0 high-speed/full-speed
> - Ethernet MAC
> - camera interface
>
> Detailed information can be found at:
> https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> Link: https://lore.kernel.org/r/20250427074404.3278732-9-dario.binacchi@amarulasolutions.com
> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
>
> [ backport upstream commit: 49ba8fc6eab63165639ffbb9f976222d39739cab ]
>
> ---
>
> dts/upstream/src/arm/st/stm32h747i-disco.dts | 136 +++++++++++++++++++
> 1 file changed, 136 insertions(+)
> create mode 100644 dts/upstream/src/arm/st/stm32h747i-disco.dts
>
> diff --git a/dts/upstream/src/arm/st/stm32h747i-disco.dts b/dts/upstream/src/arm/st/stm32h747i-disco.dts
> new file mode 100644
> index 000000000000..99f0255dae8e
> --- /dev/null
> +++ b/dts/upstream/src/arm/st/stm32h747i-disco.dts
> @@ -0,0 +1,136 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2025 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
> + */
> +
> +/dts-v1/;
> +#include "stm32h743.dtsi"
> +#include "stm32h7-pinctrl.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + model = "STMicroelectronics STM32H747i-Discovery board";
> + compatible = "st,stm32h747i-disco", "st,stm32h747";
> +
> + chosen {
> + bootargs = "root=/dev/ram";
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory@d0000000 {
> + device_type = "memory";
> + reg = <0xd0000000 0x2000000>;
> + };
> +
> + aliases {
> + serial0 = &usart1;
> + serial1 = &uart8;
> + };
> +
> + v3v3: regulator-v3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "v3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + led-green {
> + gpios = <&gpioi 12 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "heartbeat";
> + };
> + led-orange {
> + gpios = <&gpioi 13 GPIO_ACTIVE_LOW>;
> + };
> + led-red {
> + gpios = <&gpioi 14 GPIO_ACTIVE_LOW>;
> + };
> + led-blue {
> + gpios = <&gpioi 15 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + autorepeat;
> + button-0 {
> + label = "User";
> + linux,code = <KEY_WAKEUP>;
> + gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
> + };
> + button-1 {
> + label = "JoySel";
> + linux,code = <KEY_ENTER>;
> + gpios = <&gpiok 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + };
> + button-2 {
> + label = "JoyDown";
> + linux,code = <KEY_DOWN>;
> + gpios = <&gpiok 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + };
> + button-3 {
> + label = "JoyUp";
> + linux,code = <KEY_UP>;
> + gpios = <&gpiok 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + };
> + button-4 {
> + label = "JoyLeft";
> + linux,code = <KEY_LEFT>;
> + gpios = <&gpiok 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + };
> + button-5 {
> + label = "JoyRight";
> + linux,code = <KEY_RIGHT>;
> + gpios = <&gpiok 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + };
> + };
> +};
> +
> +&clk_hse {
> + clock-frequency = <25000000>;
> +};
> +
> +&mac {
> + status = "disabled";
> + pinctrl-0 = <ðernet_rmii>;
> + pinctrl-names = "default";
> + phy-mode = "rmii";
> + phy-handle = <&phy0>;
> +
> + mdio0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> + phy0: ethernet-phy@0 {
> + reg = <0>;
> + };
> + };
> +};
> +
> +&sdmmc1 {
> + pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-0 = <&sdmmc1_b4_pins_a>;
> + pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
> + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
> + cd-gpios = <&gpioi 8 GPIO_ACTIVE_LOW>;
> + broken-cd;
> + st,neg-edge;
> + bus-width = <4>;
> + vmmc-supply = <&v3v3>;
> + status = "okay";
> +};
> +
> +&usart1 {
> + pinctrl-0 = <&usart1_pins_b>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&uart8 {
> + pinctrl-0 = <&uart8_pins_a>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 8/9] ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
2025-06-07 9:37 ` [PATCH 8/9] ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file Dario Binacchi
@ 2025-06-09 7:57 ` Patrice CHOTARD
0 siblings, 0 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 7:57 UTC (permalink / raw)
To: Dario Binacchi, u-boot
Cc: linux-amarula, Dillon Min, Patrick Delaunay, Tom Rini,
uboot-stm32
On 6/7/25 11:37, Dario Binacchi wrote:
> Add stm32h747i-disco-u-boot DTS file with FMC SDRAM node and its
> pinmux settings.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> ---
>
> arch/arm/dts/stm32h747i-disco-u-boot.dtsi | 104 ++++++++++++++++++++++
> 1 file changed, 104 insertions(+)
> create mode 100644 arch/arm/dts/stm32h747i-disco-u-boot.dtsi
>
> diff --git a/arch/arm/dts/stm32h747i-disco-u-boot.dtsi b/arch/arm/dts/stm32h747i-disco-u-boot.dtsi
> new file mode 100644
> index 000000000000..ff297cc91fa8
> --- /dev/null
> +++ b/arch/arm/dts/stm32h747i-disco-u-boot.dtsi
> @@ -0,0 +1,104 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2025 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
> + */
> +
> +#include <stm32h7-u-boot.dtsi>
> +
> +&fmc {
> +
> + /*
> + * Memory configuration from sdram datasheet IS42S32800G-6BLI
> + * first bank is bank@0
> + * second bank is bank@1
> + */
> + bank1: bank@1 {
> + st,sdram-control = /bits/ 8 <NO_COL_9
> + NO_ROW_12
> + MWIDTH_32
> + BANKS_4
> + CAS_2
> + SDCLK_3
> + RD_BURST_EN
> + RD_PIPE_DL_0>;
> + st,sdram-timing = /bits/ 8 <TMRD_1
> + TXSR_1
> + TRAS_1
> + TRC_6
> + TRP_2
> + TWR_1
> + TRCD_1>;
> + st,sdram-refcount = <1539>;
> + };
> +};
> +
> +&pinctrl {
> + fmc_pins: fmc@0 {
> + pins {
> + pinmux = <STM32_PINMUX('D', 0, AF12)>,
> + <STM32_PINMUX('D', 1, AF12)>,
> + <STM32_PINMUX('D', 8, AF12)>,
> + <STM32_PINMUX('D', 9, AF12)>,
> + <STM32_PINMUX('D',10, AF12)>,
> + <STM32_PINMUX('D',14, AF12)>,
> + <STM32_PINMUX('D',15, AF12)>,
> +
> + <STM32_PINMUX('E', 0, AF12)>,
> + <STM32_PINMUX('E', 1, AF12)>,
> + <STM32_PINMUX('E', 7, AF12)>,
> + <STM32_PINMUX('E', 8, AF12)>,
> + <STM32_PINMUX('E', 9, AF12)>,
> + <STM32_PINMUX('E',10, AF12)>,
> + <STM32_PINMUX('E',11, AF12)>,
> + <STM32_PINMUX('E',12, AF12)>,
> + <STM32_PINMUX('E',13, AF12)>,
> + <STM32_PINMUX('E',14, AF12)>,
> + <STM32_PINMUX('E',15, AF12)>,
> +
> + <STM32_PINMUX('F', 0, AF12)>,
> + <STM32_PINMUX('F', 1, AF12)>,
> + <STM32_PINMUX('F', 2, AF12)>,
> + <STM32_PINMUX('F', 3, AF12)>,
> + <STM32_PINMUX('F', 4, AF12)>,
> + <STM32_PINMUX('F', 5, AF12)>,
> + <STM32_PINMUX('F',11, AF12)>,
> + <STM32_PINMUX('F',12, AF12)>,
> + <STM32_PINMUX('F',13, AF12)>,
> + <STM32_PINMUX('F',14, AF12)>,
> + <STM32_PINMUX('F',15, AF12)>,
> +
> + <STM32_PINMUX('G', 0, AF12)>,
> + <STM32_PINMUX('G', 1, AF12)>,
> + <STM32_PINMUX('G', 2, AF12)>,
> + <STM32_PINMUX('G', 4, AF12)>,
> + <STM32_PINMUX('G', 5, AF12)>,
> + <STM32_PINMUX('G', 8, AF12)>,
> + <STM32_PINMUX('G',15, AF12)>,
> +
> + <STM32_PINMUX('H', 5, AF12)>,
> + <STM32_PINMUX('H', 6, AF12)>,
> + <STM32_PINMUX('H', 7, AF12)>,
> + <STM32_PINMUX('H', 8, AF12)>,
> + <STM32_PINMUX('H', 9, AF12)>,
> + <STM32_PINMUX('H',10, AF12)>,
> + <STM32_PINMUX('H',11, AF12)>,
> + <STM32_PINMUX('H',12, AF12)>,
> + <STM32_PINMUX('H',13, AF12)>,
> + <STM32_PINMUX('H',14, AF12)>,
> + <STM32_PINMUX('H',15, AF12)>,
> +
> + <STM32_PINMUX('I', 0, AF12)>,
> + <STM32_PINMUX('I', 1, AF12)>,
> + <STM32_PINMUX('I', 2, AF12)>,
> + <STM32_PINMUX('I', 3, AF12)>,
> + <STM32_PINMUX('I', 4, AF12)>,
> + <STM32_PINMUX('I', 5, AF12)>,
> + <STM32_PINMUX('I', 6, AF12)>,
> + <STM32_PINMUX('I', 7, AF12)>,
> + <STM32_PINMUX('I', 9, AF12)>,
> + <STM32_PINMUX('I',10, AF12)>;
> +
> + slew-rate = <3>;
> + };
> + };
> +};
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 9/9] board: stm32: add stm32h747-discovery board support
2025-06-07 9:37 ` [PATCH 9/9] board: stm32: add stm32h747-discovery board support Dario Binacchi
@ 2025-06-09 7:58 ` Patrice CHOTARD
2025-06-09 8:07 ` Lukasz Majewski
0 siblings, 1 reply; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 7:58 UTC (permalink / raw)
To: Dario Binacchi, u-boot
Cc: linux-amarula, Ilias Apalodimas, Jerome Forissier,
Lukasz Majewski, Patrick Delaunay, Rasmus Villemoes,
Sean Anderson, Tom Rini, uboot-stm32
On 6/7/25 11:37, Dario Binacchi wrote:
> The board includes an STM32H747XI SoC with the following resources:
> - 2 Mbytes Flash
> - 1 Mbyte SRAM
> - LCD-TFT controller
> - MIPI-DSI interface
> - FD-CAN
> - USB 2.0 high-speed/full-speed
> - Ethernet MAC
> - camera interface
>
> Detailed information can be found at:
> https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
>
> ---
>
> arch/arm/mach-stm32/stm32h7/Kconfig | 4 +++
> board/st/stm32h747-disco/Kconfig | 15 ++++++++
> board/st/stm32h747-disco/MAINTAINERS | 7 ++++
> board/st/stm32h747-disco/Makefile | 6 ++++
> board/st/stm32h747-disco/stm32h747-disco.c | 42 ++++++++++++++++++++++
> configs/stm32h747-disco_defconfig | 35 ++++++++++++++++++
> drivers/clk/stm32/clk-stm32h7.c | 5 +++
> include/configs/stm32h747-disco.h | 32 +++++++++++++++++
> 8 files changed, 146 insertions(+)
> create mode 100644 board/st/stm32h747-disco/Kconfig
> create mode 100644 board/st/stm32h747-disco/MAINTAINERS
> create mode 100644 board/st/stm32h747-disco/Makefile
> create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
> create mode 100644 configs/stm32h747-disco_defconfig
> create mode 100644 include/configs/stm32h747-disco.h
>
> diff --git a/arch/arm/mach-stm32/stm32h7/Kconfig b/arch/arm/mach-stm32/stm32h7/Kconfig
> index 70233a4b23cd..72f20c477d04 100644
> --- a/arch/arm/mach-stm32/stm32h7/Kconfig
> +++ b/arch/arm/mach-stm32/stm32h7/Kconfig
> @@ -6,11 +6,15 @@ config TARGET_STM32H743_DISCO
> config TARGET_STM32H743_EVAL
> bool "STM32H743 Evaluation board"
>
> +config TARGET_STM32H747_DISCO
> + bool "STM32H747 Discovery board"
> +
> config TARGET_STM32H750_ART_PI
> bool "STM32H750 ART Pi board"
>
> source "board/st/stm32h743-eval/Kconfig"
> source "board/st/stm32h743-disco/Kconfig"
> +source "board/st/stm32h747-disco/Kconfig"
> source "board/st/stm32h750-art-pi/Kconfig"
>
> endif
> diff --git a/board/st/stm32h747-disco/Kconfig b/board/st/stm32h747-disco/Kconfig
> new file mode 100644
> index 000000000000..a7b2c09a327f
> --- /dev/null
> +++ b/board/st/stm32h747-disco/Kconfig
> @@ -0,0 +1,15 @@
> +if TARGET_STM32H747_DISCO
> +
> +config SYS_BOARD
> + default "stm32h747-disco"
> +
> +config SYS_VENDOR
> + default "st"
> +
> +config SYS_SOC
> + default "stm32h7"
> +
> +config SYS_CONFIG_NAME
> + default "stm32h747-disco"
> +
> +endif
> diff --git a/board/st/stm32h747-disco/MAINTAINERS b/board/st/stm32h747-disco/MAINTAINERS
> new file mode 100644
> index 000000000000..d48649f773f3
> --- /dev/null
> +++ b/board/st/stm32h747-disco/MAINTAINERS
> @@ -0,0 +1,7 @@
> +STM32H747 DISCOVERY BOARD
> +M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> +S: Maintained
> +F: board/st/stm32h747-disco
> +F: include/configs/stm32h747-disco.h
> +F: configs/stm32h747-disco_defconfig
> +F: arch/arm/dts/stm32h747*
> diff --git a/board/st/stm32h747-disco/Makefile b/board/st/stm32h747-disco/Makefile
> new file mode 100644
> index 000000000000..e11f052cc88f
> --- /dev/null
> +++ b/board/st/stm32h747-disco/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (c) 2025 Dario Binacchi <dario.binacchi@amarulasolutions.com>
> +#
> +
> +obj-y := stm32h747-disco.o
> diff --git a/board/st/stm32h747-disco/stm32h747-disco.c b/board/st/stm32h747-disco/stm32h747-disco.c
> new file mode 100644
> index 000000000000..be0884bdeb4d
> --- /dev/null
> +++ b/board/st/stm32h747-disco/stm32h747-disco.c
> @@ -0,0 +1,42 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * stm32h747i-disco support
> + *
> + * Copyright (C) 2025 Dario Binacchi <dario.binacchi@amarulasolutions.com>
> + */
> +
> +#include <dm.h>
> +#include <init.h>
> +#include <log.h>
> +#include <asm/global_data.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int dram_init(void)
> +{
> + struct udevice *dev;
> + int ret;
> +
> + ret = uclass_get_device(UCLASS_RAM, 0, &dev);
> + if (ret) {
> + debug("DRAM init failed: %d\n", ret);
> + return ret;
> + }
> +
> + if (fdtdec_setup_mem_size_base() != 0)
> + ret = -EINVAL;
> +
> + return ret;
> +}
> +
> +int dram_init_banksize(void)
> +{
> + fdtdec_setup_memory_banksize();
> +
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> + return 0;
> +}
> diff --git a/configs/stm32h747-disco_defconfig b/configs/stm32h747-disco_defconfig
> new file mode 100644
> index 000000000000..8a0c72450d1e
> --- /dev/null
> +++ b/configs/stm32h747-disco_defconfig
> @@ -0,0 +1,35 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_STM32=y
> +CONFIG_TEXT_BASE=0x08000000
> +CONFIG_SYS_MALLOC_LEN=0x100000
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000
> +CONFIG_ENV_SIZE=0x2000
> +CONFIG_DEFAULT_DEVICE_TREE="st/stm32h747i-disco"
> +CONFIG_OF_LIBFDT_OVERLAY=y
> +CONFIG_SYS_LOAD_ADDR=0xd0400000
> +CONFIG_STM32H7=y
> +CONFIG_TARGET_STM32H747_DISCO=y
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_BOOTDELAY=3
> +CONFIG_AUTOBOOT_KEYED=y
> +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
> +CONFIG_AUTOBOOT_STOP_STR=" "
> +CONFIG_DEFAULT_FDT_FILE="stm32h747i-disco"
> +CONFIG_SYS_CBSIZE=256
> +CONFIG_SYS_PBSIZE=282
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_SYS_PROMPT="U-Boot > "
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_MMC=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_CACHE=y
> +CONFIG_CMD_TIMER=y
> +CONFIG_CMD_EXT4_WRITE=y
> +# CONFIG_ISO_PARTITION is not set
> +CONFIG_OF_CONTROL=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_NO_NET=y
> +CONFIG_STM32_SDMMC2=y
> +# CONFIG_PINCTRL_FULL is not set
> diff --git a/drivers/clk/stm32/clk-stm32h7.c b/drivers/clk/stm32/clk-stm32h7.c
> index 6acf2ff0a8fb..aa3be414a29f 100644
> --- a/drivers/clk/stm32/clk-stm32h7.c
> +++ b/drivers/clk/stm32/clk-stm32h7.c
> @@ -114,6 +114,7 @@
> #define QSPISRC_PER_CK 3
>
> #define PWR_CR3 0x0c
> +#define PWR_CR3_LDOEN BIT(1)
> #define PWR_CR3_SCUEN BIT(2)
> #define PWR_D3CR 0x18
> #define PWR_D3CR_VOS_MASK GENMASK(15, 14)
> @@ -375,7 +376,11 @@ int configure_clocks(struct udevice *dev)
> clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK,
> VOS_SCALE_1 << PWR_D3CR_VOS_SHIFT);
> /* Lock supply configuration update */
> +#if IS_ENABLED(CONFIG_TARGET_STM32H747_DISCO)
> + clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_LDOEN);
> +#else
> clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN);
> +#endif
> while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY))
> ;
>
> diff --git a/include/configs/stm32h747-disco.h b/include/configs/stm32h747-disco.h
> new file mode 100644
> index 000000000000..393445a8ae1f
> --- /dev/null
> +++ b/include/configs/stm32h747-disco.h
> @@ -0,0 +1,32 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2025 Dario Binacchi <dario.binacchi@amarulasolutions.com>
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#include <config.h>
> +#include <linux/sizes.h>
> +
> +/* For booting Linux, use the first 16MB of memory */
> +#define CFG_SYS_BOOTMAPSZ SZ_16M
> +
> +#define CFG_SYS_FLASH_BASE 0x08000000
> +
> +#define CFG_SYS_HZ_CLOCK 1000000
> +
> +#define BOOT_TARGET_DEVICES(func) \
> + func(MMC, mmc, 0)
> +
> +#include <config_distro_bootcmd.h>
> +#define CFG_EXTRA_ENV_SETTINGS \
> + "kernel_addr_r=0xD0008000\0" \
> + "fdtfile=stm32h747i-disco.dtb\0" \
> + "fdt_addr_r=0xD0408000\0" \
> + "scriptaddr=0xD0418000\0" \
> + "pxefile_addr_r=0xD0428000\0" \
> + "ramdisk_addr_r=0xD0438000\0" \
> + BOOTENV
> +
> +#endif /* __CONFIG_H */
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 9/9] board: stm32: add stm32h747-discovery board support
2025-06-09 7:58 ` Patrice CHOTARD
@ 2025-06-09 8:07 ` Lukasz Majewski
2025-06-09 8:34 ` Patrice CHOTARD
0 siblings, 1 reply; 38+ messages in thread
From: Lukasz Majewski @ 2025-06-09 8:07 UTC (permalink / raw)
To: Patrice CHOTARD
Cc: Dario Binacchi, u-boot, linux-amarula, Ilias Apalodimas,
Jerome Forissier, Patrick Delaunay, Rasmus Villemoes,
Sean Anderson, Tom Rini, uboot-stm32
[-- Attachment #1: Type: text/plain, Size: 8869 bytes --]
Hi Patrice,
> On 6/7/25 11:37, Dario Binacchi wrote:
> > The board includes an STM32H747XI SoC with the following resources:
> > - 2 Mbytes Flash
> > - 1 Mbyte SRAM
> > - LCD-TFT controller
> > - MIPI-DSI interface
> > - FD-CAN
> > - USB 2.0 high-speed/full-speed
> > - Ethernet MAC
> > - camera interface
> >
> > Detailed information can be found at:
> > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> >
> > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> >
> > ---
> >
> > arch/arm/mach-stm32/stm32h7/Kconfig | 4 +++
> > board/st/stm32h747-disco/Kconfig | 15 ++++++++
> > board/st/stm32h747-disco/MAINTAINERS | 7 ++++
> > board/st/stm32h747-disco/Makefile | 6 ++++
> > board/st/stm32h747-disco/stm32h747-disco.c | 42
> > ++++++++++++++++++++++ configs/stm32h747-disco_defconfig |
> > 35 ++++++++++++++++++ drivers/clk/stm32/clk-stm32h7.c |
> > 5 +++ include/configs/stm32h747-disco.h | 32
> > +++++++++++++++++ 8 files changed, 146 insertions(+)
> > create mode 100644 board/st/stm32h747-disco/Kconfig
> > create mode 100644 board/st/stm32h747-disco/MAINTAINERS
> > create mode 100644 board/st/stm32h747-disco/Makefile
> > create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
> > create mode 100644 configs/stm32h747-disco_defconfig
> > create mode 100644 include/configs/stm32h747-disco.h
> >
> > diff --git a/arch/arm/mach-stm32/stm32h7/Kconfig
> > b/arch/arm/mach-stm32/stm32h7/Kconfig index
> > 70233a4b23cd..72f20c477d04 100644 ---
> > a/arch/arm/mach-stm32/stm32h7/Kconfig +++
> > b/arch/arm/mach-stm32/stm32h7/Kconfig @@ -6,11 +6,15 @@ config
> > TARGET_STM32H743_DISCO config TARGET_STM32H743_EVAL
> > bool "STM32H743 Evaluation board"
> >
> > +config TARGET_STM32H747_DISCO
> > + bool "STM32H747 Discovery board"
> > +
> > config TARGET_STM32H750_ART_PI
> > bool "STM32H750 ART Pi board"
> >
> > source "board/st/stm32h743-eval/Kconfig"
> > source "board/st/stm32h743-disco/Kconfig"
> > +source "board/st/stm32h747-disco/Kconfig"
> > source "board/st/stm32h750-art-pi/Kconfig"
> >
> > endif
> > diff --git a/board/st/stm32h747-disco/Kconfig
> > b/board/st/stm32h747-disco/Kconfig new file mode 100644
> > index 000000000000..a7b2c09a327f
> > --- /dev/null
> > +++ b/board/st/stm32h747-disco/Kconfig
> > @@ -0,0 +1,15 @@
> > +if TARGET_STM32H747_DISCO
> > +
> > +config SYS_BOARD
> > + default "stm32h747-disco"
> > +
> > +config SYS_VENDOR
> > + default "st"
> > +
> > +config SYS_SOC
> > + default "stm32h7"
> > +
> > +config SYS_CONFIG_NAME
> > + default "stm32h747-disco"
> > +
> > +endif
> > diff --git a/board/st/stm32h747-disco/MAINTAINERS
> > b/board/st/stm32h747-disco/MAINTAINERS new file mode 100644
> > index 000000000000..d48649f773f3
> > --- /dev/null
> > +++ b/board/st/stm32h747-disco/MAINTAINERS
> > @@ -0,0 +1,7 @@
> > +STM32H747 DISCOVERY BOARD
> > +M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> > +S: Maintained
> > +F: board/st/stm32h747-disco
> > +F: include/configs/stm32h747-disco.h
> > +F: configs/stm32h747-disco_defconfig
> > +F: arch/arm/dts/stm32h747*
> > diff --git a/board/st/stm32h747-disco/Makefile
> > b/board/st/stm32h747-disco/Makefile new file mode 100644
> > index 000000000000..e11f052cc88f
> > --- /dev/null
> > +++ b/board/st/stm32h747-disco/Makefile
> > @@ -0,0 +1,6 @@
> > +# SPDX-License-Identifier: GPL-2.0+
> > +#
> > +# Copyright (c) 2025 Dario Binacchi
> > <dario.binacchi@amarulasolutions.com> +#
> > +
> > +obj-y := stm32h747-disco.o
> > diff --git a/board/st/stm32h747-disco/stm32h747-disco.c
> > b/board/st/stm32h747-disco/stm32h747-disco.c new file mode 100644
> > index 000000000000..be0884bdeb4d
> > --- /dev/null
> > +++ b/board/st/stm32h747-disco/stm32h747-disco.c
> > @@ -0,0 +1,42 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * stm32h747i-disco support
> > + *
> > + * Copyright (C) 2025 Dario Binacchi
> > <dario.binacchi@amarulasolutions.com>
> > + */
> > +
> > +#include <dm.h>
> > +#include <init.h>
> > +#include <log.h>
> > +#include <asm/global_data.h>
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +int dram_init(void)
> > +{
> > + struct udevice *dev;
> > + int ret;
> > +
> > + ret = uclass_get_device(UCLASS_RAM, 0, &dev);
> > + if (ret) {
> > + debug("DRAM init failed: %d\n", ret);
> > + return ret;
> > + }
> > +
> > + if (fdtdec_setup_mem_size_base() != 0)
> > + ret = -EINVAL;
> > +
> > + return ret;
> > +}
> > +
> > +int dram_init_banksize(void)
> > +{
> > + fdtdec_setup_memory_banksize();
> > +
> > + return 0;
> > +}
> > +
> > +int board_init(void)
> > +{
> > + return 0;
> > +}
> > diff --git a/configs/stm32h747-disco_defconfig
> > b/configs/stm32h747-disco_defconfig new file mode 100644
> > index 000000000000..8a0c72450d1e
> > --- /dev/null
> > +++ b/configs/stm32h747-disco_defconfig
> > @@ -0,0 +1,35 @@
> > +CONFIG_ARM=y
> > +CONFIG_ARCH_STM32=y
> > +CONFIG_TEXT_BASE=0x08000000
> > +CONFIG_SYS_MALLOC_LEN=0x100000
> > +CONFIG_NR_DRAM_BANKS=1
> > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000
> > +CONFIG_ENV_SIZE=0x2000
> > +CONFIG_DEFAULT_DEVICE_TREE="st/stm32h747i-disco"
> > +CONFIG_OF_LIBFDT_OVERLAY=y
> > +CONFIG_SYS_LOAD_ADDR=0xd0400000
> > +CONFIG_STM32H7=y
> > +CONFIG_TARGET_STM32H747_DISCO=y
> > +CONFIG_DISTRO_DEFAULTS=y
I'm just wondering if there is any plan to move forward to use the new
approach?
As fair as I remember this is the "deprecated" option...
> > +CONFIG_BOOTDELAY=3
> > +CONFIG_AUTOBOOT_KEYED=y
> > +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop
> > autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" "
> > +CONFIG_DEFAULT_FDT_FILE="stm32h747i-disco"
> > +CONFIG_SYS_CBSIZE=256
> > +CONFIG_SYS_PBSIZE=282
> > +# CONFIG_DISPLAY_CPUINFO is not set
> > +CONFIG_SYS_PROMPT="U-Boot > "
> > +CONFIG_CMD_GPT=y
> > +CONFIG_CMD_MMC=y
> > +# CONFIG_CMD_SETEXPR is not set
> > +CONFIG_CMD_CACHE=y
> > +CONFIG_CMD_TIMER=y
> > +CONFIG_CMD_EXT4_WRITE=y
> > +# CONFIG_ISO_PARTITION is not set
> > +CONFIG_OF_CONTROL=y
> > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> > +CONFIG_NO_NET=y
> > +CONFIG_STM32_SDMMC2=y
> > +# CONFIG_PINCTRL_FULL is not set
> > diff --git a/drivers/clk/stm32/clk-stm32h7.c
> > b/drivers/clk/stm32/clk-stm32h7.c index 6acf2ff0a8fb..aa3be414a29f
> > 100644 --- a/drivers/clk/stm32/clk-stm32h7.c
> > +++ b/drivers/clk/stm32/clk-stm32h7.c
> > @@ -114,6 +114,7 @@
> > #define QSPISRC_PER_CK 3
> >
> > #define PWR_CR3 0x0c
> > +#define PWR_CR3_LDOEN BIT(1)
> > #define PWR_CR3_SCUEN BIT(2)
> > #define PWR_D3CR 0x18
> > #define PWR_D3CR_VOS_MASK GENMASK(15, 14)
> > @@ -375,7 +376,11 @@ int configure_clocks(struct udevice *dev)
> > clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK,
> > VOS_SCALE_1 << PWR_D3CR_VOS_SHIFT);
> > /* Lock supply configuration update */
> > +#if IS_ENABLED(CONFIG_TARGET_STM32H747_DISCO)
> > + clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_LDOEN);
> > +#else
> > clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN);
> > +#endif
> > while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY))
> > ;
> >
> > diff --git a/include/configs/stm32h747-disco.h
> > b/include/configs/stm32h747-disco.h new file mode 100644
> > index 000000000000..393445a8ae1f
> > --- /dev/null
> > +++ b/include/configs/stm32h747-disco.h
> > @@ -0,0 +1,32 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright (C) 2025 Dario Binacchi
> > <dario.binacchi@amarulasolutions.com>
> > + */
> > +
> > +#ifndef __CONFIG_H
> > +#define __CONFIG_H
> > +
> > +#include <config.h>
> > +#include <linux/sizes.h>
> > +
> > +/* For booting Linux, use the first 16MB of memory */
> > +#define CFG_SYS_BOOTMAPSZ SZ_16M
> > +
> > +#define CFG_SYS_FLASH_BASE 0x08000000
> > +
> > +#define CFG_SYS_HZ_CLOCK 1000000
> > +
> > +#define BOOT_TARGET_DEVICES(func) \
> > + func(MMC, mmc, 0)
> > +
> > +#include <config_distro_bootcmd.h>
> > +#define CFG_EXTRA_ENV_SETTINGS \
> > + "kernel_addr_r=0xD0008000\0"
> > \
> > + "fdtfile=stm32h747i-disco.dtb\0" \
> > + "fdt_addr_r=0xD0408000\0" \
> > + "scriptaddr=0xD0418000\0" \
> > + "pxefile_addr_r=0xD0428000\0" \
> > + "ramdisk_addr_r=0xD0438000\0"
> > \
> > + BOOTENV
> > +
> > +#endif /* __CONFIG_H */
> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
>
> Thanks
> Patrice
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 9/9] board: stm32: add stm32h747-discovery board support
2025-06-09 8:07 ` Lukasz Majewski
@ 2025-06-09 8:34 ` Patrice CHOTARD
2025-06-09 9:22 ` [Uboot-stm32] " Patrice CHOTARD
2025-06-09 9:29 ` Lukasz Majewski
0 siblings, 2 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 8:34 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Dario Binacchi, u-boot, linux-amarula, Ilias Apalodimas,
Jerome Forissier, Patrick Delaunay, Rasmus Villemoes,
Sean Anderson, Tom Rini, uboot-stm32
On 6/9/25 10:07, Lukasz Majewski wrote:
> Hi Patrice,
>
>> On 6/7/25 11:37, Dario Binacchi wrote:
>>> The board includes an STM32H747XI SoC with the following resources:
>>> - 2 Mbytes Flash
>>> - 1 Mbyte SRAM
>>> - LCD-TFT controller
>>> - MIPI-DSI interface
>>> - FD-CAN
>>> - USB 2.0 high-speed/full-speed
>>> - Ethernet MAC
>>> - camera interface
>>>
>>> Detailed information can be found at:
>>> https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
>>>
>>> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
>>>
>>> ---
>>>
>>> arch/arm/mach-stm32/stm32h7/Kconfig | 4 +++
>>> board/st/stm32h747-disco/Kconfig | 15 ++++++++
>>> board/st/stm32h747-disco/MAINTAINERS | 7 ++++
>>> board/st/stm32h747-disco/Makefile | 6 ++++
>>> board/st/stm32h747-disco/stm32h747-disco.c | 42
>>> ++++++++++++++++++++++ configs/stm32h747-disco_defconfig |
>>> 35 ++++++++++++++++++ drivers/clk/stm32/clk-stm32h7.c |
>>> 5 +++ include/configs/stm32h747-disco.h | 32
>>> +++++++++++++++++ 8 files changed, 146 insertions(+)
>>> create mode 100644 board/st/stm32h747-disco/Kconfig
>>> create mode 100644 board/st/stm32h747-disco/MAINTAINERS
>>> create mode 100644 board/st/stm32h747-disco/Makefile
>>> create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
>>> create mode 100644 configs/stm32h747-disco_defconfig
>>> create mode 100644 include/configs/stm32h747-disco.h
>>>
>>> diff --git a/arch/arm/mach-stm32/stm32h7/Kconfig
>>> b/arch/arm/mach-stm32/stm32h7/Kconfig index
>>> 70233a4b23cd..72f20c477d04 100644 ---
>>> a/arch/arm/mach-stm32/stm32h7/Kconfig +++
>>> b/arch/arm/mach-stm32/stm32h7/Kconfig @@ -6,11 +6,15 @@ config
>>> TARGET_STM32H743_DISCO config TARGET_STM32H743_EVAL
>>> bool "STM32H743 Evaluation board"
>>>
>>> +config TARGET_STM32H747_DISCO
>>> + bool "STM32H747 Discovery board"
>>> +
>>> config TARGET_STM32H750_ART_PI
>>> bool "STM32H750 ART Pi board"
>>>
>>> source "board/st/stm32h743-eval/Kconfig"
>>> source "board/st/stm32h743-disco/Kconfig"
>>> +source "board/st/stm32h747-disco/Kconfig"
>>> source "board/st/stm32h750-art-pi/Kconfig"
>>>
>>> endif
>>> diff --git a/board/st/stm32h747-disco/Kconfig
>>> b/board/st/stm32h747-disco/Kconfig new file mode 100644
>>> index 000000000000..a7b2c09a327f
>>> --- /dev/null
>>> +++ b/board/st/stm32h747-disco/Kconfig
>>> @@ -0,0 +1,15 @@
>>> +if TARGET_STM32H747_DISCO
>>> +
>>> +config SYS_BOARD
>>> + default "stm32h747-disco"
>>> +
>>> +config SYS_VENDOR
>>> + default "st"
>>> +
>>> +config SYS_SOC
>>> + default "stm32h7"
>>> +
>>> +config SYS_CONFIG_NAME
>>> + default "stm32h747-disco"
>>> +
>>> +endif
>>> diff --git a/board/st/stm32h747-disco/MAINTAINERS
>>> b/board/st/stm32h747-disco/MAINTAINERS new file mode 100644
>>> index 000000000000..d48649f773f3
>>> --- /dev/null
>>> +++ b/board/st/stm32h747-disco/MAINTAINERS
>>> @@ -0,0 +1,7 @@
>>> +STM32H747 DISCOVERY BOARD
>>> +M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
>>> +S: Maintained
>>> +F: board/st/stm32h747-disco
>>> +F: include/configs/stm32h747-disco.h
>>> +F: configs/stm32h747-disco_defconfig
>>> +F: arch/arm/dts/stm32h747*
>>> diff --git a/board/st/stm32h747-disco/Makefile
>>> b/board/st/stm32h747-disco/Makefile new file mode 100644
>>> index 000000000000..e11f052cc88f
>>> --- /dev/null
>>> +++ b/board/st/stm32h747-disco/Makefile
>>> @@ -0,0 +1,6 @@
>>> +# SPDX-License-Identifier: GPL-2.0+
>>> +#
>>> +# Copyright (c) 2025 Dario Binacchi
>>> <dario.binacchi@amarulasolutions.com> +#
>>> +
>>> +obj-y := stm32h747-disco.o
>>> diff --git a/board/st/stm32h747-disco/stm32h747-disco.c
>>> b/board/st/stm32h747-disco/stm32h747-disco.c new file mode 100644
>>> index 000000000000..be0884bdeb4d
>>> --- /dev/null
>>> +++ b/board/st/stm32h747-disco/stm32h747-disco.c
>>> @@ -0,0 +1,42 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * stm32h747i-disco support
>>> + *
>>> + * Copyright (C) 2025 Dario Binacchi
>>> <dario.binacchi@amarulasolutions.com>
>>> + */
>>> +
>>> +#include <dm.h>
>>> +#include <init.h>
>>> +#include <log.h>
>>> +#include <asm/global_data.h>
>>> +
>>> +DECLARE_GLOBAL_DATA_PTR;
>>> +
>>> +int dram_init(void)
>>> +{
>>> + struct udevice *dev;
>>> + int ret;
>>> +
>>> + ret = uclass_get_device(UCLASS_RAM, 0, &dev);
>>> + if (ret) {
>>> + debug("DRAM init failed: %d\n", ret);
>>> + return ret;
>>> + }
>>> +
>>> + if (fdtdec_setup_mem_size_base() != 0)
>>> + ret = -EINVAL;
>>> +
>>> + return ret;
>>> +}
>>> +
>>> +int dram_init_banksize(void)
>>> +{
>>> + fdtdec_setup_memory_banksize();
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +int board_init(void)
>>> +{
>>> + return 0;
>>> +}
>>> diff --git a/configs/stm32h747-disco_defconfig
>>> b/configs/stm32h747-disco_defconfig new file mode 100644
>>> index 000000000000..8a0c72450d1e
>>> --- /dev/null
>>> +++ b/configs/stm32h747-disco_defconfig
>>> @@ -0,0 +1,35 @@
>>> +CONFIG_ARM=y
>>> +CONFIG_ARCH_STM32=y
>>> +CONFIG_TEXT_BASE=0x08000000
>>> +CONFIG_SYS_MALLOC_LEN=0x100000
>>> +CONFIG_NR_DRAM_BANKS=1
>>> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>>> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000
>>> +CONFIG_ENV_SIZE=0x2000
>>> +CONFIG_DEFAULT_DEVICE_TREE="st/stm32h747i-disco"
>>> +CONFIG_OF_LIBFDT_OVERLAY=y
>>> +CONFIG_SYS_LOAD_ADDR=0xd0400000
>>> +CONFIG_STM32H7=y
>>> +CONFIG_TARGET_STM32H747_DISCO=y
>>> +CONFIG_DISTRO_DEFAULTS=y
>
> I'm just wondering if there is any plan to move forward to use the new
> approach?
>
> As fair as I remember this is the "deprecated" option...
Hi Lukasz
I was not aware of deprecation of CONFIG_DISTRO_DEFAULTS .
Can you point to me the other alternative ?
Thanks
Patrice
>
>>> +CONFIG_BOOTDELAY=3
>>> +CONFIG_AUTOBOOT_KEYED=y
>>> +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop
>>> autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" "
>>> +CONFIG_DEFAULT_FDT_FILE="stm32h747i-disco"
>>> +CONFIG_SYS_CBSIZE=256
>>> +CONFIG_SYS_PBSIZE=282
>>> +# CONFIG_DISPLAY_CPUINFO is not set
>>> +CONFIG_SYS_PROMPT="U-Boot > "
>>> +CONFIG_CMD_GPT=y
>>> +CONFIG_CMD_MMC=y
>>> +# CONFIG_CMD_SETEXPR is not set
>>> +CONFIG_CMD_CACHE=y
>>> +CONFIG_CMD_TIMER=y
>>> +CONFIG_CMD_EXT4_WRITE=y
>>> +# CONFIG_ISO_PARTITION is not set
>>> +CONFIG_OF_CONTROL=y
>>> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>>> +CONFIG_NO_NET=y
>>> +CONFIG_STM32_SDMMC2=y
>>> +# CONFIG_PINCTRL_FULL is not set
>>> diff --git a/drivers/clk/stm32/clk-stm32h7.c
>>> b/drivers/clk/stm32/clk-stm32h7.c index 6acf2ff0a8fb..aa3be414a29f
>>> 100644 --- a/drivers/clk/stm32/clk-stm32h7.c
>>> +++ b/drivers/clk/stm32/clk-stm32h7.c
>>> @@ -114,6 +114,7 @@
>>> #define QSPISRC_PER_CK 3
>>>
>>> #define PWR_CR3 0x0c
>>> +#define PWR_CR3_LDOEN BIT(1)
>>> #define PWR_CR3_SCUEN BIT(2)
>>> #define PWR_D3CR 0x18
>>> #define PWR_D3CR_VOS_MASK GENMASK(15, 14)
>>> @@ -375,7 +376,11 @@ int configure_clocks(struct udevice *dev)
>>> clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK,
>>> VOS_SCALE_1 << PWR_D3CR_VOS_SHIFT);
>>> /* Lock supply configuration update */
>>> +#if IS_ENABLED(CONFIG_TARGET_STM32H747_DISCO)
>>> + clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_LDOEN);
>>> +#else
>>> clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN);
>>> +#endif
>>> while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY))
>>> ;
>>>
>>> diff --git a/include/configs/stm32h747-disco.h
>>> b/include/configs/stm32h747-disco.h new file mode 100644
>>> index 000000000000..393445a8ae1f
>>> --- /dev/null
>>> +++ b/include/configs/stm32h747-disco.h
>>> @@ -0,0 +1,32 @@
>>> +/* SPDX-License-Identifier: GPL-2.0+ */
>>> +/*
>>> + * Copyright (C) 2025 Dario Binacchi
>>> <dario.binacchi@amarulasolutions.com>
>>> + */
>>> +
>>> +#ifndef __CONFIG_H
>>> +#define __CONFIG_H
>>> +
>>> +#include <config.h>
>>> +#include <linux/sizes.h>
>>> +
>>> +/* For booting Linux, use the first 16MB of memory */
>>> +#define CFG_SYS_BOOTMAPSZ SZ_16M
>>> +
>>> +#define CFG_SYS_FLASH_BASE 0x08000000
>>> +
>>> +#define CFG_SYS_HZ_CLOCK 1000000
>>> +
>>> +#define BOOT_TARGET_DEVICES(func) \
>>> + func(MMC, mmc, 0)
>>> +
>>> +#include <config_distro_bootcmd.h>
>>> +#define CFG_EXTRA_ENV_SETTINGS \
>>> + "kernel_addr_r=0xD0008000\0"
>>> \
>>> + "fdtfile=stm32h747i-disco.dtb\0" \
>>> + "fdt_addr_r=0xD0408000\0" \
>>> + "scriptaddr=0xD0418000\0" \
>>> + "pxefile_addr_r=0xD0428000\0" \
>>> + "ramdisk_addr_r=0xD0438000\0"
>>> \
>>> + BOOTENV
>>> +
>>> +#endif /* __CONFIG_H */
>> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
>>
>> Thanks
>> Patrice
>
>
>
>
> Best regards,
>
> Lukasz Majewski
>
> --
>
> DENX Software Engineering GmbH, Managing Director: Erika Unter
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Uboot-stm32] [PATCH 9/9] board: stm32: add stm32h747-discovery board support
2025-06-09 8:34 ` Patrice CHOTARD
@ 2025-06-09 9:22 ` Patrice CHOTARD
2025-06-09 9:29 ` Lukasz Majewski
1 sibling, 0 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 9:22 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Tom Rini, Jerome Forissier, Rasmus Villemoes, Ilias Apalodimas,
Sean Anderson, u-boot, uboot-stm32, Patrick Delaunay,
Dario Binacchi, linux-amarula
On 6/9/25 10:34, Patrice CHOTARD wrote:
>
>
> On 6/9/25 10:07, Lukasz Majewski wrote:
>> Hi Patrice,
>>
>>> On 6/7/25 11:37, Dario Binacchi wrote:
>>>> The board includes an STM32H747XI SoC with the following resources:
>>>> - 2 Mbytes Flash
>>>> - 1 Mbyte SRAM
>>>> - LCD-TFT controller
>>>> - MIPI-DSI interface
>>>> - FD-CAN
>>>> - USB 2.0 high-speed/full-speed
>>>> - Ethernet MAC
>>>> - camera interface
>>>>
>>>> Detailed information can be found at:
>>>> https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
>>>>
>>>> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
>>>>
>>>> ---
>>>>
>>>> arch/arm/mach-stm32/stm32h7/Kconfig | 4 +++
>>>> board/st/stm32h747-disco/Kconfig | 15 ++++++++
>>>> board/st/stm32h747-disco/MAINTAINERS | 7 ++++
>>>> board/st/stm32h747-disco/Makefile | 6 ++++
>>>> board/st/stm32h747-disco/stm32h747-disco.c | 42
>>>> ++++++++++++++++++++++ configs/stm32h747-disco_defconfig |
>>>> 35 ++++++++++++++++++ drivers/clk/stm32/clk-stm32h7.c |
>>>> 5 +++ include/configs/stm32h747-disco.h | 32
>>>> +++++++++++++++++ 8 files changed, 146 insertions(+)
>>>> create mode 100644 board/st/stm32h747-disco/Kconfig
>>>> create mode 100644 board/st/stm32h747-disco/MAINTAINERS
>>>> create mode 100644 board/st/stm32h747-disco/Makefile
>>>> create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
>>>> create mode 100644 configs/stm32h747-disco_defconfig
>>>> create mode 100644 include/configs/stm32h747-disco.h
>>>>
>>>> diff --git a/arch/arm/mach-stm32/stm32h7/Kconfig
>>>> b/arch/arm/mach-stm32/stm32h7/Kconfig index
>>>> 70233a4b23cd..72f20c477d04 100644 ---
>>>> a/arch/arm/mach-stm32/stm32h7/Kconfig +++
>>>> b/arch/arm/mach-stm32/stm32h7/Kconfig @@ -6,11 +6,15 @@ config
>>>> TARGET_STM32H743_DISCO config TARGET_STM32H743_EVAL
>>>> bool "STM32H743 Evaluation board"
>>>>
>>>> +config TARGET_STM32H747_DISCO
>>>> + bool "STM32H747 Discovery board"
>>>> +
>>>> config TARGET_STM32H750_ART_PI
>>>> bool "STM32H750 ART Pi board"
>>>>
>>>> source "board/st/stm32h743-eval/Kconfig"
>>>> source "board/st/stm32h743-disco/Kconfig"
>>>> +source "board/st/stm32h747-disco/Kconfig"
>>>> source "board/st/stm32h750-art-pi/Kconfig"
>>>>
>>>> endif
>>>> diff --git a/board/st/stm32h747-disco/Kconfig
>>>> b/board/st/stm32h747-disco/Kconfig new file mode 100644
>>>> index 000000000000..a7b2c09a327f
>>>> --- /dev/null
>>>> +++ b/board/st/stm32h747-disco/Kconfig
>>>> @@ -0,0 +1,15 @@
>>>> +if TARGET_STM32H747_DISCO
>>>> +
>>>> +config SYS_BOARD
>>>> + default "stm32h747-disco"
>>>> +
>>>> +config SYS_VENDOR
>>>> + default "st"
>>>> +
>>>> +config SYS_SOC
>>>> + default "stm32h7"
>>>> +
>>>> +config SYS_CONFIG_NAME
>>>> + default "stm32h747-disco"
>>>> +
>>>> +endif
>>>> diff --git a/board/st/stm32h747-disco/MAINTAINERS
>>>> b/board/st/stm32h747-disco/MAINTAINERS new file mode 100644
>>>> index 000000000000..d48649f773f3
>>>> --- /dev/null
>>>> +++ b/board/st/stm32h747-disco/MAINTAINERS
>>>> @@ -0,0 +1,7 @@
>>>> +STM32H747 DISCOVERY BOARD
>>>> +M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
>>>> +S: Maintained
>>>> +F: board/st/stm32h747-disco
>>>> +F: include/configs/stm32h747-disco.h
>>>> +F: configs/stm32h747-disco_defconfig
>>>> +F: arch/arm/dts/stm32h747*
>>>> diff --git a/board/st/stm32h747-disco/Makefile
>>>> b/board/st/stm32h747-disco/Makefile new file mode 100644
>>>> index 000000000000..e11f052cc88f
>>>> --- /dev/null
>>>> +++ b/board/st/stm32h747-disco/Makefile
>>>> @@ -0,0 +1,6 @@
>>>> +# SPDX-License-Identifier: GPL-2.0+
>>>> +#
>>>> +# Copyright (c) 2025 Dario Binacchi
>>>> <dario.binacchi@amarulasolutions.com> +#
>>>> +
>>>> +obj-y := stm32h747-disco.o
>>>> diff --git a/board/st/stm32h747-disco/stm32h747-disco.c
>>>> b/board/st/stm32h747-disco/stm32h747-disco.c new file mode 100644
>>>> index 000000000000..be0884bdeb4d
>>>> --- /dev/null
>>>> +++ b/board/st/stm32h747-disco/stm32h747-disco.c
>>>> @@ -0,0 +1,42 @@
>>>> +// SPDX-License-Identifier: GPL-2.0+
>>>> +/*
>>>> + * stm32h747i-disco support
>>>> + *
>>>> + * Copyright (C) 2025 Dario Binacchi
>>>> <dario.binacchi@amarulasolutions.com>
>>>> + */
>>>> +
>>>> +#include <dm.h>
>>>> +#include <init.h>
>>>> +#include <log.h>
>>>> +#include <asm/global_data.h>
>>>> +
>>>> +DECLARE_GLOBAL_DATA_PTR;
>>>> +
>>>> +int dram_init(void)
>>>> +{
>>>> + struct udevice *dev;
>>>> + int ret;
>>>> +
>>>> + ret = uclass_get_device(UCLASS_RAM, 0, &dev);
>>>> + if (ret) {
>>>> + debug("DRAM init failed: %d\n", ret);
>>>> + return ret;
>>>> + }
>>>> +
>>>> + if (fdtdec_setup_mem_size_base() != 0)
>>>> + ret = -EINVAL;
>>>> +
>>>> + return ret;
>>>> +}
>>>> +
>>>> +int dram_init_banksize(void)
>>>> +{
>>>> + fdtdec_setup_memory_banksize();
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> +int board_init(void)
>>>> +{
>>>> + return 0;
>>>> +}
>>>> diff --git a/configs/stm32h747-disco_defconfig
>>>> b/configs/stm32h747-disco_defconfig new file mode 100644
>>>> index 000000000000..8a0c72450d1e
>>>> --- /dev/null
>>>> +++ b/configs/stm32h747-disco_defconfig
>>>> @@ -0,0 +1,35 @@
>>>> +CONFIG_ARM=y
>>>> +CONFIG_ARCH_STM32=y
>>>> +CONFIG_TEXT_BASE=0x08000000
>>>> +CONFIG_SYS_MALLOC_LEN=0x100000
>>>> +CONFIG_NR_DRAM_BANKS=1
>>>> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>>>> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000
>>>> +CONFIG_ENV_SIZE=0x2000
>>>> +CONFIG_DEFAULT_DEVICE_TREE="st/stm32h747i-disco"
>>>> +CONFIG_OF_LIBFDT_OVERLAY=y
>>>> +CONFIG_SYS_LOAD_ADDR=0xd0400000
>>>> +CONFIG_STM32H7=y
>>>> +CONFIG_TARGET_STM32H747_DISCO=y
>>>> +CONFIG_DISTRO_DEFAULTS=y
>>
>> I'm just wondering if there is any plan to move forward to use the new
>> approach?
>>
>> As fair as I remember this is the "deprecated" option...
>
> Hi Lukasz
>
> I was not aware of deprecation of CONFIG_DISTRO_DEFAULTS .
> Can you point to me the other alternative ?
I found information in doc/develop/bootstd/overview.rst
I add this to my todo list.
Thanks for pointing this.
Patrice
>
> Thanks
> Patrice
>
>>
>>>> +CONFIG_BOOTDELAY=3
>>>> +CONFIG_AUTOBOOT_KEYED=y
>>>> +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop
>>>> autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" "
>>>> +CONFIG_DEFAULT_FDT_FILE="stm32h747i-disco"
>>>> +CONFIG_SYS_CBSIZE=256
>>>> +CONFIG_SYS_PBSIZE=282
>>>> +# CONFIG_DISPLAY_CPUINFO is not set
>>>> +CONFIG_SYS_PROMPT="U-Boot > "
>>>> +CONFIG_CMD_GPT=y
>>>> +CONFIG_CMD_MMC=y
>>>> +# CONFIG_CMD_SETEXPR is not set
>>>> +CONFIG_CMD_CACHE=y
>>>> +CONFIG_CMD_TIMER=y
>>>> +CONFIG_CMD_EXT4_WRITE=y
>>>> +# CONFIG_ISO_PARTITION is not set
>>>> +CONFIG_OF_CONTROL=y
>>>> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>>>> +CONFIG_NO_NET=y
>>>> +CONFIG_STM32_SDMMC2=y
>>>> +# CONFIG_PINCTRL_FULL is not set
>>>> diff --git a/drivers/clk/stm32/clk-stm32h7.c
>>>> b/drivers/clk/stm32/clk-stm32h7.c index 6acf2ff0a8fb..aa3be414a29f
>>>> 100644 --- a/drivers/clk/stm32/clk-stm32h7.c
>>>> +++ b/drivers/clk/stm32/clk-stm32h7.c
>>>> @@ -114,6 +114,7 @@
>>>> #define QSPISRC_PER_CK 3
>>>>
>>>> #define PWR_CR3 0x0c
>>>> +#define PWR_CR3_LDOEN BIT(1)
>>>> #define PWR_CR3_SCUEN BIT(2)
>>>> #define PWR_D3CR 0x18
>>>> #define PWR_D3CR_VOS_MASK GENMASK(15, 14)
>>>> @@ -375,7 +376,11 @@ int configure_clocks(struct udevice *dev)
>>>> clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK,
>>>> VOS_SCALE_1 << PWR_D3CR_VOS_SHIFT);
>>>> /* Lock supply configuration update */
>>>> +#if IS_ENABLED(CONFIG_TARGET_STM32H747_DISCO)
>>>> + clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_LDOEN);
>>>> +#else
>>>> clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN);
>>>> +#endif
>>>> while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY))
>>>> ;
>>>>
>>>> diff --git a/include/configs/stm32h747-disco.h
>>>> b/include/configs/stm32h747-disco.h new file mode 100644
>>>> index 000000000000..393445a8ae1f
>>>> --- /dev/null
>>>> +++ b/include/configs/stm32h747-disco.h
>>>> @@ -0,0 +1,32 @@
>>>> +/* SPDX-License-Identifier: GPL-2.0+ */
>>>> +/*
>>>> + * Copyright (C) 2025 Dario Binacchi
>>>> <dario.binacchi@amarulasolutions.com>
>>>> + */
>>>> +
>>>> +#ifndef __CONFIG_H
>>>> +#define __CONFIG_H
>>>> +
>>>> +#include <config.h>
>>>> +#include <linux/sizes.h>
>>>> +
>>>> +/* For booting Linux, use the first 16MB of memory */
>>>> +#define CFG_SYS_BOOTMAPSZ SZ_16M
>>>> +
>>>> +#define CFG_SYS_FLASH_BASE 0x08000000
>>>> +
>>>> +#define CFG_SYS_HZ_CLOCK 1000000
>>>> +
>>>> +#define BOOT_TARGET_DEVICES(func) \
>>>> + func(MMC, mmc, 0)
>>>> +
>>>> +#include <config_distro_bootcmd.h>
>>>> +#define CFG_EXTRA_ENV_SETTINGS \
>>>> + "kernel_addr_r=0xD0008000\0"
>>>> \
>>>> + "fdtfile=stm32h747i-disco.dtb\0" \
>>>> + "fdt_addr_r=0xD0408000\0" \
>>>> + "scriptaddr=0xD0418000\0" \
>>>> + "pxefile_addr_r=0xD0428000\0" \
>>>> + "ramdisk_addr_r=0xD0438000\0"
>>>> \
>>>> + BOOTENV
>>>> +
>>>> +#endif /* __CONFIG_H */
>>> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
>>>
>>> Thanks
>>> Patrice
>>
>>
>>
>>
>> Best regards,
>>
>> Lukasz Majewski
>>
>> --
>>
>> DENX Software Engineering GmbH, Managing Director: Erika Unter
>> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
>> Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
> _______________________________________________
> Uboot-stm32 mailing list
> Uboot-stm32@st-md-mailman.stormreply.com
> https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 9/9] board: stm32: add stm32h747-discovery board support
2025-06-09 8:34 ` Patrice CHOTARD
2025-06-09 9:22 ` [Uboot-stm32] " Patrice CHOTARD
@ 2025-06-09 9:29 ` Lukasz Majewski
1 sibling, 0 replies; 38+ messages in thread
From: Lukasz Majewski @ 2025-06-09 9:29 UTC (permalink / raw)
To: Patrice CHOTARD
Cc: Dario Binacchi, u-boot, linux-amarula, Ilias Apalodimas,
Jerome Forissier, Patrick Delaunay, Rasmus Villemoes,
Sean Anderson, Tom Rini, uboot-stm32
[-- Attachment #1: Type: text/plain, Size: 10197 bytes --]
On Mon, 9 Jun 2025 10:34:39 +0200
Patrice CHOTARD <patrice.chotard@foss.st.com> wrote:
> On 6/9/25 10:07, Lukasz Majewski wrote:
> > Hi Patrice,
> >
> >> On 6/7/25 11:37, Dario Binacchi wrote:
> >>> The board includes an STM32H747XI SoC with the following
> >>> resources:
> >>> - 2 Mbytes Flash
> >>> - 1 Mbyte SRAM
> >>> - LCD-TFT controller
> >>> - MIPI-DSI interface
> >>> - FD-CAN
> >>> - USB 2.0 high-speed/full-speed
> >>> - Ethernet MAC
> >>> - camera interface
> >>>
> >>> Detailed information can be found at:
> >>> https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> >>>
> >>> Signed-off-by: Dario Binacchi
> >>> <dario.binacchi@amarulasolutions.com>
> >>>
> >>> ---
> >>>
> >>> arch/arm/mach-stm32/stm32h7/Kconfig | 4 +++
> >>> board/st/stm32h747-disco/Kconfig | 15 ++++++++
> >>> board/st/stm32h747-disco/MAINTAINERS | 7 ++++
> >>> board/st/stm32h747-disco/Makefile | 6 ++++
> >>> board/st/stm32h747-disco/stm32h747-disco.c | 42
> >>> ++++++++++++++++++++++ configs/stm32h747-disco_defconfig
> >>> | 35 ++++++++++++++++++ drivers/clk/stm32/clk-stm32h7.c
> >>> | 5 +++ include/configs/stm32h747-disco.h | 32
> >>> +++++++++++++++++ 8 files changed, 146 insertions(+)
> >>> create mode 100644 board/st/stm32h747-disco/Kconfig
> >>> create mode 100644 board/st/stm32h747-disco/MAINTAINERS
> >>> create mode 100644 board/st/stm32h747-disco/Makefile
> >>> create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
> >>> create mode 100644 configs/stm32h747-disco_defconfig
> >>> create mode 100644 include/configs/stm32h747-disco.h
> >>>
> >>> diff --git a/arch/arm/mach-stm32/stm32h7/Kconfig
> >>> b/arch/arm/mach-stm32/stm32h7/Kconfig index
> >>> 70233a4b23cd..72f20c477d04 100644 ---
> >>> a/arch/arm/mach-stm32/stm32h7/Kconfig +++
> >>> b/arch/arm/mach-stm32/stm32h7/Kconfig @@ -6,11 +6,15 @@ config
> >>> TARGET_STM32H743_DISCO config TARGET_STM32H743_EVAL
> >>> bool "STM32H743 Evaluation board"
> >>>
> >>> +config TARGET_STM32H747_DISCO
> >>> + bool "STM32H747 Discovery board"
> >>> +
> >>> config TARGET_STM32H750_ART_PI
> >>> bool "STM32H750 ART Pi board"
> >>>
> >>> source "board/st/stm32h743-eval/Kconfig"
> >>> source "board/st/stm32h743-disco/Kconfig"
> >>> +source "board/st/stm32h747-disco/Kconfig"
> >>> source "board/st/stm32h750-art-pi/Kconfig"
> >>>
> >>> endif
> >>> diff --git a/board/st/stm32h747-disco/Kconfig
> >>> b/board/st/stm32h747-disco/Kconfig new file mode 100644
> >>> index 000000000000..a7b2c09a327f
> >>> --- /dev/null
> >>> +++ b/board/st/stm32h747-disco/Kconfig
> >>> @@ -0,0 +1,15 @@
> >>> +if TARGET_STM32H747_DISCO
> >>> +
> >>> +config SYS_BOARD
> >>> + default "stm32h747-disco"
> >>> +
> >>> +config SYS_VENDOR
> >>> + default "st"
> >>> +
> >>> +config SYS_SOC
> >>> + default "stm32h7"
> >>> +
> >>> +config SYS_CONFIG_NAME
> >>> + default "stm32h747-disco"
> >>> +
> >>> +endif
> >>> diff --git a/board/st/stm32h747-disco/MAINTAINERS
> >>> b/board/st/stm32h747-disco/MAINTAINERS new file mode 100644
> >>> index 000000000000..d48649f773f3
> >>> --- /dev/null
> >>> +++ b/board/st/stm32h747-disco/MAINTAINERS
> >>> @@ -0,0 +1,7 @@
> >>> +STM32H747 DISCOVERY BOARD
> >>> +M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> >>> +S: Maintained
> >>> +F: board/st/stm32h747-disco
> >>> +F: include/configs/stm32h747-disco.h
> >>> +F: configs/stm32h747-disco_defconfig
> >>> +F: arch/arm/dts/stm32h747*
> >>> diff --git a/board/st/stm32h747-disco/Makefile
> >>> b/board/st/stm32h747-disco/Makefile new file mode 100644
> >>> index 000000000000..e11f052cc88f
> >>> --- /dev/null
> >>> +++ b/board/st/stm32h747-disco/Makefile
> >>> @@ -0,0 +1,6 @@
> >>> +# SPDX-License-Identifier: GPL-2.0+
> >>> +#
> >>> +# Copyright (c) 2025 Dario Binacchi
> >>> <dario.binacchi@amarulasolutions.com> +#
> >>> +
> >>> +obj-y := stm32h747-disco.o
> >>> diff --git a/board/st/stm32h747-disco/stm32h747-disco.c
> >>> b/board/st/stm32h747-disco/stm32h747-disco.c new file mode 100644
> >>> index 000000000000..be0884bdeb4d
> >>> --- /dev/null
> >>> +++ b/board/st/stm32h747-disco/stm32h747-disco.c
> >>> @@ -0,0 +1,42 @@
> >>> +// SPDX-License-Identifier: GPL-2.0+
> >>> +/*
> >>> + * stm32h747i-disco support
> >>> + *
> >>> + * Copyright (C) 2025 Dario Binacchi
> >>> <dario.binacchi@amarulasolutions.com>
> >>> + */
> >>> +
> >>> +#include <dm.h>
> >>> +#include <init.h>
> >>> +#include <log.h>
> >>> +#include <asm/global_data.h>
> >>> +
> >>> +DECLARE_GLOBAL_DATA_PTR;
> >>> +
> >>> +int dram_init(void)
> >>> +{
> >>> + struct udevice *dev;
> >>> + int ret;
> >>> +
> >>> + ret = uclass_get_device(UCLASS_RAM, 0, &dev);
> >>> + if (ret) {
> >>> + debug("DRAM init failed: %d\n", ret);
> >>> + return ret;
> >>> + }
> >>> +
> >>> + if (fdtdec_setup_mem_size_base() != 0)
> >>> + ret = -EINVAL;
> >>> +
> >>> + return ret;
> >>> +}
> >>> +
> >>> +int dram_init_banksize(void)
> >>> +{
> >>> + fdtdec_setup_memory_banksize();
> >>> +
> >>> + return 0;
> >>> +}
> >>> +
> >>> +int board_init(void)
> >>> +{
> >>> + return 0;
> >>> +}
> >>> diff --git a/configs/stm32h747-disco_defconfig
> >>> b/configs/stm32h747-disco_defconfig new file mode 100644
> >>> index 000000000000..8a0c72450d1e
> >>> --- /dev/null
> >>> +++ b/configs/stm32h747-disco_defconfig
> >>> @@ -0,0 +1,35 @@
> >>> +CONFIG_ARM=y
> >>> +CONFIG_ARCH_STM32=y
> >>> +CONFIG_TEXT_BASE=0x08000000
> >>> +CONFIG_SYS_MALLOC_LEN=0x100000
> >>> +CONFIG_NR_DRAM_BANKS=1
> >>> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> >>> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000
> >>> +CONFIG_ENV_SIZE=0x2000
> >>> +CONFIG_DEFAULT_DEVICE_TREE="st/stm32h747i-disco"
> >>> +CONFIG_OF_LIBFDT_OVERLAY=y
> >>> +CONFIG_SYS_LOAD_ADDR=0xd0400000
> >>> +CONFIG_STM32H7=y
> >>> +CONFIG_TARGET_STM32H747_DISCO=y
> >>> +CONFIG_DISTRO_DEFAULTS=y
> >
> > I'm just wondering if there is any plan to move forward to use the
> > new approach?
> >
> > As fair as I remember this is the "deprecated" option...
>
> Hi Lukasz
>
> I was not aware of deprecation of CONFIG_DISTRO_DEFAULTS .
> Can you point to me the other alternative ?
>
I think it is: CONFIG_BOOTSTD
The bootstd command and friends (I did some research on STM32MP157C
board and it can be enabled ... ).
> Thanks
> Patrice
>
> >
> >>> +CONFIG_BOOTDELAY=3
> >>> +CONFIG_AUTOBOOT_KEYED=y
> >>> +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop
> >>> autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" "
> >>> +CONFIG_DEFAULT_FDT_FILE="stm32h747i-disco"
> >>> +CONFIG_SYS_CBSIZE=256
> >>> +CONFIG_SYS_PBSIZE=282
> >>> +# CONFIG_DISPLAY_CPUINFO is not set
> >>> +CONFIG_SYS_PROMPT="U-Boot > "
> >>> +CONFIG_CMD_GPT=y
> >>> +CONFIG_CMD_MMC=y
> >>> +# CONFIG_CMD_SETEXPR is not set
> >>> +CONFIG_CMD_CACHE=y
> >>> +CONFIG_CMD_TIMER=y
> >>> +CONFIG_CMD_EXT4_WRITE=y
> >>> +# CONFIG_ISO_PARTITION is not set
> >>> +CONFIG_OF_CONTROL=y
> >>> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> >>> +CONFIG_NO_NET=y
> >>> +CONFIG_STM32_SDMMC2=y
> >>> +# CONFIG_PINCTRL_FULL is not set
> >>> diff --git a/drivers/clk/stm32/clk-stm32h7.c
> >>> b/drivers/clk/stm32/clk-stm32h7.c index 6acf2ff0a8fb..aa3be414a29f
> >>> 100644 --- a/drivers/clk/stm32/clk-stm32h7.c
> >>> +++ b/drivers/clk/stm32/clk-stm32h7.c
> >>> @@ -114,6 +114,7 @@
> >>> #define QSPISRC_PER_CK 3
> >>>
> >>> #define PWR_CR3 0x0c
> >>> +#define PWR_CR3_LDOEN BIT(1)
> >>> #define PWR_CR3_SCUEN BIT(2)
> >>> #define PWR_D3CR 0x18
> >>> #define PWR_D3CR_VOS_MASK GENMASK(15, 14)
> >>> @@ -375,7 +376,11 @@ int configure_clocks(struct udevice *dev)
> >>> clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK,
> >>> VOS_SCALE_1 << PWR_D3CR_VOS_SHIFT);
> >>> /* Lock supply configuration update */
> >>> +#if IS_ENABLED(CONFIG_TARGET_STM32H747_DISCO)
> >>> + clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_LDOEN);
> >>> +#else
> >>> clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN);
> >>> +#endif
> >>> while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY))
> >>> ;
> >>>
> >>> diff --git a/include/configs/stm32h747-disco.h
> >>> b/include/configs/stm32h747-disco.h new file mode 100644
> >>> index 000000000000..393445a8ae1f
> >>> --- /dev/null
> >>> +++ b/include/configs/stm32h747-disco.h
> >>> @@ -0,0 +1,32 @@
> >>> +/* SPDX-License-Identifier: GPL-2.0+ */
> >>> +/*
> >>> + * Copyright (C) 2025 Dario Binacchi
> >>> <dario.binacchi@amarulasolutions.com>
> >>> + */
> >>> +
> >>> +#ifndef __CONFIG_H
> >>> +#define __CONFIG_H
> >>> +
> >>> +#include <config.h>
> >>> +#include <linux/sizes.h>
> >>> +
> >>> +/* For booting Linux, use the first 16MB of memory */
> >>> +#define CFG_SYS_BOOTMAPSZ SZ_16M
> >>> +
> >>> +#define CFG_SYS_FLASH_BASE 0x08000000
> >>> +
> >>> +#define CFG_SYS_HZ_CLOCK 1000000
> >>> +
> >>> +#define BOOT_TARGET_DEVICES(func) \
> >>> + func(MMC, mmc, 0)
> >>> +
> >>> +#include <config_distro_bootcmd.h>
> >>> +#define CFG_EXTRA_ENV_SETTINGS \
> >>> + "kernel_addr_r=0xD0008000\0"
> >>> \
> >>> + "fdtfile=stm32h747i-disco.dtb\0" \
> >>> + "fdt_addr_r=0xD0408000\0"
> >>> \
> >>> + "scriptaddr=0xD0418000\0"
> >>> \
> >>> + "pxefile_addr_r=0xD0428000\0" \
> >>> + "ramdisk_addr_r=0xD0438000\0"
> >>> \
> >>> + BOOTENV
> >>> +
> >>> +#endif /* __CONFIG_H */
> >> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
> >>
> >> Thanks
> >> Patrice
> >
> >
> >
> >
> > Best regards,
> >
> > Lukasz Majewski
> >
> > --
> >
> > DENX Software Engineering GmbH, Managing Director: Erika Unter
> > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell,
> > Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email:
> > lukma@denx.de
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
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^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
` (8 preceding siblings ...)
2025-06-07 9:37 ` [PATCH 9/9] board: stm32: add stm32h747-discovery board support Dario Binacchi
@ 2025-06-09 13:15 ` Patrice CHOTARD
2025-06-09 13:25 ` Sumit Garg
9 siblings, 1 reply; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 13:15 UTC (permalink / raw)
To: Dario Binacchi, u-boot
Cc: linux-amarula, Alexandre Torgue, Dillon Min, Ilias Apalodimas,
Jerome Forissier, Krzysztof Kozlowski, Lukasz Majewski,
Patrick Delaunay, Rasmus Villemoes, Sean Anderson, Sumit Garg,
Tom Rini, uboot-stm32
On 6/7/25 11:37, Dario Binacchi wrote:
> The series adds support for stm32h747-discovery board.
>
> Detailed information can be found at:
> https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
>
>
> Dario Binacchi (9):
> ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> ARM: dts: stm32: add uart8 node for stm32h743 MCU
> ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> ARM: dts: stm32: support STM32h747i-disco board
> ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> board: stm32: add stm32h747-discovery board support
Hi Dario
For the whole series
Applied to u-boot-stm32/next
Thanks
Patrice
>
> arch/arm/dts/stm32h747i-disco-u-boot.dtsi | 104 ++++++++++++++
> arch/arm/mach-stm32/stm32h7/Kconfig | 4 +
> board/st/stm32h747-disco/Kconfig | 15 ++
> board/st/stm32h747-disco/MAINTAINERS | 7 +
> board/st/stm32h747-disco/Makefile | 6 +
> board/st/stm32h747-disco/stm32h747-disco.c | 42 ++++++
> configs/stm32h747-disco_defconfig | 35 +++++
> drivers/clk/stm32/clk-stm32h7.c | 5 +
> dts/upstream/Bindings/arm/stm32/stm32.yaml | 4 +
> .../include/dt-bindings/clock/stm32h7-clks.h | 4 +-
> dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 34 ++++-
> dts/upstream/src/arm/st/stm32h743.dtsi | 8 ++
> dts/upstream/src/arm/st/stm32h743i-disco.dts | 2 +-
> dts/upstream/src/arm/st/stm32h743i-eval.dts | 2 +-
> dts/upstream/src/arm/st/stm32h747i-disco.dts | 136 ++++++++++++++++++
> dts/upstream/src/arm/st/stm32h750i-art-pi.dts | 6 +-
> include/configs/stm32h747-disco.h | 32 +++++
> 17 files changed, 435 insertions(+), 11 deletions(-)
> create mode 100644 arch/arm/dts/stm32h747i-disco-u-boot.dtsi
> create mode 100644 board/st/stm32h747-disco/Kconfig
> create mode 100644 board/st/stm32h747-disco/MAINTAINERS
> create mode 100644 board/st/stm32h747-disco/Makefile
> create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
> create mode 100644 configs/stm32h747-disco_defconfig
> create mode 100644 dts/upstream/src/arm/st/stm32h747i-disco.dts
> create mode 100644 include/configs/stm32h747-disco.h
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
2025-06-07 9:37 ` [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles Dario Binacchi
2025-06-09 7:55 ` Patrice CHOTARD
@ 2025-06-09 13:20 ` Sumit Garg
2025-06-09 13:38 ` Patrice CHOTARD
2025-06-09 13:38 ` Dario Binacchi
1 sibling, 2 replies; 38+ messages in thread
From: Sumit Garg @ 2025-06-09 13:20 UTC (permalink / raw)
To: Dario Binacchi
Cc: u-boot, linux-amarula, Alexandre Torgue, Patrice Chotard,
Patrick Delaunay, Tom Rini, uboot-stm32
Hi Dario,
On Sat, Jun 07, 2025 at 11:37:09AM +0200, Dario Binacchi wrote:
> Allow expanding possible configurations for the same peripheral,
> consistent with the scheme adopted in Linux.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> Link: https://lore.kernel.org/r/20250427074404.3278732-2-dario.binacchi@amarulasolutions.com
> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
>
> [ upstream commit: 6a36dca4375fce51b627f5a985a79fc8b8bd7f55 ]
>
This doesn't show as a proper cherry-pick from devicetree-rebasing tree,
following fails for me:
$ ./tools/update-subtree.sh pick dts 6a36dca4375fce51b627f5a985a79fc8b8bd7f55
From https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing
* branch master -> FETCH_HEAD
fatal: bad object 6a36dca4375fce51b627f5a985a79fc8b8bd7f55
Has this patch landed in Linux mainline?
Ditto for all the subsequent patches in this series.
-Sumit
> ---
>
> dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 8 ++++----
> dts/upstream/src/arm/st/stm32h743i-disco.dts | 2 +-
> dts/upstream/src/arm/st/stm32h743i-eval.dts | 2 +-
> dts/upstream/src/arm/st/stm32h750i-art-pi.dts | 6 +++---
> 4 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> index 7f1d234e1024..ad00c1080a96 100644
> --- a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> +++ b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> @@ -198,7 +198,7 @@
> };
> };
>
> - uart4_pins: uart4-0 {
> + uart4_pins_a: uart4-0 {
> pins1 {
> pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
> bias-disable;
> @@ -211,7 +211,7 @@
> };
> };
>
> - usart1_pins: usart1-0 {
> + usart1_pins_a: usart1-0 {
> pins1 {
> pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
> bias-disable;
> @@ -224,7 +224,7 @@
> };
> };
>
> - usart2_pins: usart2-0 {
> + usart2_pins_a: usart2-0 {
> pins1 {
> pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
> bias-disable;
> @@ -237,7 +237,7 @@
> };
> };
>
> - usart3_pins: usart3-0 {
> + usart3_pins_a: usart3-0 {
> pins1 {
> pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
> <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */
> diff --git a/dts/upstream/src/arm/st/stm32h743i-disco.dts b/dts/upstream/src/arm/st/stm32h743i-disco.dts
> index 2b452883a708..8451a54a9a08 100644
> --- a/dts/upstream/src/arm/st/stm32h743i-disco.dts
> +++ b/dts/upstream/src/arm/st/stm32h743i-disco.dts
> @@ -105,7 +105,7 @@
> };
>
> &usart2 {
> - pinctrl-0 = <&usart2_pins>;
> + pinctrl-0 = <&usart2_pins_a>;
> pinctrl-names = "default";
> status = "okay";
> };
> diff --git a/dts/upstream/src/arm/st/stm32h743i-eval.dts b/dts/upstream/src/arm/st/stm32h743i-eval.dts
> index 5c5d8059bdc7..4b0ced27b80e 100644
> --- a/dts/upstream/src/arm/st/stm32h743i-eval.dts
> +++ b/dts/upstream/src/arm/st/stm32h743i-eval.dts
> @@ -145,7 +145,7 @@
> };
>
> &usart1 {
> - pinctrl-0 = <&usart1_pins>;
> + pinctrl-0 = <&usart1_pins_a>;
> pinctrl-names = "default";
> status = "okay";
> };
> diff --git a/dts/upstream/src/arm/st/stm32h750i-art-pi.dts b/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
> index 44c307f8b09c..00d195d52a45 100644
> --- a/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
> +++ b/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
> @@ -197,14 +197,14 @@
> };
>
> &usart2 {
> - pinctrl-0 = <&usart2_pins>;
> + pinctrl-0 = <&usart2_pins_a>;
> pinctrl-names = "default";
> status = "disabled";
> };
>
> &usart3 {
> pinctrl-names = "default";
> - pinctrl-0 = <&usart3_pins>;
> + pinctrl-0 = <&usart3_pins_a>;
> dmas = <&dmamux1 45 0x400 0x05>,
> <&dmamux1 46 0x400 0x05>;
> dma-names = "rx", "tx";
> @@ -221,7 +221,7 @@
> };
>
> &uart4 {
> - pinctrl-0 = <&uart4_pins>;
> + pinctrl-0 = <&uart4_pins_a>;
> pinctrl-names = "default";
> status = "okay";
> };
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-09 13:15 ` [PATCH 0/9] Support stm32h747-discovery board Patrice CHOTARD
@ 2025-06-09 13:25 ` Sumit Garg
2025-06-09 13:46 ` Dario Binacchi
0 siblings, 1 reply; 38+ messages in thread
From: Sumit Garg @ 2025-06-09 13:25 UTC (permalink / raw)
To: Patrice CHOTARD
Cc: Dario Binacchi, u-boot, linux-amarula, Alexandre Torgue,
Dillon Min, Ilias Apalodimas, Jerome Forissier,
Krzysztof Kozlowski, Lukasz Majewski, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, Tom Rini, uboot-stm32
Hi Patrice,
On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
>
>
> On 6/7/25 11:37, Dario Binacchi wrote:
> > The series adds support for stm32h747-discovery board.
> >
> > Detailed information can be found at:
> > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> >
> >
> > Dario Binacchi (9):
> > ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> > dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> > dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> > ARM: dts: stm32: add uart8 node for stm32h743 MCU
> > ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> > ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> > ARM: dts: stm32: support STM32h747i-disco board
> > ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> > board: stm32: add stm32h747-discovery board support
>
>
> Hi Dario
>
> For the whole series
> Applied to u-boot-stm32/next
Please give some time for other maintainers to review this patch-set.
The dts/upstream patches in this series aren't clean cherry pick from
upstream. This has to be fixed as otherwise random patches are going to
cause DT sync issues.
-Sumit
>
> Thanks
> Patrice
>
> >
> > arch/arm/dts/stm32h747i-disco-u-boot.dtsi | 104 ++++++++++++++
> > arch/arm/mach-stm32/stm32h7/Kconfig | 4 +
> > board/st/stm32h747-disco/Kconfig | 15 ++
> > board/st/stm32h747-disco/MAINTAINERS | 7 +
> > board/st/stm32h747-disco/Makefile | 6 +
> > board/st/stm32h747-disco/stm32h747-disco.c | 42 ++++++
> > configs/stm32h747-disco_defconfig | 35 +++++
> > drivers/clk/stm32/clk-stm32h7.c | 5 +
> > dts/upstream/Bindings/arm/stm32/stm32.yaml | 4 +
> > .../include/dt-bindings/clock/stm32h7-clks.h | 4 +-
> > dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 34 ++++-
> > dts/upstream/src/arm/st/stm32h743.dtsi | 8 ++
> > dts/upstream/src/arm/st/stm32h743i-disco.dts | 2 +-
> > dts/upstream/src/arm/st/stm32h743i-eval.dts | 2 +-
> > dts/upstream/src/arm/st/stm32h747i-disco.dts | 136 ++++++++++++++++++
> > dts/upstream/src/arm/st/stm32h750i-art-pi.dts | 6 +-
> > include/configs/stm32h747-disco.h | 32 +++++
> > 17 files changed, 435 insertions(+), 11 deletions(-)
> > create mode 100644 arch/arm/dts/stm32h747i-disco-u-boot.dtsi
> > create mode 100644 board/st/stm32h747-disco/Kconfig
> > create mode 100644 board/st/stm32h747-disco/MAINTAINERS
> > create mode 100644 board/st/stm32h747-disco/Makefile
> > create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
> > create mode 100644 configs/stm32h747-disco_defconfig
> > create mode 100644 dts/upstream/src/arm/st/stm32h747i-disco.dts
> > create mode 100644 include/configs/stm32h747-disco.h
> >
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
2025-06-09 13:20 ` Sumit Garg
@ 2025-06-09 13:38 ` Patrice CHOTARD
2025-06-09 13:38 ` Dario Binacchi
1 sibling, 0 replies; 38+ messages in thread
From: Patrice CHOTARD @ 2025-06-09 13:38 UTC (permalink / raw)
To: Sumit Garg, Dario Binacchi
Cc: u-boot, linux-amarula, Alexandre Torgue, Patrick Delaunay,
Tom Rini, uboot-stm32
On 6/9/25 15:20, Sumit Garg wrote:
> Hi Dario,
>
> On Sat, Jun 07, 2025 at 11:37:09AM +0200, Dario Binacchi wrote:
>> Allow expanding possible configurations for the same peripheral,
>> consistent with the scheme adopted in Linux.
>>
>> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
>> Link: https://lore.kernel.org/r/20250427074404.3278732-2-dario.binacchi@amarulasolutions.com
>> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
>>
>> [ upstream commit: 6a36dca4375fce51b627f5a985a79fc8b8bd7f55 ]
>>
>
> This doesn't show as a proper cherry-pick from devicetree-rebasing tree,
> following fails for me:
>
> $ ./tools/update-subtree.sh pick dts 6a36dca4375fce51b627f5a985a79fc8b8bd7f55
> From https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing
> * branch master -> FETCH_HEAD
> fatal: bad object 6a36dca4375fce51b627f5a985a79fc8b8bd7f55
>
> Has this patch landed in Linux mainline?
Hi Sumit
I confirm this patch and subsequent patches are present in Linux Mainline
There are part of STM32 pull request with tag stm32-dt-for-v6.16-1.
Dario has updated "in advance" the current dts/upstream/src/arm/st directory.
Patrice
>
> Ditto for all the subsequent patches in this series.
>
> -Sumit
>
>> ---
>>
>> dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 8 ++++----
>> dts/upstream/src/arm/st/stm32h743i-disco.dts | 2 +-
>> dts/upstream/src/arm/st/stm32h743i-eval.dts | 2 +-
>> dts/upstream/src/arm/st/stm32h750i-art-pi.dts | 6 +++---
>> 4 files changed, 9 insertions(+), 9 deletions(-)
>>
>> diff --git a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
>> index 7f1d234e1024..ad00c1080a96 100644
>> --- a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
>> +++ b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
>> @@ -198,7 +198,7 @@
>> };
>> };
>>
>> - uart4_pins: uart4-0 {
>> + uart4_pins_a: uart4-0 {
>> pins1 {
>> pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
>> bias-disable;
>> @@ -211,7 +211,7 @@
>> };
>> };
>>
>> - usart1_pins: usart1-0 {
>> + usart1_pins_a: usart1-0 {
>> pins1 {
>> pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
>> bias-disable;
>> @@ -224,7 +224,7 @@
>> };
>> };
>>
>> - usart2_pins: usart2-0 {
>> + usart2_pins_a: usart2-0 {
>> pins1 {
>> pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
>> bias-disable;
>> @@ -237,7 +237,7 @@
>> };
>> };
>>
>> - usart3_pins: usart3-0 {
>> + usart3_pins_a: usart3-0 {
>> pins1 {
>> pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
>> <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */
>> diff --git a/dts/upstream/src/arm/st/stm32h743i-disco.dts b/dts/upstream/src/arm/st/stm32h743i-disco.dts
>> index 2b452883a708..8451a54a9a08 100644
>> --- a/dts/upstream/src/arm/st/stm32h743i-disco.dts
>> +++ b/dts/upstream/src/arm/st/stm32h743i-disco.dts
>> @@ -105,7 +105,7 @@
>> };
>>
>> &usart2 {
>> - pinctrl-0 = <&usart2_pins>;
>> + pinctrl-0 = <&usart2_pins_a>;
>> pinctrl-names = "default";
>> status = "okay";
>> };
>> diff --git a/dts/upstream/src/arm/st/stm32h743i-eval.dts b/dts/upstream/src/arm/st/stm32h743i-eval.dts
>> index 5c5d8059bdc7..4b0ced27b80e 100644
>> --- a/dts/upstream/src/arm/st/stm32h743i-eval.dts
>> +++ b/dts/upstream/src/arm/st/stm32h743i-eval.dts
>> @@ -145,7 +145,7 @@
>> };
>>
>> &usart1 {
>> - pinctrl-0 = <&usart1_pins>;
>> + pinctrl-0 = <&usart1_pins_a>;
>> pinctrl-names = "default";
>> status = "okay";
>> };
>> diff --git a/dts/upstream/src/arm/st/stm32h750i-art-pi.dts b/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
>> index 44c307f8b09c..00d195d52a45 100644
>> --- a/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
>> +++ b/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
>> @@ -197,14 +197,14 @@
>> };
>>
>> &usart2 {
>> - pinctrl-0 = <&usart2_pins>;
>> + pinctrl-0 = <&usart2_pins_a>;
>> pinctrl-names = "default";
>> status = "disabled";
>> };
>>
>> &usart3 {
>> pinctrl-names = "default";
>> - pinctrl-0 = <&usart3_pins>;
>> + pinctrl-0 = <&usart3_pins_a>;
>> dmas = <&dmamux1 45 0x400 0x05>,
>> <&dmamux1 46 0x400 0x05>;
>> dma-names = "rx", "tx";
>> @@ -221,7 +221,7 @@
>> };
>>
>> &uart4 {
>> - pinctrl-0 = <&uart4_pins>;
>> + pinctrl-0 = <&uart4_pins_a>;
>> pinctrl-names = "default";
>> status = "okay";
>> };
>> --
>> 2.43.0
>>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
2025-06-09 13:20 ` Sumit Garg
2025-06-09 13:38 ` Patrice CHOTARD
@ 2025-06-09 13:38 ` Dario Binacchi
1 sibling, 0 replies; 38+ messages in thread
From: Dario Binacchi @ 2025-06-09 13:38 UTC (permalink / raw)
To: Sumit Garg
Cc: u-boot, linux-amarula, Alexandre Torgue, Patrice Chotard,
Patrick Delaunay, Tom Rini, uboot-stm32
Hi Sumit,
On Mon, Jun 9, 2025 at 3:20 PM Sumit Garg <sumit.garg@kernel.org> wrote:
>
> Hi Dario,
>
> On Sat, Jun 07, 2025 at 11:37:09AM +0200, Dario Binacchi wrote:
> > Allow expanding possible configurations for the same peripheral,
> > consistent with the scheme adopted in Linux.
> >
> > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> > Link: https://lore.kernel.org/r/20250427074404.3278732-2-dario.binacchi@amarulasolutions.com
> > Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
> >
> > [ upstream commit: 6a36dca4375fce51b627f5a985a79fc8b8bd7f55 ]
> >
>
> This doesn't show as a proper cherry-pick from devicetree-rebasing tree,
> following fails for me:
>
> $ ./tools/update-subtree.sh pick dts 6a36dca4375fce51b627f5a985a79fc8b8bd7f55
> From https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing
> * branch master -> FETCH_HEAD
> fatal: bad object 6a36dca4375fce51b627f5a985a79fc8b8bd7f55
>
> Has this patch landed in Linux mainline?
Yes, it has already merged in mainline:
git tag --contains 6a36dca4375fce51b627f5a985a79fc8b8bd7f55
v6.16-rc1
Thanks and regards,
Dario
>
> Ditto for all the subsequent patches in this series.
>
> -Sumit
>
> > ---
> >
> > dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 8 ++++----
> > dts/upstream/src/arm/st/stm32h743i-disco.dts | 2 +-
> > dts/upstream/src/arm/st/stm32h743i-eval.dts | 2 +-
> > dts/upstream/src/arm/st/stm32h750i-art-pi.dts | 6 +++---
> > 4 files changed, 9 insertions(+), 9 deletions(-)
> >
> > diff --git a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> > index 7f1d234e1024..ad00c1080a96 100644
> > --- a/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> > +++ b/dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi
> > @@ -198,7 +198,7 @@
> > };
> > };
> >
> > - uart4_pins: uart4-0 {
> > + uart4_pins_a: uart4-0 {
> > pins1 {
> > pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
> > bias-disable;
> > @@ -211,7 +211,7 @@
> > };
> > };
> >
> > - usart1_pins: usart1-0 {
> > + usart1_pins_a: usart1-0 {
> > pins1 {
> > pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
> > bias-disable;
> > @@ -224,7 +224,7 @@
> > };
> > };
> >
> > - usart2_pins: usart2-0 {
> > + usart2_pins_a: usart2-0 {
> > pins1 {
> > pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
> > bias-disable;
> > @@ -237,7 +237,7 @@
> > };
> > };
> >
> > - usart3_pins: usart3-0 {
> > + usart3_pins_a: usart3-0 {
> > pins1 {
> > pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
> > <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */
> > diff --git a/dts/upstream/src/arm/st/stm32h743i-disco.dts b/dts/upstream/src/arm/st/stm32h743i-disco.dts
> > index 2b452883a708..8451a54a9a08 100644
> > --- a/dts/upstream/src/arm/st/stm32h743i-disco.dts
> > +++ b/dts/upstream/src/arm/st/stm32h743i-disco.dts
> > @@ -105,7 +105,7 @@
> > };
> >
> > &usart2 {
> > - pinctrl-0 = <&usart2_pins>;
> > + pinctrl-0 = <&usart2_pins_a>;
> > pinctrl-names = "default";
> > status = "okay";
> > };
> > diff --git a/dts/upstream/src/arm/st/stm32h743i-eval.dts b/dts/upstream/src/arm/st/stm32h743i-eval.dts
> > index 5c5d8059bdc7..4b0ced27b80e 100644
> > --- a/dts/upstream/src/arm/st/stm32h743i-eval.dts
> > +++ b/dts/upstream/src/arm/st/stm32h743i-eval.dts
> > @@ -145,7 +145,7 @@
> > };
> >
> > &usart1 {
> > - pinctrl-0 = <&usart1_pins>;
> > + pinctrl-0 = <&usart1_pins_a>;
> > pinctrl-names = "default";
> > status = "okay";
> > };
> > diff --git a/dts/upstream/src/arm/st/stm32h750i-art-pi.dts b/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
> > index 44c307f8b09c..00d195d52a45 100644
> > --- a/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
> > +++ b/dts/upstream/src/arm/st/stm32h750i-art-pi.dts
> > @@ -197,14 +197,14 @@
> > };
> >
> > &usart2 {
> > - pinctrl-0 = <&usart2_pins>;
> > + pinctrl-0 = <&usart2_pins_a>;
> > pinctrl-names = "default";
> > status = "disabled";
> > };
> >
> > &usart3 {
> > pinctrl-names = "default";
> > - pinctrl-0 = <&usart3_pins>;
> > + pinctrl-0 = <&usart3_pins_a>;
> > dmas = <&dmamux1 45 0x400 0x05>,
> > <&dmamux1 46 0x400 0x05>;
> > dma-names = "rx", "tx";
> > @@ -221,7 +221,7 @@
> > };
> >
> > &uart4 {
> > - pinctrl-0 = <&uart4_pins>;
> > + pinctrl-0 = <&uart4_pins_a>;
> > pinctrl-names = "default";
> > status = "okay";
> > };
> > --
> > 2.43.0
> >
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binacchi@amarulasolutions.com
__________________________________
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-09 13:25 ` Sumit Garg
@ 2025-06-09 13:46 ` Dario Binacchi
2025-06-09 15:40 ` Sumit Garg
0 siblings, 1 reply; 38+ messages in thread
From: Dario Binacchi @ 2025-06-09 13:46 UTC (permalink / raw)
To: Sumit Garg
Cc: Patrice CHOTARD, u-boot, linux-amarula, Alexandre Torgue,
Dillon Min, Ilias Apalodimas, Jerome Forissier,
Krzysztof Kozlowski, Lukasz Majewski, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, Tom Rini, uboot-stm32
Hi Sumit,
On Mon, Jun 9, 2025 at 3:25 PM Sumit Garg <sumit.garg@kernel.org> wrote:
>
> Hi Patrice,
>
> On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
> >
> >
> > On 6/7/25 11:37, Dario Binacchi wrote:
> > > The series adds support for stm32h747-discovery board.
> > >
> > > Detailed information can be found at:
> > > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> > >
> > >
> > > Dario Binacchi (9):
> > > ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> > > dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> > > dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> > > ARM: dts: stm32: add uart8 node for stm32h743 MCU
> > > ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> > > ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> > > ARM: dts: stm32: support STM32h747i-disco board
> > > ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> > > board: stm32: add stm32h747-discovery board support
> >
> >
> > Hi Dario
> >
> > For the whole series
> > Applied to u-boot-stm32/next
>
> Please give some time for other maintainers to review this patch-set.
> The dts/upstream patches in this series aren't clean cherry pick from
> upstream.
All the commits are already in the mainline Linux kernel, specifically
in v6.16-rc1.
If you're referring to the fact that the patches can't be applied
cleanly, I believe it's
because the target path in the Linux kernel doesn't match the one in U-Boot.
In fact, the DTS files are located in two different relative paths.
Thanks and regards,
Dario
> This has to be fixed as otherwise random patches are going to
> cause DT sync issues.
>
> -Sumit
>
> >
> > Thanks
> > Patrice
> >
> > >
> > > arch/arm/dts/stm32h747i-disco-u-boot.dtsi | 104 ++++++++++++++
> > > arch/arm/mach-stm32/stm32h7/Kconfig | 4 +
> > > board/st/stm32h747-disco/Kconfig | 15 ++
> > > board/st/stm32h747-disco/MAINTAINERS | 7 +
> > > board/st/stm32h747-disco/Makefile | 6 +
> > > board/st/stm32h747-disco/stm32h747-disco.c | 42 ++++++
> > > configs/stm32h747-disco_defconfig | 35 +++++
> > > drivers/clk/stm32/clk-stm32h7.c | 5 +
> > > dts/upstream/Bindings/arm/stm32/stm32.yaml | 4 +
> > > .../include/dt-bindings/clock/stm32h7-clks.h | 4 +-
> > > dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 34 ++++-
> > > dts/upstream/src/arm/st/stm32h743.dtsi | 8 ++
> > > dts/upstream/src/arm/st/stm32h743i-disco.dts | 2 +-
> > > dts/upstream/src/arm/st/stm32h743i-eval.dts | 2 +-
> > > dts/upstream/src/arm/st/stm32h747i-disco.dts | 136 ++++++++++++++++++
> > > dts/upstream/src/arm/st/stm32h750i-art-pi.dts | 6 +-
> > > include/configs/stm32h747-disco.h | 32 +++++
> > > 17 files changed, 435 insertions(+), 11 deletions(-)
> > > create mode 100644 arch/arm/dts/stm32h747i-disco-u-boot.dtsi
> > > create mode 100644 board/st/stm32h747-disco/Kconfig
> > > create mode 100644 board/st/stm32h747-disco/MAINTAINERS
> > > create mode 100644 board/st/stm32h747-disco/Makefile
> > > create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
> > > create mode 100644 configs/stm32h747-disco_defconfig
> > > create mode 100644 dts/upstream/src/arm/st/stm32h747i-disco.dts
> > > create mode 100644 include/configs/stm32h747-disco.h
> > >
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binacchi@amarulasolutions.com
__________________________________
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-09 13:46 ` Dario Binacchi
@ 2025-06-09 15:40 ` Sumit Garg
2025-06-09 15:50 ` Tom Rini
0 siblings, 1 reply; 38+ messages in thread
From: Sumit Garg @ 2025-06-09 15:40 UTC (permalink / raw)
To: Dario Binacchi
Cc: Patrice CHOTARD, u-boot, linux-amarula, Alexandre Torgue,
Dillon Min, Ilias Apalodimas, Jerome Forissier,
Krzysztof Kozlowski, Lukasz Majewski, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, Tom Rini, uboot-stm32
On Mon, Jun 09, 2025 at 03:46:27PM +0200, Dario Binacchi wrote:
> Hi Sumit,
>
> On Mon, Jun 9, 2025 at 3:25 PM Sumit Garg <sumit.garg@kernel.org> wrote:
> >
> > Hi Patrice,
> >
> > On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
> > >
> > >
> > > On 6/7/25 11:37, Dario Binacchi wrote:
> > > > The series adds support for stm32h747-discovery board.
> > > >
> > > > Detailed information can be found at:
> > > > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> > > >
> > > >
> > > > Dario Binacchi (9):
> > > > ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> > > > dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> > > > dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> > > > ARM: dts: stm32: add uart8 node for stm32h743 MCU
> > > > ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> > > > ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> > > > ARM: dts: stm32: support STM32h747i-disco board
> > > > ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> > > > board: stm32: add stm32h747-discovery board support
> > >
> > >
> > > Hi Dario
> > >
> > > For the whole series
> > > Applied to u-boot-stm32/next
> >
> > Please give some time for other maintainers to review this patch-set.
> > The dts/upstream patches in this series aren't clean cherry pick from
> > upstream.
>
> All the commits are already in the mainline Linux kernel, specifically
> in v6.16-rc1.
> If you're referring to the fact that the patches can't be applied
> cleanly, I believe it's
> because the target path in the Linux kernel doesn't match the one in U-Boot.
> In fact, the DTS files are located in two different relative paths.
That's exactly why we have (refer here [1]):
./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
You should have waited v6.16-rc1 tag to be synced into
devicetree-rebasing [2] for the cherry-picks to work. This way of
manually patching dts/upstream is not allowed since it is going to break
DT syncs in one way or another.
So I would suggest you to wait for v6.16-rc1 to land in DT rebasing tree
and then send v2 with proper cherry picked patches.
[1] https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
[2] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
-Sumit
>
> Thanks and regards,
> Dario
>
> > This has to be fixed as otherwise random patches are going to
> > cause DT sync issues.
> >
> > -Sumit
> >
> > >
> > > Thanks
> > > Patrice
> > >
> > > >
> > > > arch/arm/dts/stm32h747i-disco-u-boot.dtsi | 104 ++++++++++++++
> > > > arch/arm/mach-stm32/stm32h7/Kconfig | 4 +
> > > > board/st/stm32h747-disco/Kconfig | 15 ++
> > > > board/st/stm32h747-disco/MAINTAINERS | 7 +
> > > > board/st/stm32h747-disco/Makefile | 6 +
> > > > board/st/stm32h747-disco/stm32h747-disco.c | 42 ++++++
> > > > configs/stm32h747-disco_defconfig | 35 +++++
> > > > drivers/clk/stm32/clk-stm32h7.c | 5 +
> > > > dts/upstream/Bindings/arm/stm32/stm32.yaml | 4 +
> > > > .../include/dt-bindings/clock/stm32h7-clks.h | 4 +-
> > > > dts/upstream/src/arm/st/stm32h7-pinctrl.dtsi | 34 ++++-
> > > > dts/upstream/src/arm/st/stm32h743.dtsi | 8 ++
> > > > dts/upstream/src/arm/st/stm32h743i-disco.dts | 2 +-
> > > > dts/upstream/src/arm/st/stm32h743i-eval.dts | 2 +-
> > > > dts/upstream/src/arm/st/stm32h747i-disco.dts | 136 ++++++++++++++++++
> > > > dts/upstream/src/arm/st/stm32h750i-art-pi.dts | 6 +-
> > > > include/configs/stm32h747-disco.h | 32 +++++
> > > > 17 files changed, 435 insertions(+), 11 deletions(-)
> > > > create mode 100644 arch/arm/dts/stm32h747i-disco-u-boot.dtsi
> > > > create mode 100644 board/st/stm32h747-disco/Kconfig
> > > > create mode 100644 board/st/stm32h747-disco/MAINTAINERS
> > > > create mode 100644 board/st/stm32h747-disco/Makefile
> > > > create mode 100644 board/st/stm32h747-disco/stm32h747-disco.c
> > > > create mode 100644 configs/stm32h747-disco_defconfig
> > > > create mode 100644 dts/upstream/src/arm/st/stm32h747i-disco.dts
> > > > create mode 100644 include/configs/stm32h747-disco.h
> > > >
>
>
>
> --
>
> Dario Binacchi
>
> Senior Embedded Linux Developer
>
> dario.binacchi@amarulasolutions.com
>
> __________________________________
>
>
> Amarula Solutions SRL
>
> Via Le Canevare 30, 31100 Treviso, Veneto, IT
>
> T. +39 042 243 5310
> info@amarulasolutions.com
>
> www.amarulasolutions.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-09 15:40 ` Sumit Garg
@ 2025-06-09 15:50 ` Tom Rini
2025-06-09 16:07 ` Sumit Garg
0 siblings, 1 reply; 38+ messages in thread
From: Tom Rini @ 2025-06-09 15:50 UTC (permalink / raw)
To: Sumit Garg
Cc: Dario Binacchi, Patrice CHOTARD, u-boot, linux-amarula,
Alexandre Torgue, Dillon Min, Ilias Apalodimas, Jerome Forissier,
Krzysztof Kozlowski, Lukasz Majewski, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, uboot-stm32
[-- Attachment #1: Type: text/plain, Size: 2844 bytes --]
On Mon, Jun 09, 2025 at 04:40:43PM +0100, Sumit Garg wrote:
> On Mon, Jun 09, 2025 at 03:46:27PM +0200, Dario Binacchi wrote:
> > Hi Sumit,
> >
> > On Mon, Jun 9, 2025 at 3:25 PM Sumit Garg <sumit.garg@kernel.org> wrote:
> > >
> > > Hi Patrice,
> > >
> > > On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
> > > >
> > > >
> > > > On 6/7/25 11:37, Dario Binacchi wrote:
> > > > > The series adds support for stm32h747-discovery board.
> > > > >
> > > > > Detailed information can be found at:
> > > > > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> > > > >
> > > > >
> > > > > Dario Binacchi (9):
> > > > > ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> > > > > dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> > > > > dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> > > > > ARM: dts: stm32: add uart8 node for stm32h743 MCU
> > > > > ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> > > > > ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> > > > > ARM: dts: stm32: support STM32h747i-disco board
> > > > > ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> > > > > board: stm32: add stm32h747-discovery board support
> > > >
> > > >
> > > > Hi Dario
> > > >
> > > > For the whole series
> > > > Applied to u-boot-stm32/next
> > >
> > > Please give some time for other maintainers to review this patch-set.
> > > The dts/upstream patches in this series aren't clean cherry pick from
> > > upstream.
> >
> > All the commits are already in the mainline Linux kernel, specifically
> > in v6.16-rc1.
> > If you're referring to the fact that the patches can't be applied
> > cleanly, I believe it's
> > because the target path in the Linux kernel doesn't match the one in U-Boot.
> > In fact, the DTS files are located in two different relative paths.
>
> That's exactly why we have (refer here [1]):
>
> ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
>
> You should have waited v6.16-rc1 tag to be synced into
> devicetree-rebasing [2] for the cherry-picks to work. This way of
> manually patching dts/upstream is not allowed since it is going to break
> DT syncs in one way or another.
>
> So I would suggest you to wait for v6.16-rc1 to land in DT rebasing tree
> and then send v2 with proper cherry picked patches.
>
> [1] https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
> [2] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
To be honest, I don't think this is a big deal. Git will be merging
based on content and not specific hashes. And in the case of conflicts I
just copy the file from the tag to our tree.
--
Tom
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-09 15:50 ` Tom Rini
@ 2025-06-09 16:07 ` Sumit Garg
2025-06-09 16:22 ` Tom Rini
0 siblings, 1 reply; 38+ messages in thread
From: Sumit Garg @ 2025-06-09 16:07 UTC (permalink / raw)
To: Tom Rini
Cc: Dario Binacchi, Patrice CHOTARD, u-boot, linux-amarula,
Alexandre Torgue, Dillon Min, Ilias Apalodimas, Jerome Forissier,
Krzysztof Kozlowski, Lukasz Majewski, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, uboot-stm32
On Mon, Jun 09, 2025 at 09:50:19AM -0600, Tom Rini wrote:
> On Mon, Jun 09, 2025 at 04:40:43PM +0100, Sumit Garg wrote:
> > On Mon, Jun 09, 2025 at 03:46:27PM +0200, Dario Binacchi wrote:
> > > Hi Sumit,
> > >
> > > On Mon, Jun 9, 2025 at 3:25 PM Sumit Garg <sumit.garg@kernel.org> wrote:
> > > >
> > > > Hi Patrice,
> > > >
> > > > On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
> > > > >
> > > > >
> > > > > On 6/7/25 11:37, Dario Binacchi wrote:
> > > > > > The series adds support for stm32h747-discovery board.
> > > > > >
> > > > > > Detailed information can be found at:
> > > > > > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> > > > > >
> > > > > >
> > > > > > Dario Binacchi (9):
> > > > > > ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> > > > > > dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> > > > > > dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> > > > > > ARM: dts: stm32: add uart8 node for stm32h743 MCU
> > > > > > ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> > > > > > ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> > > > > > ARM: dts: stm32: support STM32h747i-disco board
> > > > > > ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> > > > > > board: stm32: add stm32h747-discovery board support
> > > > >
> > > > >
> > > > > Hi Dario
> > > > >
> > > > > For the whole series
> > > > > Applied to u-boot-stm32/next
> > > >
> > > > Please give some time for other maintainers to review this patch-set.
> > > > The dts/upstream patches in this series aren't clean cherry pick from
> > > > upstream.
> > >
> > > All the commits are already in the mainline Linux kernel, specifically
> > > in v6.16-rc1.
> > > If you're referring to the fact that the patches can't be applied
> > > cleanly, I believe it's
> > > because the target path in the Linux kernel doesn't match the one in U-Boot.
> > > In fact, the DTS files are located in two different relative paths.
> >
> > That's exactly why we have (refer here [1]):
> >
> > ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
> >
> > You should have waited v6.16-rc1 tag to be synced into
> > devicetree-rebasing [2] for the cherry-picks to work. This way of
> > manually patching dts/upstream is not allowed since it is going to break
> > DT syncs in one way or another.
> >
> > So I would suggest you to wait for v6.16-rc1 to land in DT rebasing tree
> > and then send v2 with proper cherry picked patches.
> >
> > [1] https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
> > [2] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
>
> To be honest, I don't think this is a big deal. Git will be merging
> based on content and not specific hashes. And in the case of conflicts I
> just copy the file from the tag to our tree.
The essential problem here to me is we are going to allow manual
patching of dts/upstream tree given this example? How do we keep track
if all that manual patching landed in Linux DT mainline? The cherry
picks ensured that we always keep in sync with mainline.
Lets take an example what if Git automatically resolved a merge conflict
for you with duplicated content or if manually patching a DTS file
diverged from upstream and get unnoticed during DT syncs?
IMHO, we should try to avoid manual patching of DT subtree otherwise it
is hard to set a policy as to what level of manual patching is allowed
or not.
-Sumit
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-09 16:07 ` Sumit Garg
@ 2025-06-09 16:22 ` Tom Rini
2025-06-10 8:52 ` Sumit Garg
0 siblings, 1 reply; 38+ messages in thread
From: Tom Rini @ 2025-06-09 16:22 UTC (permalink / raw)
To: Sumit Garg
Cc: Dario Binacchi, Patrice CHOTARD, u-boot, linux-amarula,
Alexandre Torgue, Dillon Min, Ilias Apalodimas, Jerome Forissier,
Krzysztof Kozlowski, Lukasz Majewski, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, uboot-stm32
[-- Attachment #1: Type: text/plain, Size: 5081 bytes --]
On Mon, Jun 09, 2025 at 05:07:40PM +0100, Sumit Garg wrote:
> On Mon, Jun 09, 2025 at 09:50:19AM -0600, Tom Rini wrote:
> > On Mon, Jun 09, 2025 at 04:40:43PM +0100, Sumit Garg wrote:
> > > On Mon, Jun 09, 2025 at 03:46:27PM +0200, Dario Binacchi wrote:
> > > > Hi Sumit,
> > > >
> > > > On Mon, Jun 9, 2025 at 3:25 PM Sumit Garg <sumit.garg@kernel.org> wrote:
> > > > >
> > > > > Hi Patrice,
> > > > >
> > > > > On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
> > > > > >
> > > > > >
> > > > > > On 6/7/25 11:37, Dario Binacchi wrote:
> > > > > > > The series adds support for stm32h747-discovery board.
> > > > > > >
> > > > > > > Detailed information can be found at:
> > > > > > > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> > > > > > >
> > > > > > >
> > > > > > > Dario Binacchi (9):
> > > > > > > ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> > > > > > > dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> > > > > > > dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> > > > > > > ARM: dts: stm32: add uart8 node for stm32h743 MCU
> > > > > > > ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> > > > > > > ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> > > > > > > ARM: dts: stm32: support STM32h747i-disco board
> > > > > > > ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> > > > > > > board: stm32: add stm32h747-discovery board support
> > > > > >
> > > > > >
> > > > > > Hi Dario
> > > > > >
> > > > > > For the whole series
> > > > > > Applied to u-boot-stm32/next
> > > > >
> > > > > Please give some time for other maintainers to review this patch-set.
> > > > > The dts/upstream patches in this series aren't clean cherry pick from
> > > > > upstream.
> > > >
> > > > All the commits are already in the mainline Linux kernel, specifically
> > > > in v6.16-rc1.
> > > > If you're referring to the fact that the patches can't be applied
> > > > cleanly, I believe it's
> > > > because the target path in the Linux kernel doesn't match the one in U-Boot.
> > > > In fact, the DTS files are located in two different relative paths.
> > >
> > > That's exactly why we have (refer here [1]):
> > >
> > > ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
> > >
> > > You should have waited v6.16-rc1 tag to be synced into
> > > devicetree-rebasing [2] for the cherry-picks to work. This way of
> > > manually patching dts/upstream is not allowed since it is going to break
> > > DT syncs in one way or another.
> > >
> > > So I would suggest you to wait for v6.16-rc1 to land in DT rebasing tree
> > > and then send v2 with proper cherry picked patches.
> > >
> > > [1] https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
> > > [2] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
> >
> > To be honest, I don't think this is a big deal. Git will be merging
> > based on content and not specific hashes. And in the case of conflicts I
> > just copy the file from the tag to our tree.
>
> The essential problem here to me is we are going to allow manual
> patching of dts/upstream tree given this example? How do we keep track
> if all that manual patching landed in Linux DT mainline? The cherry
> picks ensured that we always keep in sync with mainline.
>
> Lets take an example what if Git automatically resolved a merge conflict
> for you with duplicated content or if manually patching a DTS file
> diverged from upstream and get unnoticed during DT syncs?
>
> IMHO, we should try to avoid manual patching of DT subtree otherwise it
> is hard to set a policy as to what level of manual patching is allowed
> or not.
Part of the problem here is that from the standpoint of applying posted
patches there's no functional difference between what Dario did here and
what could be done once v6.16-rc1-dts is tagged (if it's not already).
It's essentially a "manual patch" either way. We make it clear that
dts/upstream/ *only* gets changes that are in Linus' tree. If someone
tries to be sneaky and push something in that's not quite what's
upstream, it will get stomped on later and there's not going to be any
sympathy for the now broken platform.
Yes, we document saying to use the cherry-pick script, and that's what
people should do in general. But I don't think there's value in adding a
further delay between "in Linus' tree" and "in devicetree-rebasing". In
the linux kernel, there's thousands of people working on things and so
strict rules can be understandable (someone will be running a bot to
look for "(cherry pick from commit $hash)" and fail things where $hash
doesn't exist, makes sense). Here if the ST custodians are happy just
verifying the kernel commit, OK, that's fine. Or if they want to wait,
that's fine too. We can be a little relaxed and let custodians do what
they see as best.
--
Tom
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^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-09 16:22 ` Tom Rini
@ 2025-06-10 8:52 ` Sumit Garg
2025-06-10 16:04 ` Tom Rini
0 siblings, 1 reply; 38+ messages in thread
From: Sumit Garg @ 2025-06-10 8:52 UTC (permalink / raw)
To: Tom Rini
Cc: Dario Binacchi, Patrice CHOTARD, u-boot, linux-amarula,
Alexandre Torgue, Dillon Min, Ilias Apalodimas, Jerome Forissier,
Krzysztof Kozlowski, Lukasz Majewski, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, uboot-stm32
On Mon, Jun 09, 2025 at 10:22:39AM -0600, Tom Rini wrote:
> On Mon, Jun 09, 2025 at 05:07:40PM +0100, Sumit Garg wrote:
> > On Mon, Jun 09, 2025 at 09:50:19AM -0600, Tom Rini wrote:
> > > On Mon, Jun 09, 2025 at 04:40:43PM +0100, Sumit Garg wrote:
> > > > On Mon, Jun 09, 2025 at 03:46:27PM +0200, Dario Binacchi wrote:
> > > > > Hi Sumit,
> > > > >
> > > > > On Mon, Jun 9, 2025 at 3:25 PM Sumit Garg <sumit.garg@kernel.org> wrote:
> > > > > >
> > > > > > Hi Patrice,
> > > > > >
> > > > > > On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
> > > > > > >
> > > > > > >
> > > > > > > On 6/7/25 11:37, Dario Binacchi wrote:
> > > > > > > > The series adds support for stm32h747-discovery board.
> > > > > > > >
> > > > > > > > Detailed information can be found at:
> > > > > > > > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> > > > > > > >
> > > > > > > >
> > > > > > > > Dario Binacchi (9):
> > > > > > > > ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> > > > > > > > dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> > > > > > > > dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> > > > > > > > ARM: dts: stm32: add uart8 node for stm32h743 MCU
> > > > > > > > ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> > > > > > > > ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> > > > > > > > ARM: dts: stm32: support STM32h747i-disco board
> > > > > > > > ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> > > > > > > > board: stm32: add stm32h747-discovery board support
> > > > > > >
> > > > > > >
> > > > > > > Hi Dario
> > > > > > >
> > > > > > > For the whole series
> > > > > > > Applied to u-boot-stm32/next
> > > > > >
> > > > > > Please give some time for other maintainers to review this patch-set.
> > > > > > The dts/upstream patches in this series aren't clean cherry pick from
> > > > > > upstream.
> > > > >
> > > > > All the commits are already in the mainline Linux kernel, specifically
> > > > > in v6.16-rc1.
> > > > > If you're referring to the fact that the patches can't be applied
> > > > > cleanly, I believe it's
> > > > > because the target path in the Linux kernel doesn't match the one in U-Boot.
> > > > > In fact, the DTS files are located in two different relative paths.
> > > >
> > > > That's exactly why we have (refer here [1]):
> > > >
> > > > ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
> > > >
> > > > You should have waited v6.16-rc1 tag to be synced into
> > > > devicetree-rebasing [2] for the cherry-picks to work. This way of
> > > > manually patching dts/upstream is not allowed since it is going to break
> > > > DT syncs in one way or another.
> > > >
> > > > So I would suggest you to wait for v6.16-rc1 to land in DT rebasing tree
> > > > and then send v2 with proper cherry picked patches.
> > > >
> > > > [1] https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
> > > > [2] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
> > >
> > > To be honest, I don't think this is a big deal. Git will be merging
> > > based on content and not specific hashes. And in the case of conflicts I
> > > just copy the file from the tag to our tree.
> >
> > The essential problem here to me is we are going to allow manual
> > patching of dts/upstream tree given this example? How do we keep track
> > if all that manual patching landed in Linux DT mainline? The cherry
> > picks ensured that we always keep in sync with mainline.
> >
> > Lets take an example what if Git automatically resolved a merge conflict
> > for you with duplicated content or if manually patching a DTS file
> > diverged from upstream and get unnoticed during DT syncs?
> >
> > IMHO, we should try to avoid manual patching of DT subtree otherwise it
> > is hard to set a policy as to what level of manual patching is allowed
> > or not.
>
> Part of the problem here is that from the standpoint of applying posted
> patches there's no functional difference between what Dario did here and
> what could be done once v6.16-rc1-dts is tagged (if it's not already).
> It's essentially a "manual patch" either way.
Nope, there is a difference here. The cherry-pick from DT rebasing
allows the custodian to rather just cherry pick corresponding DT patches
rather than applying patches posted on mailing list. I usually do that
when reviewing dts/upstream patches if they can be cherry-picked cleanly
or not. So there won't be manual patching in that process.
./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
> We make it clear that
> dts/upstream/ *only* gets changes that are in Linus' tree. If someone
> tries to be sneaky and push something in that's not quite what's
> upstream, it will get stomped on later and there's not going to be any
> sympathy for the now broken platform.
For us the upstream sync path is via DT rebasing tree only. It usually
lags behind Linus' tree by maximum 1 week candence what I have noticed.
>
> Yes, we document saying to use the cherry-pick script, and that's what
> people should do in general. But I don't think there's value in adding a
> further delay between "in Linus' tree" and "in devicetree-rebasing". In
> the linux kernel, there's thousands of people working on things and so
> strict rules can be understandable (someone will be running a bot to
> look for "(cherry pick from commit $hash)" and fail things where $hash
> doesn't exist, makes sense). Here if the ST custodians are happy just
> verifying the kernel commit, OK, that's fine. Or if they want to wait,
> that's fine too. We can be a little relaxed and let custodians do what
> they see as best.
The reason we adopted OF_UPSTREAM was just to get rid of the manual DT
patching and the syncs. So is it really that few days lag of DT rebasing
tree which is again pushing us towards manual DT patching? I am just
trying to understand the shortcomings that DT rebasing tree puts in
front of us.
-Sumit
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-10 8:52 ` Sumit Garg
@ 2025-06-10 16:04 ` Tom Rini
2025-06-11 12:08 ` Sumit Garg
0 siblings, 1 reply; 38+ messages in thread
From: Tom Rini @ 2025-06-10 16:04 UTC (permalink / raw)
To: Sumit Garg
Cc: Dario Binacchi, Patrice CHOTARD, u-boot, linux-amarula,
Alexandre Torgue, Dillon Min, Ilias Apalodimas, Jerome Forissier,
Krzysztof Kozlowski, Lukasz Majewski, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, uboot-stm32
[-- Attachment #1: Type: text/plain, Size: 6957 bytes --]
On Tue, Jun 10, 2025 at 02:22:49PM +0530, Sumit Garg wrote:
> On Mon, Jun 09, 2025 at 10:22:39AM -0600, Tom Rini wrote:
> > On Mon, Jun 09, 2025 at 05:07:40PM +0100, Sumit Garg wrote:
> > > On Mon, Jun 09, 2025 at 09:50:19AM -0600, Tom Rini wrote:
> > > > On Mon, Jun 09, 2025 at 04:40:43PM +0100, Sumit Garg wrote:
> > > > > On Mon, Jun 09, 2025 at 03:46:27PM +0200, Dario Binacchi wrote:
> > > > > > Hi Sumit,
> > > > > >
> > > > > > On Mon, Jun 9, 2025 at 3:25 PM Sumit Garg <sumit.garg@kernel.org> wrote:
> > > > > > >
> > > > > > > Hi Patrice,
> > > > > > >
> > > > > > > On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
> > > > > > > >
> > > > > > > >
> > > > > > > > On 6/7/25 11:37, Dario Binacchi wrote:
> > > > > > > > > The series adds support for stm32h747-discovery board.
> > > > > > > > >
> > > > > > > > > Detailed information can be found at:
> > > > > > > > > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> > > > > > > > >
> > > > > > > > >
> > > > > > > > > Dario Binacchi (9):
> > > > > > > > > ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> > > > > > > > > dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> > > > > > > > > dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> > > > > > > > > ARM: dts: stm32: add uart8 node for stm32h743 MCU
> > > > > > > > > ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> > > > > > > > > ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> > > > > > > > > ARM: dts: stm32: support STM32h747i-disco board
> > > > > > > > > ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> > > > > > > > > board: stm32: add stm32h747-discovery board support
> > > > > > > >
> > > > > > > >
> > > > > > > > Hi Dario
> > > > > > > >
> > > > > > > > For the whole series
> > > > > > > > Applied to u-boot-stm32/next
> > > > > > >
> > > > > > > Please give some time for other maintainers to review this patch-set.
> > > > > > > The dts/upstream patches in this series aren't clean cherry pick from
> > > > > > > upstream.
> > > > > >
> > > > > > All the commits are already in the mainline Linux kernel, specifically
> > > > > > in v6.16-rc1.
> > > > > > If you're referring to the fact that the patches can't be applied
> > > > > > cleanly, I believe it's
> > > > > > because the target path in the Linux kernel doesn't match the one in U-Boot.
> > > > > > In fact, the DTS files are located in two different relative paths.
> > > > >
> > > > > That's exactly why we have (refer here [1]):
> > > > >
> > > > > ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
> > > > >
> > > > > You should have waited v6.16-rc1 tag to be synced into
> > > > > devicetree-rebasing [2] for the cherry-picks to work. This way of
> > > > > manually patching dts/upstream is not allowed since it is going to break
> > > > > DT syncs in one way or another.
> > > > >
> > > > > So I would suggest you to wait for v6.16-rc1 to land in DT rebasing tree
> > > > > and then send v2 with proper cherry picked patches.
> > > > >
> > > > > [1] https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
> > > > > [2] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
> > > >
> > > > To be honest, I don't think this is a big deal. Git will be merging
> > > > based on content and not specific hashes. And in the case of conflicts I
> > > > just copy the file from the tag to our tree.
> > >
> > > The essential problem here to me is we are going to allow manual
> > > patching of dts/upstream tree given this example? How do we keep track
> > > if all that manual patching landed in Linux DT mainline? The cherry
> > > picks ensured that we always keep in sync with mainline.
> > >
> > > Lets take an example what if Git automatically resolved a merge conflict
> > > for you with duplicated content or if manually patching a DTS file
> > > diverged from upstream and get unnoticed during DT syncs?
> > >
> > > IMHO, we should try to avoid manual patching of DT subtree otherwise it
> > > is hard to set a policy as to what level of manual patching is allowed
> > > or not.
> >
> > Part of the problem here is that from the standpoint of applying posted
> > patches there's no functional difference between what Dario did here and
> > what could be done once v6.16-rc1-dts is tagged (if it's not already).
> > It's essentially a "manual patch" either way.
>
> Nope, there is a difference here. The cherry-pick from DT rebasing
> allows the custodian to rather just cherry pick corresponding DT patches
> rather than applying patches posted on mailing list. I usually do that
> when reviewing dts/upstream patches if they can be cherry-picked cleanly
> or not. So there won't be manual patching in that process.
>
> ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
Alright. I hadn't foreseen anyone doing that rather than "b4 {am,shazam}
msg-id" to grab the series.
> > We make it clear that
> > dts/upstream/ *only* gets changes that are in Linus' tree. If someone
> > tries to be sneaky and push something in that's not quite what's
> > upstream, it will get stomped on later and there's not going to be any
> > sympathy for the now broken platform.
>
> For us the upstream sync path is via DT rebasing tree only. It usually
> lags behind Linus' tree by maximum 1 week candence what I have noticed.
>
> >
> > Yes, we document saying to use the cherry-pick script, and that's what
> > people should do in general. But I don't think there's value in adding a
> > further delay between "in Linus' tree" and "in devicetree-rebasing". In
> > the linux kernel, there's thousands of people working on things and so
> > strict rules can be understandable (someone will be running a bot to
> > look for "(cherry pick from commit $hash)" and fail things where $hash
> > doesn't exist, makes sense). Here if the ST custodians are happy just
> > verifying the kernel commit, OK, that's fine. Or if they want to wait,
> > that's fine too. We can be a little relaxed and let custodians do what
> > they see as best.
>
> The reason we adopted OF_UPSTREAM was just to get rid of the manual DT
> patching and the syncs. So is it really that few days lag of DT rebasing
> tree which is again pushing us towards manual DT patching? I am just
> trying to understand the shortcomings that DT rebasing tree puts in
> front of us.
It's mainly that I want to be flexible. So long as we don't violate the
content rules (Linus' tree *only*) I don't want to hinder the people
eager to now upstream U-Boot support for purely process reasons (which
happens, E Shattow on IRC was asking how to at least locally point
dts/upstream at something else, at least for local testing).
--
Tom
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^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-10 16:04 ` Tom Rini
@ 2025-06-11 12:08 ` Sumit Garg
2025-06-11 13:25 ` Quentin Schulz
0 siblings, 1 reply; 38+ messages in thread
From: Sumit Garg @ 2025-06-11 12:08 UTC (permalink / raw)
To: Tom Rini
Cc: Dario Binacchi, Patrice CHOTARD, u-boot, linux-amarula,
Alexandre Torgue, Dillon Min, Ilias Apalodimas, Jerome Forissier,
Krzysztof Kozlowski, Lukasz Majewski, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, uboot-stm32, quentin.schulz
On Tue, Jun 10, 2025 at 10:04:54AM -0600, Tom Rini wrote:
> On Tue, Jun 10, 2025 at 02:22:49PM +0530, Sumit Garg wrote:
> > On Mon, Jun 09, 2025 at 10:22:39AM -0600, Tom Rini wrote:
> > > On Mon, Jun 09, 2025 at 05:07:40PM +0100, Sumit Garg wrote:
> > > > On Mon, Jun 09, 2025 at 09:50:19AM -0600, Tom Rini wrote:
> > > > > On Mon, Jun 09, 2025 at 04:40:43PM +0100, Sumit Garg wrote:
> > > > > > On Mon, Jun 09, 2025 at 03:46:27PM +0200, Dario Binacchi wrote:
> > > > > > > Hi Sumit,
> > > > > > >
> > > > > > > On Mon, Jun 9, 2025 at 3:25 PM Sumit Garg <sumit.garg@kernel.org> wrote:
> > > > > > > >
> > > > > > > > Hi Patrice,
> > > > > > > >
> > > > > > > > On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
> > > > > > > > >
> > > > > > > > >
> > > > > > > > > On 6/7/25 11:37, Dario Binacchi wrote:
> > > > > > > > > > The series adds support for stm32h747-discovery board.
> > > > > > > > > >
> > > > > > > > > > Detailed information can be found at:
> > > > > > > > > > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> > > > > > > > > >
> > > > > > > > > >
> > > > > > > > > > Dario Binacchi (9):
> > > > > > > > > > ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> > > > > > > > > > dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> > > > > > > > > > dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> > > > > > > > > > ARM: dts: stm32: add uart8 node for stm32h743 MCU
> > > > > > > > > > ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> > > > > > > > > > ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> > > > > > > > > > ARM: dts: stm32: support STM32h747i-disco board
> > > > > > > > > > ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> > > > > > > > > > board: stm32: add stm32h747-discovery board support
> > > > > > > > >
> > > > > > > > >
> > > > > > > > > Hi Dario
> > > > > > > > >
> > > > > > > > > For the whole series
> > > > > > > > > Applied to u-boot-stm32/next
> > > > > > > >
> > > > > > > > Please give some time for other maintainers to review this patch-set.
> > > > > > > > The dts/upstream patches in this series aren't clean cherry pick from
> > > > > > > > upstream.
> > > > > > >
> > > > > > > All the commits are already in the mainline Linux kernel, specifically
> > > > > > > in v6.16-rc1.
> > > > > > > If you're referring to the fact that the patches can't be applied
> > > > > > > cleanly, I believe it's
> > > > > > > because the target path in the Linux kernel doesn't match the one in U-Boot.
> > > > > > > In fact, the DTS files are located in two different relative paths.
> > > > > >
> > > > > > That's exactly why we have (refer here [1]):
> > > > > >
> > > > > > ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
> > > > > >
> > > > > > You should have waited v6.16-rc1 tag to be synced into
> > > > > > devicetree-rebasing [2] for the cherry-picks to work. This way of
> > > > > > manually patching dts/upstream is not allowed since it is going to break
> > > > > > DT syncs in one way or another.
> > > > > >
> > > > > > So I would suggest you to wait for v6.16-rc1 to land in DT rebasing tree
> > > > > > and then send v2 with proper cherry picked patches.
> > > > > >
> > > > > > [1] https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
> > > > > > [2] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
> > > > >
> > > > > To be honest, I don't think this is a big deal. Git will be merging
> > > > > based on content and not specific hashes. And in the case of conflicts I
> > > > > just copy the file from the tag to our tree.
> > > >
> > > > The essential problem here to me is we are going to allow manual
> > > > patching of dts/upstream tree given this example? How do we keep track
> > > > if all that manual patching landed in Linux DT mainline? The cherry
> > > > picks ensured that we always keep in sync with mainline.
> > > >
> > > > Lets take an example what if Git automatically resolved a merge conflict
> > > > for you with duplicated content or if manually patching a DTS file
> > > > diverged from upstream and get unnoticed during DT syncs?
> > > >
> > > > IMHO, we should try to avoid manual patching of DT subtree otherwise it
> > > > is hard to set a policy as to what level of manual patching is allowed
> > > > or not.
> > >
> > > Part of the problem here is that from the standpoint of applying posted
> > > patches there's no functional difference between what Dario did here and
> > > what could be done once v6.16-rc1-dts is tagged (if it's not already).
> > > It's essentially a "manual patch" either way.
> >
> > Nope, there is a difference here. The cherry-pick from DT rebasing
> > allows the custodian to rather just cherry pick corresponding DT patches
> > rather than applying patches posted on mailing list. I usually do that
> > when reviewing dts/upstream patches if they can be cherry-picked cleanly
> > or not. So there won't be manual patching in that process.
> >
> > ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
>
> Alright. I hadn't foreseen anyone doing that rather than "b4 {am,shazam}
> msg-id" to grab the series.
Maybe we need to have some custodian specific docs listing best
practices.
>
> > > We make it clear that
> > > dts/upstream/ *only* gets changes that are in Linus' tree. If someone
> > > tries to be sneaky and push something in that's not quite what's
> > > upstream, it will get stomped on later and there's not going to be any
> > > sympathy for the now broken platform.
> >
> > For us the upstream sync path is via DT rebasing tree only. It usually
> > lags behind Linus' tree by maximum 1 week candence what I have noticed.
> >
> > >
> > > Yes, we document saying to use the cherry-pick script, and that's what
> > > people should do in general. But I don't think there's value in adding a
> > > further delay between "in Linus' tree" and "in devicetree-rebasing". In
> > > the linux kernel, there's thousands of people working on things and so
> > > strict rules can be understandable (someone will be running a bot to
> > > look for "(cherry pick from commit $hash)" and fail things where $hash
> > > doesn't exist, makes sense). Here if the ST custodians are happy just
> > > verifying the kernel commit, OK, that's fine. Or if they want to wait,
> > > that's fine too. We can be a little relaxed and let custodians do what
> > > they see as best.
> >
> > The reason we adopted OF_UPSTREAM was just to get rid of the manual DT
> > patching and the syncs. So is it really that few days lag of DT rebasing
> > tree which is again pushing us towards manual DT patching? I am just
> > trying to understand the shortcomings that DT rebasing tree puts in
> > front of us.
>
> It's mainly that I want to be flexible. So long as we don't violate the
> content rules (Linus' tree *only*) I don't want to hinder the people
> eager to now upstream U-Boot support for purely process reasons
This flexibility has a cost associated to it which I hopefully was able
to clarify above. But finally it's your decision which prevails.
BTW, DT rebasing has already got the v6.16-rc1 tag, so it was really
just 3 days gap. Quentin (CCed) has already done some proper cherry
picking from there [1].
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=460450
> (which
> happens, E Shattow on IRC was asking how to at least locally point
> dts/upstream at something else, at least for local testing).
>
I would love to hear problems from people if that's for downstream
development too.
-Sumit
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-11 12:08 ` Sumit Garg
@ 2025-06-11 13:25 ` Quentin Schulz
2025-06-11 18:35 ` Tom Rini
0 siblings, 1 reply; 38+ messages in thread
From: Quentin Schulz @ 2025-06-11 13:25 UTC (permalink / raw)
To: Sumit Garg, Tom Rini
Cc: Dario Binacchi, Patrice CHOTARD, u-boot, linux-amarula,
Alexandre Torgue, Dillon Min, Ilias Apalodimas, Jerome Forissier,
Krzysztof Kozlowski, Lukasz Majewski, Patrick Delaunay,
Rasmus Villemoes, Sean Anderson, uboot-stm32
Hi all,
On 6/11/25 2:08 PM, Sumit Garg wrote:
> On Tue, Jun 10, 2025 at 10:04:54AM -0600, Tom Rini wrote:
>> On Tue, Jun 10, 2025 at 02:22:49PM +0530, Sumit Garg wrote:
>>> On Mon, Jun 09, 2025 at 10:22:39AM -0600, Tom Rini wrote:
>>>> On Mon, Jun 09, 2025 at 05:07:40PM +0100, Sumit Garg wrote:
>>>>> On Mon, Jun 09, 2025 at 09:50:19AM -0600, Tom Rini wrote:
>>>>>> On Mon, Jun 09, 2025 at 04:40:43PM +0100, Sumit Garg wrote:
>>>>>>> On Mon, Jun 09, 2025 at 03:46:27PM +0200, Dario Binacchi wrote:
>>>>>>>> Hi Sumit,
>>>>>>>>
>>>>>>>> On Mon, Jun 9, 2025 at 3:25 PM Sumit Garg <sumit.garg@kernel.org> wrote:
>>>>>>>>>
>>>>>>>>> Hi Patrice,
>>>>>>>>>
>>>>>>>>> On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>> On 6/7/25 11:37, Dario Binacchi wrote:
>>>>>>>>>>> The series adds support for stm32h747-discovery board.
>>>>>>>>>>>
>>>>>>>>>>> Detailed information can be found at:
>>>>>>>>>>> https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>> Dario Binacchi (9):
>>>>>>>>>>> ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
>>>>>>>>>>> dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
>>>>>>>>>>> dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
>>>>>>>>>>> ARM: dts: stm32: add uart8 node for stm32h743 MCU
>>>>>>>>>>> ARM: dts: stm32: add pin map for UART8 controller on stm32h743
>>>>>>>>>>> ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
>>>>>>>>>>> ARM: dts: stm32: support STM32h747i-disco board
>>>>>>>>>>> ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
>>>>>>>>>>> board: stm32: add stm32h747-discovery board support
>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>> Hi Dario
>>>>>>>>>>
>>>>>>>>>> For the whole series
>>>>>>>>>> Applied to u-boot-stm32/next
>>>>>>>>>
>>>>>>>>> Please give some time for other maintainers to review this patch-set.
>>>>>>>>> The dts/upstream patches in this series aren't clean cherry pick from
>>>>>>>>> upstream.
>>>>>>>>
>>>>>>>> All the commits are already in the mainline Linux kernel, specifically
>>>>>>>> in v6.16-rc1.
>>>>>>>> If you're referring to the fact that the patches can't be applied
>>>>>>>> cleanly, I believe it's
>>>>>>>> because the target path in the Linux kernel doesn't match the one in U-Boot.
>>>>>>>> In fact, the DTS files are located in two different relative paths.
>>>>>>>
>>>>>>> That's exactly why we have (refer here [1]):
>>>>>>>
>>>>>>> ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
>>>>>>>
>>>>>>> You should have waited v6.16-rc1 tag to be synced into
>>>>>>> devicetree-rebasing [2] for the cherry-picks to work. This way of
>>>>>>> manually patching dts/upstream is not allowed since it is going to break
>>>>>>> DT syncs in one way or another.
>>>>>>>
>>>>>>> So I would suggest you to wait for v6.16-rc1 to land in DT rebasing tree
>>>>>>> and then send v2 with proper cherry picked patches.
>>>>>>>
>>>>>>> [1] https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
>>>>>>> [2] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
>>>>>>
>>>>>> To be honest, I don't think this is a big deal. Git will be merging
>>>>>> based on content and not specific hashes. And in the case of conflicts I
>>>>>> just copy the file from the tag to our tree.
>>>>>
>>>>> The essential problem here to me is we are going to allow manual
>>>>> patching of dts/upstream tree given this example? How do we keep track
>>>>> if all that manual patching landed in Linux DT mainline? The cherry
>>>>> picks ensured that we always keep in sync with mainline.
>>>>>
>>>>> Lets take an example what if Git automatically resolved a merge conflict
>>>>> for you with duplicated content or if manually patching a DTS file
>>>>> diverged from upstream and get unnoticed during DT syncs?
>>>>>
>>>>> IMHO, we should try to avoid manual patching of DT subtree otherwise it
>>>>> is hard to set a policy as to what level of manual patching is allowed
>>>>> or not.
>>>>
>>>> Part of the problem here is that from the standpoint of applying posted
>>>> patches there's no functional difference between what Dario did here and
>>>> what could be done once v6.16-rc1-dts is tagged (if it's not already).
>>>> It's essentially a "manual patch" either way.
>>>
>>> Nope, there is a difference here. The cherry-pick from DT rebasing
>>> allows the custodian to rather just cherry pick corresponding DT patches
>>> rather than applying patches posted on mailing list. I usually do that
>>> when reviewing dts/upstream patches if they can be cherry-picked cleanly
>>> or not. So there won't be manual patching in that process.
>>>
>>> ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
>>
>> Alright. I hadn't foreseen anyone doing that rather than "b4 {am,shazam}
>> msg-id" to grab the series.
>
> Maybe we need to have some custodian specific docs listing best
> practices.
>
Or extend
https://docs.u-boot.org/en/latest/develop/devicetree/control.html#where-do-i-get-a-devicetree-file-for-my-board
https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
?
>>
>>>> We make it clear that
>>>> dts/upstream/ *only* gets changes that are in Linus' tree. If someone
>>>> tries to be sneaky and push something in that's not quite what's
>>>> upstream, it will get stomped on later and there's not going to be any
>>>> sympathy for the now broken platform.
>>>
>>> For us the upstream sync path is via DT rebasing tree only. It usually
>>> lags behind Linus' tree by maximum 1 week candence what I have noticed.
>>>
>>>>
>>>> Yes, we document saying to use the cherry-pick script, and that's what
>>>> people should do in general. But I don't think there's value in adding a
>>>> further delay between "in Linus' tree" and "in devicetree-rebasing". In
>>>> the linux kernel, there's thousands of people working on things and so
>>>> strict rules can be understandable (someone will be running a bot to
>>>> look for "(cherry pick from commit $hash)" and fail things where $hash
>>>> doesn't exist, makes sense). Here if the ST custodians are happy just
>>>> verifying the kernel commit, OK, that's fine. Or if they want to wait,
>>>> that's fine too. We can be a little relaxed and let custodians do what
>>>> they see as best.
>>>
>>> The reason we adopted OF_UPSTREAM was just to get rid of the manual DT
>>> patching and the syncs. So is it really that few days lag of DT rebasing
>>> tree which is again pushing us towards manual DT patching? I am just
>>> trying to understand the shortcomings that DT rebasing tree puts in
>>> front of us.
>>
>> It's mainly that I want to be flexible. So long as we don't violate the
>> content rules (Linus' tree *only*) I don't want to hinder the people
>> eager to now upstream U-Boot support for purely process reasons
>
> This flexibility has a cost associated to it which I hopefully was able
> to clarify above. But finally it's your decision which prevails.
>
> BTW, DT rebasing has already got the v6.16-rc1 tag, so it was really
> just 3 days gap. Quentin (CCed) has already done some proper cherry
> picking from there [1].
>
Not sure why I was summoned here but I can give my (maybe undesired) 2
cents :)
I (a contributor) **really** do not want to have hand-crafted patches in
dts/upstream. Use tools/update-subtree.sh for patches in that tree. Only
Tom is allowed to use pull because it's a mess to send a patch for it
and he usually announces he's doing it and then pushes to the next
branch directly, contributors can use pick instead. If a pick fails,
backport everything needed for it to apply cleanly. Yes, this may be
tedious. Make sure you do not break any other board as well.
I was already surprised we have U-Boot specific files in dts/upstream
(e.g. Makefiles :) ).
1) Doing it manually doesn't enforce the addition of the commit hash
used for the backport/cherry-pick in the commit log, which may be
problematic (how to quickly check that the patch contains what it should
contain and not more, or less?). How to verify it actually was merged?
In that state and not after other changes? Let's imagine an upstream
patch that changes the SoC.dtsi and associated boards dts, if
backporting manually one could be tempted to skip a conflicting board
dts (because another commit needs to be picked before for it to apply
cleanly). Also, until it's merged in master (which can take a long time
depending where you are in the release cycle) there's no guarantee the
patch is actually going to make it as is to the tree (it isn't unheard
of to have reverts or even rebases in maintainer trees before sending a
merge request to Linus).
2) If there are manual changes made to the patch that aren't upstreamed
in the kernel (or dependencies (git context) are missing), if we diverge
too much from upstream, Tom will have git conflicts when pulling new
versions. How to resolve those conflicts will be interesting.
3) Worse, if there are non-upstreamed changes that aren't inducing any
git conflict (via git context for example), then the merge/pull may not
say anything about it and we'll carry non-upstream patches in dts/upstream.
Maybe we should not even do a subtree pull/merge but erase everything
and reimport everything every time we bump, to make sure 2 or 3) cannot
happen?
For what it's worth, I've caught some (Rockchip) contributors sending
patches to dts/upstream that weren't even sent to the kernel mailing
list. That wasn't done on purpose but there are probably a few patches
already that went through the cracks. I am not sure how we could enforce
that (which needs to be done with maintainer tools as there are already
too many ways to contribute to U-boot (patman, git-send-email, b4,
etc...)) or even if we want to. But making dts/upstream the new
arch/arm/dts/ (for ARM) directory doesn't make much sense to me.
If you cannot wait for devicetree-rebasing to receive the new tag, do
the changes in -u-boot.dtsi and revert the changes once we update
dts/upstream to a newer tag (or cherry-pick once available)?
v6.16-rc1 took a bit longer this time to reach devicetree-rebasing I
think, but it landed this morning (UTC) so it isn't THAT long compared
to the push in master. We could ask devicetree-rebasing people to push
the master branch more often to avoid the up-to 2-week delay between
v6.15 and v6.16-rc1 for example.
I have read nothing in this thread so this is absolutely not a jab at
some contributor or maintainer in this series.
On a side-note, I think we should add -s to tools/update-subtree.sh's
git cherry-pick call to know who contributed the change to U-Boot (as
the commit author will be the same as in the kernel as far as I remember).
To be fair, the whole process is a bit constraining, especially for new
boards. You may have to wait up to ~2 months (a full kernel release
cycle) to see a tag with the device tree for your board, and only then
can you support the board in U-Boot with OF_UPSTREAM. In Rockchip we
typically force OF_UPSTREAM for new boards, but we also typically do not
accept hand-crafted git commits to dts/upstream. I don't know if it's
deterring contributors but we are still getting some contributions here
and there. Not sure how we should be handling that :/
> [1] https://patchwork.ozlabs.org/project/uboot/list/?series=460450
>
>> (which
>> happens, E Shattow on IRC was asking how to at least locally point
>> dts/upstream at something else, at least for local testing).
>>
>
> I would love to hear problems from people if that's for downstream
> development too.
>
We can add things in
https://docs.u-boot.org/en/latest/develop/devicetree/control.html#where-do-i-get-a-devicetree-file-for-my-board
and
https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
to be clearer on the limitations. Though til we enforce a check, this is
just information.
Cheers,
Quentin
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PATCH 0/9] Support stm32h747-discovery board
2025-06-11 13:25 ` Quentin Schulz
@ 2025-06-11 18:35 ` Tom Rini
0 siblings, 0 replies; 38+ messages in thread
From: Tom Rini @ 2025-06-11 18:35 UTC (permalink / raw)
To: Quentin Schulz
Cc: Sumit Garg, Dario Binacchi, Patrice CHOTARD, u-boot,
linux-amarula, Alexandre Torgue, Dillon Min, Ilias Apalodimas,
Jerome Forissier, Krzysztof Kozlowski, Lukasz Majewski,
Patrick Delaunay, Rasmus Villemoes, Sean Anderson, uboot-stm32
[-- Attachment #1: Type: text/plain, Size: 14276 bytes --]
On Wed, Jun 11, 2025 at 03:25:18PM +0200, Quentin Schulz wrote:
> Hi all,
>
> On 6/11/25 2:08 PM, Sumit Garg wrote:
> > On Tue, Jun 10, 2025 at 10:04:54AM -0600, Tom Rini wrote:
> > > On Tue, Jun 10, 2025 at 02:22:49PM +0530, Sumit Garg wrote:
> > > > On Mon, Jun 09, 2025 at 10:22:39AM -0600, Tom Rini wrote:
> > > > > On Mon, Jun 09, 2025 at 05:07:40PM +0100, Sumit Garg wrote:
> > > > > > On Mon, Jun 09, 2025 at 09:50:19AM -0600, Tom Rini wrote:
> > > > > > > On Mon, Jun 09, 2025 at 04:40:43PM +0100, Sumit Garg wrote:
> > > > > > > > On Mon, Jun 09, 2025 at 03:46:27PM +0200, Dario Binacchi wrote:
> > > > > > > > > Hi Sumit,
> > > > > > > > >
> > > > > > > > > On Mon, Jun 9, 2025 at 3:25 PM Sumit Garg <sumit.garg@kernel.org> wrote:
> > > > > > > > > >
> > > > > > > > > > Hi Patrice,
> > > > > > > > > >
> > > > > > > > > > On Mon, Jun 09, 2025 at 03:15:14PM +0200, Patrice CHOTARD wrote:
> > > > > > > > > > >
> > > > > > > > > > >
> > > > > > > > > > > On 6/7/25 11:37, Dario Binacchi wrote:
> > > > > > > > > > > > The series adds support for stm32h747-discovery board.
> > > > > > > > > > > >
> > > > > > > > > > > > Detailed information can be found at:
> > > > > > > > > > > > https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
> > > > > > > > > > > >
> > > > > > > > > > > >
> > > > > > > > > > > > Dario Binacchi (9):
> > > > > > > > > > > > ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
> > > > > > > > > > > > dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
> > > > > > > > > > > > dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
> > > > > > > > > > > > ARM: dts: stm32: add uart8 node for stm32h743 MCU
> > > > > > > > > > > > ARM: dts: stm32: add pin map for UART8 controller on stm32h743
> > > > > > > > > > > > ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
> > > > > > > > > > > > ARM: dts: stm32: support STM32h747i-disco board
> > > > > > > > > > > > ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
> > > > > > > > > > > > board: stm32: add stm32h747-discovery board support
> > > > > > > > > > >
> > > > > > > > > > >
> > > > > > > > > > > Hi Dario
> > > > > > > > > > >
> > > > > > > > > > > For the whole series
> > > > > > > > > > > Applied to u-boot-stm32/next
> > > > > > > > > >
> > > > > > > > > > Please give some time for other maintainers to review this patch-set.
> > > > > > > > > > The dts/upstream patches in this series aren't clean cherry pick from
> > > > > > > > > > upstream.
> > > > > > > > >
> > > > > > > > > All the commits are already in the mainline Linux kernel, specifically
> > > > > > > > > in v6.16-rc1.
> > > > > > > > > If you're referring to the fact that the patches can't be applied
> > > > > > > > > cleanly, I believe it's
> > > > > > > > > because the target path in the Linux kernel doesn't match the one in U-Boot.
> > > > > > > > > In fact, the DTS files are located in two different relative paths.
> > > > > > > >
> > > > > > > > That's exactly why we have (refer here [1]):
> > > > > > > >
> > > > > > > > ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
> > > > > > > >
> > > > > > > > You should have waited v6.16-rc1 tag to be synced into
> > > > > > > > devicetree-rebasing [2] for the cherry-picks to work. This way of
> > > > > > > > manually patching dts/upstream is not allowed since it is going to break
> > > > > > > > DT syncs in one way or another.
> > > > > > > >
> > > > > > > > So I would suggest you to wait for v6.16-rc1 to land in DT rebasing tree
> > > > > > > > and then send v2 with proper cherry picked patches.
> > > > > > > >
> > > > > > > > [1] https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
> > > > > > > > [2] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
> > > > > > >
> > > > > > > To be honest, I don't think this is a big deal. Git will be merging
> > > > > > > based on content and not specific hashes. And in the case of conflicts I
> > > > > > > just copy the file from the tag to our tree.
> > > > > >
> > > > > > The essential problem here to me is we are going to allow manual
> > > > > > patching of dts/upstream tree given this example? How do we keep track
> > > > > > if all that manual patching landed in Linux DT mainline? The cherry
> > > > > > picks ensured that we always keep in sync with mainline.
> > > > > >
> > > > > > Lets take an example what if Git automatically resolved a merge conflict
> > > > > > for you with duplicated content or if manually patching a DTS file
> > > > > > diverged from upstream and get unnoticed during DT syncs?
> > > > > >
> > > > > > IMHO, we should try to avoid manual patching of DT subtree otherwise it
> > > > > > is hard to set a policy as to what level of manual patching is allowed
> > > > > > or not.
> > > > >
> > > > > Part of the problem here is that from the standpoint of applying posted
> > > > > patches there's no functional difference between what Dario did here and
> > > > > what could be done once v6.16-rc1-dts is tagged (if it's not already).
> > > > > It's essentially a "manual patch" either way.
> > > >
> > > > Nope, there is a difference here. The cherry-pick from DT rebasing
> > > > allows the custodian to rather just cherry pick corresponding DT patches
> > > > rather than applying patches posted on mailing list. I usually do that
> > > > when reviewing dts/upstream patches if they can be cherry-picked cleanly
> > > > or not. So there won't be manual patching in that process.
> > > >
> > > > ./tools/update-subtree.sh pick dts <commit-id-to-be-picked>
> > >
> > > Alright. I hadn't foreseen anyone doing that rather than "b4 {am,shazam}
> > > msg-id" to grab the series.
> >
> > Maybe we need to have some custodian specific docs listing best
> > practices.
> >
>
> Or extend
>
> https://docs.u-boot.org/en/latest/develop/devicetree/control.html#where-do-i-get-a-devicetree-file-for-my-board
> https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
>
> ?
>
> > >
> > > > > We make it clear that
> > > > > dts/upstream/ *only* gets changes that are in Linus' tree. If someone
> > > > > tries to be sneaky and push something in that's not quite what's
> > > > > upstream, it will get stomped on later and there's not going to be any
> > > > > sympathy for the now broken platform.
> > > >
> > > > For us the upstream sync path is via DT rebasing tree only. It usually
> > > > lags behind Linus' tree by maximum 1 week candence what I have noticed.
> > > >
> > > > >
> > > > > Yes, we document saying to use the cherry-pick script, and that's what
> > > > > people should do in general. But I don't think there's value in adding a
> > > > > further delay between "in Linus' tree" and "in devicetree-rebasing". In
> > > > > the linux kernel, there's thousands of people working on things and so
> > > > > strict rules can be understandable (someone will be running a bot to
> > > > > look for "(cherry pick from commit $hash)" and fail things where $hash
> > > > > doesn't exist, makes sense). Here if the ST custodians are happy just
> > > > > verifying the kernel commit, OK, that's fine. Or if they want to wait,
> > > > > that's fine too. We can be a little relaxed and let custodians do what
> > > > > they see as best.
> > > >
> > > > The reason we adopted OF_UPSTREAM was just to get rid of the manual DT
> > > > patching and the syncs. So is it really that few days lag of DT rebasing
> > > > tree which is again pushing us towards manual DT patching? I am just
> > > > trying to understand the shortcomings that DT rebasing tree puts in
> > > > front of us.
> > >
> > > It's mainly that I want to be flexible. So long as we don't violate the
> > > content rules (Linus' tree *only*) I don't want to hinder the people
> > > eager to now upstream U-Boot support for purely process reasons
> >
> > This flexibility has a cost associated to it which I hopefully was able
> > to clarify above. But finally it's your decision which prevails.
> >
> > BTW, DT rebasing has already got the v6.16-rc1 tag, so it was really
> > just 3 days gap. Quentin (CCed) has already done some proper cherry
> > picking from there [1].
> >
>
> Not sure why I was summoned here but I can give my (maybe undesired) 2 cents
> :)
>
> I (a contributor) **really** do not want to have hand-crafted patches in
> dts/upstream. Use tools/update-subtree.sh for patches in that tree. Only Tom
> is allowed to use pull because it's a mess to send a patch for it and he
> usually announces he's doing it and then pushes to the next branch directly,
> contributors can use pick instead. If a pick fails, backport everything
> needed for it to apply cleanly. Yes, this may be tedious. Make sure you do
> not break any other board as well.
>
> I was already surprised we have U-Boot specific files in dts/upstream (e.g.
> Makefiles :) ).
>
> 1) Doing it manually doesn't enforce the addition of the commit hash used
> for the backport/cherry-pick in the commit log, which may be problematic
> (how to quickly check that the patch contains what it should contain and not
> more, or less?). How to verify it actually was merged? In that state and not
> after other changes? Let's imagine an upstream patch that changes the
> SoC.dtsi and associated boards dts, if backporting manually one could be
> tempted to skip a conflicting board dts (because another commit needs to be
> picked before for it to apply cleanly). Also, until it's merged in master
> (which can take a long time depending where you are in the release cycle)
> there's no guarantee the patch is actually going to make it as is to the
> tree (it isn't unheard of to have reverts or even rebases in maintainer
> trees before sending a merge request to Linus).
>
> 2) If there are manual changes made to the patch that aren't upstreamed in
> the kernel (or dependencies (git context) are missing), if we diverge too
> much from upstream, Tom will have git conflicts when pulling new versions.
> How to resolve those conflicts will be interesting.
>
> 3) Worse, if there are non-upstreamed changes that aren't inducing any git
> conflict (via git context for example), then the merge/pull may not say
> anything about it and we'll carry non-upstream patches in dts/upstream.
>
> Maybe we should not even do a subtree pull/merge but erase everything and
> reimport everything every time we bump, to make sure 2 or 3) cannot happen?
>
> For what it's worth, I've caught some (Rockchip) contributors sending
> patches to dts/upstream that weren't even sent to the kernel mailing list.
> That wasn't done on purpose but there are probably a few patches already
> that went through the cracks. I am not sure how we could enforce that (which
> needs to be done with maintainer tools as there are already too many ways to
> contribute to U-boot (patman, git-send-email, b4, etc...)) or even if we
> want to. But making dts/upstream the new arch/arm/dts/ (for ARM) directory
> doesn't make much sense to me.
>
> If you cannot wait for devicetree-rebasing to receive the new tag, do the
> changes in -u-boot.dtsi and revert the changes once we update dts/upstream
> to a newer tag (or cherry-pick once available)?
>
> v6.16-rc1 took a bit longer this time to reach devicetree-rebasing I think,
> but it landed this morning (UTC) so it isn't THAT long compared to the push
> in master. We could ask devicetree-rebasing people to push the master branch
> more often to avoid the up-to 2-week delay between v6.15 and v6.16-rc1 for
> example.
>
> I have read nothing in this thread so this is absolutely not a jab at some
> contributor or maintainer in this series.
>
> On a side-note, I think we should add -s to tools/update-subtree.sh's git
> cherry-pick call to know who contributed the change to U-Boot (as the commit
> author will be the same as in the kernel as far as I remember).
>
> To be fair, the whole process is a bit constraining, especially for new
> boards. You may have to wait up to ~2 months (a full kernel release cycle)
> to see a tag with the device tree for your board, and only then can you
> support the board in U-Boot with OF_UPSTREAM. In Rockchip we typically force
> OF_UPSTREAM for new boards, but we also typically do not accept hand-crafted
> git commits to dts/upstream. I don't know if it's deterring contributors but
> we are still getting some contributions here and there. Not sure how we
> should be handling that :/
>
> > [1] https://patchwork.ozlabs.org/project/uboot/list/?series=460450
> >
> > > (which
> > > happens, E Shattow on IRC was asking how to at least locally point
> > > dts/upstream at something else, at least for local testing).
> > >
> >
> > I would love to hear problems from people if that's for downstream
> > development too.
> >
>
> We can add things in https://docs.u-boot.org/en/latest/develop/devicetree/control.html#where-do-i-get-a-devicetree-file-for-my-board
> and https://docs.u-boot.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing
> to be clearer on the limitations. Though til we enforce a check, this is
> just information.
Thank you for taking the time to provide your perspective on this
Quentin. And while I had hoped to be able to look over the history of
dts/upstream and see that it was just the Makefiles (which I don't think
we can avoid) being the difference between devicetree-rebasing and us,
that's not quite the case. So, yes, Sumit's opinion that we must
cherry-pick seems best. The documentation needs to be updated a bit, and
some more clear examples perhaps provided too. I've added some local
scripting that will complain at me about changes that don't have the
cherry-pick message or that the commit referenced doesn't exist. I may
spend a little time figuring out how to dump each commit and make sure
they're the same, but that too much get tricky.
--
Tom
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^ permalink raw reply [flat|nested] 38+ messages in thread
end of thread, other threads:[~2025-06-11 18:36 UTC | newest]
Thread overview: 38+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-06-07 9:37 [PATCH 0/9] Support stm32h747-discovery board Dario Binacchi
2025-06-07 9:37 ` [PATCH 1/9] ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles Dario Binacchi
2025-06-09 7:55 ` Patrice CHOTARD
2025-06-09 13:20 ` Sumit Garg
2025-06-09 13:38 ` Patrice CHOTARD
2025-06-09 13:38 ` Dario Binacchi
2025-06-07 9:37 ` [PATCH 2/9] dt-bindings: arm: stm32: add compatible for stm32h747i-disco board Dario Binacchi
2025-06-09 7:55 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 3/9] dt-bindings: clock: stm32h7: rename USART{7, 8}_CK to UART{7, 8}_CK Dario Binacchi
2025-06-09 7:55 ` [PATCH 3/9] dt-bindings: clock: stm32h7: rename USART{7, 8}_CK to UART{7,8}_CK Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 4/9] ARM: dts: stm32: add uart8 node for stm32h743 MCU Dario Binacchi
2025-06-09 7:56 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 5/9] ARM: dts: stm32: add pin map for UART8 controller on stm32h743 Dario Binacchi
2025-06-09 7:56 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 6/9] ARM: dts: stm32: add an extra pin map for USART1 " Dario Binacchi
2025-06-09 7:56 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 7/9] ARM: dts: stm32: support STM32h747i-disco board Dario Binacchi
2025-06-09 7:57 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 8/9] ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file Dario Binacchi
2025-06-09 7:57 ` Patrice CHOTARD
2025-06-07 9:37 ` [PATCH 9/9] board: stm32: add stm32h747-discovery board support Dario Binacchi
2025-06-09 7:58 ` Patrice CHOTARD
2025-06-09 8:07 ` Lukasz Majewski
2025-06-09 8:34 ` Patrice CHOTARD
2025-06-09 9:22 ` [Uboot-stm32] " Patrice CHOTARD
2025-06-09 9:29 ` Lukasz Majewski
2025-06-09 13:15 ` [PATCH 0/9] Support stm32h747-discovery board Patrice CHOTARD
2025-06-09 13:25 ` Sumit Garg
2025-06-09 13:46 ` Dario Binacchi
2025-06-09 15:40 ` Sumit Garg
2025-06-09 15:50 ` Tom Rini
2025-06-09 16:07 ` Sumit Garg
2025-06-09 16:22 ` Tom Rini
2025-06-10 8:52 ` Sumit Garg
2025-06-10 16:04 ` Tom Rini
2025-06-11 12:08 ` Sumit Garg
2025-06-11 13:25 ` Quentin Schulz
2025-06-11 18:35 ` Tom Rini
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