* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board [not found] <b6be0e31-09f2-7af0-221e-3d84c15a5519@gmail.com> @ 2018-11-22 19:48 ` Simon Goldschmidt 0 siblings, 0 replies; 22+ messages in thread From: Simon Goldschmidt @ 2018-11-22 19:48 UTC (permalink / raw) To: u-boot [I've shortened the CC list a bit since this might be somewhat off-topic and both gmail warned be about too many CCs] On 22.11.2018 18:01, Tom Rini wrote: > On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: >> Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: >> >>> On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: >>>> On 11/22/2018 01:52 PM, Tom Rini wrote: >>>>> On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: >>>>> >>>>>> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < >>> sjg at chromium.org>: >>>>>>> This board has not been converted to CONFIG_DM_BLK by the deadline. >>>>>>> Remove it. >>>>>>> >>>>>> As the board is still mainted I will NAK it for the moment. Are there >>>>>> any hints want needs to be done >>>>>> to port thie board over to new DM stuff? >>>>> Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and >>>>> selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which >>>>> needs more work, but this is the board-level work that needs doing. >>>> Wasn't there a possibility to use platform data in board file instead of >>>> DT ? Or is DT mandatory now , including the libfdt overhead ? >>> In short, DT for U-Boot and platform data for SPL is what's recommended, >>> yes. >>> >> This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it >> seems a little strange or outdated overall. >> >> Would there be some kind of reference architecture or mach to look at >> what's the suggested/up-to-date way to implement SPL? Also regarding code >> flow? > So, SPL is where things get, ahem, fuzzy. While I don't want to > encourage boundless growth in U-Boot proper, we aren't exactly size > constrained (but rather, functional/logical constrained). But in SPL, > yes, we have many platforms with 32/64/128 kilobyte hard limits (and > some smaller) and we can't always shove in a "TPL" before SPL either. > So in SPL we do make use of platform data instead. While not the > smallest size constraint, am335x_hs_evm is a reasonable thing to look at > in this case. OK. My main concern here is not size regarding DTB or platform data but really code flow. Like what should be done in which function and when. There seem to be some implications of *when* some things are done or in which order. And the socfpga gen5 SPL seems like a "historically grown" one to me. I just wanted to see if there's any example of a "well formed" SPL. I'll have a look at that am335x_hs_evm you mentioned, thanks. Simon ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 00/93] dm: Move towards completing CONFIG_BLK migration @ 2018-11-19 15:52 Simon Glass 2018-11-19 15:53 ` [U-Boot] [PATCH 66/93] arm: Remove ot1200 board Simon Glass 0 siblings, 1 reply; 22+ messages in thread From: Simon Glass @ 2018-11-19 15:52 UTC (permalink / raw) To: u-boot All boards should now be migrated to use CONFIG_BLK. This series removes those with build problems using this option. If maintainers want to keep these boards in they should send a patch in the next week or two. Otherwise the board will be removed in the next release, and will need to be added and re-reviewed later. The goal is to have all boards use driver model. But so far, we do allow CONFIG_DM to not be defined. PLEASE NOTE: This is not an easy process. It is possible that your board does work, or works with only minor changes. Please try to understand that the removal of a board is not done because people don't like your board. In fact the board might have been the first one I used when trying out U-Boot! It's just that we expect maintainers to keep up with the migration to driver model which has been running now for 4 years. It just isn't possible for a few people to migrate and test hundreds of boards. So, send a patch! Simon Glass (93): Add a simple script to remove boards dm: mmc: Use CONFIG_IS_ENABLED to check for BLK solidrun: Correct typo in MAINTAINERS arm: Remove s32v234evb board arm: Remove ls1043ardb_sdcard_SECURE_BOOT board arm: Remove ls1046ardb_sdcard_SECURE_BOOT board arm: Remove colibri_imx6_nospl board arm: Remove guruplug board arm: Remove sniper board arm: Remove omap3_zoom1 board arm: Remove sksimx6 board arm: Remove tbs2910 board arm: Remove theadorable_debug board arm: Remove devkit3250 board arm: Remove pcm051_rev3 board arm: Remove ds109 board arm: Remove pcm058 board arm: Remove am335x_shc_ict board arm: Remove vining_2000 board arm: Remove cm_t43 board arm: Remove igep00x0 board arm: Remove sheevaplug board arm: Remove omap3_overo board arm: Remove am335x_boneblack board arm: Remove warp7 board arm: Remove gwventana_gw5904 board arm: Remove cairo board arm: Remove pico-hobbit-imx7d board arm: Remove mccmon6_sd board arm: Remove apalis_imx6_nospl_it board arm: Remove wandboard board arm: Remove birdland_bav335a board arm: Remove gurnard board arm: Remove xpress_spl board arm: Remove udoo_neo board arm: Remove nas220 board arm: Remove am335x_pdu001 board arm: Remove snapper9260 board arm: Remove pfla02 board arm: Remove colibri_pxa270 board arm: Remove work_92105 board arm: Remove omap3_pandora board arm: Remove cl-som-imx7 board arm: Remove devkit8000 board arm: Remove pengwyn board arm: Remove dreamplug board arm: Remove mx6sabreauto board arm: Remove imx6q_logic board arm: Remove zc5202 board arm: Remove imx6dl_mamoj board arm: Remove omap3_logic_somlv board arm: Remove cm_t335 board arm: Remove liteboard board arm: Remove am43xx_evm_usbhost_boot board arm: Remove chiliboard board arm: Remove am335x_baltos board arm: Remove kp_imx6q_tpc board arm: Remove lsxhl board arm: Remove udoo board arm: Remove marsboard board arm: Remove mx6sabresd board arm: Remove dh_imx6 board arm: Remove vinco board arm: Remove ls1021atwr_sdcard_ifc_SECURE_BOOT board arm: Remove mx6cuboxi board arm: Remove ot1200 board arm: Remove socfpga_stratix10 board arm: Remove am65x_evm_a53 board arm: Remove ap143 board arm: Remove ap121 board arm: Remove imgtec_xilfpga board arm: Remove socfpga_de0_nano_soc board arm: Remove clearfog board arm: Remove socfpga_arria10 board arm: Remove omap3_beagle board arm: Remove helios4 board arm: Remove socfpga_socrates board arm: Remove socfpga_sr1500 board arm: Remove ls1021aiot_sdcard board arm: Remove socfpga_de10_nano board arm: Remove socfpga_dbm_soc1 board arm: Remove socfpga_de1_soc board arm: Remove socfpga_sockit board arm: Remove dns325 board arm: Remove socfpga_is1 board arm: Remove brppt1_mmc board arm: Remove db-mv784mp-gp board arm: Remove socfpga_arria5 board arm: Remove socfpga_vining_fpga board arm: Remove dra7xx_evm and dra7xx_hs_evm boards dm: Enable CONFIG_BLK dm: Update driver-model migration schedule for CONFIG_BLK RFC: dm: Force CONFIG_BLK for all boards with DM arch/arm/Kconfig | 13 - arch/arm/cpu/arm926ejs/lpc32xx/Kconfig | 2 - arch/arm/cpu/armv8/s32v234/Makefile | 6 - arch/arm/cpu/armv8/s32v234/cpu.c | 98 - arch/arm/cpu/armv8/s32v234/cpu.h | 7 - arch/arm/cpu/armv8/s32v234/generic.c | 349 --- arch/arm/dts/imx6dl-mamoj-u-boot.dtsi | 14 - arch/arm/dts/imx6dl-mamoj.dts | 225 -- arch/arm/include/asm/arch-am33xx/chilisom.h | 14 - arch/arm/include/asm/arch-s32v234/clock.h | 33 - arch/arm/include/asm/arch-s32v234/ddr.h | 156 - arch/arm/include/asm/arch-s32v234/imx-regs.h | 328 --- arch/arm/include/asm/arch-s32v234/lpddr2.h | 74 - .../include/asm/arch-s32v234/mc_cgm_regs.h | 253 -- .../arm/include/asm/arch-s32v234/mc_me_regs.h | 198 -- .../include/asm/arch-s32v234/mc_rgm_regs.h | 30 - arch/arm/include/asm/arch-s32v234/mmdc.h | 88 - arch/arm/include/asm/arch-s32v234/siul.h | 149 - arch/arm/mach-at91/Kconfig | 3 - arch/arm/mach-imx/mx6/Kconfig | 24 - arch/arm/mach-imx/mx7/Kconfig | 3 - arch/arm/mach-k3/Kconfig | 1 - arch/arm/mach-kirkwood/Kconfig | 7 - arch/arm/mach-omap2/Kconfig | 5 - arch/arm/mach-omap2/am33xx/chilisom.c | 184 -- arch/arm/mach-omap2/omap3/Kconfig | 9 - arch/arm/mach-omap2/omap5/Kconfig | 1 - arch/mips/Kconfig | 1 - arch/mips/mach-ath79/Kconfig | 2 - board/BuR/brppt1/Kconfig | 15 - board/BuR/brppt1/MAINTAINERS | 8 - board/BuR/brppt1/Makefile | 12 - board/BuR/brppt1/board.c | 190 -- board/BuR/brppt1/config.mk | 36 - board/BuR/brppt1/mux.c | 253 -- board/Marvell/db-mv784mp-gp/MAINTAINERS | 6 - board/Marvell/db-mv784mp-gp/Makefile | 5 - board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c | 117 - board/Marvell/dreamplug/Kconfig | 12 - board/Marvell/dreamplug/MAINTAINERS | 6 - board/Marvell/dreamplug/Makefile | 10 - board/Marvell/dreamplug/dreamplug.c | 135 - board/Marvell/dreamplug/dreamplug.h | 25 - board/Marvell/dreamplug/kwbimage.cfg | 145 - board/Marvell/guruplug/Kconfig | 12 - board/Marvell/guruplug/MAINTAINERS | 6 - board/Marvell/guruplug/Makefile | 7 - board/Marvell/guruplug/guruplug.c | 138 - board/Marvell/guruplug/guruplug.h | 22 - board/Marvell/guruplug/kwbimage.cfg | 144 - board/Marvell/sheevaplug/Kconfig | 12 - board/Marvell/sheevaplug/MAINTAINERS | 6 - board/Marvell/sheevaplug/Makefile | 7 - board/Marvell/sheevaplug/kwbimage.cfg | 144 - board/Marvell/sheevaplug/sheevaplug.c | 133 - board/Marvell/sheevaplug/sheevaplug.h | 24 - board/Seagate/nas220/Kconfig | 12 - board/Seagate/nas220/MAINTAINERS | 6 - board/Seagate/nas220/Makefile | 7 - board/Seagate/nas220/kwbimage.cfg | 151 - board/Seagate/nas220/nas220.c | 118 - board/Synology/ds109/Kconfig | 12 - board/Synology/ds109/MAINTAINERS | 6 - board/Synology/ds109/Makefile | 7 - board/Synology/ds109/ds109.c | 176 -- board/Synology/ds109/ds109.h | 43 - board/Synology/ds109/kwbimage.cfg | 150 - board/Synology/ds109/openocd.cfg | 115 - board/altera/arria10-socdk/Kconfig | 18 - board/altera/arria10-socdk/MAINTAINERS | 7 - board/altera/arria10-socdk/Makefile | 5 - board/altera/arria10-socdk/socfpga.c | 6 - board/altera/arria5-socdk/MAINTAINERS | 7 - board/altera/arria5-socdk/Makefile | 7 - board/altera/arria5-socdk/qts/iocsr_config.h | 695 ----- board/altera/arria5-socdk/qts/pinmux_config.h | 218 -- board/altera/arria5-socdk/qts/pll_config.h | 84 - board/altera/arria5-socdk/qts/sdram_config.h | 342 --- board/altera/arria5-socdk/socfpga.c | 5 - board/altera/cyclone5-socdk/MAINTAINERS | 12 - board/altera/cyclone5-socdk/Makefile | 7 - .../altera/cyclone5-socdk/qts/iocsr_config.h | 659 ----- .../altera/cyclone5-socdk/qts/pinmux_config.h | 218 -- board/altera/cyclone5-socdk/qts/pll_config.h | 84 - .../altera/cyclone5-socdk/qts/sdram_config.h | 344 --- board/altera/cyclone5-socdk/socfpga.c | 5 - board/altera/stratix10-socdk/MAINTAINERS | 7 - board/altera/stratix10-socdk/Makefile | 7 - board/altera/stratix10-socdk/socfpga.c | 7 - board/bachmann/ot1200/Kconfig | 12 - board/bachmann/ot1200/MAINTAINERS | 6 - board/bachmann/ot1200/Makefile | 11 - board/bachmann/ot1200/README | 20 - board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 154 - board/bachmann/ot1200/ot1200.c | 356 --- board/bachmann/ot1200/ot1200_spl.c | 151 - board/birdland/bav335x/Kconfig | 23 - board/birdland/bav335x/Makefile | 11 - board/birdland/bav335x/README | 31 - board/birdland/bav335x/board.c | 429 --- board/birdland/bav335x/board.h | 58 - board/birdland/bav335x/mux.c | 190 -- board/birdland/bav335x/u-boot.lds | 115 - board/bluewater/gurnard/Kconfig | 12 - board/bluewater/gurnard/MAINTAINERS | 6 - board/bluewater/gurnard/Makefile | 9 - board/bluewater/gurnard/gurnard.c | 423 --- board/bluewater/gurnard/splash_logo.h | 2619 ----------------- board/bluewater/snapper9260/Kconfig | 12 - board/bluewater/snapper9260/MAINTAINERS | 7 - board/bluewater/snapper9260/Makefile | 9 - board/bluewater/snapper9260/snapper9260.c | 151 - board/bosch/shc/Kconfig | 87 - board/bosch/shc/MAINTAINERS | 11 - board/bosch/shc/Makefile | 8 - board/bosch/shc/README | 114 - board/bosch/shc/board.c | 647 ---- board/bosch/shc/board.h | 186 -- board/bosch/shc/mux.c | 260 -- board/bticino/mamoj/Kconfig | 12 - board/bticino/mamoj/MAINTAINERS | 10 - board/bticino/mamoj/Makefile | 8 - board/bticino/mamoj/README | 124 - board/bticino/mamoj/mamoj.c | 26 - board/bticino/mamoj/spl.c | 171 -- board/buffalo/lsxl/Kconfig | 12 - board/buffalo/lsxl/MAINTAINERS | 7 - board/buffalo/lsxl/Makefile | 6 - board/buffalo/lsxl/README | 139 - board/buffalo/lsxl/kwbimage-lschl.cfg | 211 -- board/buffalo/lsxl/kwbimage-lsxhl.cfg | 211 -- board/buffalo/lsxl/lsxl.c | 279 -- board/buffalo/lsxl/lsxl.h | 58 - board/ccv/xpress/Kconfig | 12 - board/ccv/xpress/MAINTAINERS | 7 - board/ccv/xpress/Makefile | 6 - board/ccv/xpress/imximage.cfg | 175 -- board/ccv/xpress/spl.c | 117 - board/ccv/xpress/xpress.c | 336 --- board/compulab/cl-som-imx7/Kconfig | 28 - board/compulab/cl-som-imx7/MAINTAINERS | 6 - board/compulab/cl-som-imx7/Makefile | 17 - board/compulab/cl-som-imx7/cl-som-imx7.c | 331 --- board/compulab/cl-som-imx7/common.c | 45 - board/compulab/cl-som-imx7/common.h | 31 - board/compulab/cl-som-imx7/mux.c | 141 - board/compulab/cl-som-imx7/spl.c | 210 -- board/compulab/cm_t335/Kconfig | 15 - board/compulab/cm_t335/MAINTAINERS | 6 - board/compulab/cm_t335/Makefile | 8 - board/compulab/cm_t335/cm_t335.c | 162 - board/compulab/cm_t335/mux.c | 116 - board/compulab/cm_t335/spl.c | 113 - board/compulab/cm_t335/u-boot.lds | 110 - board/compulab/cm_t43/Kconfig | 15 - board/compulab/cm_t43/MAINTAINERS | 6 - board/compulab/cm_t43/Makefile | 11 - board/compulab/cm_t43/board.h | 11 - board/compulab/cm_t43/cm_t43.c | 164 -- board/compulab/cm_t43/mux.c | 142 - board/compulab/cm_t43/spl.c | 134 - board/d-link/dns325/Kconfig | 12 - board/d-link/dns325/MAINTAINERS | 6 - board/d-link/dns325/Makefile | 11 - board/d-link/dns325/dns325.c | 131 - board/d-link/dns325/dns325.h | 31 - board/d-link/dns325/kwbimage.cfg | 190 -- board/dhelectronics/dh_imx6/Kconfig | 12 - board/dhelectronics/dh_imx6/MAINTAINERS | 7 - board/dhelectronics/dh_imx6/Makefile | 9 - board/dhelectronics/dh_imx6/dh_imx6.c | 431 --- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 591 ---- board/ebv/socrates/MAINTAINERS | 6 - board/ebv/socrates/Makefile | 7 - board/ebv/socrates/qts/iocsr_config.h | 659 ----- board/ebv/socrates/qts/pinmux_config.h | 218 -- board/ebv/socrates/qts/pll_config.h | 84 - board/ebv/socrates/qts/sdram_config.h | 343 --- board/ebv/socrates/socfpga.c | 5 - board/eets/pdu001/Kconfig | 50 - board/eets/pdu001/MAINTAINERS | 6 - board/eets/pdu001/Makefile | 13 - board/eets/pdu001/README | 35 - board/eets/pdu001/board.c | 275 -- board/eets/pdu001/board.h | 37 - board/eets/pdu001/mux.c | 119 - board/el/el6x/Kconfig | 25 - board/el/el6x/MAINTAINERS | 8 - board/el/el6x/Makefile | 5 - board/el/el6x/el6x.c | 631 ---- board/embest/mx6boards/Kconfig | 12 - board/embest/mx6boards/MAINTAINERS | 7 - board/embest/mx6boards/Makefile | 7 - board/embest/mx6boards/mx6boards.c | 610 ---- board/freescale/ls1021aiot/Kconfig | 17 - board/freescale/ls1021aiot/MAINTAINERS | 7 - board/freescale/ls1021aiot/Makefile | 7 - board/freescale/ls1021aiot/README | 58 - board/freescale/ls1021aiot/dcu.c | 46 - board/freescale/ls1021aiot/ls1021aiot.c | 249 -- board/freescale/ls1021aiot/ls102xa_pbi.cfg | 14 - board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg | 27 - board/freescale/ls1021aiot/psci.S | 27 - board/freescale/ls1021atwr/Kconfig | 17 - board/freescale/ls1021atwr/MAINTAINERS | 15 - board/freescale/ls1021atwr/Makefile | 9 - board/freescale/ls1021atwr/README | 115 - board/freescale/ls1021atwr/dcu.c | 46 - board/freescale/ls1021atwr/ls1021atwr.c | 764 ----- board/freescale/ls1021atwr/ls102xa_pbi.cfg | 12 - .../ls1021atwr/ls102xa_rcw_sd_ifc.cfg | 8 - .../ls1021atwr/ls102xa_rcw_sd_qspi.cfg | 8 - board/freescale/ls1021atwr/psci.S | 24 - board/freescale/ls1043ardb/Kconfig | 41 - board/freescale/ls1043ardb/MAINTAINERS | 16 - board/freescale/ls1043ardb/Makefile | 10 - board/freescale/ls1043ardb/README | 54 - board/freescale/ls1043ardb/cpld.c | 173 -- board/freescale/ls1043ardb/cpld.h | 45 - board/freescale/ls1043ardb/ddr.c | 238 -- board/freescale/ls1043ardb/ddr.h | 116 - board/freescale/ls1043ardb/eth.c | 76 - board/freescale/ls1043ardb/ls1043ardb.c | 221 -- board/freescale/ls1043ardb/ls1043ardb_pbi.cfg | 14 - .../ls1043ardb/ls1043ardb_rcw_nand.cfg | 7 - .../ls1043ardb/ls1043ardb_rcw_sd.cfg | 7 - board/freescale/ls1046ardb/Kconfig | 31 - board/freescale/ls1046ardb/MAINTAINERS | 20 - board/freescale/ls1046ardb/Makefile | 10 - board/freescale/ls1046ardb/README | 76 - board/freescale/ls1046ardb/cpld.c | 166 -- board/freescale/ls1046ardb/cpld.h | 49 - board/freescale/ls1046ardb/ddr.c | 119 - board/freescale/ls1046ardb/ddr.h | 62 - board/freescale/ls1046ardb/eth.c | 127 - board/freescale/ls1046ardb/ls1046ardb.c | 182 -- board/freescale/ls1046ardb/ls1046ardb_pbi.cfg | 22 - .../ls1046ardb/ls1046ardb_qspi_pbi.cfg | 26 - .../ls1046ardb/ls1046ardb_rcw_emmc.cfg | 7 - .../ls1046ardb/ls1046ardb_rcw_qspi.cfg | 7 - .../ls1046ardb/ls1046ardb_rcw_sd.cfg | 7 - board/freescale/mx6sabreauto/Kconfig | 12 - board/freescale/mx6sabreauto/MAINTAINERS | 7 - board/freescale/mx6sabreauto/Makefile | 7 - board/freescale/mx6sabreauto/README | 82 - board/freescale/mx6sabreauto/mx6sabreauto.c | 1099 ------- board/freescale/mx6sabresd/Kconfig | 12 - board/freescale/mx6sabresd/MAINTAINERS | 6 - board/freescale/mx6sabresd/Makefile | 7 - board/freescale/mx6sabresd/README | 114 - board/freescale/mx6sabresd/mx6sabresd.c | 1064 ------- board/freescale/s32v234evb/Kconfig | 23 - board/freescale/s32v234evb/MAINTAINERS | 8 - board/freescale/s32v234evb/Makefile | 9 - board/freescale/s32v234evb/clock.c | 343 --- board/freescale/s32v234evb/lpddr2.c | 136 - board/freescale/s32v234evb/s32v234evb.c | 182 -- board/freescale/s32v234evb/s32v234evb.cfg | 28 - board/gateworks/gw_ventana/Kconfig | 25 - board/gateworks/gw_ventana/MAINTAINERS | 8 - board/gateworks/gw_ventana/Makefile | 11 - board/gateworks/gw_ventana/README | 320 -- board/gateworks/gw_ventana/common.c | 1422 --------- board/gateworks/gw_ventana/common.h | 98 - board/gateworks/gw_ventana/eeprom.c | 238 -- board/gateworks/gw_ventana/gsc.c | 274 -- board/gateworks/gw_ventana/gsc.h | 70 - board/gateworks/gw_ventana/gw_ventana.c | 1351 --------- board/gateworks/gw_ventana/gw_ventana_spl.c | 691 ----- board/gateworks/gw_ventana/ventana_eeprom.h | 133 - board/grinn/chiliboard/Kconfig | 15 - board/grinn/chiliboard/MAINTAINERS | 8 - board/grinn/chiliboard/Makefile | 4 - board/grinn/chiliboard/README | 31 - board/grinn/chiliboard/board.c | 205 -- board/grinn/liteboard/Kconfig | 12 - board/grinn/liteboard/MAINTAINERS | 6 - board/grinn/liteboard/Makefile | 4 - board/grinn/liteboard/README | 31 - board/grinn/liteboard/board.c | 286 -- board/imgtec/xilfpga/Kconfig | 15 - board/imgtec/xilfpga/MAINTAINERS | 6 - board/imgtec/xilfpga/Makefile | 7 - board/imgtec/xilfpga/README | 55 - board/imgtec/xilfpga/xilfpga.c | 23 - board/is1/MAINTAINERS | 6 - board/is1/Makefile | 5 - board/is1/qts/iocsr_config.h | 659 ----- board/is1/qts/pinmux_config.h | 218 -- board/is1/qts/pll_config.h | 84 - board/is1/qts/sdram_config.h | 343 --- board/is1/socfpga.c | 4 - board/isee/igep00x0/Kconfig | 12 - board/isee/igep00x0/MAINTAINERS | 7 - board/isee/igep00x0/Makefile | 10 - board/isee/igep00x0/common.c | 67 - board/isee/igep00x0/igep00x0.c | 258 -- board/isee/igep00x0/igep00x0.h | 127 - board/isee/igep00x0/spl.c | 63 - board/k+p/kp_imx6q_tpc/Kconfig | 12 - board/k+p/kp_imx6q_tpc/MAINTAINERS | 6 - board/k+p/kp_imx6q_tpc/Makefile | 9 - board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 301 -- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 337 --- board/kobol/helios4/MAINTAINERS | 6 - board/kobol/helios4/Makefile | 5 - board/kobol/helios4/README | 46 - board/kobol/helios4/helios4.c | 163 - board/l+g/vinco/Kconfig | 12 - board/l+g/vinco/MAINTAINERS | 6 - board/l+g/vinco/Makefile | 1 - board/l+g/vinco/vinco.c | 212 -- board/lg/sniper/Kconfig | 12 - board/lg/sniper/MAINTAINERS | 6 - board/lg/sniper/Makefile | 7 - board/lg/sniper/sniper.c | 189 -- board/lg/sniper/sniper.h | 364 --- board/liebherr/mccmon6/Kconfig | 12 - board/liebherr/mccmon6/MAINTAINERS | 7 - board/liebherr/mccmon6/Makefile | 6 - board/liebherr/mccmon6/mccmon6.c | 489 --- board/liebherr/mccmon6/mon6_imximage_nor.cfg | 8 - board/liebherr/mccmon6/mon6_imximage_sd.cfg | 8 - board/liebherr/mccmon6/spl.c | 298 -- board/logicpd/imx6/Kconfig | 12 - board/logicpd/imx6/MAINTAINERS | 6 - board/logicpd/imx6/Makefile | 10 - board/logicpd/imx6/README | 37 - board/logicpd/imx6/imx6logic.c | 325 -- board/logicpd/omap3som/Kconfig | 14 - board/logicpd/omap3som/MAINTAINERS | 9 - board/logicpd/omap3som/Makefile | 6 - board/logicpd/omap3som/README | 56 - board/logicpd/omap3som/omap3logic.c | 329 --- board/logicpd/omap3som/omap3logic.h | 236 -- board/logicpd/zoom1/Kconfig | 12 - board/logicpd/zoom1/MAINTAINERS | 6 - board/logicpd/zoom1/Makefile | 6 - board/logicpd/zoom1/config.mk | 14 - board/logicpd/zoom1/zoom1.c | 146 - board/logicpd/zoom1/zoom1.h | 122 - board/overo/Kconfig | 9 - board/overo/MAINTAINERS | 6 - board/overo/Makefile | 10 - board/overo/common.c | 341 --- board/overo/overo.c | 420 --- board/overo/overo.h | 169 -- board/overo/spl.c | 59 - board/pandora/Kconfig | 9 - board/pandora/MAINTAINERS | 6 - board/pandora/Makefile | 6 - board/pandora/pandora.c | 147 - board/pandora/pandora.h | 391 --- board/phytec/pcm051/Kconfig | 15 - board/phytec/pcm051/MAINTAINERS | 7 - board/phytec/pcm051/Makefile | 11 - board/phytec/pcm051/board.c | 256 -- board/phytec/pcm051/board.h | 24 - board/phytec/pcm051/mux.c | 127 - board/phytec/pcm058/Kconfig | 12 - board/phytec/pcm058/MAINTAINERS | 6 - board/phytec/pcm058/Makefile | 7 - board/phytec/pcm058/README | 35 - board/phytec/pcm058/pcm058.c | 568 ---- board/phytec/pfla02/Kconfig | 18 - board/phytec/pfla02/MAINTAINERS | 6 - board/phytec/pfla02/Makefile | 7 - board/phytec/pfla02/README | 24 - board/phytec/pfla02/pfla02.c | 707 ----- board/qca/ap121/Kconfig | 27 - board/qca/ap121/MAINTAINERS | 6 - board/qca/ap121/Makefile | 3 - board/qca/ap121/ap121.c | 46 - board/qca/ap143/Kconfig | 27 - board/qca/ap143/MAINTAINERS | 6 - board/qca/ap143/Makefile | 3 - board/qca/ap143/ap143.c | 62 - board/quipos/cairo/Kconfig | 12 - board/quipos/cairo/MAINTAINERS | 6 - board/quipos/cairo/Makefile | 6 - board/quipos/cairo/cairo.c | 98 - board/quipos/cairo/cairo.h | 318 -- board/samtec/vining_2000/Kconfig | 12 - board/samtec/vining_2000/MAINTAINERS | 6 - board/samtec/vining_2000/Makefile | 4 - board/samtec/vining_2000/imximage.cfg | 131 - board/samtec/vining_2000/vining_2000.c | 517 ---- board/silica/pengwyn/Kconfig | 15 - board/silica/pengwyn/MAINTAINERS | 6 - board/silica/pengwyn/Makefile | 11 - board/silica/pengwyn/board.c | 201 -- board/silica/pengwyn/board.h | 14 - board/silica/pengwyn/mux.c | 97 - board/sks-kinkel/sksimx6/Kconfig | 11 - board/sks-kinkel/sksimx6/MAINTAINERS | 6 - board/sks-kinkel/sksimx6/Makefile | 2 - board/sks-kinkel/sksimx6/sksimx6.c | 425 --- board/solidrun/clearfog/MAINTAINERS | 6 - board/solidrun/clearfog/Makefile | 5 - board/solidrun/clearfog/README | 51 - board/solidrun/clearfog/clearfog.c | 141 - board/solidrun/mx6cuboxi/Kconfig | 12 - board/solidrun/mx6cuboxi/MAINTAINERS | 6 - board/solidrun/mx6cuboxi/Makefile | 7 - board/solidrun/mx6cuboxi/README | 21 - board/solidrun/mx6cuboxi/mx6cuboxi.c | 857 ------ board/sr1500/MAINTAINERS | 6 - board/sr1500/Makefile | 5 - board/sr1500/qts/iocsr_config.h | 659 ----- board/sr1500/qts/pinmux_config.h | 218 -- board/sr1500/qts/pll_config.h | 84 - board/sr1500/qts/sdram_config.h | 343 --- board/sr1500/socfpga.c | 26 - board/tbs/tbs2910/Kconfig | 18 - board/tbs/tbs2910/MAINTAINERS | 6 - board/tbs/tbs2910/Makefile | 5 - board/tbs/tbs2910/tbs2910.c | 454 --- board/tbs/tbs2910/tbs2910.cfg | 114 - board/technexion/pico-imx7d/Kconfig | 15 - board/technexion/pico-imx7d/MAINTAINERS | 16 - board/technexion/pico-imx7d/Makefile | 4 - board/technexion/pico-imx7d/README | 64 - board/technexion/pico-imx7d/pico-imx7d.c | 315 -- board/technexion/pico-imx7d/spl.c | 122 - board/theadorable/MAINTAINERS | 6 - board/theadorable/Makefile | 6 - board/theadorable/fpga.c | 178 -- board/theadorable/theadorable.c | 336 --- board/theadorable/theadorable.h | 11 - board/ti/am335x/Kconfig | 24 - board/ti/am335x/MAINTAINERS | 12 - board/ti/am335x/Makefile | 11 - board/ti/am335x/README | 205 -- board/ti/am335x/board.c | 1073 ------- board/ti/am335x/board.h | 97 - board/ti/am335x/mux.c | 413 --- board/ti/am335x/u-boot.lds | 164 -- board/ti/am43xx/Kconfig | 17 - board/ti/am43xx/MAINTAINERS | 11 - board/ti/am43xx/Makefile | 11 - board/ti/am43xx/board.c | 957 ------ board/ti/am43xx/board.h | 62 - board/ti/am43xx/mux.c | 153 - board/ti/am65x/Kconfig | 52 - board/ti/am65x/MAINTAINERS | 7 - board/ti/am65x/Makefile | 8 - board/ti/am65x/README | 211 -- board/ti/am65x/evm.c | 68 - board/ti/beagle/Kconfig | 12 - board/ti/beagle/MAINTAINERS | 6 - board/ti/beagle/Makefile | 7 - board/ti/beagle/beagle.c | 591 ---- board/ti/beagle/beagle.h | 545 ---- board/ti/beagle/led.c | 71 - board/ti/dra7xx/Kconfig | 14 - board/ti/dra7xx/MAINTAINERS | 7 - board/ti/dra7xx/Makefile | 6 - board/ti/dra7xx/README | 26 - board/ti/dra7xx/evm.c | 1202 -------- board/ti/dra7xx/mux_data.h | 1121 ------- board/timll/devkit3250/Kconfig | 12 - board/timll/devkit3250/MAINTAINERS | 6 - board/timll/devkit3250/Makefile | 7 - board/timll/devkit3250/devkit3250.c | 80 - board/timll/devkit3250/devkit3250_spl.c | 67 - board/timll/devkit8000/Kconfig | 12 - board/timll/devkit8000/MAINTAINERS | 6 - board/timll/devkit8000/Makefile | 9 - board/timll/devkit8000/README | 15 - board/timll/devkit8000/devkit8000.c | 206 -- board/timll/devkit8000/devkit8000.h | 359 --- .../toradex/apalis_imx6/1066mhz_4x128mx16.cfg | 47 - .../toradex/apalis_imx6/1066mhz_4x256mx16.cfg | 47 - board/toradex/apalis_imx6/Kconfig | 55 - board/toradex/apalis_imx6/MAINTAINERS | 9 - board/toradex/apalis_imx6/Makefile | 5 - board/toradex/apalis_imx6/apalis_imx6.c | 1236 -------- board/toradex/apalis_imx6/apalis_imx6q.cfg | 33 - board/toradex/apalis_imx6/clocks.cfg | 41 - board/toradex/apalis_imx6/ddr-setup.cfg | 96 - board/toradex/apalis_imx6/do_fuse.c | 97 - board/toradex/apalis_imx6/pf0100.c | 230 -- board/toradex/apalis_imx6/pf0100.h | 52 - board/toradex/apalis_imx6/pf0100_otp.inc | 190 -- .../toradex/colibri_imx6/800mhz_2x64mx16.cfg | 58 - .../toradex/colibri_imx6/800mhz_4x64mx16.cfg | 58 - board/toradex/colibri_imx6/Kconfig | 44 - board/toradex/colibri_imx6/MAINTAINERS | 8 - board/toradex/colibri_imx6/Makefile | 5 - board/toradex/colibri_imx6/clocks.cfg | 41 - board/toradex/colibri_imx6/colibri_imx6.c | 1121 ------- board/toradex/colibri_imx6/colibri_imx6.cfg | 37 - board/toradex/colibri_imx6/ddr-setup.cfg | 97 - board/toradex/colibri_imx6/do_fuse.c | 97 - board/toradex/colibri_imx6/pf0100.c | 212 -- board/toradex/colibri_imx6/pf0100.h | 52 - board/toradex/colibri_imx6/pf0100_otp.inc | 188 -- board/toradex/colibri_pxa270/Kconfig | 23 - board/toradex/colibri_pxa270/MAINTAINERS | 6 - board/toradex/colibri_pxa270/Makefile | 7 - board/toradex/colibri_pxa270/colibri_pxa270.c | 138 - board/udoo/Kconfig | 9 - board/udoo/MAINTAINERS | 6 - board/udoo/Makefile | 5 - board/udoo/README | 21 - board/udoo/neo/Kconfig | 12 - board/udoo/neo/MAINTAINERS | 7 - board/udoo/neo/Makefile | 4 - board/udoo/neo/neo.c | 595 ---- board/udoo/udoo.c | 271 -- board/udoo/udoo_spl.c | 254 -- board/vscom/baltos/Kconfig | 15 - board/vscom/baltos/MAINTAINERS | 6 - board/vscom/baltos/Makefile | 11 - board/vscom/baltos/README | 1 - board/vscom/baltos/board.c | 493 ---- board/vscom/baltos/board.h | 34 - board/vscom/baltos/mux.c | 125 - board/vscom/baltos/u-boot.lds | 128 - board/wandboard/Kconfig | 9 - board/wandboard/MAINTAINERS | 6 - board/wandboard/Makefile | 5 - board/wandboard/README | 39 - board/wandboard/spl.c | 425 --- board/wandboard/wandboard.c | 559 ---- board/warp7/Kconfig | 23 - board/warp7/MAINTAINERS | 7 - board/warp7/Makefile | 4 - board/warp7/README | 63 - board/warp7/imximage.cfg | 98 - board/warp7/warp7.c | 237 -- board/work-microwave/work_92105/Kconfig | 24 - board/work-microwave/work_92105/MAINTAINERS | 6 - board/work-microwave/work_92105/Makefile | 10 - board/work-microwave/work_92105/README | 91 - board/work-microwave/work_92105/work_92105.c | 76 - .../work_92105/work_92105_display.c | 348 --- .../work_92105/work_92105_display.h | 13 - .../work_92105/work_92105_spl.c | 84 - configs/am335x_baltos_defconfig | 65 - configs/am335x_boneblack_defconfig | 51 - configs/am335x_boneblack_vboot_defconfig | 56 - configs/am335x_evm_defconfig | 64 - configs/am335x_evm_nor_defconfig | 53 - configs/am335x_evm_norboot_defconfig | 50 - configs/am335x_evm_spiboot_defconfig | 48 - configs/am335x_evm_usbspl_defconfig | 56 - configs/am335x_pdu001_defconfig | 53 - configs/am335x_shc_defconfig | 46 - configs/am335x_shc_ict_defconfig | 47 - configs/am335x_shc_netboot_defconfig | 48 - configs/am335x_shc_prompt_defconfig | 45 - configs/am335x_shc_sdboot_defconfig | 47 - configs/am335x_shc_sdboot_prompt_defconfig | 47 - configs/am43xx_evm_defconfig | 61 - configs/am43xx_evm_ethboot_defconfig | 65 - configs/am43xx_evm_qspiboot_defconfig | 63 - configs/am43xx_evm_rtconly_defconfig | 62 - configs/am43xx_evm_usbhost_boot_defconfig | 75 - configs/am43xx_hs_evm_defconfig | 72 - configs/am65x_evm_a53_defconfig | 71 - configs/am65x_evm_r5_defconfig | 87 - configs/ap121_defconfig | 60 - configs/ap143_defconfig | 55 - configs/apalis_imx6_defconfig | 75 - configs/apalis_imx6_nospl_com_defconfig | 63 - configs/apalis_imx6_nospl_it_defconfig | 63 - configs/birdland_bav335a_defconfig | 67 - configs/birdland_bav335b_defconfig | 67 - configs/brppt1_mmc_defconfig | 95 - configs/brppt1_nand_defconfig | 99 - configs/brppt1_spi_defconfig | 109 - configs/cairo_defconfig | 39 - configs/chiliboard_defconfig | 47 - configs/cl-som-imx7_defconfig | 67 - configs/clearfog_defconfig | 66 - configs/cm_t335_defconfig | 51 - configs/cm_t43_defconfig | 72 - configs/colibri_imx6_defconfig | 73 - configs/colibri_imx6_nospl_defconfig | 61 - configs/colibri_pxa270_defconfig | 40 - configs/db-mv784mp-gp_defconfig | 64 - configs/devkit3250_defconfig | 48 - configs/devkit8000_defconfig | 34 - configs/dh_imx6_defconfig | 63 - configs/dns325_defconfig | 41 - configs/dra7xx_evm_defconfig | 102 - configs/dra7xx_hs_evm_defconfig | 101 - configs/dreamplug_defconfig | 40 - configs/ds109_defconfig | 38 - configs/gurnard_defconfig | 38 - configs/guruplug_defconfig | 43 - configs/gwventana_emmc_defconfig | 88 - configs/gwventana_gw5904_defconfig | 92 - configs/gwventana_nand_defconfig | 91 - configs/helios4_defconfig | 60 - configs/igep0032_defconfig | 52 - configs/igep00x0_defconfig | 53 - configs/imgtec_xilfpga_defconfig | 27 - configs/imx6dl_mamoj_defconfig | 46 - configs/imx6q_logic_defconfig | 77 - configs/kp_imx6q_tpc_defconfig | 44 - configs/liteboard_defconfig | 38 - configs/ls1021aiot_qspi_defconfig | 39 - configs/ls1021aiot_sdcard_defconfig | 44 - configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 56 - configs/ls1021atwr_nor_defconfig | 59 - configs/ls1021atwr_nor_lpuart_defconfig | 57 - configs/ls1021atwr_qspi_defconfig | 60 - ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 70 - configs/ls1021atwr_sdcard_ifc_defconfig | 67 - configs/ls1021atwr_sdcard_qspi_defconfig | 70 - configs/ls1043ardb_SECURE_BOOT_defconfig | 51 - configs/ls1043ardb_defconfig | 49 - configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 68 - configs/ls1043ardb_nand_defconfig | 66 - .../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 66 - configs/ls1043ardb_sdcard_defconfig | 64 - configs/ls1046ardb_emmc_defconfig | 63 - configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 49 - configs/ls1046ardb_qspi_defconfig | 49 - configs/ls1046ardb_qspi_spl_defconfig | 66 - .../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 64 - configs/ls1046ardb_sdcard_defconfig | 62 - configs/lschlv2_defconfig | 42 - configs/lsxhl_defconfig | 42 - configs/marsboard_defconfig | 37 - configs/mccmon6_nor_defconfig | 50 - configs/mccmon6_sd_defconfig | 51 - configs/mx6cuboxi_defconfig | 43 - configs/mx6sabreauto_defconfig | 67 - configs/mx6sabresd_defconfig | 75 - configs/nas220_defconfig | 42 - configs/omap35_logic_defconfig | 72 - configs/omap35_logic_somlv_defconfig | 78 - configs/omap3_beagle_defconfig | 82 - configs/omap3_logic_defconfig | 73 - configs/omap3_logic_somlv_defconfig | 78 - configs/omap3_overo_defconfig | 51 - configs/omap3_pandora_defconfig | 40 - configs/omap3_zoom1_defconfig | 39 - configs/ot1200_defconfig | 46 - configs/ot1200_spl_defconfig | 55 - configs/pcm051_rev1_defconfig | 58 - configs/pcm051_rev3_defconfig | 58 - configs/pcm058_defconfig | 57 - configs/pengwyn_defconfig | 62 - configs/pfla02_defconfig | 57 - configs/pico-hobbit-imx7d_defconfig | 60 - configs/pico-imx7d_defconfig | 60 - configs/pico-pi-imx7d_defconfig | 60 - configs/riotboard_defconfig | 37 - configs/s32v234evb_defconfig | 17 - configs/sheevaplug_defconfig | 44 - configs/sksimx6_defconfig | 42 - configs/snapper9260_defconfig | 34 - configs/snapper9g20_defconfig | 33 - configs/sniper_defconfig | 40 - configs/socfpga_arria10_defconfig | 44 - configs/socfpga_arria5_defconfig | 77 - configs/socfpga_cyclone5_defconfig | 78 - configs/socfpga_dbm_soc1_defconfig | 70 - configs/socfpga_de0_nano_soc_defconfig | 72 - configs/socfpga_de10_nano_defconfig | 68 - configs/socfpga_de1_soc_defconfig | 60 - configs/socfpga_is1_defconfig | 60 - configs/socfpga_sockit_defconfig | 78 - configs/socfpga_socrates_defconfig | 78 - configs/socfpga_sr1500_defconfig | 67 - configs/socfpga_stratix10_defconfig | 59 - configs/socfpga_vining_fpga_defconfig | 94 - configs/tbs2910_defconfig | 58 - configs/theadorable_debug_defconfig | 74 - configs/udoo_defconfig | 36 - configs/udoo_neo_defconfig | 33 - configs/vinco_defconfig | 40 - configs/vining_2000_defconfig | 43 - configs/wandboard_defconfig | 46 - configs/warp7_bl33_defconfig | 41 - configs/warp7_defconfig | 52 - configs/work_92105_defconfig | 41 - configs/xpress_defconfig | 32 - configs/xpress_spl_defconfig | 42 - configs/zc5202_defconfig | 42 - configs/zc5601_defconfig | 41 - doc/driver-model/MIGRATION.txt | 8 +- drivers/block/Kconfig | 2 +- drivers/core/Kconfig | 1 + drivers/mmc/Kconfig | 2 +- drivers/mmc/dw_mmc.c | 2 +- drivers/mmc/mmc-uclass.c | 2 +- drivers/mmc/mmc_write.c | 8 +- drivers/usb/Kconfig | 1 + include/configs/am335x_evm.h | 343 --- include/configs/am335x_shc.h | 263 -- include/configs/am43xx_evm.h | 292 -- include/configs/am65x_evm.h | 75 - include/configs/ap121.h | 46 - include/configs/ap143.h | 50 - include/configs/apalis_imx6.h | 277 -- include/configs/baltos.h | 276 -- include/configs/bav335x.h | 501 ---- include/configs/brppt1.h | 214 -- include/configs/chiliboard.h | 180 -- include/configs/cl-som-imx7.h | 182 -- include/configs/clearfog.h | 157 - include/configs/cm_t335.h | 152 - include/configs/cm_t43.h | 140 - include/configs/colibri_imx6.h | 251 -- include/configs/colibri_pxa270.h | 188 -- include/configs/db-mv784mp-gp.h | 99 - include/configs/devkit3250.h | 194 -- include/configs/devkit8000.h | 190 -- include/configs/dh_imx6.h | 178 -- include/configs/dns325.h | 118 - include/configs/dra7xx_evm.h | 165 -- include/configs/dreamplug.h | 83 - include/configs/ds109.h | 86 - include/configs/embestmx6boards.h | 150 - include/configs/guruplug.h | 82 - include/configs/gw_ventana.h | 355 --- include/configs/helios4.h | 172 -- include/configs/imx6_logic.h | 172 -- include/configs/imx6dl-mamoj.h | 99 - include/configs/kp_imx6q_tpc.h | 134 - include/configs/liteboard.h | 155 - include/configs/ls1021aiot.h | 251 -- include/configs/ls1021atwr.h | 505 ---- include/configs/ls1043ardb.h | 285 -- include/configs/ls1046ardb.h | 220 -- include/configs/lsxl.h | 149 - include/configs/mccmon6.h | 293 -- include/configs/mx6cuboxi.h | 149 - include/configs/mx6sabreauto.h | 78 - include/configs/mx6sabresd.h | 67 - include/configs/nas220.h | 112 - include/configs/omap3_beagle.h | 233 -- include/configs/omap3_cairo.h | 231 -- include/configs/omap3_igep00x0.h | 135 - include/configs/omap3_logic.h | 210 -- include/configs/omap3_overo.h | 192 -- include/configs/omap3_pandora.h | 69 - include/configs/omap3_zoom1.h | 138 - include/configs/ot1200.h | 114 - include/configs/pcm051.h | 137 - include/configs/pcm058.h | 98 - include/configs/pdu001.h | 86 - include/configs/pengwyn.h | 171 -- include/configs/pfla02.h | 157 - include/configs/pico-imx7d.h | 151 - include/configs/s32v234evb.h | 190 -- include/configs/sheevaplug.h | 92 - include/configs/sksimx6.h | 96 - include/configs/snapper9260.h | 123 - include/configs/snapper9g45.h | 112 - include/configs/sniper.h | 154 - include/configs/socfpga_arria10_socdk.h | 50 - include/configs/socfpga_arria5_socdk.h | 22 - include/configs/socfpga_cyclone5_socdk.h | 22 - include/configs/socfpga_dbm_soc1.h | 95 - include/configs/socfpga_de0_nano_soc.h | 22 - include/configs/socfpga_de10_nano.h | 22 - include/configs/socfpga_de1_soc.h | 22 - include/configs/socfpga_is1.h | 34 - include/configs/socfpga_sockit.h | 22 - include/configs/socfpga_socrates.h | 22 - include/configs/socfpga_sr1500.h | 56 - include/configs/socfpga_stratix10_socdk.h | 221 -- include/configs/socfpga_vining_fpga.h | 180 -- include/configs/tbs2910.h | 158 - include/configs/theadorable.h | 125 - include/configs/udoo.h | 95 - include/configs/udoo_neo.h | 106 - include/configs/vinco.h | 118 - include/configs/vining_2000.h | 104 - include/configs/wandboard.h | 156 - include/configs/warp7.h | 169 -- include/configs/work_92105.h | 161 - include/configs/xpress.h | 135 - include/configs/zc5202.h | 30 - include/configs/zc5601.h | 28 - include/dwmmc.h | 6 +- tools/rmboard.py | 145 + 783 files changed, 162 insertions(+), 87172 deletions(-) delete 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* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-19 15:52 [U-Boot] [PATCH 00/93] dm: Move towards completing CONFIG_BLK migration Simon Glass @ 2018-11-19 15:53 ` Simon Glass 2018-11-22 9:25 ` Christian Gmeiner 0 siblings, 1 reply; 22+ messages in thread From: Simon Glass @ 2018-11-19 15:53 UTC (permalink / raw) To: u-boot This board has not been converted to CONFIG_DM_BLK by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> --- board/bachmann/ot1200/Kconfig | 12 - board/bachmann/ot1200/MAINTAINERS | 6 - board/bachmann/ot1200/Makefile | 11 - board/bachmann/ot1200/README | 20 -- board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 154 --------- board/bachmann/ot1200/ot1200.c | 356 --------------------- board/bachmann/ot1200/ot1200_spl.c | 151 --------- configs/ot1200_defconfig | 46 --- configs/ot1200_spl_defconfig | 55 ---- include/configs/ot1200.h | 114 ------- 10 files changed, 925 deletions(-) delete mode 100644 board/bachmann/ot1200/Kconfig delete mode 100644 board/bachmann/ot1200/MAINTAINERS delete mode 100644 board/bachmann/ot1200/Makefile delete mode 100644 board/bachmann/ot1200/README delete mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg delete mode 100644 board/bachmann/ot1200/ot1200.c delete mode 100644 board/bachmann/ot1200/ot1200_spl.c delete mode 100644 configs/ot1200_defconfig delete mode 100644 configs/ot1200_spl_defconfig delete mode 100644 include/configs/ot1200.h diff --git a/board/bachmann/ot1200/Kconfig b/board/bachmann/ot1200/Kconfig deleted file mode 100644 index 4ccb60a97fe..00000000000 --- a/board/bachmann/ot1200/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_OT1200 - -config SYS_BOARD - default "ot1200" - -config SYS_VENDOR - default "bachmann" - -config SYS_CONFIG_NAME - default "ot1200" - -endif diff --git a/board/bachmann/ot1200/MAINTAINERS b/board/bachmann/ot1200/MAINTAINERS deleted file mode 100644 index ad75c24ee46..00000000000 --- a/board/bachmann/ot1200/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BACHMANN ELECTRONIC OT1200 BOARD -M: Christian Gmeiner <christian.gmeiner@gmail.com> -S: Maintained -F: board/bachmann/ot1200 -F: include/configs/ot1200.h -F: configs/ot1200*_defconfig diff --git a/board/bachmann/ot1200/Makefile b/board/bachmann/ot1200/Makefile deleted file mode 100644 index 73000e3d3ce..00000000000 --- a/board/bachmann/ot1200/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2012-2013, Guennadi Liakhovetski <lg@denx.de> -# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. -# Copyright (C) 2013, Boundary Devices <info@boundarydevices.com> - -ifdef CONFIG_SPL_BUILD -obj-y := ot1200.o ot1200_spl.o -else -obj-y := ot1200.o -endif diff --git a/board/bachmann/ot1200/README b/board/bachmann/ot1200/README deleted file mode 100644 index c03d44e458a..00000000000 --- a/board/bachmann/ot1200/README +++ /dev/null @@ -1,20 +0,0 @@ -U-Boot for the Bachmann electronic GmbH OT1200 devices - -There are two different versions of the base board, which differ -in the way ethernet is done. The variant detection is done during -runtime based on the address of the found phy. - -- "mr" variant -FEC is connected directly to an ethernet switch (KSZ8895). The ethernet -port is always up and auto-negotiation is not possible. - -- normal variant -FEC is connected to a normal phy and auto-negotiation is possible. - - -The variant name is part of the dtb file name loaded by u-boot. This -make is possible to boot the linux kernel and make use variant specific -devicetree (fixed-phy link). - -In order to support different display resoltuions/sizes the OT1200 devices -are making use of EDID data stored in an i2c EEPROM. diff --git a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg b/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg deleted file mode 100644 index ba5c0747979..00000000000 --- a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg +++ /dev/null @@ -1,154 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Freescale Semiconductor, Inc. - * Jason Liu <r64343@freescale.com> - * - * Refer doc/README.imximage for more details about how-to configure - * and create imximage boot image - * - * The syntax is taken as close as possible with the kwbimage - */ - -/* image version */ -IMAGE_VERSION 2 - -/* - * Boot Device : one of - * spi, sd (the board has no nand neither onenand) - */ -BOOT_FROM sd - -/* - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ -DATA 4 0x020e05a8 0x00000030 -DATA 4 0x020e05b0 0x00000030 -DATA 4 0x020e0524 0x00000030 -DATA 4 0x020e051c 0x00000030 - -DATA 4 0x020e0518 0x00000030 -DATA 4 0x020e050c 0x00000030 -DATA 4 0x020e05b8 0x00000030 -DATA 4 0x020e05c0 0x00000030 - -DATA 4 0x020e05ac 0x00020030 -DATA 4 0x020e05b4 0x00020030 -DATA 4 0x020e0528 0x00020030 -DATA 4 0x020e0520 0x00020030 - -DATA 4 0x020e0514 0x00020030 -DATA 4 0x020e0510 0x00020030 -DATA 4 0x020e05bc 0x00020030 -DATA 4 0x020e05c4 0x00020030 - -DATA 4 0x020e056c 0x00020030 -DATA 4 0x020e0578 0x00020030 -DATA 4 0x020e0588 0x00020030 -DATA 4 0x020e0594 0x00020030 - -DATA 4 0x020e057c 0x00020030 -DATA 4 0x020e0590 0x00003000 -DATA 4 0x020e0598 0x00003000 -DATA 4 0x020e058c 0x00000000 - -DATA 4 0x020e059c 0x00003030 -DATA 4 0x020e05a0 0x00003030 -DATA 4 0x020e0784 0x00000030 -DATA 4 0x020e0788 0x00000030 - -DATA 4 0x020e0794 0x00000030 -DATA 4 0x020e079c 0x00000030 -DATA 4 0x020e07a0 0x00000030 -DATA 4 0x020e07a4 0x00000030 - -DATA 4 0x020e07a8 0x00000030 -DATA 4 0x020e0748 0x00000030 -DATA 4 0x020e074c 0x00000030 -DATA 4 0x020e0750 0x00020000 - -DATA 4 0x020e0758 0x00000000 -DATA 4 0x020e0774 0x00020000 -DATA 4 0x020e078c 0x00000030 -DATA 4 0x020e0798 0x000C0000 - -DATA 4 0x021b081c 0x33333333 -DATA 4 0x021b0820 0x33333333 -DATA 4 0x021b0824 0x33333333 -DATA 4 0x021b0828 0x33333333 - -DATA 4 0x021b481c 0x33333333 -DATA 4 0x021b4820 0x33333333 -DATA 4 0x021b4824 0x33333333 -DATA 4 0x021b4828 0x33333333 - -DATA 4 0x021b0018 0x00081740 - -DATA 4 0x021b001c 0x00008000 -DATA 4 0x021b000c 0x555A7974 -DATA 4 0x021b0010 0xDB538F64 -DATA 4 0x021b0014 0x01FF00DB -DATA 4 0x021b002c 0x000026D2 - -DATA 4 0x021b0030 0x005A1023 -DATA 4 0x021b0008 0x09444040 -DATA 4 0x021b0004 0x00025576 -DATA 4 0x021b0040 0x00000027 -DATA 4 0x021b0000 0x831A0000 - -DATA 4 0x021b001c 0x04088032 -DATA 4 0x021b001c 0x0408803A -DATA 4 0x021b001c 0x00008033 -DATA 4 0x021b001c 0x0000803B -DATA 4 0x021b001c 0x00428031 -DATA 4 0x021b001c 0x00428039 -DATA 4 0x021b001c 0x19308030 -DATA 4 0x021b001c 0x19308038 - -DATA 4 0x021b001c 0x04008040 -DATA 4 0x021b001c 0x04008048 -DATA 4 0x021b0800 0xA1380003 -DATA 4 0x021b4800 0xA1380003 -DATA 4 0x021b0020 0x00005800 -DATA 4 0x021b0818 0x00022227 -DATA 4 0x021b4818 0x00022227 - -DATA 4 0x021b083c 0x434B0350 -DATA 4 0x021b0840 0x034C0359 -DATA 4 0x021b483c 0x434B0350 -DATA 4 0x021b4840 0x03650348 -DATA 4 0x021b0848 0x4436383B -DATA 4 0x021b4848 0x39393341 -DATA 4 0x021b0850 0x35373933 -DATA 4 0x021b4850 0x48254A36 - -DATA 4 0x021b080c 0x001F001F -DATA 4 0x021b0810 0x001F001F - -DATA 4 0x021b480c 0x00440044 -DATA 4 0x021b4810 0x00440044 - -DATA 4 0x021b08b8 0x00000800 -DATA 4 0x021b48b8 0x00000800 - -DATA 4 0x021b001c 0x00000000 -DATA 4 0x021b0404 0x00011006 - - -/* - * Setup CCM_CCOSR register as follows: - * - * cko1_en = 1 --> CKO1 enabled - * cko1_div = 111 --> divide by 8 - * cko1_sel = 1011 --> ahb_clk_root - * - * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz - */ -DATA 4 0x020c4060 0x000000fb diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c deleted file mode 100644 index 2d734416203..00000000000 --- a/board/bachmann/ot1200/ot1200.c +++ /dev/null @@ -1,356 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. - * Copyright (C) 2014, Bachmann electronic GmbH - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/arch/clock.h> -#include <asm/arch/imx-regs.h> -#include <asm/arch/iomux.h> -#include <malloc.h> -#include <asm/arch/mx6-pins.h> -#include <asm/mach-imx/iomux-v3.h> -#include <asm/mach-imx/sata.h> -#include <asm/mach-imx/mxc_i2c.h> -#include <asm/mach-imx/boot_mode.h> -#include <asm/arch/crm_regs.h> -#include <asm/arch/sys_proto.h> -#include <mmc.h> -#include <fsl_esdhc.h> -#include <netdev.h> -#include <i2c.h> -#include <pca953x.h> -#include <asm/gpio.h> -#include <phy.h> - -DECLARE_GLOBAL_DATA_PTR; - -#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) - -#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - OUTPUT_40OHM | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ - PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | OUTPUT_40OHM | \ - PAD_CTL_HYS) - -#define SPI_PAD_CTRL (PAD_CTL_HYS | OUTPUT_40OHM | \ - PAD_CTL_SRE_FAST) - -#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | OUTPUT_40OHM | \ - PAD_CTL_HYS | PAD_CTL_ODE | PAD_CTL_SRE_FAST) - -int dram_init(void) -{ - gd->ram_size = imx_ddr_size(); - - return 0; -} - -static iomux_v3_cfg_t const uart1_pads[] = { - MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static void setup_iomux_uart(void) -{ - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); -} - -static iomux_v3_cfg_t const enet_pads[] = { - MX6_PAD_KEY_ROW1__ENET_COL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_KEY_COL3__ENET_CRS | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_GPIO_18__ENET_RX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_KEY_COL2__ENET_RX_DATA2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_KEY_COL0__ENET_RX_DATA3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_KEY_ROW2__ENET_TX_DATA2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_KEY_ROW0__ENET_TX_DATA3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), -}; - -static void setup_iomux_enet(void) -{ - imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); -} - -static iomux_v3_cfg_t const ecspi1_pads[] = { - MX6_PAD_DISP0_DAT3__ECSPI3_SS0 | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_DISP0_DAT4__ECSPI3_SS1 | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), -}; - -static void setup_iomux_spi(void) -{ - imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); -} - -int board_spi_cs_gpio(unsigned bus, unsigned cs) -{ - return (bus == 2 && cs == 0) ? (IMX_GPIO_NR(1, 3)) : -1; -} - -static iomux_v3_cfg_t const feature_pads[] = { - /* SD card detect */ - MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(PAD_CTL_PUS_100K_DOWN), - - /* eMMC soldered? */ - MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(PAD_CTL_PUS_100K_UP), -}; - -static void setup_iomux_features(void) -{ - imx_iomux_v3_setup_multiple_pads(feature_pads, - ARRAY_SIZE(feature_pads)); -} - -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) - -/* I2C2 - EEPROM */ -static struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC, - .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC, - .gp = IMX_GPIO_NR(2, 30) - }, - .sda = { - .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC, - .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC, - .gp = IMX_GPIO_NR(3, 16) - } -}; - -/* I2C3 - IO expander */ -static struct i2c_pads_info i2c_pad_info2 = { - .scl = { - .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC, - .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC, - .gp = IMX_GPIO_NR(3, 17) - }, - .sda = { - .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC, - .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC, - .gp = IMX_GPIO_NR(3, 18) - } -}; - -static void setup_iomux_i2c(void) -{ - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); -} - -static void ccgr_init(void) -{ - struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - - writel(0x00C03F3F, &ccm->CCGR0); - writel(0x0030FC33, &ccm->CCGR1); - writel(0x0FFFC000, &ccm->CCGR2); - writel(0x3FF00000, &ccm->CCGR3); - writel(0x00FFF300, &ccm->CCGR4); - writel(0x0F0000C3, &ccm->CCGR5); - writel(0x000003FF, &ccm->CCGR6); -} - -int board_early_init_f(void) -{ - ccgr_init(); - gpr_init(); - - setup_iomux_uart(); - setup_iomux_spi(); - setup_iomux_i2c(); - setup_iomux_features(); - - return 0; -} - -static iomux_v3_cfg_t const usdhc3_pads[] = { - MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - -iomux_v3_cfg_t const usdhc4_pads[] = { - MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret; - - if (cfg->esdhc_base == USDHC3_BASE_ADDR) { - gpio_direction_input(IMX_GPIO_NR(4, 5)); - ret = gpio_get_value(IMX_GPIO_NR(4, 5)); - } else { - gpio_direction_input(IMX_GPIO_NR(1, 5)); - ret = !gpio_get_value(IMX_GPIO_NR(1, 5)); - } - - return ret; -} - -struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC3_BASE_ADDR}, - {USDHC4_BASE_ADDR}, -}; - -int board_mmc_init(bd_t *bis) -{ - int ret; - u32 index = 0; - - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - - usdhc_cfg[0].max_bus_width = 8; - usdhc_cfg[1].max_bus_width = 4; - - for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { - switch (index) { - case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - break; - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); - break; - default: - printf("Warning: you configured more USDHC controllers" - "(%d) then supported by the board (%d)\n", - index + 1, CONFIG_SYS_FSL_USDHC_NUM); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); - if (ret) - return ret; - } - - return 0; -} - -static void leds_on(void) -{ - /* turn on all possible leds connected via GPIO expander */ - i2c_set_bus_num(2); - pca953x_set_dir(CONFIG_SYS_I2C_PCA953X_ADDR, 0xffff, PCA953X_DIR_OUT); - pca953x_set_val(CONFIG_SYS_I2C_PCA953X_ADDR, 0xffff, 0x0); -} - -static void backlight_lcd_off(void) -{ - unsigned gpio = IMX_GPIO_NR(2, 0); - gpio_direction_output(gpio, 0); - - gpio = IMX_GPIO_NR(2, 3); - gpio_direction_output(gpio, 0); -} - -int board_eth_init(bd_t *bis) -{ - uint32_t base = IMX_FEC_BASE; - struct mii_dev *bus = NULL; - struct phy_device *phydev = NULL; - int ret; - - setup_iomux_enet(); - - bus = fec_get_miibus(base, -1); - if (!bus) - return -EINVAL; - - /* scan phy 0 and 5 */ - phydev = phy_find_by_mask(bus, 0x21, PHY_INTERFACE_MODE_RGMII); - if (!phydev) { - ret = -EINVAL; - goto free_bus; - } - - /* depending on the phy address we can detect our board version */ - if (phydev->addr == 0) - env_set("boardver", ""); - else - env_set("boardver", "mr"); - - printf("using phy at %d\n", phydev->addr); - ret = fec_probe(bis, -1, base, bus, phydev); - if (ret) - goto free_phydev; - - return 0; - -free_phydev: - free(phydev); -free_bus: - free(bus); - return ret; -} - -int board_init(void) -{ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - - backlight_lcd_off(); - - leds_on(); - -#ifdef CONFIG_SATA - setup_sata(); -#endif - - return 0; -} - -int checkboard(void) -{ - puts("Board: "CONFIG_SYS_BOARD"\n"); - return 0; -} - -#ifdef CONFIG_CMD_BMODE -static const struct boot_mode board_boot_modes[] = { - /* 4 bit bus width */ - {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, - {NULL, 0}, -}; -#endif - -int misc_init_r(void) -{ -#ifdef CONFIG_CMD_BMODE - add_board_boot_modes(board_boot_modes); -#endif - return 0; -} diff --git a/board/bachmann/ot1200/ot1200_spl.c b/board/bachmann/ot1200/ot1200_spl.c deleted file mode 100644 index a3a822f65a1..00000000000 --- a/board/bachmann/ot1200/ot1200_spl.c +++ /dev/null @@ -1,151 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2015, Bachmann electronic GmbH - */ - -#include <common.h> -#include <spl.h> -#include <asm/arch/mx6-ddr.h> - -/* Configure MX6Q/DUAL mmdc DDR io registers */ -static struct mx6dq_iomux_ddr_regs ot1200_ddr_ioregs = { - /* SDCLK[0:1], CAS, RAS, Reset: Differential input, 48ohm */ - .dram_sdclk_0 = 0x00000028, - .dram_sdclk_1 = 0x00000028, - .dram_cas = 0x00000028, - .dram_ras = 0x00000028, - .dram_reset = 0x00000028, - /* SDCKE[0:1]: 100k pull-up */ - .dram_sdcke0 = 0x00003000, - .dram_sdcke1 = 0x00003000, - /* SDBA2: pull-up disabled */ - .dram_sdba2 = 0x00000000, - /* SDODT[0:1]: 100k pull-up, 48 ohm */ - .dram_sdodt0 = 0x00000028, - .dram_sdodt1 = 0x00000028, - /* SDQS[0:7]: Differential input, 48 ohm */ - .dram_sdqs0 = 0x00000028, - .dram_sdqs1 = 0x00000028, - .dram_sdqs2 = 0x00000028, - .dram_sdqs3 = 0x00000028, - .dram_sdqs4 = 0x00000028, - .dram_sdqs5 = 0x00000028, - .dram_sdqs6 = 0x00000028, - .dram_sdqs7 = 0x00000028, - /* DQM[0:7]: Differential input, 48 ohm */ - .dram_dqm0 = 0x00000028, - .dram_dqm1 = 0x00000028, - .dram_dqm2 = 0x00000028, - .dram_dqm3 = 0x00000028, - .dram_dqm4 = 0x00000028, - .dram_dqm5 = 0x00000028, - .dram_dqm6 = 0x00000028, - .dram_dqm7 = 0x00000028, -}; - -/* Configure MX6Q/DUAL mmdc GRP io registers */ -static struct mx6dq_iomux_grp_regs ot1200_grp_ioregs = { - /* DDR3 */ - .grp_ddr_type = 0x000c0000, - .grp_ddrmode_ctl = 0x00020000, - /* Disable DDR pullups */ - .grp_ddrpke = 0x00000000, - /* ADDR[00:16], SDBA[0:1]: 48 ohm */ - .grp_addds = 0x00000028, - /* CS0/CS1/SDBA2/CKE0/CKE1/SDWE: 48 ohm */ - .grp_ctlds = 0x00000028, - /* DATA[00:63]: Differential input, 48 ohm */ - .grp_ddrmode = 0x00020000, - .grp_b0ds = 0x00000028, - .grp_b1ds = 0x00000028, - .grp_b2ds = 0x00000028, - .grp_b3ds = 0x00000028, - .grp_b4ds = 0x00000028, - .grp_b5ds = 0x00000028, - .grp_b6ds = 0x00000028, - .grp_b7ds = 0x00000028, -}; - -static struct mx6_ddr_sysinfo ot1200_ddr_sysinfo = { - /* Width of data bus: 0=16, 1=32, 2=64 */ - .dsize = 2, - /* config for full 4GB range so that get_mem_size() works */ - .cs_density = 32, /* 32Gb per CS */ - /* Single chip select */ - .ncs = 1, - .cs1_mirror = 0, /* war 0 */ - .rtt_wr = 1, /* DDR3_RTT_60_OHM - RTT_Wr = RZQ/4 */ - .rtt_nom = 1, /* DDR3_RTT_60_OHM - RTT_Nom = RZQ/4 */ - .walat = 1, /* Write additional latency */ - .ralat = 5, /* Read additional latency */ - .mif3_mode = 3, /* Command prediction working mode */ - .bi_on = 1, /* Bank interleaving enabled */ /* war 1 */ - .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ - .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ - .refsel = 1, /* Refresh cycles at 32KHz */ - .refr = 7, /* 8 refresh commands per refresh cycle */ -}; - -/* MT41K128M16JT-125 */ -static struct mx6_ddr3_cfg micron_2gib_1600 = { - .mem_speed = 1600, - .density = 2, - .width = 16, - .banks = 8, - .rowaddr = 14, - .coladdr = 10, - .pagesz = 2, - .trcd = 1375, - .trcmin = 4875, - .trasmin = 3500, - .SRT = 1, -}; - -static struct mx6_mmdc_calibration micron_2gib_1600_mmdc_calib = { - /* write leveling calibration determine */ - .p0_mpwldectrl0 = 0x00260025, - .p0_mpwldectrl1 = 0x00270021, - .p1_mpwldectrl0 = 0x00180034, - .p1_mpwldectrl1 = 0x00180024, - /* Read DQS Gating calibration */ - .p0_mpdgctrl0 = 0x04380344, - .p0_mpdgctrl1 = 0x0330032C, - .p1_mpdgctrl0 = 0x0338033C, - .p1_mpdgctrl1 = 0x032C0300, - /* Read Calibration: DQS delay relative to DQ read access */ - .p0_mprddlctl = 0x3C2E3238, - .p1_mprddlctl = 0x3A2E303C, - /* Write Calibration: DQ/DM delay relative to DQS write access */ - .p0_mpwrdlctl = 0x36384036, - .p1_mpwrdlctl = 0x442E4438, -}; - -static void ot1200_spl_dram_init(void) -{ - mx6dq_dram_iocfg(64, &ot1200_ddr_ioregs, &ot1200_grp_ioregs); - mx6_dram_cfg(&ot1200_ddr_sysinfo, µn_2gib_1600_mmdc_calib, - µn_2gib_1600); -} - -/* - * called from C runtime startup code (arch/arm/lib/crt0.S:_main) - * - we have a stack and a place to store GD, both in SRAM - * - no variable global data is available - */ -void board_init_f(ulong dummy) -{ - /* setup AIPS and disable watchdog */ - arch_cpu_init(); - - /* iomux and setup of i2c */ - board_early_init_f(); - - /* setup GP timer */ - timer_init(); - - /* UART clocks enabled and gd valid - init serial console */ - preloader_console_init(); - - /* configure MMDC for SDRAM width/size and per-model calibration */ - ot1200_spl_dram_init(); -} diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig deleted file mode 100644 index b70f44df8ea..00000000000 --- a/configs/ot1200_defconfig +++ /dev/null @@ -1,46 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX6=y -CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_OT1200=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg,MX6Q" -CONFIG_BOOTDELAY=3 -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_MISC_INIT_R=y -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_EEPROM=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_DM=y -CONFIG_DWC_AHSATA=y -CONFIG_CMD_PCA953X=y -CONFIG_FSL_ESDHC=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y -CONFIG_PHYLIB=y -CONFIG_MII=y -CONFIG_SPI=y -CONFIG_MXC_SPI=y -CONFIG_DM_THERMAL=y -CONFIG_USB=y -CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig deleted file mode 100644 index d5962e64564..00000000000 --- a/configs/ot1200_spl_defconfig +++ /dev/null @@ -1,55 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX6=y -CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_SPL_GPIO_SUPPORT=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_OT1200=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" -CONFIG_BOOTDELAY=3 -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_MISC_INIT_R=y -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SPL_SPI_LOAD=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_DM=y -CONFIG_DWC_AHSATA=y -CONFIG_CMD_PCA953X=y -CONFIG_FSL_ESDHC=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y -CONFIG_PHYLIB=y -CONFIG_MII=y -CONFIG_SPI=y -CONFIG_MXC_SPI=y -CONFIG_DM_THERMAL=y -CONFIG_USB=y -CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h deleted file mode 100644 index 776835a766e..00000000000 --- a/include/configs/ot1200.h +++ /dev/null @@ -1,114 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. - * Copyright (C) 2014 Bachmann electronic GmbH - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "mx6_common.h" - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) - -/* UART Configs */ -#define CONFIG_MXC_UART -#define CONFIG_MXC_UART_BASE UART1_BASE - -/* SF Configs */ -#define CONFIG_SF_DEFAULT_BUS 2 -#define CONFIG_SF_DEFAULT_CS 0 -#define CONFIG_SF_DEFAULT_SPEED 25000000 -#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) - -/* IO expander */ -#define CONFIG_PCA953X -#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 -#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } - -/* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_SPEED 100000 - -/* OCOTP Configs */ -#define CONFIG_IMX_OTP -#define IMX_OTP_BASE OCOTP_BASE_ADDR -#define IMX_OTP_ADDR_MAX 0x7F -#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA -#define IMX_OTPWRITE_ENABLED - -/* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 - -/* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 - -/* - * SATA Configs - */ -#ifdef CONFIG_CMD_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 -#define CONFIG_DWC_AHSATA_PORT_ID 0 -#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR -#define CONFIG_LBA48 -#endif - -/* SPL */ -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) -#endif - -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE MII100 -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 0x5 -#define CONFIG_PHY_SMSC - -#ifndef CONFIG_SPL -#define CONFIG_ENV_EEPROM_IS_ON_I2C -#define CONFIG_SYS_I2C_EEPROM_BUS 1 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -#endif - -#define CONFIG_PREBOOT "" - -/* Thermal support */ -#define CONFIG_IMX_THERMAL - -/* Physical Memory Map */ -#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE - -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -/* Environment organization */ -#define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */ -#define CONFIG_ENV_OFFSET (1024 * 1024) -/* M25P16 has an erase size of 64 KiB */ -#define CONFIG_ENV_SECT_SIZE (64 * 1024) -#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS -#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS -#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE -#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED - -#define CONFIG_BOOTP_SERVERIP -#define CONFIG_BOOTP_BOOTFILE - -#endif /* __CONFIG_H */ -- 2.19.1.1215.g8438c0b245-goog ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-19 15:53 ` [U-Boot] [PATCH 66/93] arm: Remove ot1200 board Simon Glass @ 2018-11-22 9:25 ` Christian Gmeiner 2018-11-22 12:52 ` Tom Rini 2018-11-23 0:33 ` Fabio Estevam 0 siblings, 2 replies; 22+ messages in thread From: Christian Gmeiner @ 2018-11-22 9:25 UTC (permalink / raw) To: u-boot Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass <sjg@chromium.org>: > > This board has not been converted to CONFIG_DM_BLK by the deadline. > Remove it. > As the board is still mainted I will NAK it for the moment. Are there any hints want needs to be done to port thie board over to new DM stuff? -- greets -- Christian Gmeiner, MSc https://christian-gmeiner.info ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 9:25 ` Christian Gmeiner @ 2018-11-22 12:52 ` Tom Rini 2018-11-22 13:24 ` Marek Vasut 2018-11-23 0:33 ` Fabio Estevam 1 sibling, 1 reply; 22+ messages in thread From: Tom Rini @ 2018-11-22 12:52 UTC (permalink / raw) To: u-boot On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass <sjg@chromium.org>: > > > > This board has not been converted to CONFIG_DM_BLK by the deadline. > > Remove it. > > > > As the board is still mainted I will NAK it for the moment. Are there > any hints want needs to be done > to port thie board over to new DM stuff? Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which needs more work, but this is the board-level work that needs doing. -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: not available URL: <http://lists.denx.de/pipermail/u-boot/attachments/20181122/09a469af/attachment.sig> ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 12:52 ` Tom Rini @ 2018-11-22 13:24 ` Marek Vasut 2018-11-22 13:28 ` Tom Rini 0 siblings, 1 reply; 22+ messages in thread From: Marek Vasut @ 2018-11-22 13:24 UTC (permalink / raw) To: u-boot On 11/22/2018 01:52 PM, Tom Rini wrote: > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass <sjg@chromium.org>: >>> >>> This board has not been converted to CONFIG_DM_BLK by the deadline. >>> Remove it. >>> >> >> As the board is still mainted I will NAK it for the moment. Are there >> any hints want needs to be done >> to port thie board over to new DM stuff? > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > needs more work, but this is the board-level work that needs doing. Wasn't there a possibility to use platform data in board file instead of DT ? Or is DT mandatory now , including the libfdt overhead ? -- Best regards, Marek Vasut ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 13:24 ` Marek Vasut @ 2018-11-22 13:28 ` Tom Rini 2018-11-22 13:30 ` Marek Vasut 2018-11-22 14:44 ` Simon Goldschmidt 0 siblings, 2 replies; 22+ messages in thread From: Tom Rini @ 2018-11-22 13:28 UTC (permalink / raw) To: u-boot On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > On 11/22/2018 01:52 PM, Tom Rini wrote: > > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > > > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass <sjg@chromium.org>: > >>> > >>> This board has not been converted to CONFIG_DM_BLK by the deadline. > >>> Remove it. > >>> > >> > >> As the board is still mainted I will NAK it for the moment. Are there > >> any hints want needs to be done > >> to port thie board over to new DM stuff? > > > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > > needs more work, but this is the board-level work that needs doing. > > Wasn't there a possibility to use platform data in board file instead of > DT ? Or is DT mandatory now , including the libfdt overhead ? In short, DT for U-Boot and platform data for SPL is what's recommended, yes. -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: not available URL: <http://lists.denx.de/pipermail/u-boot/attachments/20181122/45680176/attachment.sig> ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 13:28 ` Tom Rini @ 2018-11-22 13:30 ` Marek Vasut 2018-11-22 13:32 ` Tom Rini 2018-11-22 14:44 ` Simon Goldschmidt 1 sibling, 1 reply; 22+ messages in thread From: Marek Vasut @ 2018-11-22 13:30 UTC (permalink / raw) To: u-boot On 11/22/2018 02:28 PM, Tom Rini wrote: > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: >> On 11/22/2018 01:52 PM, Tom Rini wrote: >>> On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: >>> >>>> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass <sjg@chromium.org>: >>>>> >>>>> This board has not been converted to CONFIG_DM_BLK by the deadline. >>>>> Remove it. >>>>> >>>> >>>> As the board is still mainted I will NAK it for the moment. Are there >>>> any hints want needs to be done >>>> to port thie board over to new DM stuff? >>> >>> Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and >>> selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which >>> needs more work, but this is the board-level work that needs doing. >> >> Wasn't there a possibility to use platform data in board file instead of >> DT ? Or is DT mandatory now , including the libfdt overhead ? > > In short, DT for U-Boot and platform data for SPL is what's recommended, > yes. If the board is limited, can it use only platdata ? Some platforms don't even have DT support at all. -- Best regards, Marek Vasut ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 13:30 ` Marek Vasut @ 2018-11-22 13:32 ` Tom Rini 2018-11-22 13:40 ` Marek Vasut 0 siblings, 1 reply; 22+ messages in thread From: Tom Rini @ 2018-11-22 13:32 UTC (permalink / raw) To: u-boot On Thu, Nov 22, 2018 at 02:30:11PM +0100, Marek Vasut wrote: > On 11/22/2018 02:28 PM, Tom Rini wrote: > > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > >> On 11/22/2018 01:52 PM, Tom Rini wrote: > >>> On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > >>> > >>>> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass <sjg@chromium.org>: > >>>>> > >>>>> This board has not been converted to CONFIG_DM_BLK by the deadline. > >>>>> Remove it. > >>>>> > >>>> > >>>> As the board is still mainted I will NAK it for the moment. Are there > >>>> any hints want needs to be done > >>>> to port thie board over to new DM stuff? > >>> > >>> Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > >>> selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > >>> needs more work, but this is the board-level work that needs doing. > >> > >> Wasn't there a possibility to use platform data in board file instead of > >> DT ? Or is DT mandatory now , including the libfdt overhead ? > > > > In short, DT for U-Boot and platform data for SPL is what's recommended, > > yes. > > If the board is limited, can it use only platdata ? Some platforms don't > even have DT support at all. I'm sorry, I don't quite follow you. If the board has limited resources prior to full U-Boot then yes, platform data. If the board has so limited resources during full U-Boot that we can't have a DT, what platform are we talking about? -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: not available URL: <http://lists.denx.de/pipermail/u-boot/attachments/20181122/4af5d5e6/attachment.sig> ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 13:32 ` Tom Rini @ 2018-11-22 13:40 ` Marek Vasut 0 siblings, 0 replies; 22+ messages in thread From: Marek Vasut @ 2018-11-22 13:40 UTC (permalink / raw) To: u-boot On 11/22/2018 02:32 PM, Tom Rini wrote: > On Thu, Nov 22, 2018 at 02:30:11PM +0100, Marek Vasut wrote: >> On 11/22/2018 02:28 PM, Tom Rini wrote: >>> On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: >>>> On 11/22/2018 01:52 PM, Tom Rini wrote: >>>>> On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: >>>>> >>>>>> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass <sjg@chromium.org>: >>>>>>> >>>>>>> This board has not been converted to CONFIG_DM_BLK by the deadline. >>>>>>> Remove it. >>>>>>> >>>>>> >>>>>> As the board is still mainted I will NAK it for the moment. Are there >>>>>> any hints want needs to be done >>>>>> to port thie board over to new DM stuff? >>>>> >>>>> Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and >>>>> selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which >>>>> needs more work, but this is the board-level work that needs doing. >>>> >>>> Wasn't there a possibility to use platform data in board file instead of >>>> DT ? Or is DT mandatory now , including the libfdt overhead ? >>> >>> In short, DT for U-Boot and platform data for SPL is what's recommended, >>> yes. >> >> If the board is limited, can it use only platdata ? Some platforms don't >> even have DT support at all. > > I'm sorry, I don't quite follow you. If the board has limited resources > prior to full U-Boot then yes, platform data. If the board has so > limited resources during full U-Boot that we can't have a DT, what > platform are we talking about? I don't have one in mind, but I don't think the DT/platdata selection is specific to SPL. If a platform doesn't have DT support, it can very well use platdata throughout the whole process. -- Best regards, Marek Vasut ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 13:28 ` Tom Rini 2018-11-22 13:30 ` Marek Vasut @ 2018-11-22 14:44 ` Simon Goldschmidt 2018-11-22 17:01 ` Tom Rini 1 sibling, 1 reply; 22+ messages in thread From: Simon Goldschmidt @ 2018-11-22 14:44 UTC (permalink / raw) To: u-boot Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > > On 11/22/2018 01:52 PM, Tom Rini wrote: > > > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > > > > > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < > sjg at chromium.org>: > > >>> > > >>> This board has not been converted to CONFIG_DM_BLK by the deadline. > > >>> Remove it. > > >>> > > >> > > >> As the board is still mainted I will NAK it for the moment. Are there > > >> any hints want needs to be done > > >> to port thie board over to new DM stuff? > > > > > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > > > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > > > needs more work, but this is the board-level work that needs doing. > > > > Wasn't there a possibility to use platform data in board file instead of > > DT ? Or is DT mandatory now , including the libfdt overhead ? > > In short, DT for U-Boot and platform data for SPL is what's recommended, > yes. > This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it seems a little strange or outdated overall. Would there be some kind of reference architecture or mach to look at what's the suggested/up-to-date way to implement SPL? Also regarding code flow? Simon > ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 14:44 ` Simon Goldschmidt @ 2018-11-22 17:01 ` Tom Rini 2018-11-22 20:50 ` Simon Glass 0 siblings, 1 reply; 22+ messages in thread From: Tom Rini @ 2018-11-22 17:01 UTC (permalink / raw) To: u-boot On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: > Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: > > > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > > > On 11/22/2018 01:52 PM, Tom Rini wrote: > > > > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > > > > > > > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < > > sjg at chromium.org>: > > > >>> > > > >>> This board has not been converted to CONFIG_DM_BLK by the deadline. > > > >>> Remove it. > > > >>> > > > >> > > > >> As the board is still mainted I will NAK it for the moment. Are there > > > >> any hints want needs to be done > > > >> to port thie board over to new DM stuff? > > > > > > > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > > > > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > > > > needs more work, but this is the board-level work that needs doing. > > > > > > Wasn't there a possibility to use platform data in board file instead of > > > DT ? Or is DT mandatory now , including the libfdt overhead ? > > > > In short, DT for U-Boot and platform data for SPL is what's recommended, > > yes. > > > > This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it > seems a little strange or outdated overall. > > Would there be some kind of reference architecture or mach to look at > what's the suggested/up-to-date way to implement SPL? Also regarding code > flow? So, SPL is where things get, ahem, fuzzy. While I don't want to encourage boundless growth in U-Boot proper, we aren't exactly size constrained (but rather, functional/logical constrained). But in SPL, yes, we have many platforms with 32/64/128 kilobyte hard limits (and some smaller) and we can't always shove in a "TPL" before SPL either. So in SPL we do make use of platform data instead. While not the smallest size constraint, am335x_hs_evm is a reasonable thing to look at in this case. -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: not available URL: <http://lists.denx.de/pipermail/u-boot/attachments/20181122/799406f5/attachment.sig> ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 17:01 ` Tom Rini @ 2018-11-22 20:50 ` Simon Glass 2018-11-25 21:09 ` Simon Goldschmidt 0 siblings, 1 reply; 22+ messages in thread From: Simon Glass @ 2018-11-22 20:50 UTC (permalink / raw) To: u-boot Hi, On Thu, 22 Nov 2018 at 10:02, Tom Rini <trini@konsulko.com> wrote: > > On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: > > Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: > > > > > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > > > > On 11/22/2018 01:52 PM, Tom Rini wrote: > > > > > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > > > > > > > > > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < > > > sjg at chromium.org>: > > > > >>> > > > > >>> This board has not been converted to CONFIG_DM_BLK by the deadline. > > > > >>> Remove it. > > > > >>> > > > > >> > > > > >> As the board is still mainted I will NAK it for the moment. Are there > > > > >> any hints want needs to be done > > > > >> to port thie board over to new DM stuff? > > > > > > > > > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > > > > > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > > > > > needs more work, but this is the board-level work that needs doing. > > > > > > > > Wasn't there a possibility to use platform data in board file instead of > > > > DT ? Or is DT mandatory now , including the libfdt overhead ? > > > > > > In short, DT for U-Boot and platform data for SPL is what's recommended, > > > yes. > > > > > > > This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it > > seems a little strange or outdated overall. > > > > Would there be some kind of reference architecture or mach to look at > > what's the suggested/up-to-date way to implement SPL? Also regarding code > > flow? > > So, SPL is where things get, ahem, fuzzy. While I don't want to > encourage boundless growth in U-Boot proper, we aren't exactly size > constrained (but rather, functional/logical constrained). But in SPL, > yes, we have many platforms with 32/64/128 kilobyte hard limits (and > some smaller) and we can't always shove in a "TPL" before SPL either. > So in SPL we do make use of platform data instead. While not the > smallest size constraint, am335x_hs_evm is a reasonable thing to look at > in this case. Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house - still uses DT, but it gets converted into C structs so saves code space. firefly-rk3288 is a pretty good DM/DT example, including SPL. Regards, Simon ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 20:50 ` Simon Glass @ 2018-11-25 21:09 ` Simon Goldschmidt 2018-11-26 3:00 ` Simon Glass 0 siblings, 1 reply; 22+ messages in thread From: Simon Goldschmidt @ 2018-11-25 21:09 UTC (permalink / raw) To: u-boot On Thu, Nov 22, 2018 at 9:50 PM Simon Glass <sjg@chromium.org> wrote: > > Hi, > > On Thu, 22 Nov 2018 at 10:02, Tom Rini <trini@konsulko.com> wrote: > > > > On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: > > > Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: > > > > > > > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > > > > > On 11/22/2018 01:52 PM, Tom Rini wrote: > > > > > > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > > > > > > > > > > > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < > > > > sjg at chromium.org>: > > > > > >>> > > > > > >>> This board has not been converted to CONFIG_DM_BLK by the deadline. > > > > > >>> Remove it. > > > > > >>> > > > > > >> > > > > > >> As the board is still mainted I will NAK it for the moment. Are there > > > > > >> any hints want needs to be done > > > > > >> to port thie board over to new DM stuff? > > > > > > > > > > > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > > > > > > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > > > > > > needs more work, but this is the board-level work that needs doing. > > > > > > > > > > Wasn't there a possibility to use platform data in board file instead of > > > > > DT ? Or is DT mandatory now , including the libfdt overhead ? > > > > > > > > In short, DT for U-Boot and platform data for SPL is what's recommended, > > > > yes. > > > > > > > > > > This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it > > > seems a little strange or outdated overall. > > > > > > Would there be some kind of reference architecture or mach to look at > > > what's the suggested/up-to-date way to implement SPL? Also regarding code > > > flow? > > > > So, SPL is where things get, ahem, fuzzy. While I don't want to > > encourage boundless growth in U-Boot proper, we aren't exactly size > > constrained (but rather, functional/logical constrained). But in SPL, > > yes, we have many platforms with 32/64/128 kilobyte hard limits (and > > some smaller) and we can't always shove in a "TPL" before SPL either. > > So in SPL we do make use of platform data instead. While not the > > smallest size constraint, am335x_hs_evm is a reasonable thing to look at > > in this case. > > Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house - > still uses DT, but it gets converted into C structs so saves code > space. > > firefly-rk3288 is a pretty good DM/DT example, including SPL. I've currently got an issue on socfpga gen5 that could be solved best by enabling CONFIG_OF_EMBED (mixing const and non-const sections is a problem for CRC calculation). However, it could probably also solve by using platform data (but that doesn't work out of the box, yet). The problem with CONFIG_OF_EMBED is that I think it's OK to enable this for SPL but I don't like enabling it for U-Boot, so: Would it make sense to duplicate the whole "Provider of DTB for OF control" choice so that it can be OF_EMBED for SPL but different for U-Boot? Or does it make more sense to convert socfpga gen5 to use OF_PLATDATA? Regards, Simon ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-25 21:09 ` Simon Goldschmidt @ 2018-11-26 3:00 ` Simon Glass 2018-11-26 6:05 ` Simon Goldschmidt 0 siblings, 1 reply; 22+ messages in thread From: Simon Glass @ 2018-11-26 3:00 UTC (permalink / raw) To: u-boot Hi Simon, On Sun, 25 Nov 2018 at 14:09, Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> wrote: > > On Thu, Nov 22, 2018 at 9:50 PM Simon Glass <sjg@chromium.org> wrote: > > > > Hi, > > > > On Thu, 22 Nov 2018 at 10:02, Tom Rini <trini@konsulko.com> wrote: > > > > > > On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: > > > > Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: > > > > > > > > > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > > > > > > On 11/22/2018 01:52 PM, Tom Rini wrote: > > > > > > > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > > > > > > > > > > > > > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < > > > > > sjg at chromium.org>: > > > > > > >>> > > > > > > >>> This board has not been converted to CONFIG_DM_BLK by the deadline. > > > > > > >>> Remove it. > > > > > > >>> > > > > > > >> > > > > > > >> As the board is still mainted I will NAK it for the moment. Are there > > > > > > >> any hints want needs to be done > > > > > > >> to port thie board over to new DM stuff? > > > > > > > > > > > > > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > > > > > > > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > > > > > > > needs more work, but this is the board-level work that needs doing. > > > > > > > > > > > > Wasn't there a possibility to use platform data in board file instead of > > > > > > DT ? Or is DT mandatory now , including the libfdt overhead ? > > > > > > > > > > In short, DT for U-Boot and platform data for SPL is what's recommended, > > > > > yes. > > > > > > > > > > > > > This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it > > > > seems a little strange or outdated overall. > > > > > > > > Would there be some kind of reference architecture or mach to look at > > > > what's the suggested/up-to-date way to implement SPL? Also regarding code > > > > flow? > > > > > > So, SPL is where things get, ahem, fuzzy. While I don't want to > > > encourage boundless growth in U-Boot proper, we aren't exactly size > > > constrained (but rather, functional/logical constrained). But in SPL, > > > yes, we have many platforms with 32/64/128 kilobyte hard limits (and > > > some smaller) and we can't always shove in a "TPL" before SPL either. > > > So in SPL we do make use of platform data instead. While not the > > > smallest size constraint, am335x_hs_evm is a reasonable thing to look at > > > in this case. > > > > Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house - > > still uses DT, but it gets converted into C structs so saves code > > space. > > > > firefly-rk3288 is a pretty good DM/DT example, including SPL. > > I've currently got an issue on socfpga gen5 that could be solved best > by enabling CONFIG_OF_EMBED (mixing const and non-const sections is a > problem for CRC calculation). However, it could probably also solve by > using platform data (but that doesn't work out of the box, yet). The > problem with CONFIG_OF_EMBED is that I think it's OK to enable this > for SPL but I don't like enabling it for U-Boot, so: > > Would it make sense to duplicate the whole "Provider of DTB for OF > control" choice so that it can be OF_EMBED for SPL but different for > U-Boot? Or does it make more sense to convert socfpga gen5 to use > OF_PLATDATA? We should not be using OF_EMBED in in-tree boards or production code. Can you please explain the issue a bit more? Regards, Simon ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-26 3:00 ` Simon Glass @ 2018-11-26 6:05 ` Simon Goldschmidt 2018-12-05 13:21 ` Simon Glass 0 siblings, 1 reply; 22+ messages in thread From: Simon Goldschmidt @ 2018-11-26 6:05 UTC (permalink / raw) To: u-boot [I've cut down the CC list a bit due to some gmail warnings] On Mon, Nov 26, 2018 at 4:00 AM Simon Glass <sjg@chromium.org> wrote: > > Hi Simon, > > On Sun, 25 Nov 2018 at 14:09, Simon Goldschmidt > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > On Thu, Nov 22, 2018 at 9:50 PM Simon Glass <sjg@chromium.org> wrote: > > > > > > Hi, > > > > > > On Thu, 22 Nov 2018 at 10:02, Tom Rini <trini@konsulko.com> wrote: > > > > > > > > On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: > > > > > Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: > > > > > > > > > > > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > > > > > > > On 11/22/2018 01:52 PM, Tom Rini wrote: > > > > > > > > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > > > > > > > > > > > > > > > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < > > > > > > sjg at chromium.org>: > > > > > > > >>> > > > > > > > >>> This board has not been converted to CONFIG_DM_BLK by the deadline. > > > > > > > >>> Remove it. > > > > > > > >>> > > > > > > > >> > > > > > > > >> As the board is still mainted I will NAK it for the moment. Are there > > > > > > > >> any hints want needs to be done > > > > > > > >> to port thie board over to new DM stuff? > > > > > > > > > > > > > > > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > > > > > > > > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > > > > > > > > needs more work, but this is the board-level work that needs doing. > > > > > > > > > > > > > > Wasn't there a possibility to use platform data in board file instead of > > > > > > > DT ? Or is DT mandatory now , including the libfdt overhead ? > > > > > > > > > > > > In short, DT for U-Boot and platform data for SPL is what's recommended, > > > > > > yes. > > > > > > > > > > > > > > > > This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it > > > > > seems a little strange or outdated overall. > > > > > > > > > > Would there be some kind of reference architecture or mach to look at > > > > > what's the suggested/up-to-date way to implement SPL? Also regarding code > > > > > flow? > > > > > > > > So, SPL is where things get, ahem, fuzzy. While I don't want to > > > > encourage boundless growth in U-Boot proper, we aren't exactly size > > > > constrained (but rather, functional/logical constrained). But in SPL, > > > > yes, we have many platforms with 32/64/128 kilobyte hard limits (and > > > > some smaller) and we can't always shove in a "TPL" before SPL either. > > > > So in SPL we do make use of platform data instead. While not the > > > > smallest size constraint, am335x_hs_evm is a reasonable thing to look at > > > > in this case. > > > > > > Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house - > > > still uses DT, but it gets converted into C structs so saves code > > > space. > > > > > > firefly-rk3288 is a pretty good DM/DT example, including SPL. > > > > I've currently got an issue on socfpga gen5 that could be solved best > > by enabling CONFIG_OF_EMBED (mixing const and non-const sections is a > > problem for CRC calculation). However, it could probably also solve by > > using platform data (but that doesn't work out of the box, yet). The > > problem with CONFIG_OF_EMBED is that I think it's OK to enable this > > for SPL but I don't like enabling it for U-Boot, so: > > > > Would it make sense to duplicate the whole "Provider of DTB for OF > > control" choice so that it can be OF_EMBED for SPL but different for > > U-Boot? Or does it make more sense to convert socfpga gen5 to use > > OF_PLATDATA? > > We should not be using OF_EMBED in in-tree boards or production code. What's the reason for this? I can understand this for U-Boot, and I can understand that it's at least theoretically a bit cleaner for SPL, too. But there are some drawbacks when doing this in SPL where code is not relocated: - you lose the ability to check total size in linker file (which is bad for size-constrained platforms: sometimes you notice failure only when booting) - you get an inconsistent memory layout regarding read/write: the linker places bss at the end but then, DTB follows as const data - binary size "on disk" grows due to this inconsistent memory layout (since the flat binary includes the DTB, it needs to include the zeroed-out bss, too) - "spl/u-boot-spl.hex" created by the default Makefiles does not seem to include the DTB > Can you please explain the issue a bit more? Of course: socfpga gen5 has a feature where the boot rom can jump to SPL in SRAM on warm boot. To ensure SPL is still valid after a reboot, the boot rom can check its consistency by calculating a CRC over one specified range in SRAM. On first boot, SPL stores its start, length and CRC value to special registers for the boot rom. Since the contents of bss changes while SPL is running, bss cannot be included in this CRC range. (Same goes for the '.data' region, but it's possible to build SPL without actually using it.) So to ensure the DTB is untouched, I have to make sure it has a lower address than the bss section. Using OF_EMBED does this for me. And I expect using platform data would work too. Do you have another idea how to achieve my goal of combining all write-only sections in SPL into one block? Oh, and I currently count 109 defconfig files containing "OF_EMBED", so I wasn't aware that this should not be used. Maybe these platforms have similar reasons like I have and would enable OF_EMBED only for SPL if they could. At least for socfpga_stratix10 that should work. Regards, Simon ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-26 6:05 ` Simon Goldschmidt @ 2018-12-05 13:21 ` Simon Glass 2018-12-05 13:38 ` Simon Goldschmidt 0 siblings, 1 reply; 22+ messages in thread From: Simon Glass @ 2018-12-05 13:21 UTC (permalink / raw) To: u-boot Hi Simon, On Sun, 25 Nov 2018 at 23:05, Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> wrote: > > [I've cut down the CC list a bit due to some gmail warnings] > On Mon, Nov 26, 2018 at 4:00 AM Simon Glass <sjg@chromium.org> wrote: > > > > Hi Simon, > > > > On Sun, 25 Nov 2018 at 14:09, Simon Goldschmidt > > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > > > On Thu, Nov 22, 2018 at 9:50 PM Simon Glass <sjg@chromium.org> wrote: > > > > > > > > Hi, > > > > > > > > On Thu, 22 Nov 2018 at 10:02, Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: > > > > > > Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: > > > > > > > > > > > > > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > > > > > > > > On 11/22/2018 01:52 PM, Tom Rini wrote: > > > > > > > > > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > > > > > > > > > > > > > > > > > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < > > > > > > > sjg at chromium.org>: > > > > > > > > >>> > > > > > > > > >>> This board has not been converted to CONFIG_DM_BLK by the deadline. > > > > > > > > >>> Remove it. > > > > > > > > >>> > > > > > > > > >> > > > > > > > > >> As the board is still mainted I will NAK it for the moment. Are there > > > > > > > > >> any hints want needs to be done > > > > > > > > >> to port thie board over to new DM stuff? > > > > > > > > > > > > > > > > > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > > > > > > > > > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > > > > > > > > > needs more work, but this is the board-level work that needs doing. > > > > > > > > > > > > > > > > Wasn't there a possibility to use platform data in board file instead of > > > > > > > > DT ? Or is DT mandatory now , including the libfdt overhead ? > > > > > > > > > > > > > > In short, DT for U-Boot and platform data for SPL is what's recommended, > > > > > > > yes. > > > > > > > > > > > > > > > > > > > This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it > > > > > > seems a little strange or outdated overall. > > > > > > > > > > > > Would there be some kind of reference architecture or mach to look at > > > > > > what's the suggested/up-to-date way to implement SPL? Also regarding code > > > > > > flow? > > > > > > > > > > So, SPL is where things get, ahem, fuzzy. While I don't want to > > > > > encourage boundless growth in U-Boot proper, we aren't exactly size > > > > > constrained (but rather, functional/logical constrained). But in SPL, > > > > > yes, we have many platforms with 32/64/128 kilobyte hard limits (and > > > > > some smaller) and we can't always shove in a "TPL" before SPL either. > > > > > So in SPL we do make use of platform data instead. While not the > > > > > smallest size constraint, am335x_hs_evm is a reasonable thing to look at > > > > > in this case. > > > > > > > > Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house - > > > > still uses DT, but it gets converted into C structs so saves code > > > > space. > > > > > > > > firefly-rk3288 is a pretty good DM/DT example, including SPL. > > > > > > I've currently got an issue on socfpga gen5 that could be solved best > > > by enabling CONFIG_OF_EMBED (mixing const and non-const sections is a > > > problem for CRC calculation). However, it could probably also solve by > > > using platform data (but that doesn't work out of the box, yet). The > > > problem with CONFIG_OF_EMBED is that I think it's OK to enable this > > > for SPL but I don't like enabling it for U-Boot, so: > > > > > > Would it make sense to duplicate the whole "Provider of DTB for OF > > > control" choice so that it can be OF_EMBED for SPL but different for > > > U-Boot? Or does it make more sense to convert socfpga gen5 to use > > > OF_PLATDATA? > > > > We should not be using OF_EMBED in in-tree boards or production code. > > What's the reason for this? I can understand this for U-Boot, and I > can understand that it's at least theoretically a bit cleaner for SPL, > too. But there are some drawbacks when doing this in SPL where code is > not relocated: > - you lose the ability to check total size in linker file (which is > bad for size-constrained platforms: sometimes you notice failure only > when booting) You can add an SPL size check in Makefile.spl if you like. > - you get an inconsistent memory layout regarding read/write: the > linker places bss at the end but then, DTB follows as const data This should be handled by the $(SPL-BIN)-pad.bin file (or by binman if you are using that). > - binary size "on disk" grows due to this inconsistent memory layout > (since the flat binary includes the DTB, it needs to include the > zeroed-out bss, too) Right, but this is a few bytes. Why does it matter? > - "spl/u-boot-spl.hex" created by the default Makefiles does not seem > to include the DTB That might just be a bug. > > > Can you please explain the issue a bit more? > > Of course: socfpga gen5 has a feature where the boot rom can jump to > SPL in SRAM on warm boot. To ensure SPL is still valid after a reboot, > the boot rom can check its consistency by calculating a CRC over one > specified range in SRAM. On first boot, SPL stores its start, length > and CRC value to special registers for the boot rom. Since the > contents of bss changes while SPL is running, bss cannot be included > in this CRC range. (Same goes for the '.data' region, but it's > possible to build SPL without actually using it.) How about calculating that checksum at build time instead? You could use binman to do that. > > So to ensure the DTB is untouched, I have to make sure it has a lower > address than the bss section. Using OF_EMBED does this for me. And I > expect using platform data would work too. Do you have another idea > how to achieve my goal of combining all write-only sections in SPL > into one block? Yes, do it at build time. Or calculate your CRC before you write any BSS variables. > > Oh, and I currently count 109 defconfig files containing "OF_EMBED", > so I wasn't aware that this should not be used. Maybe these platforms > have similar reasons like I have and would enable OF_EMBED only for > SPL if they could. At least for socfpga_stratix10 that should work. That is very bad news. I'll see about adding a Makefile warning. Regards, Simon ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-12-05 13:21 ` Simon Glass @ 2018-12-05 13:38 ` Simon Goldschmidt 2018-12-05 13:54 ` Simon Glass 0 siblings, 1 reply; 22+ messages in thread From: Simon Goldschmidt @ 2018-12-05 13:38 UTC (permalink / raw) To: u-boot On Wed, Dec 5, 2018 at 2:21 PM Simon Glass <sjg@chromium.org> wrote: > > Hi Simon, > > On Sun, 25 Nov 2018 at 23:05, Simon Goldschmidt > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > [I've cut down the CC list a bit due to some gmail warnings] > > On Mon, Nov 26, 2018 at 4:00 AM Simon Glass <sjg@chromium.org> wrote: > > > > > > Hi Simon, > > > > > > On Sun, 25 Nov 2018 at 14:09, Simon Goldschmidt > > > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > > > > > On Thu, Nov 22, 2018 at 9:50 PM Simon Glass <sjg@chromium.org> wrote: > > > > > > > > > > Hi, > > > > > > > > > > On Thu, 22 Nov 2018 at 10:02, Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: > > > > > > > Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: > > > > > > > > > > > > > > > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > > > > > > > > > On 11/22/2018 01:52 PM, Tom Rini wrote: > > > > > > > > > > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > > > > > > > > > > > > > > > > > > > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < > > > > > > > > sjg at chromium.org>: > > > > > > > > > >>> > > > > > > > > > >>> This board has not been converted to CONFIG_DM_BLK by the deadline. > > > > > > > > > >>> Remove it. > > > > > > > > > >>> > > > > > > > > > >> > > > > > > > > > >> As the board is still mainted I will NAK it for the moment. Are there > > > > > > > > > >> any hints want needs to be done > > > > > > > > > >> to port thie board over to new DM stuff? > > > > > > > > > > > > > > > > > > > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > > > > > > > > > > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > > > > > > > > > > needs more work, but this is the board-level work that needs doing. > > > > > > > > > > > > > > > > > > Wasn't there a possibility to use platform data in board file instead of > > > > > > > > > DT ? Or is DT mandatory now , including the libfdt overhead ? > > > > > > > > > > > > > > > > In short, DT for U-Boot and platform data for SPL is what's recommended, > > > > > > > > yes. > > > > > > > > > > > > > > > > > > > > > > This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it > > > > > > > seems a little strange or outdated overall. > > > > > > > > > > > > > > Would there be some kind of reference architecture or mach to look at > > > > > > > what's the suggested/up-to-date way to implement SPL? Also regarding code > > > > > > > flow? > > > > > > > > > > > > So, SPL is where things get, ahem, fuzzy. While I don't want to > > > > > > encourage boundless growth in U-Boot proper, we aren't exactly size > > > > > > constrained (but rather, functional/logical constrained). But in SPL, > > > > > > yes, we have many platforms with 32/64/128 kilobyte hard limits (and > > > > > > some smaller) and we can't always shove in a "TPL" before SPL either. > > > > > > So in SPL we do make use of platform data instead. While not the > > > > > > smallest size constraint, am335x_hs_evm is a reasonable thing to look at > > > > > > in this case. > > > > > > > > > > Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house - > > > > > still uses DT, but it gets converted into C structs so saves code > > > > > space. > > > > > > > > > > firefly-rk3288 is a pretty good DM/DT example, including SPL. > > > > > > > > I've currently got an issue on socfpga gen5 that could be solved best > > > > by enabling CONFIG_OF_EMBED (mixing const and non-const sections is a > > > > problem for CRC calculation). However, it could probably also solve by > > > > using platform data (but that doesn't work out of the box, yet). The > > > > problem with CONFIG_OF_EMBED is that I think it's OK to enable this > > > > for SPL but I don't like enabling it for U-Boot, so: > > > > > > > > Would it make sense to duplicate the whole "Provider of DTB for OF > > > > control" choice so that it can be OF_EMBED for SPL but different for > > > > U-Boot? Or does it make more sense to convert socfpga gen5 to use > > > > OF_PLATDATA? > > > > > > We should not be using OF_EMBED in in-tree boards or production code. > > > > What's the reason for this? I can understand this for U-Boot, and I > > can understand that it's at least theoretically a bit cleaner for SPL, > > too. But there are some drawbacks when doing this in SPL where code is > > not relocated: > > - you lose the ability to check total size in linker file (which is > > bad for size-constrained platforms: sometimes you notice failure only > > when booting) > > You can add an SPL size check in Makefile.spl if you like. That might be required, yes. > > - you get an inconsistent memory layout regarding read/write: the > > linker places bss at the end but then, DTB follows as const data > > This should be handled by the $(SPL-BIN)-pad.bin file (or by binman if > you are using that). I don't understand that. How does the padding help? I have these sections (roughly): - text: readonly - bss: writable - DTB: readonly, added as post build step after linking How does $(SPL-BIN)-pad.bin help? > > - binary size "on disk" grows due to this inconsistent memory layout > > (since the flat binary includes the DTB, it needs to include the > > zeroed-out bss, too) > > Right, but this is a few bytes. Why does it matter? > > > - "spl/u-boot-spl.hex" created by the default Makefiles does not seem > > to include the DTB > > That might just be a bug. It might, yes. The hex file is currently built from the elf file, so there's no DTB in there. > > > > > Can you please explain the issue a bit more? > > > > Of course: socfpga gen5 has a feature where the boot rom can jump to > > SPL in SRAM on warm boot. To ensure SPL is still valid after a reboot, > > the boot rom can check its consistency by calculating a CRC over one > > specified range in SRAM. On first boot, SPL stores its start, length > > and CRC value to special registers for the boot rom. Since the > > contents of bss changes while SPL is running, bss cannot be included > > in this CRC range. (Same goes for the '.data' region, but it's > > possible to build SPL without actually using it.) > > How about calculating that checksum at build time instead? You could > use binman to do that. > > > > > So to ensure the DTB is untouched, I have to make sure it has a lower > > address than the bss section. Using OF_EMBED does this for me. And I > > expect using platform data would work too. Do you have another idea > > how to achieve my goal of combining all write-only sections in SPL > > into one block? > > Yes, do it at build time. Or calculate your CRC before you write any > BSS variables. Creating the correct checksum is not the point. I can do that before using bss. The problem is that on the next boot, this checksum is not valid any more because bss might have changed. > > > > Oh, and I currently count 109 defconfig files containing "OF_EMBED", > > so I wasn't aware that this should not be used. Maybe these platforms > > have similar reasons like I have and would enable OF_EMBED only for > > SPL if they could. At least for socfpga_stratix10 that should work. > > That is very bad news. I'll see about adding a Makefile warning. OK. Looking forward to the discussion that starts then :-) Regards, Simon ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-12-05 13:38 ` Simon Goldschmidt @ 2018-12-05 13:54 ` Simon Glass 2018-12-05 14:16 ` Simon Goldschmidt 0 siblings, 1 reply; 22+ messages in thread From: Simon Glass @ 2018-12-05 13:54 UTC (permalink / raw) To: u-boot Hi Simon, On Wed, 5 Dec 2018 at 06:38, Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> wrote: > > On Wed, Dec 5, 2018 at 2:21 PM Simon Glass <sjg@chromium.org> wrote: > > > > Hi Simon, > > > > On Sun, 25 Nov 2018 at 23:05, Simon Goldschmidt > > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > > > [I've cut down the CC list a bit due to some gmail warnings] > > > On Mon, Nov 26, 2018 at 4:00 AM Simon Glass <sjg@chromium.org> wrote: > > > > > > > > Hi Simon, > > > > > > > > On Sun, 25 Nov 2018 at 14:09, Simon Goldschmidt > > > > <simon.k.r.goldschmidt@gmail.com> wrote: > > > > > > > > > > On Thu, Nov 22, 2018 at 9:50 PM Simon Glass <sjg@chromium.org> wrote: > > > > > > > > > > > > Hi, > > > > > > > > > > > > On Thu, 22 Nov 2018 at 10:02, Tom Rini <trini@konsulko.com> wrote: > > > > > > > > > > > > > > On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: > > > > > > > > Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: > > > > > > > > > > > > > > > > > On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > > > > > > > > > > On 11/22/2018 01:52 PM, Tom Rini wrote: > > > > > > > > > > > On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > > > > > > > > > > > > > > > > > > > > > >> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < > > > > > > > > > sjg at chromium.org>: > > > > > > > > > > >>> > > > > > > > > > > >>> This board has not been converted to CONFIG_DM_BLK by the deadline. > > > > > > > > > > >>> Remove it. > > > > > > > > > > >>> > > > > > > > > > > >> > > > > > > > > > > >> As the board is still mainted I will NAK it for the moment. Are there > > > > > > > > > > >> any hints want needs to be done > > > > > > > > > > >> to port thie board over to new DM stuff? > > > > > > > > > > > > > > > > > > > > > > Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > > > > > > > > > > > selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > > > > > > > > > > > needs more work, but this is the board-level work that needs doing. > > > > > > > > > > > > > > > > > > > > Wasn't there a possibility to use platform data in board file instead of > > > > > > > > > > DT ? Or is DT mandatory now , including the libfdt overhead ? > > > > > > > > > > > > > > > > > > In short, DT for U-Boot and platform data for SPL is what's recommended, > > > > > > > > > yes. > > > > > > > > > > > > > > > > > > > > > > > > > This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it > > > > > > > > seems a little strange or outdated overall. > > > > > > > > > > > > > > > > Would there be some kind of reference architecture or mach to look at > > > > > > > > what's the suggested/up-to-date way to implement SPL? Also regarding code > > > > > > > > flow? > > > > > > > > > > > > > > So, SPL is where things get, ahem, fuzzy. While I don't want to > > > > > > > encourage boundless growth in U-Boot proper, we aren't exactly size > > > > > > > constrained (but rather, functional/logical constrained). But in SPL, > > > > > > > yes, we have many platforms with 32/64/128 kilobyte hard limits (and > > > > > > > some smaller) and we can't always shove in a "TPL" before SPL either. > > > > > > > So in SPL we do make use of platform data instead. While not the > > > > > > > smallest size constraint, am335x_hs_evm is a reasonable thing to look at > > > > > > > in this case. > > > > > > > > > > > > Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house - > > > > > > still uses DT, but it gets converted into C structs so saves code > > > > > > space. > > > > > > > > > > > > firefly-rk3288 is a pretty good DM/DT example, including SPL. > > > > > > > > > > I've currently got an issue on socfpga gen5 that could be solved best > > > > > by enabling CONFIG_OF_EMBED (mixing const and non-const sections is a > > > > > problem for CRC calculation). However, it could probably also solve by > > > > > using platform data (but that doesn't work out of the box, yet). The > > > > > problem with CONFIG_OF_EMBED is that I think it's OK to enable this > > > > > for SPL but I don't like enabling it for U-Boot, so: > > > > > > > > > > Would it make sense to duplicate the whole "Provider of DTB for OF > > > > > control" choice so that it can be OF_EMBED for SPL but different for > > > > > U-Boot? Or does it make more sense to convert socfpga gen5 to use > > > > > OF_PLATDATA? > > > > > > > > We should not be using OF_EMBED in in-tree boards or production code. > > > > > > What's the reason for this? I can understand this for U-Boot, and I > > > can understand that it's at least theoretically a bit cleaner for SPL, > > > too. But there are some drawbacks when doing this in SPL where code is > > > not relocated: > > > - you lose the ability to check total size in linker file (which is > > > bad for size-constrained platforms: sometimes you notice failure only > > > when booting) > > > > You can add an SPL size check in Makefile.spl if you like. > > That might be required, yes. > > > > - you get an inconsistent memory layout regarding read/write: the > > > linker places bss at the end but then, DTB follows as const data > > > > This should be handled by the $(SPL-BIN)-pad.bin file (or by binman if > > you are using that). > > I don't understand that. How does the padding help? I have these > sections (roughly): > - text: readonly > - bss: writable > - DTB: readonly, added as post build step after linking > > How does $(SPL-BIN)-pad.bin help? It covers over the BSS section so that the image ends where the DTB starts, thus fixing the addressing issue you mentioned. It allows you to do this: cat u-boot-spl-nodtb.bin u-boot-spl.dtn >-u-boot-spl.bin > > > > - binary size "on disk" grows due to this inconsistent memory layout > > > (since the flat binary includes the DTB, it needs to include the > > > zeroed-out bss, too) > > > > Right, but this is a few bytes. Why does it matter? > > > > > - "spl/u-boot-spl.hex" created by the default Makefiles does not seem > > > to include the DTB > > > > That might just be a bug. > > It might, yes. The hex file is currently built from the elf file, so > there's no DTB in there. OK. Could be worth a patch. > > > > > > > > Can you please explain the issue a bit more? > > > > > > Of course: socfpga gen5 has a feature where the boot rom can jump to > > > SPL in SRAM on warm boot. To ensure SPL is still valid after a reboot, > > > the boot rom can check its consistency by calculating a CRC over one > > > specified range in SRAM. On first boot, SPL stores its start, length > > > and CRC value to special registers for the boot rom. Since the > > > contents of bss changes while SPL is running, bss cannot be included > > > in this CRC range. (Same goes for the '.data' region, but it's > > > possible to build SPL without actually using it.) > > > > How about calculating that checksum at build time instead? You could > > use binman to do that. > > > > > > > > So to ensure the DTB is untouched, I have to make sure it has a lower > > > address than the bss section. Using OF_EMBED does this for me. And I > > > expect using platform data would work too. Do you have another idea > > > how to achieve my goal of combining all write-only sections in SPL > > > into one block? > > > > Yes, do it at build time. Or calculate your CRC before you write any > > BSS variables. > > Creating the correct checksum is not the point. I can do that before using bss. > > The problem is that on the next boot, this checksum is not valid any > more because bss might have changed. Right, but just skip the BSS section when checksumming - i.e. checksum the code and then the DT but omit the BSS. > > > > > > > Oh, and I currently count 109 defconfig files containing "OF_EMBED", > > > so I wasn't aware that this should not be used. Maybe these platforms > > > have similar reasons like I have and would enable OF_EMBED only for > > > SPL if they could. At least for socfpga_stratix10 that should work. > > > > That is very bad news. I'll see about adding a Makefile warning. > > OK. Looking forward to the discussion that starts then :-) Yes... Regards, Simon ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-12-05 13:54 ` Simon Glass @ 2018-12-05 14:16 ` Simon Goldschmidt 2018-12-05 15:55 ` Simon Glass 0 siblings, 1 reply; 22+ messages in thread From: Simon Goldschmidt @ 2018-12-05 14:16 UTC (permalink / raw) To: u-boot Am 05.12.2018 um 14:54 schrieb Simon Glass: > Hi Simon, > > On Wed, 5 Dec 2018 at 06:38, Simon Goldschmidt > <simon.k.r.goldschmidt@gmail.com> wrote: >> >> On Wed, Dec 5, 2018 at 2:21 PM Simon Glass <sjg@chromium.org> wrote: >>> >>> Hi Simon, >>> >>> On Sun, 25 Nov 2018 at 23:05, Simon Goldschmidt >>> <simon.k.r.goldschmidt@gmail.com> wrote: >>>> >>>> [I've cut down the CC list a bit due to some gmail warnings] >>>> On Mon, Nov 26, 2018 at 4:00 AM Simon Glass <sjg@chromium.org> wrote: >>>>> >>>>> Hi Simon, >>>>> >>>>> On Sun, 25 Nov 2018 at 14:09, Simon Goldschmidt >>>>> <simon.k.r.goldschmidt@gmail.com> wrote: >>>>>> >>>>>> On Thu, Nov 22, 2018 at 9:50 PM Simon Glass <sjg@chromium.org> wrote: >>>>>>> >>>>>>> Hi, >>>>>>> >>>>>>> On Thu, 22 Nov 2018 at 10:02, Tom Rini <trini@konsulko.com> wrote: >>>>>>>> >>>>>>>> On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: >>>>>>>>> Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: >>>>>>>>> >>>>>>>>>> On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: >>>>>>>>>>> On 11/22/2018 01:52 PM, Tom Rini wrote: >>>>>>>>>>>> On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: >>>>>>>>>>>> >>>>>>>>>>>>> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < >>>>>>>>>> sjg at chromium.org>: >>>>>>>>>>>>>> >>>>>>>>>>>>>> This board has not been converted to CONFIG_DM_BLK by the deadline. >>>>>>>>>>>>>> Remove it. >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> As the board is still mainted I will NAK it for the moment. Are there >>>>>>>>>>>>> any hints want needs to be done >>>>>>>>>>>>> to port thie board over to new DM stuff? >>>>>>>>>>>> >>>>>>>>>>>> Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and >>>>>>>>>>>> selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which >>>>>>>>>>>> needs more work, but this is the board-level work that needs doing. >>>>>>>>>>> >>>>>>>>>>> Wasn't there a possibility to use platform data in board file instead of >>>>>>>>>>> DT ? Or is DT mandatory now , including the libfdt overhead ? >>>>>>>>>> >>>>>>>>>> In short, DT for U-Boot and platform data for SPL is what's recommended, >>>>>>>>>> yes. >>>>>>>>>> >>>>>>>>> >>>>>>>>> This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it >>>>>>>>> seems a little strange or outdated overall. >>>>>>>>> >>>>>>>>> Would there be some kind of reference architecture or mach to look at >>>>>>>>> what's the suggested/up-to-date way to implement SPL? Also regarding code >>>>>>>>> flow? >>>>>>>> >>>>>>>> So, SPL is where things get, ahem, fuzzy. While I don't want to >>>>>>>> encourage boundless growth in U-Boot proper, we aren't exactly size >>>>>>>> constrained (but rather, functional/logical constrained). But in SPL, >>>>>>>> yes, we have many platforms with 32/64/128 kilobyte hard limits (and >>>>>>>> some smaller) and we can't always shove in a "TPL" before SPL either. >>>>>>>> So in SPL we do make use of platform data instead. While not the >>>>>>>> smallest size constraint, am335x_hs_evm is a reasonable thing to look at >>>>>>>> in this case. >>>>>>> >>>>>>> Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house - >>>>>>> still uses DT, but it gets converted into C structs so saves code >>>>>>> space. >>>>>>> >>>>>>> firefly-rk3288 is a pretty good DM/DT example, including SPL. >>>>>> >>>>>> I've currently got an issue on socfpga gen5 that could be solved best >>>>>> by enabling CONFIG_OF_EMBED (mixing const and non-const sections is a >>>>>> problem for CRC calculation). However, it could probably also solve by >>>>>> using platform data (but that doesn't work out of the box, yet). The >>>>>> problem with CONFIG_OF_EMBED is that I think it's OK to enable this >>>>>> for SPL but I don't like enabling it for U-Boot, so: >>>>>> >>>>>> Would it make sense to duplicate the whole "Provider of DTB for OF >>>>>> control" choice so that it can be OF_EMBED for SPL but different for >>>>>> U-Boot? Or does it make more sense to convert socfpga gen5 to use >>>>>> OF_PLATDATA? >>>>> >>>>> We should not be using OF_EMBED in in-tree boards or production code. >>>> >>>> What's the reason for this? I can understand this for U-Boot, and I >>>> can understand that it's at least theoretically a bit cleaner for SPL, >>>> too. But there are some drawbacks when doing this in SPL where code is >>>> not relocated: >>>> - you lose the ability to check total size in linker file (which is >>>> bad for size-constrained platforms: sometimes you notice failure only >>>> when booting) >>> >>> You can add an SPL size check in Makefile.spl if you like. >> >> That might be required, yes. >> >>>> - you get an inconsistent memory layout regarding read/write: the >>>> linker places bss at the end but then, DTB follows as const data >>> >>> This should be handled by the $(SPL-BIN)-pad.bin file (or by binman if >>> you are using that). >> >> I don't understand that. How does the padding help? I have these >> sections (roughly): >> - text: readonly >> - bss: writable >> - DTB: readonly, added as post build step after linking >> >> How does $(SPL-BIN)-pad.bin help? > > It covers over the BSS section so that the image ends where the DTB > starts, thus fixing the addressing issue you mentioned. It allows you > to do this: > > cat u-boot-spl-nodtb.bin u-boot-spl.dtn >-u-boot-spl.bin > >> >>>> - binary size "on disk" grows due to this inconsistent memory layout >>>> (since the flat binary includes the DTB, it needs to include the >>>> zeroed-out bss, too) >>> >>> Right, but this is a few bytes. Why does it matter? >>> >>>> - "spl/u-boot-spl.hex" created by the default Makefiles does not seem >>>> to include the DTB >>> >>> That might just be a bug. >> >> It might, yes. The hex file is currently built from the elf file, so >> there's no DTB in there. > > OK. Could be worth a patch. > >> >>>> >>>>> Can you please explain the issue a bit more? >>>> >>>> Of course: socfpga gen5 has a feature where the boot rom can jump to >>>> SPL in SRAM on warm boot. To ensure SPL is still valid after a reboot, >>>> the boot rom can check its consistency by calculating a CRC over one >>>> specified range in SRAM. On first boot, SPL stores its start, length >>>> and CRC value to special registers for the boot rom. Since the >>>> contents of bss changes while SPL is running, bss cannot be included >>>> in this CRC range. (Same goes for the '.data' region, but it's >>>> possible to build SPL without actually using it.) >>> >>> How about calculating that checksum at build time instead? You could >>> use binman to do that. >>> >>>> >>>> So to ensure the DTB is untouched, I have to make sure it has a lower >>>> address than the bss section. Using OF_EMBED does this for me. And I >>>> expect using platform data would work too. Do you have another idea >>>> how to achieve my goal of combining all write-only sections in SPL >>>> into one block? >>> >>> Yes, do it at build time. Or calculate your CRC before you write any >>> BSS variables. >> >> Creating the correct checksum is not the point. I can do that before using bss. >> >> The problem is that on the next boot, this checksum is not valid any >> more because bss might have changed. > > Right, but just skip the BSS section when checksumming - i.e. checksum > the code and then the DT but omit the BSS. Yeah, well, good idea but that's not possible. The boot rom checks this checksum on warm restart and it can only check the CRC of one block. And of course I canno change the boot rom. So the only option I have without using OF_EMBED is to drop the CRC of the DT, which is not really an option... Regards, Simon >>>> Oh, and I currently count 109 defconfig files containing "OF_EMBED", >>>> so I wasn't aware that this should not be used. Maybe these platforms >>>> have similar reasons like I have and would enable OF_EMBED only for >>>> SPL if they could. At least for socfpga_stratix10 that should work. >>> >>> That is very bad news. I'll see about adding a Makefile warning. >> >> OK. Looking forward to the discussion that starts then :-) > > Yes... > > Regards, > Simon > ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-12-05 14:16 ` Simon Goldschmidt @ 2018-12-05 15:55 ` Simon Glass 2018-12-05 16:11 ` Simon Goldschmidt 0 siblings, 1 reply; 22+ messages in thread From: Simon Glass @ 2018-12-05 15:55 UTC (permalink / raw) To: u-boot Hi Simon, On Wed, 5 Dec 2018 at 07:17, Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> wrote: > > Am 05.12.2018 um 14:54 schrieb Simon Glass: > > Hi Simon, > > > > On Wed, 5 Dec 2018 at 06:38, Simon Goldschmidt > > <simon.k.r.goldschmidt@gmail.com> wrote: > >> > >> On Wed, Dec 5, 2018 at 2:21 PM Simon Glass <sjg@chromium.org> wrote: > >>> > >>> Hi Simon, > >>> > >>> On Sun, 25 Nov 2018 at 23:05, Simon Goldschmidt > >>> <simon.k.r.goldschmidt@gmail.com> wrote: > >>>> > >>>> [I've cut down the CC list a bit due to some gmail warnings] > >>>> On Mon, Nov 26, 2018 at 4:00 AM Simon Glass <sjg@chromium.org> wrote: > >>>>> > >>>>> Hi Simon, > >>>>> > >>>>> On Sun, 25 Nov 2018 at 14:09, Simon Goldschmidt > >>>>> <simon.k.r.goldschmidt@gmail.com> wrote: > >>>>>> > >>>>>> On Thu, Nov 22, 2018 at 9:50 PM Simon Glass <sjg@chromium.org> wrote: > >>>>>>> > >>>>>>> Hi, > >>>>>>> > >>>>>>> On Thu, 22 Nov 2018 at 10:02, Tom Rini <trini@konsulko.com> wrote: > >>>>>>>> > >>>>>>>> On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: > >>>>>>>>> Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: > >>>>>>>>> > >>>>>>>>>> On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: > >>>>>>>>>>> On 11/22/2018 01:52 PM, Tom Rini wrote: > >>>>>>>>>>>> On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: > >>>>>>>>>>>> > >>>>>>>>>>>>> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < > >>>>>>>>>> sjg at chromium.org>: > >>>>>>>>>>>>>> > >>>>>>>>>>>>>> This board has not been converted to CONFIG_DM_BLK by the deadline. > >>>>>>>>>>>>>> Remove it. > >>>>>>>>>>>>>> > >>>>>>>>>>>>> > >>>>>>>>>>>>> As the board is still mainted I will NAK it for the moment. Are there > >>>>>>>>>>>>> any hints want needs to be done > >>>>>>>>>>>>> to port thie board over to new DM stuff? > >>>>>>>>>>>> > >>>>>>>>>>>> Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and > >>>>>>>>>>>> selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which > >>>>>>>>>>>> needs more work, but this is the board-level work that needs doing. > >>>>>>>>>>> > >>>>>>>>>>> Wasn't there a possibility to use platform data in board file instead of > >>>>>>>>>>> DT ? Or is DT mandatory now , including the libfdt overhead ? > >>>>>>>>>> > >>>>>>>>>> In short, DT for U-Boot and platform data for SPL is what's recommended, > >>>>>>>>>> yes. > >>>>>>>>>> > >>>>>>>>> > >>>>>>>>> This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it > >>>>>>>>> seems a little strange or outdated overall. > >>>>>>>>> > >>>>>>>>> Would there be some kind of reference architecture or mach to look at > >>>>>>>>> what's the suggested/up-to-date way to implement SPL? Also regarding code > >>>>>>>>> flow? > >>>>>>>> > >>>>>>>> So, SPL is where things get, ahem, fuzzy. While I don't want to > >>>>>>>> encourage boundless growth in U-Boot proper, we aren't exactly size > >>>>>>>> constrained (but rather, functional/logical constrained). But in SPL, > >>>>>>>> yes, we have many platforms with 32/64/128 kilobyte hard limits (and > >>>>>>>> some smaller) and we can't always shove in a "TPL" before SPL either. > >>>>>>>> So in SPL we do make use of platform data instead. While not the > >>>>>>>> smallest size constraint, am335x_hs_evm is a reasonable thing to look at > >>>>>>>> in this case. > >>>>>>> > >>>>>>> Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house - > >>>>>>> still uses DT, but it gets converted into C structs so saves code > >>>>>>> space. > >>>>>>> > >>>>>>> firefly-rk3288 is a pretty good DM/DT example, including SPL. > >>>>>> > >>>>>> I've currently got an issue on socfpga gen5 that could be solved best > >>>>>> by enabling CONFIG_OF_EMBED (mixing const and non-const sections is a > >>>>>> problem for CRC calculation). However, it could probably also solve by > >>>>>> using platform data (but that doesn't work out of the box, yet). The > >>>>>> problem with CONFIG_OF_EMBED is that I think it's OK to enable this > >>>>>> for SPL but I don't like enabling it for U-Boot, so: > >>>>>> > >>>>>> Would it make sense to duplicate the whole "Provider of DTB for OF > >>>>>> control" choice so that it can be OF_EMBED for SPL but different for > >>>>>> U-Boot? Or does it make more sense to convert socfpga gen5 to use > >>>>>> OF_PLATDATA? > >>>>> > >>>>> We should not be using OF_EMBED in in-tree boards or production code. > >>>> > >>>> What's the reason for this? I can understand this for U-Boot, and I > >>>> can understand that it's at least theoretically a bit cleaner for SPL, > >>>> too. But there are some drawbacks when doing this in SPL where code is > >>>> not relocated: > >>>> - you lose the ability to check total size in linker file (which is > >>>> bad for size-constrained platforms: sometimes you notice failure only > >>>> when booting) > >>> > >>> You can add an SPL size check in Makefile.spl if you like. > >> > >> That might be required, yes. > >> > >>>> - you get an inconsistent memory layout regarding read/write: the > >>>> linker places bss at the end but then, DTB follows as const data > >>> > >>> This should be handled by the $(SPL-BIN)-pad.bin file (or by binman if > >>> you are using that). > >> > >> I don't understand that. How does the padding help? I have these > >> sections (roughly): > >> - text: readonly > >> - bss: writable > >> - DTB: readonly, added as post build step after linking > >> > >> How does $(SPL-BIN)-pad.bin help? > > > > It covers over the BSS section so that the image ends where the DTB > > starts, thus fixing the addressing issue you mentioned. It allows you > > to do this: > > > > cat u-boot-spl-nodtb.bin u-boot-spl.dtn >-u-boot-spl.bin > > > >> > >>>> - binary size "on disk" grows due to this inconsistent memory layout > >>>> (since the flat binary includes the DTB, it needs to include the > >>>> zeroed-out bss, too) > >>> > >>> Right, but this is a few bytes. Why does it matter? > >>> > >>>> - "spl/u-boot-spl.hex" created by the default Makefiles does not seem > >>>> to include the DTB > >>> > >>> That might just be a bug. > >> > >> It might, yes. The hex file is currently built from the elf file, so > >> there's no DTB in there. > > > > OK. Could be worth a patch. > > > >> > >>>> > >>>>> Can you please explain the issue a bit more? > >>>> > >>>> Of course: socfpga gen5 has a feature where the boot rom can jump to > >>>> SPL in SRAM on warm boot. To ensure SPL is still valid after a reboot, > >>>> the boot rom can check its consistency by calculating a CRC over one > >>>> specified range in SRAM. On first boot, SPL stores its start, length > >>>> and CRC value to special registers for the boot rom. Since the > >>>> contents of bss changes while SPL is running, bss cannot be included > >>>> in this CRC range. (Same goes for the '.data' region, but it's > >>>> possible to build SPL without actually using it.) > >>> > >>> How about calculating that checksum at build time instead? You could > >>> use binman to do that. > >>> > >>>> > >>>> So to ensure the DTB is untouched, I have to make sure it has a lower > >>>> address than the bss section. Using OF_EMBED does this for me. And I > >>>> expect using platform data would work too. Do you have another idea > >>>> how to achieve my goal of combining all write-only sections in SPL > >>>> into one block? > >>> > >>> Yes, do it at build time. Or calculate your CRC before you write any > >>> BSS variables. > >> > >> Creating the correct checksum is not the point. I can do that before using bss. > >> > >> The problem is that on the next boot, this checksum is not valid any > >> more because bss might have changed. > > > > Right, but just skip the BSS section when checksumming - i.e. checksum > > the code and then the DT but omit the BSS. > > Yeah, well, good idea but that's not possible. The boot rom checks this > checksum on warm restart and it can only check the CRC of one block. And > of course I canno change the boot rom. > > So the only option I have without using OF_EMBED is to drop the CRC of > the DT, which is not really an option... Really it sounds like you want to move the BSS after the DT. We don't have a way of doing that at present. But I suppose it would be easy enough to arrange, by putting a placeholder for the DT in the link script. We just need a variable which holds the DT size and then can use '. = . + DT_SIZE' to reserve the space. Regards, Simon > > Regards, > Simon > > >>>> Oh, and I currently count 109 defconfig files containing "OF_EMBED", > >>>> so I wasn't aware that this should not be used. Maybe these platforms > >>>> have similar reasons like I have and would enable OF_EMBED only for > >>>> SPL if they could. At least for socfpga_stratix10 that should work. > >>> > >>> That is very bad news. I'll see about adding a Makefile warning. > >> > >> OK. Looking forward to the discussion that starts then :-) > > > > Yes... > > > > Regards, > > Simon > > > ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-12-05 15:55 ` Simon Glass @ 2018-12-05 16:11 ` Simon Goldschmidt 0 siblings, 0 replies; 22+ messages in thread From: Simon Goldschmidt @ 2018-12-05 16:11 UTC (permalink / raw) To: u-boot Am 05.12.2018 um 16:55 schrieb Simon Glass: > Hi Simon, > > On Wed, 5 Dec 2018 at 07:17, Simon Goldschmidt > <simon.k.r.goldschmidt@gmail.com> wrote: >> >> Am 05.12.2018 um 14:54 schrieb Simon Glass: >>> Hi Simon, >>> >>> On Wed, 5 Dec 2018 at 06:38, Simon Goldschmidt >>> <simon.k.r.goldschmidt@gmail.com> wrote: >>>> >>>> On Wed, Dec 5, 2018 at 2:21 PM Simon Glass <sjg@chromium.org> wrote: >>>>> >>>>> Hi Simon, >>>>> >>>>> On Sun, 25 Nov 2018 at 23:05, Simon Goldschmidt >>>>> <simon.k.r.goldschmidt@gmail.com> wrote: >>>>>> >>>>>> [I've cut down the CC list a bit due to some gmail warnings] >>>>>> On Mon, Nov 26, 2018 at 4:00 AM Simon Glass <sjg@chromium.org> wrote: >>>>>>> >>>>>>> Hi Simon, >>>>>>> >>>>>>> On Sun, 25 Nov 2018 at 14:09, Simon Goldschmidt >>>>>>> <simon.k.r.goldschmidt@gmail.com> wrote: >>>>>>>> >>>>>>>> On Thu, Nov 22, 2018 at 9:50 PM Simon Glass <sjg@chromium.org> wrote: >>>>>>>>> >>>>>>>>> Hi, >>>>>>>>> >>>>>>>>> On Thu, 22 Nov 2018 at 10:02, Tom Rini <trini@konsulko.com> wrote: >>>>>>>>>> >>>>>>>>>> On Thu, Nov 22, 2018 at 03:44:28PM +0100, Simon Goldschmidt wrote: >>>>>>>>>>> Am Do., 22. Nov. 2018, 14:44 hat Tom Rini <trini@konsulko.com> geschrieben: >>>>>>>>>>> >>>>>>>>>>>> On Thu, Nov 22, 2018 at 02:24:49PM +0100, Marek Vasut wrote: >>>>>>>>>>>>> On 11/22/2018 01:52 PM, Tom Rini wrote: >>>>>>>>>>>>>> On Thu, Nov 22, 2018 at 10:25:14AM +0100, Christian Gmeiner wrote: >>>>>>>>>>>>>> >>>>>>>>>>>>>>> Am Mo., 19. Nov. 2018 um 16:56 Uhr schrieb Simon Glass < >>>>>>>>>>>> sjg at chromium.org>: >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> This board has not been converted to CONFIG_DM_BLK by the deadline. >>>>>>>>>>>>>>>> Remove it. >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> As the board is still mainted I will NAK it for the moment. Are there >>>>>>>>>>>>>>> any hints want needs to be done >>>>>>>>>>>>>>> to port thie board over to new DM stuff? >>>>>>>>>>>>>> >>>>>>>>>>>>>> Yes, as a start you need to switch over to using CONFIG_OF_CONTROL and >>>>>>>>>>>>>> selecting/providing a dtb file. I see ot1200 is using DWC_AHSATA which >>>>>>>>>>>>>> needs more work, but this is the board-level work that needs doing. >>>>>>>>>>>>> >>>>>>>>>>>>> Wasn't there a possibility to use platform data in board file instead of >>>>>>>>>>>>> DT ? Or is DT mandatory now , including the libfdt overhead ? >>>>>>>>>>>> >>>>>>>>>>>> In short, DT for U-Boot and platform data for SPL is what's recommended, >>>>>>>>>>>> yes. >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> This is a little confusing for me. Socfpga gen5 SPL doesn't do that. And it >>>>>>>>>>> seems a little strange or outdated overall. >>>>>>>>>>> >>>>>>>>>>> Would there be some kind of reference architecture or mach to look at >>>>>>>>>>> what's the suggested/up-to-date way to implement SPL? Also regarding code >>>>>>>>>>> flow? >>>>>>>>>> >>>>>>>>>> So, SPL is where things get, ahem, fuzzy. While I don't want to >>>>>>>>>> encourage boundless growth in U-Boot proper, we aren't exactly size >>>>>>>>>> constrained (but rather, functional/logical constrained). But in SPL, >>>>>>>>>> yes, we have many platforms with 32/64/128 kilobyte hard limits (and >>>>>>>>>> some smaller) and we can't always shove in a "TPL" before SPL either. >>>>>>>>>> So in SPL we do make use of platform data instead. While not the >>>>>>>>>> smallest size constraint, am335x_hs_evm is a reasonable thing to look at >>>>>>>>>> in this case. >>>>>>>>> >>>>>>>>> Also 'rock' uses CONFIG_OF_PLATDATA which provides a halfway house - >>>>>>>>> still uses DT, but it gets converted into C structs so saves code >>>>>>>>> space. >>>>>>>>> >>>>>>>>> firefly-rk3288 is a pretty good DM/DT example, including SPL. >>>>>>>> >>>>>>>> I've currently got an issue on socfpga gen5 that could be solved best >>>>>>>> by enabling CONFIG_OF_EMBED (mixing const and non-const sections is a >>>>>>>> problem for CRC calculation). However, it could probably also solve by >>>>>>>> using platform data (but that doesn't work out of the box, yet). The >>>>>>>> problem with CONFIG_OF_EMBED is that I think it's OK to enable this >>>>>>>> for SPL but I don't like enabling it for U-Boot, so: >>>>>>>> >>>>>>>> Would it make sense to duplicate the whole "Provider of DTB for OF >>>>>>>> control" choice so that it can be OF_EMBED for SPL but different for >>>>>>>> U-Boot? Or does it make more sense to convert socfpga gen5 to use >>>>>>>> OF_PLATDATA? >>>>>>> >>>>>>> We should not be using OF_EMBED in in-tree boards or production code. >>>>>> >>>>>> What's the reason for this? I can understand this for U-Boot, and I >>>>>> can understand that it's at least theoretically a bit cleaner for SPL, >>>>>> too. But there are some drawbacks when doing this in SPL where code is >>>>>> not relocated: >>>>>> - you lose the ability to check total size in linker file (which is >>>>>> bad for size-constrained platforms: sometimes you notice failure only >>>>>> when booting) >>>>> >>>>> You can add an SPL size check in Makefile.spl if you like. >>>> >>>> That might be required, yes. >>>> >>>>>> - you get an inconsistent memory layout regarding read/write: the >>>>>> linker places bss at the end but then, DTB follows as const data >>>>> >>>>> This should be handled by the $(SPL-BIN)-pad.bin file (or by binman if >>>>> you are using that). >>>> >>>> I don't understand that. How does the padding help? I have these >>>> sections (roughly): >>>> - text: readonly >>>> - bss: writable >>>> - DTB: readonly, added as post build step after linking >>>> >>>> How does $(SPL-BIN)-pad.bin help? >>> >>> It covers over the BSS section so that the image ends where the DTB >>> starts, thus fixing the addressing issue you mentioned. It allows you >>> to do this: >>> >>> cat u-boot-spl-nodtb.bin u-boot-spl.dtn >-u-boot-spl.bin >>> >>>> >>>>>> - binary size "on disk" grows due to this inconsistent memory layout >>>>>> (since the flat binary includes the DTB, it needs to include the >>>>>> zeroed-out bss, too) >>>>> >>>>> Right, but this is a few bytes. Why does it matter? >>>>> >>>>>> - "spl/u-boot-spl.hex" created by the default Makefiles does not seem >>>>>> to include the DTB >>>>> >>>>> That might just be a bug. >>>> >>>> It might, yes. The hex file is currently built from the elf file, so >>>> there's no DTB in there. >>> >>> OK. Could be worth a patch. >>> >>>> >>>>>> >>>>>>> Can you please explain the issue a bit more? >>>>>> >>>>>> Of course: socfpga gen5 has a feature where the boot rom can jump to >>>>>> SPL in SRAM on warm boot. To ensure SPL is still valid after a reboot, >>>>>> the boot rom can check its consistency by calculating a CRC over one >>>>>> specified range in SRAM. On first boot, SPL stores its start, length >>>>>> and CRC value to special registers for the boot rom. Since the >>>>>> contents of bss changes while SPL is running, bss cannot be included >>>>>> in this CRC range. (Same goes for the '.data' region, but it's >>>>>> possible to build SPL without actually using it.) >>>>> >>>>> How about calculating that checksum at build time instead? You could >>>>> use binman to do that. >>>>> >>>>>> >>>>>> So to ensure the DTB is untouched, I have to make sure it has a lower >>>>>> address than the bss section. Using OF_EMBED does this for me. And I >>>>>> expect using platform data would work too. Do you have another idea >>>>>> how to achieve my goal of combining all write-only sections in SPL >>>>>> into one block? >>>>> >>>>> Yes, do it at build time. Or calculate your CRC before you write any >>>>> BSS variables. >>>> >>>> Creating the correct checksum is not the point. I can do that before using bss. >>>> >>>> The problem is that on the next boot, this checksum is not valid any >>>> more because bss might have changed. >>> >>> Right, but just skip the BSS section when checksumming - i.e. checksum >>> the code and then the DT but omit the BSS. >> >> Yeah, well, good idea but that's not possible. The boot rom checks this >> checksum on warm restart and it can only check the CRC of one block. And >> of course I canno change the boot rom. >> >> So the only option I have without using OF_EMBED is to drop the CRC of >> the DT, which is not really an option... > > Really it sounds like you want to move the BSS after the DT. We don't > have a way of doing that at present. > > But I suppose it would be easy enough to arrange, by putting a > placeholder for the DT in the link script. We just need a variable > which holds the DT size and then can use '. = . + DT_SIZE' to reserve > the space. That's a good idea. I might try that as soon as I find the time to continue working on that boot-crc issue. Thanks, Simon > > Regards, > Simon > >> >> Regards, >> Simon >> >>>>>> Oh, and I currently count 109 defconfig files containing "OF_EMBED", >>>>>> so I wasn't aware that this should not be used. Maybe these platforms >>>>>> have similar reasons like I have and would enable OF_EMBED only for >>>>>> SPL if they could. At least for socfpga_stratix10 that should work. >>>>> >>>>> That is very bad news. I'll see about adding a Makefile warning. >>>> >>>> OK. Looking forward to the discussion that starts then :-) >>> >>> Yes... >>> >>> Regards, >>> Simon >>> >> ^ permalink raw reply [flat|nested] 22+ messages in thread
* [U-Boot] [PATCH 66/93] arm: Remove ot1200 board 2018-11-22 9:25 ` Christian Gmeiner 2018-11-22 12:52 ` Tom Rini @ 2018-11-23 0:33 ` Fabio Estevam 1 sibling, 0 replies; 22+ messages in thread From: Fabio Estevam @ 2018-11-23 0:33 UTC (permalink / raw) To: u-boot Hi Christian, On Thu, Nov 22, 2018 at 11:00 AM Christian Gmeiner <christian.gmeiner@gmail.com> wrote: > As the board is still mainted I will NAK it for the moment. Are there > any hints want needs to be done > to port thie board over to new DM stuff? There are some imx boards that use DM: git grep CONFIG_OF_CONTROL configs/ | grep mx You can use them as a reference for converting ot1200. Regards, Fabio Estevam ^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2018-12-05 16:11 UTC | newest]
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[not found] <b6be0e31-09f2-7af0-221e-3d84c15a5519@gmail.com>
2018-11-22 19:48 ` [U-Boot] [PATCH 66/93] arm: Remove ot1200 board Simon Goldschmidt
2018-11-19 15:52 [U-Boot] [PATCH 00/93] dm: Move towards completing CONFIG_BLK migration Simon Glass
2018-11-19 15:53 ` [U-Boot] [PATCH 66/93] arm: Remove ot1200 board Simon Glass
2018-11-22 9:25 ` Christian Gmeiner
2018-11-22 12:52 ` Tom Rini
2018-11-22 13:24 ` Marek Vasut
2018-11-22 13:28 ` Tom Rini
2018-11-22 13:30 ` Marek Vasut
2018-11-22 13:32 ` Tom Rini
2018-11-22 13:40 ` Marek Vasut
2018-11-22 14:44 ` Simon Goldschmidt
2018-11-22 17:01 ` Tom Rini
2018-11-22 20:50 ` Simon Glass
2018-11-25 21:09 ` Simon Goldschmidt
2018-11-26 3:00 ` Simon Glass
2018-11-26 6:05 ` Simon Goldschmidt
2018-12-05 13:21 ` Simon Glass
2018-12-05 13:38 ` Simon Goldschmidt
2018-12-05 13:54 ` Simon Glass
2018-12-05 14:16 ` Simon Goldschmidt
2018-12-05 15:55 ` Simon Glass
2018-12-05 16:11 ` Simon Goldschmidt
2018-11-23 0:33 ` Fabio Estevam
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