* [Qemu-devel] [PATCH 01/20] [MIPS] cpu: add a init inplace method
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 02/20] [MIPS] cpu: convert to qdev Hervé Poussineau
` (19 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
target-mips/cpu.h | 1 +
target-mips/translate.c | 16 ++++++++++++----
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index b8e6fee..b75e1e6 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -586,6 +586,7 @@ enum {
int cpu_mips_exec(CPUMIPSState *s);
CPUMIPSState *cpu_mips_init(const char *cpu_model);
+int cpu_mips_init_inplace(CPUMIPSState *env, const char *cpu_model);
//~ uint32_t cpu_mips_get_clock (void);
int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 20b66a8..558f6ac 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12580,15 +12580,13 @@ static void mips_tcg_init(void)
#include "translate_init.c"
-CPUMIPSState *cpu_mips_init (const char *cpu_model)
+int cpu_mips_init_inplace(CPUMIPSState *env, const char *cpu_model)
{
- CPUMIPSState *env;
const mips_def_t *def;
def = cpu_mips_find_by_name(cpu_model);
if (!def)
- return NULL;
- env = qemu_mallocz(sizeof(CPUMIPSState));
+ return -1;
env->cpu_model = def;
env->cpu_model_str = cpu_model;
@@ -12601,6 +12599,16 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model)
mips_tcg_init();
cpu_reset(env);
qemu_init_vcpu(env);
+ return 0;
+}
+
+CPUMIPSState *cpu_mips_init (const char *cpu_model)
+{
+ CPUMIPSState *env;
+
+ env = qemu_mallocz(sizeof(CPUMIPSState));
+ if (!cpu_mips_init_inplace(env, cpu_model))
+ return NULL;
return env;
}
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 02/20] [MIPS] cpu: convert to qdev
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 01/20] [MIPS] cpu: add a init inplace method Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 03/20] [MIPS] Jazz emulation: create a qdev cpu Hervé Poussineau
` (18 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Add a qdev device representing a whole MIPS CPU, ie the core, the interrupt controller, and the timer.
Export a qdev bus, so other devices can use MIPS CPU interrupts
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mips_cpudevs.h | 4 ++
hw/mips_int.c | 81 +++++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 85 insertions(+), 0 deletions(-)
diff --git a/hw/mips_cpudevs.h b/hw/mips_cpudevs.h
index db82b41..495b3fd 100644
--- a/hw/mips_cpudevs.h
+++ b/hw/mips_cpudevs.h
@@ -1,5 +1,7 @@
#ifndef HW_MIPS_CPUDEVS_H
#define HW_MIPS_CPUDEVS_H
+#include "qdev.h"
+
/* Definitions for MIPS CPU internal devices. */
/* mips_addr.c */
@@ -8,6 +10,8 @@ uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
/* mips_int.c */
void cpu_mips_irq_init_cpu(CPUState *env);
+BusState *cpu_mips_init_cpu(const char *model);
+void cpu_mips_register(DeviceInfo *info);
/* mips_timer.c */
void cpu_mips_clock_init(CPUState *);
diff --git a/hw/mips_int.c b/hw/mips_int.c
index 477f6ab..8e868be 100644
--- a/hw/mips_int.c
+++ b/hw/mips_int.c
@@ -22,6 +22,7 @@
#include "hw.h"
#include "mips_cpudevs.h"
+#include "sysbus.h"
#include "cpu.h"
static void cpu_mips_irq_request(void *opaque, int irq, int level)
@@ -63,3 +64,83 @@ void cpu_mips_soft_irq(CPUState *env, int irq, int level)
qemu_set_irq(env->irq[irq], level);
}
+
+typedef struct CPUMIPS
+{
+ SysBusDevice busdev;
+ BusState qbus;
+ char *model;
+ CPUState state;
+} CPUMIPS;
+
+static void cpu_mips_irq_request1(void *opaque, int irq, int level)
+{
+ CPUMIPS *s = FROM_SYSBUS(CPUMIPS, sysbus_from_qdev(opaque));
+ CPUState *env = &s->state;
+ cpu_mips_irq_request(env, irq, level);
+}
+
+static void cpu_device_reset(DeviceState *d)
+{
+ CPUMIPS *s = FROM_SYSBUS(CPUMIPS, sysbus_from_qdev(d));
+ cpu_reset(&s->state);
+}
+
+static struct BusInfo cpu_bus_info = {
+ .name = "cpu",
+ .size = 0,
+};
+
+void cpu_mips_register(DeviceInfo *info)
+{
+ info->bus_info = &cpu_bus_info;
+ qdev_register(info);
+}
+
+static int cpu_device_init(SysBusDevice *dev)
+{
+ CPUMIPS* cpu = FROM_SYSBUS(CPUMIPS, dev);
+
+ if (cpu_mips_init_inplace(&cpu->state, cpu->model) < 0)
+ return -1;
+
+ cpu_mips_clock_init(&cpu->state);
+
+ qbus_create_inplace(&cpu->qbus, &cpu_bus_info, &dev->qdev, NULL);
+ qdev_init_gpio_in(cpu->qbus.parent, cpu_mips_irq_request1, 8);
+ return 0;
+}
+
+static SysBusDeviceInfo cpu_device_info = {
+ .qdev.name = "cpu-mips",
+ .qdev.size = sizeof(CPUMIPS),
+ .qdev.reset = cpu_device_reset,
+ .init = cpu_device_init,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_STRING("model", CPUMIPS, model),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
+static void mips_register_devices(void)
+{
+ sysbus_register_withprop(&cpu_device_info);
+}
+
+device_init(mips_register_devices)
+
+BusState *cpu_mips_init_cpu(const char *cpu_model)
+{
+ DeviceState *dev;
+
+ dev = qdev_create(NULL, "cpu-mips");
+ if (!dev) {
+ return NULL;
+ }
+ qdev_prop_set_string(dev, "model", qemu_strdup(cpu_model));
+ if (qdev_init(dev) < 0) {
+ return NULL;
+ }
+ return &container_of(dev, CPUMIPS, busdev.qdev)->qbus;
+}
+
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 03/20] [MIPS] Jazz emulation: create a qdev cpu
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 01/20] [MIPS] cpu: add a init inplace method Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 02/20] [MIPS] cpu: convert to qdev Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 04/20] [MIPS] rc4030: convert to qdev Hervé Poussineau
` (17 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mips_jazz.c | 21 +++++----------------
1 files changed, 5 insertions(+), 16 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 71b05a2..78ef8f0 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -43,12 +43,6 @@ enum jazz_model_e
JAZZ_PICA61,
};
-static void main_cpu_reset(void *opaque)
-{
- CPUState *env = opaque;
- cpu_reset(env);
-}
-
static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr)
{
return cpu_inw(0x71);
@@ -128,7 +122,7 @@ void mips_jazz_init (ram_addr_t ram_size,
{
char *filename;
int bios_size, n;
- CPUState *env;
+ BusState *cpu;
qemu_irq *rc4030, *i8259;
rc4030_dma *dmas;
void* rc4030_opaque;
@@ -150,12 +144,11 @@ void mips_jazz_init (ram_addr_t ram_size,
cpu_model = "24Kf";
#endif
}
- env = cpu_init(cpu_model);
- if (!env) {
+ cpu = cpu_mips_init_cpu(cpu_model);
+ if (!cpu) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
- qemu_register_reset(main_cpu_reset, env);
/* allocate RAM */
ram_offset = qemu_ram_alloc(NULL, "mips_jazz.ram", ram_size);
@@ -184,17 +177,13 @@ void mips_jazz_init (ram_addr_t ram_size,
exit(1);
}
- /* Init CPU internal devices */
- cpu_mips_irq_init_cpu(env);
- cpu_mips_clock_init(env);
-
/* Chipset */
- rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas);
+ rc4030_opaque = rc4030_init(qdev_get_gpio_in(cpu->parent, 6), qdev_get_gpio_in(cpu->parent, 3), &rc4030, &dmas);
s_dma_dummy = cpu_register_io_memory(dma_dummy_read, dma_dummy_write, NULL);
cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy);
/* ISA devices */
- i8259 = i8259_init(env->irq[4]);
+ i8259 = i8259_init(qdev_get_gpio_in(cpu->parent, 4));
isa_bus_new(NULL);
isa_bus_irqs(i8259);
cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 04/20] [MIPS] rc4030: convert to qdev
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (2 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 03/20] [MIPS] Jazz emulation: create a qdev cpu Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 05/20] Add a stub for some rc4030 functions, if rc4030 support is not compiled in Hervé Poussineau
` (16 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
rc4030_init() function will be removed later, once all rc4030 devices are converted to qdev
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mips.h | 9 ---
hw/mips_jazz.c | 3 +-
hw/rc4030.c | 170 +++++++++++++++++++++++++++++++++++++++++++++++++++-----
hw/rc4030.h | 41 ++++++++++++++
4 files changed, 199 insertions(+), 24 deletions(-)
create mode 100644 hw/rc4030.h
diff --git a/hw/mips.h b/hw/mips.h
index 617ea10..55fb701 100644
--- a/hw/mips.h
+++ b/hw/mips.h
@@ -23,15 +23,6 @@ void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
/* jazz_led.c */
extern void jazz_led_init(target_phys_addr_t base);
-/* rc4030.c */
-typedef struct rc4030DMAState *rc4030_dma;
-void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
-void rc4030_dma_read(void *dma, uint8_t *buf, int len);
-void rc4030_dma_write(void *dma, uint8_t *buf, int len);
-
-void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
- qemu_irq **irqs, rc4030_dma **dmas);
-
/* dp8393x.c */
void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
qemu_irq irq, void* mem_opaque,
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 78ef8f0..c000fd3 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -36,6 +36,7 @@
#include "mips-bios.h"
#include "loader.h"
#include "mc146818rtc.h"
+#include "rc4030.h"
enum jazz_model_e
{
@@ -178,7 +179,7 @@ void mips_jazz_init (ram_addr_t ram_size,
}
/* Chipset */
- rc4030_opaque = rc4030_init(qdev_get_gpio_in(cpu->parent, 6), qdev_get_gpio_in(cpu->parent, 3), &rc4030, &dmas);
+ rc4030_opaque = rc4030_init(cpu, &rc4030, &dmas);
s_dma_dummy = cpu_register_io_memory(dma_dummy_read, dma_dummy_write, NULL);
cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy);
diff --git a/hw/rc4030.c b/hw/rc4030.c
index 2231373..3c8cdfa 100644
--- a/hw/rc4030.c
+++ b/hw/rc4030.c
@@ -23,8 +23,12 @@
*/
#include "hw.h"
-#include "mips.h"
+#include "monitor.h"
#include "qemu-timer.h"
+#include "rc4030.h"
+
+/* As long as we can't include mips_cpudevs.h ... */
+void cpu_mips_register(DeviceInfo *info);
/********************************************************/
/* debug rc4030 */
@@ -47,6 +51,13 @@ do { fprintf(stderr, "rc4030 ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } whi
/********************************************************/
/* rc4030 emulation */
+struct RC4030Bus {
+ BusState qbus;
+ rc4030_dma *dmas;
+ uint32_t assigned;
+};
+static RC4030Bus *rc4030bus;
+
typedef struct dma_pagetable_entry {
int32_t frame;
int32_t owner;
@@ -65,6 +76,9 @@ typedef struct dma_pagetable_entry {
typedef struct rc4030State
{
+ DeviceState busdev;
+ RC4030Bus bus;
+
uint32_t config; /* 0x0000: RC4030 config register */
uint32_t revision; /* 0x0008: RC4030 Revision register */
uint32_t invalid_address_register; /* 0x0010: Invalid Address register */
@@ -461,7 +475,8 @@ static void update_jazz_irq(rc4030State *s)
static void rc4030_irq_jazz_request(void *opaque, int irq, int level)
{
- rc4030State *s = opaque;
+ DeviceState *dev = opaque;
+ rc4030State *s = container_of(dev, rc4030State, busdev);
if (level) {
s->isr_jazz |= 1 << irq;
@@ -585,9 +600,9 @@ static CPUWriteMemoryFunc * const jazzio_write[3] = {
jazzio_writel,
};
-static void rc4030_reset(void *opaque)
+static void rc4030_reset(DeviceState *d)
{
- rc4030State *s = opaque;
+ rc4030State *s = container_of(d, rc4030State, busdev);
int i;
s->config = 0x410; /* some boards seem to accept 0x104 too */
@@ -797,29 +812,156 @@ static rc4030_dma *rc4030_allocate_dmas(void *opaque, int n)
return s;
}
-void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
- qemu_irq **irqs, rc4030_dma **dmas)
+void *rc4030_get_opaque(void)
{
rc4030State *s;
+
+ if (!rc4030bus) {
+ hw_error("Tried to get rc4030 pointer with no rc4030 bus present.\n");
+ }
+ s = container_of(rc4030bus, rc4030State, bus);
+
+ return s;
+}
+
+rc4030_dma rc4030_get_dma(int dma)
+{
+ if (!rc4030bus) {
+ hw_error("Tried to get rc4030 dma channel %d with no rc4030 bus present.\n",
+ dma);
+ }
+ return rc4030bus->dmas[dma];
+}
+
+static void rc4030bus_dev_print(Monitor *mon, DeviceState *dev, int indent)
+{
+ RC4030Device *d = DO_UPCAST(RC4030Device, qdev, dev);
+
+ if (d->rc4030irq[1] != -1) {
+ monitor_printf(mon, "%*src4030 irqs %d,%d\n", indent, "",
+ d->rc4030irq[0], d->rc4030irq[1]);
+ } else if (d->rc4030irq[0] != -1) {
+ monitor_printf(mon, "%*src4030 irq %d\n", indent, "",
+ d->rc4030irq[0]);
+ }
+}
+
+static struct BusInfo rc4030_bus_info = {
+ .name = "rc4030",
+ .size = sizeof(RC4030Bus),
+ .print_dev = rc4030bus_dev_print,
+};
+
+static int rc4030_init1(DeviceState *dev, DeviceInfo *base)
+{
+ rc4030State *s = container_of(dev, rc4030State, busdev);
int s_chipset, s_jazzio;
- s = qemu_mallocz(sizeof(rc4030State));
+ if (rc4030bus) {
+ return 1;
+ }
- *irqs = qemu_allocate_irqs(rc4030_irq_jazz_request, s, 16);
- *dmas = rc4030_allocate_dmas(s, 4);
+ qbus_create_inplace(&s->bus.qbus, &rc4030_bus_info, dev, NULL);
+ qdev_init_gpio_in(dev, rc4030_irq_jazz_request, 16);
+ s->bus.dmas = rc4030_allocate_dmas(s, 4);
s->periodic_timer = qemu_new_timer(vm_clock, rc4030_periodic_timer, s);
- s->timer_irq = timer;
- s->jazz_bus_irq = jazz_bus;
+ s->timer_irq = qdev_get_gpio_in(qdev_get_parent_bus(dev)->parent, 6);
+ s->jazz_bus_irq = qdev_get_gpio_in(qdev_get_parent_bus(dev)->parent, 3);
- qemu_register_reset(rc4030_reset, s);
register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, s);
- rc4030_reset(s);
s_chipset = cpu_register_io_memory(rc4030_read, rc4030_write, s);
cpu_register_physical_memory(0x80000000, 0x300, s_chipset);
s_jazzio = cpu_register_io_memory(jazzio_read, jazzio_write, s);
cpu_register_physical_memory(0xf0000000, 0x00001000, s_jazzio);
- return s;
+ rc4030bus = &s->bus;
+
+ return 0;
+}
+
+void rc4030_init_irq(RC4030Device *dev, qemu_irq *p, int rc4030irq)
+{
+ assert(dev->nirqs < ARRAY_SIZE(dev->rc4030irq));
+ if (rc4030bus->assigned & (1 << rc4030irq)) {
+ RC4030_ERROR("rc4030 irq %d already assigned\n", rc4030irq);
+ exit(1);
+ }
+ rc4030bus->assigned |= (1 << rc4030irq);
+ dev->rc4030irq[dev->nirqs] = rc4030irq;
+ *p = qdev_get_gpio_in(rc4030bus->qbus.parent, rc4030irq);
+ dev->nirqs++;
}
+
+static int rc4030_qdev_init(DeviceState *qdev, DeviceInfo *base)
+{
+ RC4030Device *dev = DO_UPCAST(RC4030Device, qdev, qdev);
+ RC4030DeviceInfo *info = DO_UPCAST(RC4030DeviceInfo, qdev, base);
+
+ dev->rc4030irq[0] = -1;
+ dev->rc4030irq[1] = -1;
+
+ return info->init(dev);
+}
+
+void rc4030_qdev_register(RC4030DeviceInfo *info)
+{
+ info->qdev.init = rc4030_qdev_init;
+ info->qdev.bus_info = &rc4030_bus_info;
+ qdev_register(&info->qdev);
+}
+
+RC4030Device *rc4030_create(const char *name)
+{
+ DeviceState *dev;
+
+ if (!rc4030bus) {
+ hw_error("Tried to create rc4030 device %s with no rc4030 bus present.\n",
+ name);
+ }
+ dev = qdev_create(&rc4030bus->qbus, name);
+ return DO_UPCAST(RC4030Device, qdev, dev);
+}
+
+RC4030Device *rc4030_create_simple(const char *name)
+{
+ RC4030Device *dev;
+
+ dev = rc4030_create(name);
+ qdev_init_nofail(&dev->qdev);
+ return dev;
+}
+
+extern struct BusInfo cpu_bus_info;
+static DeviceInfo rc4030_info = {
+ .name = "rc4030",
+ .size = sizeof(rc4030State),
+ .reset = rc4030_reset,
+ .init = rc4030_init1,
+};
+
+static void rc4030_register_devices(void)
+{
+ cpu_mips_register(&rc4030_info);
+}
+
+device_init(rc4030_register_devices)
+
+void *rc4030_init(BusState *bus,
+ qemu_irq **irqs, rc4030_dma **dmas)
+{
+ DeviceState *dev;
+ rc4030State* rc4030;
+
+ dev = qdev_create(bus, "rc4030");
+ qdev_init_nofail(dev);
+
+ rc4030 = DO_UPCAST(rc4030State, busdev, dev);
+
+ *irqs = rc4030->busdev.gpio_in;
+ *dmas = rc4030->bus.dmas;
+
+ return rc4030;
+}
+
diff --git a/hw/rc4030.h b/hw/rc4030.h
new file mode 100644
index 0000000..58522f3
--- /dev/null
+++ b/hw/rc4030.h
@@ -0,0 +1,41 @@
+#ifndef HW_RC4030_H
+#define HW_RC4030_H
+
+/* RC4030 bus */
+
+#include "qdev.h"
+
+typedef struct RC4030Bus RC4030Bus;
+typedef struct RC4030Device RC4030Device;
+typedef struct RC4030DeviceInfo RC4030DeviceInfo;
+
+struct RC4030Device {
+ DeviceState qdev;
+ uint32_t rc4030irq[2];
+ int nirqs;
+};
+
+typedef int (*rc4030_qdev_initfn)(RC4030Device *dev);
+struct RC4030DeviceInfo {
+ DeviceInfo qdev;
+ rc4030_qdev_initfn init;
+};
+
+void rc4030_init_irq(RC4030Device *dev, qemu_irq *p, int rc4030irq);
+void rc4030_qdev_register(RC4030DeviceInfo *info);
+RC4030Device *rc4030_create(const char *name);
+RC4030Device *rc4030_create_simple(const char *name);
+
+typedef struct rc4030DMAState *rc4030_dma;
+void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
+void rc4030_dma_read(void *dma, uint8_t *buf, int len);
+void rc4030_dma_write(void *dma, uint8_t *buf, int len);
+
+void *rc4030_get_opaque(void);
+rc4030_dma rc4030_get_dma(int dma);
+
+/* Non-qdev compatibility stuff... */
+void *rc4030_init(BusState *parent,
+ qemu_irq **irqs, rc4030_dma **dmas);
+
+#endif
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 05/20] Add a stub for some rc4030 functions, if rc4030 support is not compiled in.
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (3 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 04/20] [MIPS] rc4030: convert to qdev Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 06/20] [MIPS] qdev: convert i8042 to rc4030 device Hervé Poussineau
` (15 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Will be used by next commits, when rc4030 devices will be converted to qdev
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
arch_init.c | 21 +++++++++++++++++++++
1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 47bb4b2..67b8d83 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -40,6 +40,7 @@
#include "net.h"
#include "gdbstub.h"
#include "hw/smbios.h"
+#include "hw/rc4030.h"
#ifdef TARGET_SPARC
int graphic_width = 1024;
@@ -640,3 +641,23 @@ int xen_available(void)
return 0;
#endif
}
+
+#ifndef TARGET_MIPS
+void rc4030_init_irq(RC4030Device *dev, qemu_irq *p, int rc4030irq)
+{
+}
+
+void rc4030_qdev_register(RC4030DeviceInfo *info)
+{
+}
+
+RC4030Device *rc4030_create(const char *name)
+{
+ return NULL;
+}
+
+RC4030Device *rc4030_create_simple(const char *name)
+{
+ return NULL;
+}
+#endif
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 06/20] [MIPS] qdev: convert i8042 to rc4030 device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (4 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 05/20] Add a stub for some rc4030 functions, if rc4030 support is not compiled in Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 07/20] [MIPS] qdev: convert parallel port " Hervé Poussineau
` (14 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Remove i8042_mm_init() function, which is not used anymore
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mips_jazz.c | 2 +-
hw/pc.h | 3 --
hw/pckbd.c | 65 ++++++++++++++++++++++++++++++++++++++-----------------
3 files changed, 46 insertions(+), 24 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index c000fd3..9663a3c 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -252,7 +252,7 @@ void mips_jazz_init (ram_addr_t ram_size,
cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
/* Keyboard (i8042) */
- i8042_mm_init(rc4030[6], rc4030[7], 0x80005000, 0x1000, 0x1);
+ rc4030_create_simple("rc4030-i8042");
/* Serial ports */
if (serial_hds[0]) {
diff --git a/hw/pc.h b/hw/pc.h
index 63b0249..e078fd9 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -74,9 +74,6 @@ void *vmmouse_init(void *m);
/* pckbd.c */
void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
-void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
- target_phys_addr_t base, ram_addr_t size,
- target_phys_addr_t mask);
void i8042_isa_mouse_fake_event(void *opaque);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
diff --git a/hw/pckbd.c b/hw/pckbd.c
index 0533b1d..c422a78 100644
--- a/hw/pckbd.c
+++ b/hw/pckbd.c
@@ -26,6 +26,8 @@
#include "pc.h"
#include "ps2.h"
#include "sysemu.h"
+#include "rc4030.h"
+#include "qdev-addr.h"
/* debug PC keyboard */
//#define DEBUG_KBD
@@ -407,26 +409,6 @@ static CPUWriteMemoryFunc * const kbd_mm_write[] = {
&kbd_mm_writeb,
};
-void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
- target_phys_addr_t base, ram_addr_t size,
- target_phys_addr_t mask)
-{
- KBDState *s = qemu_mallocz(sizeof(KBDState));
- int s_io_memory;
-
- s->irq_kbd = kbd_irq;
- s->irq_mouse = mouse_irq;
- s->mask = mask;
-
- vmstate_register(NULL, 0, &vmstate_kbd, s);
- s_io_memory = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s);
- cpu_register_physical_memory(base, size, s_io_memory);
-
- s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
- s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
- qemu_register_reset(kbd_reset, s);
-}
-
typedef struct ISAKBDState {
ISADevice dev;
KBDState kbd;
@@ -486,8 +468,51 @@ static ISADeviceInfo i8042_info = {
.init = i8042_initfn,
};
+typedef struct RC4030KBDState {
+ RC4030Device dev;
+ target_phys_addr_t iobase;
+ uint32_t size;
+ uint32_t irq_kbd;
+ uint32_t irq_aux;
+ KBDState kbd;
+} RC4030KBDState;
+
+static int i8042_rc4030_initfn(RC4030Device *dev)
+{
+ RC4030KBDState *rc4030 = DO_UPCAST(RC4030KBDState, dev, dev);
+ KBDState *s = &rc4030->kbd;
+ int s_io;
+
+ rc4030_init_irq(dev, &s->irq_kbd, rc4030->irq_kbd);
+ rc4030_init_irq(dev, &s->irq_mouse, rc4030->irq_aux);
+
+ s_io = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s);
+ cpu_register_physical_memory(rc4030->iobase, rc4030->size, s_io);
+
+ s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
+ s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
+ qemu_register_reset(kbd_reset, s);
+
+ return 0;
+}
+
+static RC4030DeviceInfo i8042_rc4030_info = {
+ .qdev.name = "rc4030-i8042",
+ .qdev.size = sizeof(RC4030KBDState),
+ .init = i8042_rc4030_initfn,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", RC4030KBDState, iobase, 0x80005000),
+ DEFINE_PROP_HEX32("size", RC4030KBDState, size, 0x1000),
+ DEFINE_PROP_TADDR("mask", RC4030KBDState, kbd.mask, 0x1),
+ DEFINE_PROP_UINT32("irq_kbd", RC4030KBDState, irq_kbd, 6),
+ DEFINE_PROP_UINT32("irq_aux", RC4030KBDState, irq_aux, 7),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
static void i8042_register(void)
{
isa_qdev_register(&i8042_info);
+ rc4030_qdev_register(&i8042_rc4030_info);
}
device_init(i8042_register)
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 07/20] [MIPS] qdev: convert parallel port to rc4030 device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (5 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 06/20] [MIPS] qdev: convert i8042 to rc4030 device Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 08/20] [MIPS] qdev: convert serial " Hervé Poussineau
` (13 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Remove parallel_mm_init() function, which is not used anymore
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mips_jazz.c | 5 ++-
hw/parallel.c | 58 +++++++++++++++++++++++++++++++++++++++++++++----------
hw/pc.h | 2 +-
3 files changed, 51 insertions(+), 14 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 9663a3c..a027559 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -271,8 +271,9 @@ void mips_jazz_init (ram_addr_t ram_size,
}
/* Parallel port */
- if (parallel_hds[0])
- parallel_mm_init(0x80008000, 0, rc4030[0], parallel_hds[0]);
+ if (parallel_hds[0]) {
+ parallel_rc4030_init(parallel_hds[0]);
+ }
/* Sound card */
/* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
diff --git a/hw/parallel.c b/hw/parallel.c
index 6b11672..cb36fba 100644
--- a/hw/parallel.c
+++ b/hw/parallel.c
@@ -27,6 +27,8 @@
#include "isa.h"
#include "pc.h"
#include "sysemu.h"
+#include "rc4030.h"
+#include "qdev-addr.h"
//#define DEBUG_PARALLEL
@@ -87,6 +89,13 @@ typedef struct ISAParallelState {
ParallelState state;
} ISAParallelState;
+typedef struct RC4030ParallelState {
+ RC4030Device dev;
+ target_phys_addr_t iobase;
+ uint32_t irq;
+ ParallelState state;
+} RC4030ParallelState;
+
static void parallel_update_irq(ParallelState *s)
{
if (s->irq_pending)
@@ -446,6 +455,12 @@ static void parallel_reset(void *opaque)
s->last_read_offset = ~0U;
}
+static void parallel_rc4030_reset(DeviceState *d)
+{
+ RC4030ParallelState *rc4030 = container_of(d, RC4030ParallelState, dev.qdev);
+ parallel_reset(&rc4030->state);
+}
+
static const int isa_parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
static int parallel_isa_initfn(ISADevice *dev)
@@ -565,21 +580,28 @@ static CPUWriteMemoryFunc * const parallel_mm_write_sw[] = {
¶llel_mm_writel,
};
-/* If fd is zero, it means that the parallel device uses the console */
-ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr)
+static int parallel_rc4030_initfn(RC4030Device *dev)
{
- ParallelState *s;
+ RC4030ParallelState *s = container_of(dev, RC4030ParallelState, dev);
int io_sw;
- s = qemu_mallocz(sizeof(ParallelState));
- s->irq = irq;
- s->chr = chr;
- s->it_shift = it_shift;
- qemu_register_reset(parallel_reset, s);
+ rc4030_init_irq(dev, &s->state.irq, s->irq);
+
+ io_sw = cpu_register_io_memory(parallel_mm_read_sw, parallel_mm_write_sw, &s->state);
+ cpu_register_physical_memory(s->iobase, 8, io_sw);
+
+ return 0;
+}
- io_sw = cpu_register_io_memory(parallel_mm_read_sw, parallel_mm_write_sw, s);
- cpu_register_physical_memory(base, 8 << it_shift, io_sw);
- return s;
+ParallelState *parallel_rc4030_init(CharDriverState *chr)
+{
+ RC4030Device *dev;
+
+ dev = rc4030_create("rc4030-parallel");
+ qdev_prop_set_chr(&dev->qdev, "chardev", chr);
+ if (qdev_init(&dev->qdev) < 0)
+ return NULL;
+ return &DO_UPCAST(RC4030ParallelState, dev, dev)->state;
}
static ISADeviceInfo parallel_isa_info = {
@@ -595,9 +617,23 @@ static ISADeviceInfo parallel_isa_info = {
},
};
+static RC4030DeviceInfo parallel_rc4030_info = {
+ .qdev.name = "rc4030-parallel",
+ .qdev.size = sizeof(RC4030ParallelState),
+ .qdev.reset = parallel_rc4030_reset,
+ .init = parallel_rc4030_initfn,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", RC4030ParallelState, iobase, 0x80008000),
+ DEFINE_PROP_UINT32("irq", RC4030ParallelState, irq, 0),
+ DEFINE_PROP_CHR("chardev", RC4030ParallelState, state.chr),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
static void parallel_register_devices(void)
{
isa_qdev_register(¶llel_isa_info);
+ rc4030_qdev_register(¶llel_rc4030_info);
}
device_init(parallel_register_devices)
diff --git a/hw/pc.h b/hw/pc.h
index e078fd9..61b5fbb 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -23,7 +23,7 @@ void serial_set_frequency(SerialState *s, uint32_t frequency);
typedef struct ParallelState ParallelState;
ParallelState *parallel_init(int index, CharDriverState *chr);
-ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
+ParallelState *parallel_rc4030_init(CharDriverState *chr);
/* i8259.c */
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 08/20] [MIPS] qdev: convert serial port to rc4030 device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (6 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 07/20] [MIPS] qdev: convert parallel port " Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 09/20] [MIPS] qdev: convert jazz-led to sysbus device Hervé Poussineau
` (12 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mips_jazz.c | 12 +-------
hw/pc.h | 1 +
hw/serial.c | 78 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 81 insertions(+), 10 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index a027559..1298bc1 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -256,18 +256,10 @@ void mips_jazz_init (ram_addr_t ram_size,
/* Serial ports */
if (serial_hds[0]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 1);
-#else
- serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 0);
-#endif
+ serial_rc4030_init(0, serial_hds[0]);
}
if (serial_hds[1]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 1);
-#else
- serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 0);
-#endif
+ serial_rc4030_init(1, serial_hds[1]);
}
/* Parallel port */
diff --git a/hw/pc.h b/hw/pc.h
index 61b5fbb..f5a479a 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -17,6 +17,7 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
CharDriverState *chr, int ioregister,
int be);
SerialState *serial_isa_init(int index, CharDriverState *chr);
+SerialState *serial_rc4030_init(int index, CharDriverState *chr);
void serial_set_frequency(SerialState *s, uint32_t frequency);
/* parallel.c */
diff --git a/hw/serial.c b/hw/serial.c
index b66d13a..0c13cbb 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -28,6 +28,8 @@
#include "pc.h"
#include "qemu-timer.h"
#include "sysemu.h"
+#include "rc4030.h"
+#include "qdev-addr.h"
//#define DEBUG_SERIAL
@@ -155,6 +157,14 @@ typedef struct ISASerialState {
SerialState state;
} ISASerialState;
+typedef struct RC4030SerialState {
+ RC4030Device dev;
+ uint32_t index;
+ target_phys_addr_t iobase;
+ uint32_t irq;
+ SerialState state;
+} RC4030SerialState;
+
static void serial_receive1(void *opaque, const uint8_t *buf, int size);
static void fifo_clear(SerialState *s, int fifo)
@@ -964,6 +974,59 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
return s;
}
+static const target_phys_addr_t rc4030_serial_io[] = { 0x80006000, 0x80007000 };
+static const uint32_t rc4030_serial_irq[] = { 8, 9 };
+
+static int serial_rc4030_initfn(RC4030Device *dev)
+{
+ static int index;
+ RC4030SerialState *rc4030 = DO_UPCAST(RC4030SerialState, dev, dev);
+ SerialState *s = &rc4030->state;
+ int s_io;
+
+ if (rc4030->index == -1)
+ rc4030->index = index;
+ if (rc4030->index >= ARRAY_SIZE(rc4030_serial_io))
+ return -1;
+ if (rc4030->iobase == -1)
+ rc4030->iobase = rc4030_serial_io[rc4030->index];
+ if (rc4030->irq == -1)
+ rc4030->irq = rc4030_serial_irq[rc4030->index];
+ index++;
+
+ s->baudbase = 8000000 / 16;
+ rc4030_init_irq(dev, &s->irq, rc4030->irq);
+ serial_init_core(s);
+
+ s_io = cpu_register_io_memory(serial_mm_read_le,
+ serial_mm_write_le, s);
+ cpu_register_physical_memory(rc4030->iobase, 8, s_io);
+
+ return 0;
+}
+
+SerialState *serial_rc4030_init(int index, CharDriverState *chr)
+{
+ RC4030Device *dev;
+
+ dev = rc4030_create("rc4030-serial");
+ qdev_prop_set_uint32(&dev->qdev, "index", index);
+ qdev_prop_set_chr(&dev->qdev, "chardev", chr);
+ if (qdev_init(&dev->qdev) < 0)
+ return NULL;
+ return &DO_UPCAST(RC4030SerialState, dev, dev)->state;
+}
+
+static const VMStateDescription vmstate_rc4030_serial = {
+ .name = "serial",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField []) {
+ VMSTATE_STRUCT(state, RC4030SerialState, 0, vmstate_serial, SerialState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static ISADeviceInfo serial_isa_info = {
.qdev.name = "isa-serial",
.qdev.size = sizeof(ISASerialState),
@@ -978,9 +1041,24 @@ static ISADeviceInfo serial_isa_info = {
},
};
+static RC4030DeviceInfo serial_rc4030_info = {
+ .qdev.name = "rc4030-serial",
+ .qdev.size = sizeof(RC4030SerialState),
+ .qdev.vmsd = &vmstate_rc4030_serial,
+ .init = serial_rc4030_initfn,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_UINT32("index", RC4030SerialState, index, -1),
+ DEFINE_PROP_TADDR("iobase", RC4030SerialState, iobase, -1),
+ DEFINE_PROP_UINT32("irq", RC4030SerialState, irq, -1),
+ DEFINE_PROP_CHR("chardev", RC4030SerialState, state.chr),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
static void serial_register_devices(void)
{
isa_qdev_register(&serial_isa_info);
+ rc4030_qdev_register(&serial_rc4030_info);
}
device_init(serial_register_devices)
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 09/20] [MIPS] qdev: convert jazz-led to sysbus device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (7 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 08/20] [MIPS] qdev: convert serial " Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 10/20] [MIPS] Jazz emulation: make video card optional Hervé Poussineau
` (11 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Remove jazz_led_init() function, which is not used anymore
Compile jazz_led.c file only once
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
Makefile.objs | 1 +
Makefile.target | 2 +-
default-configs/mips-softmmu.mak | 1 +
default-configs/mips64-softmmu.mak | 1 +
default-configs/mips64el-softmmu.mak | 1 +
default-configs/mipsel-softmmu.mak | 1 +
hw/jazz_led.c | 58 +++++++++++++++++-----------------
hw/mips.h | 3 --
hw/mips_jazz.c | 4 ++-
9 files changed, 38 insertions(+), 34 deletions(-)
diff --git a/Makefile.objs b/Makefile.objs
index 4a1eaa1..fb25c66 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -231,6 +231,7 @@ hw-obj-$(CONFIG_RC4030) += rc4030.o
hw-obj-$(CONFIG_DP8393X) += dp8393x.o
hw-obj-$(CONFIG_DS1225Y) += ds1225y.o
hw-obj-$(CONFIG_MIPSNET) += mipsnet.o
+hw-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
# Sound
sound-obj-y =
diff --git a/Makefile.target b/Makefile.target
index 8a9c427..6c902b3 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -220,7 +220,7 @@ obj-ppc-$(CONFIG_FDT) += device_tree.o
obj-mips-y = mips_r4k.o mips_jazz.o mips_malta.o mips_mipssim.o
obj-mips-y += mips_addr.o mips_timer.o mips_int.o
obj-mips-y += vga.o i8259.o
-obj-mips-y += g364fb.o jazz_led.o
+obj-mips-y += g364fb.o
obj-mips-y += gt64xxx.o mc146818rtc.o
obj-mips-y += cirrus_vga.o
obj-mips-$(CONFIG_FULONG) += bonito.o vt82c686.o mips_fulong2e.o
diff --git a/default-configs/mips-softmmu.mak b/default-configs/mips-softmmu.mak
index 3d0af83..69bb235 100644
--- a/default-configs/mips-softmmu.mak
+++ b/default-configs/mips-softmmu.mak
@@ -30,3 +30,4 @@ CONFIG_DP8393X=y
CONFIG_DS1225Y=y
CONFIG_MIPSNET=y
CONFIG_PFLASH_CFI01=y
+CONFIG_JAZZ_LED=y
diff --git a/default-configs/mips64-softmmu.mak b/default-configs/mips64-softmmu.mak
index 0030de4..0421bb6 100644
--- a/default-configs/mips64-softmmu.mak
+++ b/default-configs/mips64-softmmu.mak
@@ -30,3 +30,4 @@ CONFIG_DP8393X=y
CONFIG_DS1225Y=y
CONFIG_MIPSNET=y
CONFIG_PFLASH_CFI01=y
+CONFIG_JAZZ_LED=y
diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak
index fa2a3ff..b5d4406 100644
--- a/default-configs/mips64el-softmmu.mak
+++ b/default-configs/mips64el-softmmu.mak
@@ -32,3 +32,4 @@ CONFIG_DS1225Y=y
CONFIG_MIPSNET=y
CONFIG_PFLASH_CFI01=y
CONFIG_FULONG=y
+CONFIG_JAZZ_LED=y
diff --git a/default-configs/mipsel-softmmu.mak b/default-configs/mipsel-softmmu.mak
index 238b73a..0d9a093 100644
--- a/default-configs/mipsel-softmmu.mak
+++ b/default-configs/mipsel-softmmu.mak
@@ -30,3 +30,4 @@ CONFIG_DP8393X=y
CONFIG_DS1225Y=y
CONFIG_MIPSNET=y
CONFIG_PFLASH_CFI01=y
+CONFIG_JAZZ_LED=y
diff --git a/hw/jazz_led.c b/hw/jazz_led.c
index 4cb680c..76af572 100644
--- a/hw/jazz_led.c
+++ b/hw/jazz_led.c
@@ -26,6 +26,8 @@
#include "mips.h"
#include "console.h"
#include "pixel_ops.h"
+#include "sysbus.h"
+#include "qdev-addr.h"
//#define DEBUG_LED
@@ -43,6 +45,10 @@ typedef enum {
} screen_state_t;
typedef struct LedState {
+ SysBusDevice busdev;
+
+ target_phys_addr_t addr;
+ uint32_t size;
uint8_t segments;
DisplayState *ds;
screen_state_t state;
@@ -70,30 +76,18 @@ static uint32_t led_readb(void *opaque, target_phys_addr_t addr)
static uint32_t led_readw(void *opaque, target_phys_addr_t addr)
{
uint32_t v;
-#ifdef TARGET_WORDS_BIGENDIAN
- v = led_readb(opaque, addr) << 8;
- v |= led_readb(opaque, addr + 1);
-#else
v = led_readb(opaque, addr);
v |= led_readb(opaque, addr + 1) << 8;
-#endif
return v;
}
static uint32_t led_readl(void *opaque, target_phys_addr_t addr)
{
uint32_t v;
-#ifdef TARGET_WORDS_BIGENDIAN
- v = led_readb(opaque, addr) << 24;
- v |= led_readb(opaque, addr + 1) << 16;
- v |= led_readb(opaque, addr + 2) << 8;
- v |= led_readb(opaque, addr + 3);
-#else
v = led_readb(opaque, addr);
v |= led_readb(opaque, addr + 1) << 8;
v |= led_readb(opaque, addr + 2) << 16;
v |= led_readb(opaque, addr + 3) << 24;
-#endif
return v;
}
@@ -116,28 +110,16 @@ static void led_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
static void led_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- led_writeb(opaque, addr, (val >> 8) & 0xff);
- led_writeb(opaque, addr + 1, val & 0xff);
-#else
led_writeb(opaque, addr, val & 0xff);
led_writeb(opaque, addr + 1, (val >> 8) & 0xff);
-#endif
}
static void led_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- led_writeb(opaque, addr, (val >> 24) & 0xff);
- led_writeb(opaque, addr + 1, (val >> 16) & 0xff);
- led_writeb(opaque, addr + 2, (val >> 8) & 0xff);
- led_writeb(opaque, addr + 3, val & 0xff);
-#else
led_writeb(opaque, addr, val & 0xff);
led_writeb(opaque, addr + 1, (val >> 8) & 0xff);
led_writeb(opaque, addr + 2, (val >> 16) & 0xff);
led_writeb(opaque, addr + 3, (val >> 24) & 0xff);
-#endif
}
static CPUReadMemoryFunc * const led_read[3] = {
@@ -307,21 +289,39 @@ static void jazz_led_text_update(void *opaque, console_ch_t *chardata)
dpy_update(s->ds, 0, 0, 2, 1);
}
-void jazz_led_init(target_phys_addr_t base)
+static int jazz_led_init(SysBusDevice *dev)
{
- LedState *s;
+ LedState *s = FROM_SYSBUS(LedState, dev);
int io;
- s = qemu_mallocz(sizeof(LedState));
-
s->state = REDRAW_SEGMENTS | REDRAW_BACKGROUND;
io = cpu_register_io_memory(led_read, led_write, s);
- cpu_register_physical_memory(base, 1, io);
+ cpu_register_physical_memory(s->addr, s->size, io);
s->ds = graphic_console_init(jazz_led_update_display,
jazz_led_invalidate_display,
jazz_led_screen_dump,
jazz_led_text_update, s);
qemu_console_resize(s->ds, 60, 80);
+
+ return 0;
+}
+
+static SysBusDeviceInfo jazz_led_device_info = {
+ .qdev.name = "jazz-led",
+ .qdev.size = sizeof(LedState),
+ .init = jazz_led_init,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", LedState, addr, 0x8000f000),
+ DEFINE_PROP_HEX32("size", LedState, size, 0x1000),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
+static void jazz_led_register_devices(void)
+{
+ sysbus_register_withprop(&jazz_led_device_info);
}
+
+device_init(jazz_led_register_devices)
diff --git a/hw/mips.h b/hw/mips.h
index 55fb701..023d85c 100644
--- a/hw/mips.h
+++ b/hw/mips.h
@@ -20,9 +20,6 @@ int g364fb_mm_init(target_phys_addr_t vram_base,
/* mipsnet.c */
void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
-/* jazz_led.c */
-extern void jazz_led_init(target_phys_addr_t base);
-
/* dp8393x.c */
void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
qemu_irq irq, void* mem_opaque,
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 1298bc1..8c3c956 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -124,6 +124,7 @@ void mips_jazz_init (ram_addr_t ram_size,
char *filename;
int bios_size, n;
BusState *cpu;
+ DeviceState *dev;
qemu_irq *rc4030, *i8259;
rc4030_dma *dmas;
void* rc4030_opaque;
@@ -275,7 +276,8 @@ void mips_jazz_init (ram_addr_t ram_size,
ds1225y_init(0x80009000, "nvram");
/* LED indicator */
- jazz_led_init(0x8000f000);
+ dev = qdev_create(NULL, "jazz-led");
+ qdev_init_nofail(dev);
}
static
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 10/20] [MIPS] Jazz emulation: make video card optional
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (8 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 09/20] [MIPS] qdev: convert jazz-led to sysbus device Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 11/20] [MIPS] qdev: convert vga-isa-mm to ISA device Hervé Poussineau
` (10 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mips_jazz.c | 22 ++++++++++++----------
1 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 8c3c956..b737cf3 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -202,16 +202,18 @@ void mips_jazz_init (ram_addr_t ram_size,
isa_mem_base = 0x11000000;
- /* Video card */
- switch (jazz_model) {
- case JAZZ_MAGNUM:
- g364fb_mm_init(0x40000000, 0x60000000, 0, rc4030[3]);
- break;
- case JAZZ_PICA61:
- isa_vga_mm_init(0x40000000, 0x60000000, 0);
- break;
- default:
- break;
+ /* Optional video card */
+ if (vga_interface_type != VGA_NONE) {
+ switch (jazz_model) {
+ case JAZZ_MAGNUM:
+ g364fb_mm_init(0x40000000, 0x60000000, 0, rc4030[3]);
+ break;
+ case JAZZ_PICA61:
+ isa_vga_mm_init(0x40000000, 0x60000000, 0);
+ break;
+ default:
+ break;
+ }
}
/* Network controller */
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 11/20] [MIPS] qdev: convert vga-isa-mm to ISA device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (9 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 10/20] [MIPS] Jazz emulation: make video card optional Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 12/20] [MIPS] qdev: convert g364fb to rc4030 device Hervé Poussineau
` (9 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Remove isa_vga_mm_init() function, which is not used anymore
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mips_jazz.c | 2 +-
hw/pc.h | 2 -
hw/vga-isa-mm.c | 66 ++++++++++++++++++++++++++++++++----------------------
vl.c | 1 +
4 files changed, 41 insertions(+), 30 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index b737cf3..96946e8 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -209,7 +209,7 @@ void mips_jazz_init (ram_addr_t ram_size,
g364fb_mm_init(0x40000000, 0x60000000, 0, rc4030[3]);
break;
case JAZZ_PICA61:
- isa_vga_mm_init(0x40000000, 0x60000000, 0);
+ isa_create_simple("isa-vga-mm");
break;
default:
break;
diff --git a/hw/pc.h b/hw/pc.h
index f5a479a..acfed83 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -154,8 +154,6 @@ extern enum vga_retrace_method vga_retrace_method;
int isa_vga_init(void);
int pci_vga_init(PCIBus *bus,
unsigned long vga_bios_offset, int vga_bios_size);
-int isa_vga_mm_init(target_phys_addr_t vram_base,
- target_phys_addr_t ctrl_base, int it_shift);
/* cirrus_vga.c */
void pci_cirrus_vga_init(PCIBus *bus);
diff --git a/hw/vga-isa-mm.c b/hw/vga-isa-mm.c
index 680b557..82d2e81 100644
--- a/hw/vga-isa-mm.c
+++ b/hw/vga-isa-mm.c
@@ -23,14 +23,17 @@
*/
#include "hw.h"
#include "console.h"
-#include "pc.h"
#include "vga_int.h"
#include "pixel_ops.h"
#include "qemu-timer.h"
+#include "isa.h"
+#include "qdev-addr.h"
typedef struct ISAVGAMMState {
+ ISADevice dev;
+ target_phys_addr_t iobase;
+ target_phys_addr_t vram;
VGACommonState vga;
- int it_shift;
} ISAVGAMMState;
/* Memory mapped interface */
@@ -38,7 +41,7 @@ static uint32_t vga_mm_readb (void *opaque, target_phys_addr_t addr)
{
ISAVGAMMState *s = opaque;
- return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xff;
+ return vga_ioport_read(&s->vga, addr) & 0xff;
}
static void vga_mm_writeb (void *opaque,
@@ -46,14 +49,14 @@ static void vga_mm_writeb (void *opaque,
{
ISAVGAMMState *s = opaque;
- vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff);
+ vga_ioport_write(&s->vga, addr, value & 0xff);
}
static uint32_t vga_mm_readw (void *opaque, target_phys_addr_t addr)
{
ISAVGAMMState *s = opaque;
- return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xffff;
+ return vga_ioport_read(&s->vga, addr) & 0xffff;
}
static void vga_mm_writew (void *opaque,
@@ -61,14 +64,14 @@ static void vga_mm_writew (void *opaque,
{
ISAVGAMMState *s = opaque;
- vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff);
+ vga_ioport_write(&s->vga, addr, value & 0xffff);
}
static uint32_t vga_mm_readl (void *opaque, target_phys_addr_t addr)
{
ISAVGAMMState *s = opaque;
- return vga_ioport_read(&s->vga, addr >> s->it_shift);
+ return vga_ioport_read(&s->vga, addr);
}
static void vga_mm_writel (void *opaque,
@@ -76,7 +79,7 @@ static void vga_mm_writel (void *opaque,
{
ISAVGAMMState *s = opaque;
- vga_ioport_write(&s->vga, addr >> s->it_shift, value);
+ vga_ioport_write(&s->vga, addr, value);
}
static CPUReadMemoryFunc * const vga_mm_read_ctrl[] = {
@@ -91,36 +94,45 @@ static CPUWriteMemoryFunc * const vga_mm_write_ctrl[] = {
&vga_mm_writel,
};
-static void vga_mm_init(ISAVGAMMState *s, target_phys_addr_t vram_base,
- target_phys_addr_t ctrl_base, int it_shift)
+static int isa_vga_mm_init(ISADevice *dev)
{
+ ISAVGAMMState *s = DO_UPCAST(ISAVGAMMState, dev, dev);
int s_ioport_ctrl, vga_io_memory;
- s->it_shift = it_shift;
+ vga_common_init(&s->vga, VGA_RAM_SIZE);
+
s_ioport_ctrl = cpu_register_io_memory(vga_mm_read_ctrl, vga_mm_write_ctrl, s);
- vga_io_memory = cpu_register_io_memory(vga_mem_read, vga_mem_write, s);
+ vga_io_memory = cpu_register_io_memory(vga_mem_read, vga_mem_write, &s->vga);
vmstate_register(NULL, 0, &vmstate_vga_common, s);
- cpu_register_physical_memory(ctrl_base, 0x100000, s_ioport_ctrl);
+ cpu_register_physical_memory(s->iobase, 0x100000, s_ioport_ctrl);
s->vga.bank_offset = 0;
- cpu_register_physical_memory(vram_base + 0x000a0000, 0x20000, vga_io_memory);
- qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000);
-}
-
-int isa_vga_mm_init(target_phys_addr_t vram_base,
- target_phys_addr_t ctrl_base, int it_shift)
-{
- ISAVGAMMState *s;
-
- s = qemu_mallocz(sizeof(*s));
-
- vga_common_init(&s->vga, VGA_RAM_SIZE);
- vga_mm_init(s, vram_base, ctrl_base, it_shift);
+ cpu_register_physical_memory(s->vram + 0x000a0000, 0x20000, vga_io_memory);
+ qemu_register_coalesced_mmio(s->vram + 0x000a0000, 0x20000);
s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
- s->vga.screen_dump, s->vga.text_update, s);
+ s->vga.screen_dump, s->vga.text_update, &s->vga);
vga_init_vbe(&s->vga);
return 0;
}
+
+static ISADeviceInfo isa_vga_mm_device_info = {
+ .qdev.name = "isa-vga-mm",
+ .qdev.size = sizeof(ISAVGAMMState),
+ .qdev.vmsd = &vmstate_vga_common,
+ .init = isa_vga_mm_init,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", ISAVGAMMState, iobase, 0x60000000),
+ DEFINE_PROP_TADDR("vram", ISAVGAMMState, vram, 0x40000000),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
+static void isa_vga_mm_register_device(void)
+{
+ isa_qdev_register(&isa_vga_mm_device_info);
+}
+
+device_init(isa_vga_mm_register_device)
diff --git a/vl.c b/vl.c
index b3e3676..9815f8d 100644
--- a/vl.c
+++ b/vl.c
@@ -265,6 +265,7 @@ static struct {
{ .driver = "VGA", .flag = &default_vga },
{ .driver = "cirrus-vga", .flag = &default_vga },
{ .driver = "vmware-svga", .flag = &default_vga },
+ { .driver = "isa-vga-mm", .flag = &default_vga },
};
static int default_driver_check(QemuOpts *opts, void *opaque)
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 12/20] [MIPS] qdev: convert g364fb to rc4030 device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (10 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 11/20] [MIPS] qdev: convert vga-isa-mm to ISA device Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 13/20] [MIPS] qdev: add a rtc forwarder device Hervé Poussineau
` (8 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/g364fb.c | 62 +++++++++++++++++++++++++++++++++++++++++--------------
hw/mips.h | 5 ----
hw/mips_jazz.c | 2 +-
vl.c | 1 +
4 files changed, 48 insertions(+), 22 deletions(-)
diff --git a/hw/g364fb.c b/hw/g364fb.c
index 3c8fb98..4b5e6ef 100644
--- a/hw/g364fb.c
+++ b/hw/g364fb.c
@@ -21,6 +21,8 @@
#include "mips.h"
#include "console.h"
#include "pixel_ops.h"
+#include "rc4030.h"
+#include "qdev-addr.h"
//#define DEBUG_G364
@@ -37,7 +39,7 @@ typedef struct G364State {
/* hardware */
uint8_t *vram;
ram_addr_t vram_offset;
- int vram_size;
+ uint32_t vram_size;
qemu_irq irq;
/* registers */
uint8_t color_palette[256][3];
@@ -53,6 +55,14 @@ typedef struct G364State {
int blanked;
} G364State;
+typedef struct RC4030G364State {
+ RC4030Device dev;
+ target_phys_addr_t iobase;
+ target_phys_addr_t vram;
+ uint32_t irq;
+ G364State state;
+} RC4030G364State;
+
#define REG_ID 0x000000
#define REG_BOOT 0x080000
#define REG_DISPLAY 0x080118
@@ -279,9 +289,8 @@ static inline void g364fb_invalidate_display(void *opaque)
}
}
-static void g364fb_reset(void *opaque)
+static void g364fb_reset(G364State *s)
{
- G364State *s = opaque;
qemu_irq_lower(s->irq);
memset(s->color_palette, 0, sizeof(s->color_palette));
@@ -292,7 +301,13 @@ static void g364fb_reset(void *opaque)
s->top_of_screen = 0;
s->width = s->height = 0;
memset(s->vram, 0, s->vram_size);
- g364fb_invalidate_display(opaque);
+ g364fb_invalidate_display(s);
+}
+
+static void g364fb_reset1(DeviceState *d)
+{
+ G364State *s = &container_of(d, RC4030G364State, dev.qdev)->state;
+ g364fb_reset(s);
}
static void g364fb_screen_dump(void *opaque, const char *filename)
@@ -583,32 +598,47 @@ static void g364fb_save(QEMUFile *f, void *opaque)
qemu_put_be32(f, s->height);
}
-int g364fb_mm_init(target_phys_addr_t vram_base,
- target_phys_addr_t ctrl_base, int it_shift,
- qemu_irq irq)
+static int g364fb_init(RC4030Device *dev)
{
- G364State *s;
+ RC4030G364State *rc4030 = container_of(dev, RC4030G364State, dev);
+ G364State *s = &rc4030->state;
int io_ctrl;
- s = qemu_mallocz(sizeof(G364State));
-
- s->vram_size = 8 * 1024 * 1024;
s->vram_offset = qemu_ram_alloc(NULL, "g364fb.vram", s->vram_size);
s->vram = qemu_get_ram_ptr(s->vram_offset);
- s->irq = irq;
+ rc4030_init_irq(dev, &s->irq, rc4030->irq);
- qemu_register_reset(g364fb_reset, s);
register_savevm(NULL, "g364fb", 0, 1, g364fb_save, g364fb_load, s);
- g364fb_reset(s);
s->ds = graphic_console_init(g364fb_update_display,
g364fb_invalidate_display,
g364fb_screen_dump, NULL, s);
- cpu_register_physical_memory(vram_base, s->vram_size, s->vram_offset);
+ cpu_register_physical_memory(rc4030->vram, s->vram_size, s->vram_offset);
io_ctrl = cpu_register_io_memory(g364fb_ctrl_read, g364fb_ctrl_write, s);
- cpu_register_physical_memory(ctrl_base, 0x200000, io_ctrl);
+ cpu_register_physical_memory(rc4030->iobase, 0x200000, io_ctrl);
return 0;
}
+
+static RC4030DeviceInfo g364fb_device_info = {
+ .qdev.name = "rc4030-g364fb",
+ .qdev.size = sizeof(RC4030G364State),
+ .qdev.reset = g364fb_reset1,
+ .init = g364fb_init,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", RC4030G364State, iobase, 0x60000000),
+ DEFINE_PROP_TADDR("vram", RC4030G364State, vram, 0x40000000),
+ DEFINE_PROP_HEX32("vram_size", RC4030G364State, state.vram_size, 8 * 1024 * 1024),
+ DEFINE_PROP_UINT32("irq", RC4030G364State, irq, 3),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
+static void g364fb_register_devices(void)
+{
+ rc4030_qdev_register(&g364fb_device_info);
+}
+
+device_init(g364fb_register_devices)
diff --git a/hw/mips.h b/hw/mips.h
index 023d85c..aa790d8 100644
--- a/hw/mips.h
+++ b/hw/mips.h
@@ -12,11 +12,6 @@ PCIBus *bonito_init(qemu_irq *pic);
void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
void ds1225y_set_protection(void *opaque, int protection);
-/* g364fb.c */
-int g364fb_mm_init(target_phys_addr_t vram_base,
- target_phys_addr_t ctrl_base, int it_shift,
- qemu_irq irq);
-
/* mipsnet.c */
void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 96946e8..c4f3721 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -206,7 +206,7 @@ void mips_jazz_init (ram_addr_t ram_size,
if (vga_interface_type != VGA_NONE) {
switch (jazz_model) {
case JAZZ_MAGNUM:
- g364fb_mm_init(0x40000000, 0x60000000, 0, rc4030[3]);
+ rc4030_create_simple("rc4030-g364fb");
break;
case JAZZ_PICA61:
isa_create_simple("isa-vga-mm");
diff --git a/vl.c b/vl.c
index 9815f8d..eb4c212 100644
--- a/vl.c
+++ b/vl.c
@@ -266,6 +266,7 @@ static struct {
{ .driver = "cirrus-vga", .flag = &default_vga },
{ .driver = "vmware-svga", .flag = &default_vga },
{ .driver = "isa-vga-mm", .flag = &default_vga },
+ { .driver = "rc4030-g364fb", .flag = &default_vga },
};
static int default_driver_check(QemuOpts *opts, void *opaque)
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 13/20] [MIPS] qdev: add a rtc forwarder device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (11 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 12/20] [MIPS] qdev: convert g364fb to rc4030 device Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 14/20] [MIPS] qdev: add an isa bus device Hervé Poussineau
` (7 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mc146818rtc.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++++++-
hw/mips_jazz.c | 28 +++-------------------------
2 files changed, 56 insertions(+), 26 deletions(-)
diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index 2b91fa8..674d24f 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -28,6 +28,8 @@
#include "apic.h"
#include "isa.h"
#include "mc146818rtc.h"
+#include "sysbus.h"
+#include "qdev-addr.h"
//#define DEBUG_CMOS
//#define DEBUG_COALESCED
@@ -631,7 +633,6 @@ ISADevice *rtc_init(int base_year, qemu_irq intercept_irq)
static ISADeviceInfo mc146818rtc_info = {
.qdev.name = "mc146818rtc",
.qdev.size = sizeof(RTCState),
- .qdev.no_user = 1,
.qdev.vmsd = &vmstate_rtc,
.init = rtc_initfn,
.qdev.props = (Property[]) {
@@ -640,8 +641,59 @@ static ISADeviceInfo mc146818rtc_info = {
}
};
+static uint32_t rtc_forward_readb(void *opaque, target_phys_addr_t addr)
+{
+ return cpu_inw(0x71);
+}
+
+static void rtc_forward_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+ cpu_outw(0x71, val & 0xff);
+}
+
+static CPUReadMemoryFunc * const rtc_forward_read[3] = {
+ rtc_forward_readb,
+ rtc_forward_readb,
+ rtc_forward_readb,
+};
+
+static CPUWriteMemoryFunc * const rtc_forward_write[3] = {
+ rtc_forward_writeb,
+ rtc_forward_writeb,
+ rtc_forward_writeb,
+};
+
+typedef struct RtcForwardState {
+ SysBusDevice busdev;
+ target_phys_addr_t iobase;
+ uint32_t size;
+} RtcForwardState;
+
+static int rtc_forward_init(SysBusDevice *dev)
+{
+ RtcForwardState *s = FROM_SYSBUS(RtcForwardState, dev);
+ int io;
+
+ io = cpu_register_io_memory(rtc_forward_read, rtc_forward_write, s);
+ cpu_register_physical_memory(s->iobase, s->size, io);
+
+ return 0;
+}
+
+static SysBusDeviceInfo rtc_forward_info = {
+ .qdev.name = "rtc-forward",
+ .qdev.size = sizeof(RtcForwardState),
+ .init = rtc_forward_init,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", RtcForwardState, iobase, 0x80004000),
+ DEFINE_PROP_HEX32("size", RtcForwardState, size, 0x1000),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
static void mc146818rtc_register(void)
{
isa_qdev_register(&mc146818rtc_info);
+ sysbus_register_withprop(&rtc_forward_info);
}
device_init(mc146818rtc_register)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index c4f3721..b9c6b62 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -44,28 +44,6 @@ enum jazz_model_e
JAZZ_PICA61,
};
-static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr)
-{
- return cpu_inw(0x71);
-}
-
-static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
-{
- cpu_outw(0x71, val & 0xff);
-}
-
-static CPUReadMemoryFunc * const rtc_read[3] = {
- rtc_readb,
- rtc_readb,
- rtc_readb,
-};
-
-static CPUWriteMemoryFunc * const rtc_write[3] = {
- rtc_writeb,
- rtc_writeb,
- rtc_writeb,
-};
-
static void dma_dummy_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
{
/* Nothing to do. That is only to ensure that
@@ -128,7 +106,7 @@ void mips_jazz_init (ram_addr_t ram_size,
qemu_irq *rc4030, *i8259;
rc4030_dma *dmas;
void* rc4030_opaque;
- int s_rtc, s_dma_dummy;
+ int s_dma_dummy;
NICInfo *nd;
PITState *pit;
DriveInfo *fds[MAX_FD];
@@ -251,8 +229,8 @@ void mips_jazz_init (ram_addr_t ram_size,
/* Real time clock */
rtc_init(1980, NULL);
- s_rtc = cpu_register_io_memory(rtc_read, rtc_write, NULL);
- cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
+ dev = qdev_create(NULL, "rtc-forward");
+ qdev_init_nofail(dev);
/* Keyboard (i8042) */
rc4030_create_simple("rc4030-i8042");
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 14/20] [MIPS] qdev: add an isa bus device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (12 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 13/20] [MIPS] qdev: add a rtc forwarder device Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 15/20] [MIPS] qdev: convert dp83932 network card to rc4030 device Hervé Poussineau
` (6 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/isa-bus.c | 29 +++++++++++++++++++++++++++++
hw/mips_jazz.c | 12 ++----------
2 files changed, 31 insertions(+), 10 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index 4e306de..c245151 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -21,6 +21,7 @@
#include "monitor.h"
#include "sysbus.h"
#include "isa.h"
+#include "qdev-addr.h"
struct ISABus {
BusState qbus;
@@ -53,6 +54,22 @@ ISABus *isa_bus_new(DeviceState *dev)
return isabus;
}
+typedef struct IsaBusState {
+ SysBusDevice dev;
+ target_phys_addr_t iobase;
+ uint32_t size;
+} IsaBusState;
+
+static int isabus_init(SysBusDevice *dev)
+{
+ IsaBusState *bus = DO_UPCAST(IsaBusState, dev, dev);
+
+ if (isa_bus_new(NULL) == NULL)
+ return -1;
+ isa_mmio_init(bus->iobase, bus->size, 0);
+ return 0;
+}
+
void isa_bus_irqs(qemu_irq *irqs)
{
isabus->irqs = irqs;
@@ -157,9 +174,21 @@ static SysBusDeviceInfo isabus_bridge_info = {
.qdev.no_user = 1,
};
+static SysBusDeviceInfo isabus_info = {
+ .init = isabus_init,
+ .qdev.name = "isabus",
+ .qdev.size = sizeof(IsaBusState),
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", IsaBusState, iobase, 0x90000000),
+ DEFINE_PROP_HEX32("size", IsaBusState, size, 0x1000000),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
static void isabus_register_devices(void)
{
sysbus_register_withprop(&isabus_bridge_info);
+ sysbus_register_withprop(&isabus_info);
}
device_init(isabus_register_devices)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index b9c6b62..cf0001e 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -163,23 +163,15 @@ void mips_jazz_init (ram_addr_t ram_size,
cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy);
/* ISA devices */
+ dev = qdev_create(NULL, "isabus");
+ qdev_init_nofail(dev);
i8259 = i8259_init(qdev_get_gpio_in(cpu->parent, 4));
- isa_bus_new(NULL);
isa_bus_irqs(i8259);
cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
DMA_init(0, cpu_exit_irq);
pit = pit_init(0x40, i8259[0]);
pcspk_init(pit);
- /* ISA IO space at 0x90000000 */
-#ifdef TARGET_WORDS_BIGENDIAN
- isa_mmio_init(0x90000000, 0x01000000, 1);
-#else
- isa_mmio_init(0x90000000, 0x01000000, 0);
-#endif
-
- isa_mem_base = 0x11000000;
-
/* Optional video card */
if (vga_interface_type != VGA_NONE) {
switch (jazz_model) {
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 15/20] [MIPS] qdev: convert dp83932 network card to rc4030 device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (13 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 14/20] [MIPS] qdev: add an isa bus device Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 16/20] [MIPS] qdev: convert floppy disk controller " Hervé Poussineau
` (5 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Remove dp83932_init() function, which is not used anymore
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/dp8393x.c | 64 ++++++++++++++++++++++++++++++++++++-------------------
hw/mips.h | 5 ----
hw/mips_jazz.c | 6 +++-
3 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/hw/dp8393x.c b/hw/dp8393x.c
index e65e4d1..f8fd9f5 100644
--- a/hw/dp8393x.c
+++ b/hw/dp8393x.c
@@ -21,6 +21,8 @@
#include "qemu-timer.h"
#include "net.h"
#include "mips.h"
+#include "rc4030.h"
+#include "qdev-addr.h"
//#define DEBUG_SONIC
@@ -147,7 +149,7 @@ do { printf("sonic ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
typedef struct dp8393xState {
/* Hardware */
- int it_shift;
+ uint32_t it_shift;
qemu_irq irq;
#ifdef DEBUG_SONIC
int irq_level;
@@ -869,8 +871,6 @@ static void nic_cleanup(VLANClientState *nc)
qemu_del_timer(s->watchdog);
qemu_free_timer(s->watchdog);
-
- qemu_free(s);
}
static NetClientInfo net_dp83932_info = {
@@ -881,33 +881,53 @@ static NetClientInfo net_dp83932_info = {
.cleanup = nic_cleanup,
};
-void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
- qemu_irq irq, void* mem_opaque,
- void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write))
-{
- dp8393xState *s;
-
- qemu_check_nic_model(nd, "dp83932");
+typedef struct RC4030dp83932State {
+ RC4030Device dev;
+ target_phys_addr_t iobase;
+ uint32_t irq;
+ dp8393xState state;
+} RC4030dp83932State;
- s = qemu_mallocz(sizeof(dp8393xState));
+static int dp83932_rc4030_init(RC4030Device *dev)
+{
+ RC4030dp83932State *rc4030 = DO_UPCAST(RC4030dp83932State, dev, dev);
+ dp8393xState *s = &rc4030->state;
- s->mem_opaque = mem_opaque;
- s->memory_rw = memory_rw;
- s->it_shift = it_shift;
- s->irq = irq;
+ s->mem_opaque = rc4030_get_opaque();
+ s->memory_rw = rc4030_dma_memory_rw;
+ rc4030_init_irq(dev, &s->irq, rc4030->irq);
s->watchdog = qemu_new_timer(vm_clock, dp8393x_watchdog, s);
s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */
- memcpy(s->conf.macaddr.a, nd->macaddr, sizeof(s->conf.macaddr));
- s->conf.vlan = nd->vlan;
- s->conf.peer = nd->netdev;
-
- s->nic = qemu_new_nic(&net_dp83932_info, &s->conf, nd->model, nd->name, s);
-
+ qemu_macaddr_default_if_unset(&s->conf.macaddr);
+ s->nic = qemu_new_nic(&net_dp83932_info, &s->conf, dev->qdev.info->name, dev->qdev.id, s);
qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);
+
qemu_register_reset(nic_reset, s);
nic_reset(s);
s->mmio_index = cpu_register_io_memory(dp8393x_read, dp8393x_write, s);
- cpu_register_physical_memory(base, 0x40 << it_shift, s->mmio_index);
+ cpu_register_physical_memory(rc4030->iobase, 0x40 << s->it_shift, s->mmio_index);
+
+ return 0;
}
+
+static RC4030DeviceInfo dp83932_rc4030_info = {
+ .qdev.name = "rc4030-dp83932",
+ .qdev.size = sizeof(RC4030dp83932State),
+ .init = dp83932_rc4030_init,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", RC4030dp83932State, iobase, 0x80001000),
+ DEFINE_PROP_UINT32("itshift", RC4030dp83932State, state.it_shift, 2),
+ DEFINE_PROP_UINT32("irq", RC4030dp83932State, irq, 4),
+ DEFINE_NIC_PROPERTIES( RC4030dp83932State, state.conf),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
+static void dp8393x_register_devices(void)
+{
+ rc4030_qdev_register(&dp83932_rc4030_info);
+}
+
+device_init(dp8393x_register_devices)
diff --git a/hw/mips.h b/hw/mips.h
index aa790d8..d8e4954 100644
--- a/hw/mips.h
+++ b/hw/mips.h
@@ -15,9 +15,4 @@ void ds1225y_set_protection(void *opaque, int protection);
/* mipsnet.c */
void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
-/* dp8393x.c */
-void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
- qemu_irq irq, void* mem_opaque,
- void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write));
-
#endif
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index cf0001e..c0a27b2 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -192,8 +192,10 @@ void mips_jazz_init (ram_addr_t ram_size,
if (!nd->model)
nd->model = qemu_strdup("dp83932");
if (strcmp(nd->model, "dp83932") == 0) {
- dp83932_init(nd, 0x80001000, 2, rc4030[4],
- rc4030_opaque, rc4030_dma_memory_rw);
+ qemu_check_nic_model(nd, nd->model);
+ dev = qdev_create(NULL, nd->model);
+ qdev_set_nic_properties(dev, nd);
+ qdev_init_nofail(dev);
break;
} else if (strcmp(nd->model, "?") == 0) {
fprintf(stderr, "qemu: Supported NICs: dp83932\n");
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 16/20] [MIPS] qdev: convert floppy disk controller to rc4030 device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (14 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 15/20] [MIPS] qdev: convert dp83932 network card to rc4030 device Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 17/20] [MIPS] qdev: convert esp scsi adapter " Hervé Poussineau
` (4 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Remove fdctrl_init_sysbus() function, which is not used anymore
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/fdc.c | 84 ++++++++++++++++++++++++++++++++++++++++----------------
hw/fdc.h | 2 -
hw/mips_jazz.c | 12 +++++--
3 files changed, 68 insertions(+), 30 deletions(-)
diff --git a/hw/fdc.c b/hw/fdc.c
index 2d50bd6..d51a29c 100644
--- a/hw/fdc.c
+++ b/hw/fdc.c
@@ -33,6 +33,7 @@
#include "qemu-timer.h"
#include "isa.h"
#include "sysbus.h"
+#include "rc4030.h"
#include "qdev-addr.h"
/********************************************************/
@@ -524,6 +525,14 @@ typedef struct FDCtrlISABus {
struct FDCtrl state;
} FDCtrlISABus;
+typedef struct FDCtrlRC4030 {
+ RC4030Device busdev;
+ target_phys_addr_t iobase;
+ uint32_t irq;
+ uint32_t dma;
+ struct FDCtrl state;
+} FDCtrlRC4030;
+
static uint32_t fdctrl_read (void *opaque, uint32_t reg)
{
FDCtrl *fdctrl = opaque;
@@ -714,6 +723,14 @@ static void fdctrl_external_reset_isa(DeviceState *d)
fdctrl_reset(s, 0);
}
+static void fdctrl_external_reset_rc4030(DeviceState *d)
+{
+ FDCtrlRC4030 *rc4030 = container_of(d, FDCtrlRC4030, busdev.qdev);
+ FDCtrl *s = &rc4030->state;
+
+ fdctrl_reset(s, 0);
+}
+
static void fdctrl_handle_tc(void *opaque, int irq, int level)
{
//FDCtrl *s = opaque;
@@ -1888,30 +1905,6 @@ FDCtrl *fdctrl_init_isa(DriveInfo **fds)
return &(DO_UPCAST(FDCtrlISABus, busdev, dev)->state);
}
-FDCtrl *fdctrl_init_sysbus(qemu_irq irq, int dma_chann,
- target_phys_addr_t mmio_base, DriveInfo **fds)
-{
- FDCtrl *fdctrl;
- DeviceState *dev;
- FDCtrlSysBus *sys;
-
- dev = qdev_create(NULL, "sysbus-fdc");
- sys = DO_UPCAST(FDCtrlSysBus, busdev.qdev, dev);
- fdctrl = &sys->state;
- fdctrl->dma_chann = dma_chann; /* FIXME */
- if (fds[0]) {
- qdev_prop_set_drive_nofail(dev, "driveA", fds[0]->bdrv);
- }
- if (fds[1]) {
- qdev_prop_set_drive_nofail(dev, "driveB", fds[1]->bdrv);
- }
- qdev_init_nofail(dev);
- sysbus_connect_irq(&sys->busdev, 0, irq);
- sysbus_mmio_map(&sys->busdev, 0, mmio_base);
-
- return fdctrl;
-}
-
FDCtrl *sun4m_fdctrl_init(qemu_irq irq, target_phys_addr_t io_base,
DriveInfo **fds, qemu_irq *fdc_tc)
{
@@ -2026,6 +2019,22 @@ static int sun4m_fdc_init1(SysBusDevice *dev)
return fdctrl_init_common(fdctrl);
}
+static int rc4030_fdc_init1(RC4030Device *dev)
+{
+ FDCtrlRC4030 *rc4030 = DO_UPCAST(FDCtrlRC4030, busdev, dev);
+ FDCtrl *fdctrl = &rc4030->state;
+ int io;
+
+ io = cpu_register_io_memory(fdctrl_mem_read, fdctrl_mem_write, fdctrl);
+ cpu_register_physical_memory(rc4030->iobase, 8, io);
+
+ rc4030_init_irq(dev, &fdctrl->irq, rc4030->irq);
+ qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
+ fdctrl->dma_chann = rc4030->dma;
+
+ return fdctrl_init_common(fdctrl);
+}
+
static const VMStateDescription vmstate_isa_fdc ={
.name = "fdc",
.version_id = 2,
@@ -2085,11 +2094,38 @@ static SysBusDeviceInfo sun4m_fdc_info = {
},
};
+static const VMStateDescription vmstate_rc4030_fdc = {
+ .name = "rc4030-fdc",
+ .version_id = 2,
+ .minimum_version_id = 2,
+ .fields = (VMStateField []) {
+ VMSTATE_STRUCT(state, FDCtrlRC4030, 0, vmstate_fdc, FDCtrl),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static RC4030DeviceInfo rc4030_fdc_info = {
+ .init = rc4030_fdc_init1,
+ .qdev.name = "rc4030-fdc",
+ .qdev.size = sizeof(FDCtrlRC4030),
+ .qdev.vmsd = &vmstate_rc4030_fdc,
+ .qdev.reset = fdctrl_external_reset_rc4030,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", FDCtrlRC4030, iobase, 0x80003000),
+ DEFINE_PROP_UINT32("irq", FDCtrlRC4030, irq, 1),
+ DEFINE_PROP_UINT32("dma", FDCtrlRC4030, dma, 0),
+ DEFINE_PROP_DRIVE("driveA", FDCtrlRC4030, state.drives[0].bs),
+ DEFINE_PROP_DRIVE("driveB", FDCtrlRC4030, state.drives[1].bs),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
static void fdc_register_devices(void)
{
isa_qdev_register(&isa_fdc_info);
sysbus_register_withprop(&sysbus_fdc_info);
sysbus_register_withprop(&sun4m_fdc_info);
+ rc4030_qdev_register(&rc4030_fdc_info);
}
device_init(fdc_register_devices)
diff --git a/hw/fdc.h b/hw/fdc.h
index b6b3772..6f28dc0 100644
--- a/hw/fdc.h
+++ b/hw/fdc.h
@@ -8,8 +8,6 @@
typedef struct FDCtrl FDCtrl;
FDCtrl *fdctrl_init_isa(DriveInfo **fds);
-FDCtrl *fdctrl_init_sysbus(qemu_irq irq, int dma_chann,
- target_phys_addr_t mmio_base, DriveInfo **fds);
FDCtrl *sun4m_fdctrl_init(qemu_irq irq, target_phys_addr_t io_base,
DriveInfo **fds, qemu_irq *fdc_tc);
int fdctrl_get_drive_type(FDCtrl *fdctrl, int drive_num);
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index c0a27b2..3c6a495 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -109,7 +109,7 @@ void mips_jazz_init (ram_addr_t ram_size,
int s_dma_dummy;
NICInfo *nd;
PITState *pit;
- DriveInfo *fds[MAX_FD];
+ DriveInfo *fd;
qemu_irq esp_reset;
qemu_irq *cpu_exit_irq;
ram_addr_t ram_offset;
@@ -216,10 +216,14 @@ void mips_jazz_init (ram_addr_t ram_size,
fprintf(stderr, "qemu: too many floppy drives\n");
exit(1);
}
- for (n = 0; n < MAX_FD; n++) {
- fds[n] = drive_get(IF_FLOPPY, 0, n);
+ dev = qdev_create(NULL, "rc4030-fdc");
+ if ((fd = drive_get(IF_FLOPPY, 0, 0)) != NULL) {
+ qdev_prop_set_drive_nofail(dev, "driveA", fd->bdrv);
}
- fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds);
+ if ((fd = drive_get(IF_FLOPPY, 0, 1)) != NULL) {
+ qdev_prop_set_drive_nofail(dev, "driveB", fd->bdrv);
+ }
+ qdev_init_nofail(dev);
/* Real time clock */
rtc_init(1980, NULL);
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 17/20] [MIPS] qdev: convert esp scsi adapter to rc4030 device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (15 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 16/20] [MIPS] qdev: convert floppy disk controller " Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-02 14:51 ` Artyom Tarasenko
2010-08-01 17:37 ` [Qemu-devel] [PATCH 18/20] [MIPS] qdev: convert ds1225y nvram to sysbus device Hervé Poussineau
` (3 subsequent siblings)
20 siblings, 1 reply; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/esp.c | 83 +++++++++++++++++++++++++++++++++++++++++++++++++++++---
hw/mips_jazz.c | 5 +---
2 files changed, 80 insertions(+), 8 deletions(-)
diff --git a/hw/esp.c b/hw/esp.c
index 349052a..d6a9824 100644
--- a/hw/esp.c
+++ b/hw/esp.c
@@ -24,6 +24,8 @@
#include "sysbus.h"
#include "scsi.h"
+#include "rc4030.h"
+#include "qdev-addr.h"
#include "esp.h"
/* debug ESP card */
@@ -82,6 +84,15 @@ struct ESPState {
void *dma_opaque;
};
+typedef struct RC4030ESPState
+{
+ RC4030Device dev;
+ target_phys_addr_t iobase;
+ uint32_t irq;
+ uint32_t dma;
+ ESPState state;
+} RC4030ESPState;
+
#define ESP_TCLO 0x0
#define ESP_TCMID 0x1
#define ESP_FIFO 0x2
@@ -356,11 +367,9 @@ static void esp_do_dma(ESPState *s)
}
}
-static void esp_command_complete(SCSIBus *bus, int reason, uint32_t tag,
- uint32_t arg)
+static void esp_command_complete1(ESPState *s, int reason, uint32_t tag,
+ uint32_t arg)
{
- ESPState *s = DO_UPCAST(ESPState, busdev.qdev, bus->qbus.parent);
-
if (reason == SCSI_REASON_DONE) {
DPRINTF("SCSI Command complete\n");
if (s->ti_size != 0)
@@ -388,6 +397,20 @@ static void esp_command_complete(SCSIBus *bus, int reason, uint32_t tag,
}
}
+static void esp_command_complete(SCSIBus *bus, int reason, uint32_t tag,
+ uint32_t arg)
+{
+ ESPState *s = DO_UPCAST(ESPState, busdev.qdev, bus->qbus.parent);
+ esp_command_complete1(s, reason, tag, arg);
+}
+
+static void esp_rc4030_command_complete(SCSIBus *bus, int reason,
+ uint32_t tag, uint32_t arg)
+{
+ RC4030ESPState *rc4030 = container_of(bus->qbus.parent, RC4030ESPState, dev.qdev);
+ esp_command_complete1(&rc4030->state, reason, tag, arg);
+}
+
static void handle_ti(ESPState *s)
{
uint32_t dmalen, minlen;
@@ -435,6 +458,12 @@ static void esp_hard_reset(DeviceState *d)
s->rregs[ESP_CFG1] = 7;
}
+static void esp_rc4030_hard_reset(DeviceState *d)
+{
+ RC4030ESPState *s = container_of(d, RC4030ESPState, dev.qdev);
+ esp_hard_reset(&s->state.busdev.qdev);
+}
+
static void esp_soft_reset(DeviceState *d)
{
ESPState *s = container_of(d, ESPState, busdev.qdev);
@@ -682,6 +711,27 @@ static int esp_init1(SysBusDevice *dev)
return scsi_bus_legacy_handle_cmdline(&s->bus);
}
+static int esp_rc4030_init1(RC4030Device *dev)
+{
+ RC4030ESPState *rc4030 = container_of(dev, RC4030ESPState, dev);
+ ESPState *s = &rc4030->state;
+ int io;
+
+ rc4030_init_irq(&rc4030->dev, &s->irq, rc4030->irq);
+
+ io = cpu_register_io_memory(esp_mem_read, esp_mem_write, s);
+ cpu_register_physical_memory(rc4030->iobase, ESP_REGS << s->it_shift, io);
+
+ qdev_init_gpio_in(&dev->qdev, parent_esp_reset, 1);
+
+ s->dma_memory_read = rc4030_dma_read;
+ s->dma_memory_write = rc4030_dma_write;
+ s->dma_opaque = rc4030_get_dma(rc4030->dma);
+
+ scsi_bus_new(&s->bus, &dev->qdev, 0, ESP_MAX_DEVS, esp_rc4030_command_complete);
+ return scsi_bus_legacy_handle_cmdline(&s->bus);
+}
+
static SysBusDeviceInfo esp_info = {
.init = esp_init1,
.qdev.name = "esp",
@@ -693,9 +743,34 @@ static SysBusDeviceInfo esp_info = {
}
};
+static const VMStateDescription vmstate_rc4030_esp = {
+ .name = "rc4030-esp",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField []) {
+ VMSTATE_STRUCT(state, RC4030ESPState, 0, vmstate_esp, ESPState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static RC4030DeviceInfo esp_rc4030_info = {
+ .qdev.name = "rc4030-esp",
+ .qdev.size = sizeof(RC4030ESPState),
+ .qdev.vmsd = &vmstate_rc4030_esp,
+ .qdev.reset = esp_rc4030_hard_reset,
+ .init = esp_rc4030_init1,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", RC4030ESPState, iobase, 0x80002000),
+ DEFINE_PROP_UINT32("irq", RC4030ESPState, irq, 5),
+ DEFINE_PROP_UINT32("dma", RC4030ESPState, dma, 0),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
static void esp_register_devices(void)
{
sysbus_register_withprop(&esp_info);
+ rc4030_qdev_register(&esp_rc4030_info);
}
device_init(esp_register_devices)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 3c6a495..08175ab 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -110,7 +110,6 @@ void mips_jazz_init (ram_addr_t ram_size,
NICInfo *nd;
PITState *pit;
DriveInfo *fd;
- qemu_irq esp_reset;
qemu_irq *cpu_exit_irq;
ram_addr_t ram_offset;
ram_addr_t bios_offset;
@@ -207,9 +206,7 @@ void mips_jazz_init (ram_addr_t ram_size,
}
/* SCSI adapter */
- esp_init(0x80002000, 0,
- rc4030_dma_read, rc4030_dma_write, dmas[0],
- rc4030[5], &esp_reset);
+ rc4030_create_simple("rc4030-esp");
/* Floppy */
if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [Qemu-devel] [PATCH 17/20] [MIPS] qdev: convert esp scsi adapter to rc4030 device
2010-08-01 17:37 ` [Qemu-devel] [PATCH 17/20] [MIPS] qdev: convert esp scsi adapter " Hervé Poussineau
@ 2010-08-02 14:51 ` Artyom Tarasenko
0 siblings, 0 replies; 23+ messages in thread
From: Artyom Tarasenko @ 2010-08-02 14:51 UTC (permalink / raw)
To: Hervé Poussineau; +Cc: qemu-devel
2010/8/1 Hervé Poussineau <hpoussin@reactos.org>:
> Use it in Jazz emulation
>
> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
> ---
> hw/esp.c | 83 +++++++++++++++++++++++++++++++++++++++++++++++++++++---
> hw/mips_jazz.c | 5 +---
> 2 files changed, 80 insertions(+), 8 deletions(-)
>
> diff --git a/hw/esp.c b/hw/esp.c
> index 349052a..d6a9824 100644
> --- a/hw/esp.c
> +++ b/hw/esp.c
> @@ -24,6 +24,8 @@
>
> #include "sysbus.h"
> #include "scsi.h"
> +#include "rc4030.h"
Putting RC4030Device into esp doesn't look clean to me. E.g. Sun
machines don't use RC4030, I'd suggest to keep esp logic machine
independent.
> +#include "qdev-addr.h"
> #include "esp.h"
>
> /* debug ESP card */
> @@ -82,6 +84,15 @@ struct ESPState {
> void *dma_opaque;
> };
>
> +typedef struct RC4030ESPState
> +{
> + RC4030Device dev;
> + target_phys_addr_t iobase;
> + uint32_t irq;
> + uint32_t dma;
> + ESPState state;
> +} RC4030ESPState;
> +
> #define ESP_TCLO 0x0
> #define ESP_TCMID 0x1
> #define ESP_FIFO 0x2
> @@ -356,11 +367,9 @@ static void esp_do_dma(ESPState *s)
> }
> }
>
> -static void esp_command_complete(SCSIBus *bus, int reason, uint32_t tag,
> - uint32_t arg)
> +static void esp_command_complete1(ESPState *s, int reason, uint32_t tag,
> + uint32_t arg)
> {
> - ESPState *s = DO_UPCAST(ESPState, busdev.qdev, bus->qbus.parent);
> -
> if (reason == SCSI_REASON_DONE) {
> DPRINTF("SCSI Command complete\n");
> if (s->ti_size != 0)
> @@ -388,6 +397,20 @@ static void esp_command_complete(SCSIBus *bus, int reason, uint32_t tag,
> }
> }
>
> +static void esp_command_complete(SCSIBus *bus, int reason, uint32_t tag,
> + uint32_t arg)
> +{
> + ESPState *s = DO_UPCAST(ESPState, busdev.qdev, bus->qbus.parent);
> + esp_command_complete1(s, reason, tag, arg);
> +}
> +
> +static void esp_rc4030_command_complete(SCSIBus *bus, int reason,
> + uint32_t tag, uint32_t arg)
> +{
> + RC4030ESPState *rc4030 = container_of(bus->qbus.parent, RC4030ESPState, dev.qdev);
> + esp_command_complete1(&rc4030->state, reason, tag, arg);
> +}
> +
> static void handle_ti(ESPState *s)
> {
> uint32_t dmalen, minlen;
> @@ -435,6 +458,12 @@ static void esp_hard_reset(DeviceState *d)
> s->rregs[ESP_CFG1] = 7;
> }
>
> +static void esp_rc4030_hard_reset(DeviceState *d)
> +{
> + RC4030ESPState *s = container_of(d, RC4030ESPState, dev.qdev);
> + esp_hard_reset(&s->state.busdev.qdev);
> +}
> +
> static void esp_soft_reset(DeviceState *d)
> {
> ESPState *s = container_of(d, ESPState, busdev.qdev);
> @@ -682,6 +711,27 @@ static int esp_init1(SysBusDevice *dev)
> return scsi_bus_legacy_handle_cmdline(&s->bus);
> }
>
> +static int esp_rc4030_init1(RC4030Device *dev)
> +{
> + RC4030ESPState *rc4030 = container_of(dev, RC4030ESPState, dev);
> + ESPState *s = &rc4030->state;
> + int io;
> +
> + rc4030_init_irq(&rc4030->dev, &s->irq, rc4030->irq);
> +
> + io = cpu_register_io_memory(esp_mem_read, esp_mem_write, s);
> + cpu_register_physical_memory(rc4030->iobase, ESP_REGS << s->it_shift, io);
> +
> + qdev_init_gpio_in(&dev->qdev, parent_esp_reset, 1);
> +
> + s->dma_memory_read = rc4030_dma_read;
> + s->dma_memory_write = rc4030_dma_write;
> + s->dma_opaque = rc4030_get_dma(rc4030->dma);
> +
> + scsi_bus_new(&s->bus, &dev->qdev, 0, ESP_MAX_DEVS, esp_rc4030_command_complete);
> + return scsi_bus_legacy_handle_cmdline(&s->bus);
> +}
> +
> static SysBusDeviceInfo esp_info = {
> .init = esp_init1,
> .qdev.name = "esp",
> @@ -693,9 +743,34 @@ static SysBusDeviceInfo esp_info = {
> }
> };
>
> +static const VMStateDescription vmstate_rc4030_esp = {
> + .name = "rc4030-esp",
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .fields = (VMStateField []) {
> + VMSTATE_STRUCT(state, RC4030ESPState, 0, vmstate_esp, ESPState),
> + VMSTATE_END_OF_LIST()
> + }
> +};
> +
> +static RC4030DeviceInfo esp_rc4030_info = {
> + .qdev.name = "rc4030-esp",
> + .qdev.size = sizeof(RC4030ESPState),
> + .qdev.vmsd = &vmstate_rc4030_esp,
> + .qdev.reset = esp_rc4030_hard_reset,
> + .init = esp_rc4030_init1,
> + .qdev.props = (Property[]) {
> + DEFINE_PROP_TADDR("iobase", RC4030ESPState, iobase, 0x80002000),
> + DEFINE_PROP_UINT32("irq", RC4030ESPState, irq, 5),
> + DEFINE_PROP_UINT32("dma", RC4030ESPState, dma, 0),
> + DEFINE_PROP_END_OF_LIST(),
> + },
> +};
> +
> static void esp_register_devices(void)
> {
> sysbus_register_withprop(&esp_info);
> + rc4030_qdev_register(&esp_rc4030_info);
> }
>
> device_init(esp_register_devices)
> diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
> index 3c6a495..08175ab 100644
> --- a/hw/mips_jazz.c
> +++ b/hw/mips_jazz.c
> @@ -110,7 +110,6 @@ void mips_jazz_init (ram_addr_t ram_size,
> NICInfo *nd;
> PITState *pit;
> DriveInfo *fd;
> - qemu_irq esp_reset;
> qemu_irq *cpu_exit_irq;
> ram_addr_t ram_offset;
> ram_addr_t bios_offset;
> @@ -207,9 +206,7 @@ void mips_jazz_init (ram_addr_t ram_size,
> }
>
> /* SCSI adapter */
> - esp_init(0x80002000, 0,
> - rc4030_dma_read, rc4030_dma_write, dmas[0],
> - rc4030[5], &esp_reset);
> + rc4030_create_simple("rc4030-esp");
>
> /* Floppy */
> if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
> --
> 1.7.1.GIT
>
>
>
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/
^ permalink raw reply [flat|nested] 23+ messages in thread
* [Qemu-devel] [PATCH 18/20] [MIPS] qdev: convert ds1225y nvram to sysbus device
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (16 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 17/20] [MIPS] qdev: convert esp scsi adapter " Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 19/20] [MIPS] qdev: add a mips board device, which initializes the ram and the rom Hervé Poussineau
` (2 subsequent siblings)
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Use it in Jazz emulation
Remove protection stuff, which doesn't belong to this device
Remove ds1225y_init() and ds1225y_set_protection() functions, which are not used anymore
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/ds1225y.c | 137 ++++++++++++++++++++++++++++++--------------------------
hw/mips.h | 4 --
hw/mips_jazz.c | 5 +-
3 files changed, 76 insertions(+), 70 deletions(-)
diff --git a/hw/ds1225y.c b/hw/ds1225y.c
index 009d127..afbfcb0 100644
--- a/hw/ds1225y.c
+++ b/hw/ds1225y.c
@@ -25,15 +25,20 @@
#include "hw.h"
#include "mips.h"
#include "nvram.h"
+#include "sysbus.h"
+#include "qdev-addr.h"
//#define DEBUG_NVRAM
typedef struct ds1225y_t
{
- uint32_t chip_size;
+ SysBusDevice busdev;
+
+ target_phys_addr_t iobase;
+ uint32_t size;
+ char *filename;
QEMUFile *file;
uint8_t *contents;
- uint8_t protection;
} ds1225y_t;
@@ -98,34 +103,6 @@ static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t val)
nvram_writeb(opaque, addr + 3, (val >> 24) & 0xff);
}
-static void nvram_writeb_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
-{
- ds1225y_t *s = opaque;
-
- if (s->protection != 7) {
-#ifdef DEBUG_NVRAM
- printf("nvram: prevent write of 0x%x at " TARGET_FMT_lx "\n", val, addr);
-#endif
- return;
- }
-
- nvram_writeb(opaque, addr, val);
-}
-
-static void nvram_writew_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
-{
- nvram_writeb_protected(opaque, addr, val & 0xff);
- nvram_writeb_protected(opaque, addr + 1, (val >> 8) & 0xff);
-}
-
-static void nvram_writel_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
-{
- nvram_writeb_protected(opaque, addr, val & 0xff);
- nvram_writeb_protected(opaque, addr + 1, (val >> 8) & 0xff);
- nvram_writeb_protected(opaque, addr + 2, (val >> 16) & 0xff);
- nvram_writeb_protected(opaque, addr + 3, (val >> 24) & 0xff);
-}
-
static CPUReadMemoryFunc * const nvram_read[] = {
&nvram_readb,
&nvram_readw,
@@ -138,43 +115,75 @@ static CPUWriteMemoryFunc * const nvram_write[] = {
&nvram_writel,
};
-static CPUWriteMemoryFunc * const nvram_write_protected[] = {
- &nvram_writeb_protected,
- &nvram_writew_protected,
- &nvram_writel_protected,
-};
-
-/* Initialisation routine */
-void *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
+static int ds1225y_init(SysBusDevice *dev)
{
- ds1225y_t *s;
- int mem_indexRW, mem_indexRP;
+ ds1225y_t *s = FROM_SYSBUS(ds1225y_t, dev);
+ int mem_index;
QEMUFile *file;
- s = qemu_mallocz(sizeof(ds1225y_t));
- s->chip_size = 0x2000; /* Fixed for ds1225y chip: 8 KiB */
- s->contents = qemu_mallocz(s->chip_size);
- s->protection = 7;
-
- /* Read current file */
- file = qemu_fopen(filename, "rb");
- if (file) {
- /* Read nvram contents */
- qemu_get_buffer(file, s->contents, s->chip_size);
- qemu_fclose(file);
- }
- s->file = qemu_fopen(filename, "wb");
- if (s->file) {
- /* Write back contents, as 'wb' mode cleaned the file */
- qemu_put_buffer(s->file, s->contents, s->chip_size);
- qemu_fflush(s->file);
+ if (s->iobase == -1)
+ return -1;
+
+ s->contents = qemu_mallocz(s->size);
+
+ if (s->filename) {
+ /* Read current file */
+ file = qemu_fopen(s->filename, "rb");
+ if (file) {
+ /* Read nvram contents */
+ qemu_get_buffer(file, s->contents, s->size);
+ qemu_fclose(file);
+ }
+ s->file = qemu_fopen(s->filename, "wb");
+ if (s->file) {
+ /* Write back contents, as 'wb' mode cleaned the file */
+ qemu_put_buffer(s->file, s->contents, s->size);
+ qemu_fflush(s->file);
+ }
}
- /* Read/write memory */
- mem_indexRW = cpu_register_io_memory(nvram_read, nvram_write, s);
- cpu_register_physical_memory(mem_base, s->chip_size, mem_indexRW);
- /* Read/write protected memory */
- mem_indexRP = cpu_register_io_memory(nvram_read, nvram_write_protected, s);
- cpu_register_physical_memory(mem_base + s->chip_size, s->chip_size, mem_indexRP);
- return s;
+ mem_index = cpu_register_io_memory(nvram_read, nvram_write, s);
+ cpu_register_physical_memory(s->iobase, s->size, mem_index);
+
+ return 0;
+}
+
+static int ds1225y_init_nvram(SysBusDevice *dev)
+{
+ ds1225y_t *s = FROM_SYSBUS(ds1225y_t, dev);
+ s->filename = (char*)"nvram";
+ return ds1225y_init(dev);
+}
+
+static SysBusDeviceInfo ds1225y_device_info = {
+ .qdev.name = "ds1225y",
+ .qdev.size = sizeof(ds1225y_t),
+ .init = ds1225y_init,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", ds1225y_t, iobase, -1),
+ DEFINE_PROP_HEX32("size", ds1225y_t, size, 0x2000),
+ DEFINE_PROP_STRING("filename", ds1225y_t, filename),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
+static SysBusDeviceInfo ds1225y_device_info_nvram = {
+ .qdev.name = "ds1225y,filename=nvram",
+ .qdev.size = sizeof(ds1225y_t),
+ .qdev.no_user = 1,
+ .init = ds1225y_init_nvram,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("iobase", ds1225y_t, iobase, 0x80009000),
+ DEFINE_PROP_HEX32("size", ds1225y_t, size, 0x2000),
+ DEFINE_PROP_STRING("filename", ds1225y_t, filename),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
+static void ds1225y_register_devices(void)
+{
+ sysbus_register_withprop(&ds1225y_device_info);
+ sysbus_register_withprop(&ds1225y_device_info_nvram);
}
+
+device_init(ds1225y_register_devices)
diff --git a/hw/mips.h b/hw/mips.h
index d8e4954..5d59b1e 100644
--- a/hw/mips.h
+++ b/hw/mips.h
@@ -8,10 +8,6 @@ PCIBus *pci_gt64120_init(qemu_irq *pic);
/* bonito.c */
PCIBus *bonito_init(qemu_irq *pic);
-/* ds1225y.c */
-void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
-void ds1225y_set_protection(void *opaque, int protection);
-
/* mipsnet.c */
void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 08175ab..6daf76e 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -247,8 +247,9 @@ void mips_jazz_init (ram_addr_t ram_size,
/* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
audio_init(i8259);
- /* NVRAM: Unprotected at 0x9000, Protected at 0xa000, Read only at 0xb000 */
- ds1225y_init(0x80009000, "nvram");
+ /* NVRAM */
+ dev = qdev_create(NULL, "ds1225y,filename=nvram");
+ qdev_init_nofail(dev);
/* LED indicator */
dev = qdev_create(NULL, "jazz-led");
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 19/20] [MIPS] qdev: add a mips board device, which initializes the ram and the rom
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (17 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 18/20] [MIPS] qdev: convert ds1225y nvram to sysbus device Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-01 17:37 ` [Qemu-devel] [PATCH 20/20] [MIPS] qdev: Complete rc4030 conversion, by removing legacy stuff Hervé Poussineau
2010-08-02 16:06 ` [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Blue Swirl
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Also add an empty machine (to be used with the mips board device)
Finally, add a workaround to be able to create the initial system bus
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mips_jazz.c | 78 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
hw/qdev.c | 6 ++++
2 files changed, 84 insertions(+), 0 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 6daf76e..b4c95c9 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -37,6 +37,7 @@
#include "loader.h"
#include "mc146818rtc.h"
#include "rc4030.h"
+#include "sysbus.h"
enum jazz_model_e
{
@@ -274,6 +275,14 @@ void mips_pica61_init (ram_addr_t ram_size,
mips_jazz_init(ram_size, cpu_model, JAZZ_PICA61);
}
+static
+void empty_init (ram_addr_t ram_size,
+ const char *boot_device,
+ const char *kernel_filename, const char *kernel_cmdline,
+ const char *initrd_filename, const char *cpu_model)
+{
+}
+
static QEMUMachine mips_magnum_machine = {
.name = "magnum",
.desc = "MIPS Magnum",
@@ -288,10 +297,79 @@ static QEMUMachine mips_pica61_machine = {
.use_scsi = 1,
};
+static QEMUMachine empty_machine = {
+ .name = "empty",
+ .desc = "Empty machine",
+ .init = empty_init,
+};
+
static void mips_jazz_machine_init(void)
{
qemu_register_machine(&mips_magnum_machine);
qemu_register_machine(&mips_pica61_machine);
+ qemu_register_machine(&empty_machine);
}
machine_init(mips_jazz_machine_init);
+
+typedef struct MipsBoardState {
+ SysBusDevice busdev;
+
+ char *romfile;
+ uint32_t romsize;
+ uint32_t ramsize;
+} MipsBoardState;
+
+static int mips_board_device_init(SysBusDevice *dev)
+{
+ MipsBoardState *s = FROM_SYSBUS(MipsBoardState, dev);
+ int bios_size;
+ ram_addr_t ram_size;
+ ram_addr_t ram_offset;
+ ram_addr_t bios_offset;
+
+ /* allocate RAM */
+ ram_size = s->ramsize * 1024 * 1024;
+ ram_offset = qemu_ram_alloc(NULL, "mips_jazz.ram", ram_size);
+ cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
+
+ /* load the BIOS image */
+ if (s->romfile) {
+ bios_offset = qemu_ram_alloc(NULL, "mips_jazz.bios", s->romsize);
+ cpu_register_physical_memory(0x1fc00000LL,
+ s->romsize, bios_offset | IO_MEM_ROM);
+ cpu_register_physical_memory(0xfff00000LL,
+ s->romsize, bios_offset | IO_MEM_ROM);
+
+ bios_size = load_image_targphys(s->romfile,
+ 0x1fc00000LL,
+ s->romsize);
+
+ bios_size = load_image_targphys(s->romfile,
+ 0xfff00000LL,
+ s->romsize);
+ if (bios_size != s->romsize) {
+ return -1;
+ }
+ }
+ return 0;
+}
+
+static SysBusDeviceInfo board_device_info = {
+ .qdev.name = "mips-board",
+ .qdev.size = sizeof(MipsBoardState),
+ .init = mips_board_device_init,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_STRING("romfile", MipsBoardState, romfile),
+ DEFINE_PROP_HEX32("romsize", MipsBoardState, romsize, 0x40000),
+ DEFINE_PROP_UINT32("ramsize", MipsBoardState, ramsize, 64),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+};
+
+static void mips_register_devices(void)
+{
+ sysbus_register_withprop(&board_device_info);
+}
+
+device_init(mips_register_devices)
diff --git a/hw/qdev.c b/hw/qdev.c
index e99c73f..f907385 100644
--- a/hw/qdev.c
+++ b/hw/qdev.c
@@ -455,6 +455,12 @@ static BusState *qbus_find_recursive(BusState *bus, const char *name,
BusState *child, *ret;
int match = 1;
+ if (!bus) {
+ if (!main_system_bus) {
+ main_system_bus = qbus_create(&system_bus_info, NULL, "main-system-bus");
+ }
+ return main_system_bus;
+ }
if (name && (strcmp(bus->name, name) != 0)) {
match = 0;
}
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* [Qemu-devel] [PATCH 20/20] [MIPS] qdev: Complete rc4030 conversion, by removing legacy stuff
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (18 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 19/20] [MIPS] qdev: add a mips board device, which initializes the ram and the rom Hervé Poussineau
@ 2010-08-01 17:37 ` Hervé Poussineau
2010-08-02 16:06 ` [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Blue Swirl
20 siblings, 0 replies; 23+ messages in thread
From: Hervé Poussineau @ 2010-08-01 17:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Hervé Poussineau
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
hw/mips_jazz.c | 7 +++----
hw/rc4030.c | 17 -----------------
hw/rc4030.h | 4 ----
3 files changed, 3 insertions(+), 25 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index b4c95c9..04d80ee 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -104,9 +104,7 @@ void mips_jazz_init (ram_addr_t ram_size,
int bios_size, n;
BusState *cpu;
DeviceState *dev;
- qemu_irq *rc4030, *i8259;
- rc4030_dma *dmas;
- void* rc4030_opaque;
+ qemu_irq *i8259;
int s_dma_dummy;
NICInfo *nd;
PITState *pit;
@@ -158,7 +156,8 @@ void mips_jazz_init (ram_addr_t ram_size,
}
/* Chipset */
- rc4030_opaque = rc4030_init(cpu, &rc4030, &dmas);
+ dev = qdev_create(cpu, "rc4030");
+ qdev_init_nofail(dev);
s_dma_dummy = cpu_register_io_memory(dma_dummy_read, dma_dummy_write, NULL);
cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy);
diff --git a/hw/rc4030.c b/hw/rc4030.c
index 3c8cdfa..710085e 100644
--- a/hw/rc4030.c
+++ b/hw/rc4030.c
@@ -948,20 +948,3 @@ static void rc4030_register_devices(void)
device_init(rc4030_register_devices)
-void *rc4030_init(BusState *bus,
- qemu_irq **irqs, rc4030_dma **dmas)
-{
- DeviceState *dev;
- rc4030State* rc4030;
-
- dev = qdev_create(bus, "rc4030");
- qdev_init_nofail(dev);
-
- rc4030 = DO_UPCAST(rc4030State, busdev, dev);
-
- *irqs = rc4030->busdev.gpio_in;
- *dmas = rc4030->bus.dmas;
-
- return rc4030;
-}
-
diff --git a/hw/rc4030.h b/hw/rc4030.h
index 58522f3..f15b459 100644
--- a/hw/rc4030.h
+++ b/hw/rc4030.h
@@ -34,8 +34,4 @@ void rc4030_dma_write(void *dma, uint8_t *buf, int len);
void *rc4030_get_opaque(void);
rc4030_dma rc4030_get_dma(int dma);
-/* Non-qdev compatibility stuff... */
-void *rc4030_init(BusState *parent,
- qemu_irq **irqs, rc4030_dma **dmas);
-
#endif
--
1.7.1.GIT
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev
2010-08-01 13:42 [Qemu-devel] [PATCH 00/20] MIPS Magnum conversion to qdev Hervé Poussineau
` (19 preceding siblings ...)
2010-08-01 17:37 ` [Qemu-devel] [PATCH 20/20] [MIPS] qdev: Complete rc4030 conversion, by removing legacy stuff Hervé Poussineau
@ 2010-08-02 16:06 ` Blue Swirl
20 siblings, 0 replies; 23+ messages in thread
From: Blue Swirl @ 2010-08-02 16:06 UTC (permalink / raw)
To: Hervé Poussineau; +Cc: QEMU Developers
On Sun, Aug 1, 2010 at 1:42 PM, Hervé Poussineau <hpoussin@reactos.org> wrote:
> This series converts devices used by MIPS Magnum emulation to qdev devices.
> Once applied, Magnum emulation will be fully creatable by a configuration
> file (see attached file)
>
> usage:
> qemu-system-mips64el -M empty -nodefaults -readconfig magnum
> -netdev id=nic,type=user
> -drive id=disk,format=qcow2,if=none,file=1G.qcow2
> -drive id=cdrom,media=cdrom,format=raw,if=none,file=arccd.iso
> -chardev id=serial0,backend=vc
> -chardev id=serial1,backend=vc
> -chardev id=parallel0,backend=vc
>
> All feedback is very appreciated.
I appreciate very much your goal to make the devices qdevified.
However, the approach is not correct. Instead of adding 'iobase'
parameters and using cpu_register_physical_memory() in the device
code, you should just use sysbus_mmio_map() at board level. I also
don't see much need for a dedicated rc4030 bus. See for example
syborg.c for a mostly qdevified board.
^ permalink raw reply [flat|nested] 23+ messages in thread