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* [PATCH] drm: micro optimise cache flushing
@ 2012-09-19  1:12 Dave Airlie
  2012-09-19  7:50 ` Chris Wilson
  0 siblings, 1 reply; 3+ messages in thread
From: Dave Airlie @ 2012-09-19  1:12 UTC (permalink / raw)
  To: dri-devel

From: Dave Airlie <airlied@redhat.com>

We hit this a lot with i915 and although we'd like to engineer things to hit
it a lot less, this commit at least makes it consume a few less cycles.

from something containing
movzwl 0x0(%rip),%r10d
to
add    %r8,%rdx

I only noticed it while using perf to profile something else.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/drm_cache.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
index 08758e0..3dbc7f1 100644
--- a/drivers/gpu/drm/drm_cache.c
+++ b/drivers/gpu/drm/drm_cache.c
@@ -37,12 +37,13 @@ drm_clflush_page(struct page *page)
 {
 	uint8_t *page_virtual;
 	unsigned int i;
+	const int size = boot_cpu_data.x86_clflush_size;
 
 	if (unlikely(page == NULL))
 		return;
 
 	page_virtual = kmap_atomic(page);
-	for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
+	for (i = 0; i < PAGE_SIZE; i += size)
 		clflush(page_virtual + i);
 	kunmap_atomic(page_virtual);
 }
-- 
1.7.12

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] drm: micro optimise cache flushing
  2012-09-19  1:12 [PATCH] drm: micro optimise cache flushing Dave Airlie
@ 2012-09-19  7:50 ` Chris Wilson
  2012-09-20 10:02   ` Jani Nikula
  0 siblings, 1 reply; 3+ messages in thread
From: Chris Wilson @ 2012-09-19  7:50 UTC (permalink / raw)
  To: Dave Airlie, dri-devel

On Wed, 19 Sep 2012 11:12:41 +1000, Dave Airlie <airlied@gmail.com> wrote:
> From: Dave Airlie <airlied@redhat.com>
> 
> We hit this a lot with i915 and although we'd like to engineer things to hit
> it a lot less, this commit at least makes it consume a few less cycles.
> 
> from something containing
> movzwl 0x0(%rip),%r10d
> to
> add    %r8,%rdx
> 
> I only noticed it while using perf to profile something else.
> 
> Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

I would have thought this is something the compiler should, with the
appropriate hints, be smart enough to decide for itself as boot_cpu_data
should be constant once defined. *shrug*
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] drm: micro optimise cache flushing
  2012-09-19  7:50 ` Chris Wilson
@ 2012-09-20 10:02   ` Jani Nikula
  0 siblings, 0 replies; 3+ messages in thread
From: Jani Nikula @ 2012-09-20 10:02 UTC (permalink / raw)
  To: Chris Wilson, Dave Airlie, dri-devel

On Wed, 19 Sep 2012, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Wed, 19 Sep 2012 11:12:41 +1000, Dave Airlie <airlied@gmail.com> wrote:
>> From: Dave Airlie <airlied@redhat.com>
>> 
>> We hit this a lot with i915 and although we'd like to engineer things to hit
>> it a lot less, this commit at least makes it consume a few less cycles.
>> 
>> from something containing
>> movzwl 0x0(%rip),%r10d
>> to
>> add    %r8,%rdx
>> 
>> I only noticed it while using perf to profile something else.
>> 
>> Signed-off-by: Dave Airlie <airlied@redhat.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
>
> I would have thought this is something the compiler should, with the
> appropriate hints, be smart enough to decide for itself as boot_cpu_data
> should be constant once defined. *shrug*

Since it's not obvious the compiler isn't smart enough, should the code
carry a comment so we don't forget?

BR,
Jani.

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2012-09-20  9:57 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2012-09-19  1:12 [PATCH] drm: micro optimise cache flushing Dave Airlie
2012-09-19  7:50 ` Chris Wilson
2012-09-20 10:02   ` Jani Nikula

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