From: Arnd Bergmann <arnd@arndb.de>
To: Jingoo Han <jg1.han@samsung.com>
Cc: "'Jason Gunthorpe'" <jgunthorpe@obsidianresearch.com>,
linux-arm-kernel@lists.infradead.org,
"'Thomas Petazzoni'" <thomas.petazzoni@free-electrons.com>,
linux-samsung-soc@vger.kernel.org,
"'Siva Reddy Kallam'" <siva.kallam@samsung.com>,
"'Surendranath Gurivireddy Balla'" <suren.reddy@samsung.com>,
linux-pci@vger.kernel.org, devicetree-discuss@lists.ozlabs.org,
"'Thierry Reding'" <thierry.reding@avionic-design.de>,
linux-kernel@vger.kernel.org,
"'Grant Likely'" <grant.likely@secretlab.ca>,
"'Kukjin Kim'" <kgene.kim@samsung.com>,
"'Thomas Abraham'" <thomas.abraham@linaro.org>,
"'Bjorn Helgaas'" <bhelgaas@google.com>,
"'Andrew Murray'" <andrew.murray@arm.com>
Subject: Re: [PATCH 6/6] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC
Date: Mon, 10 Jun 2013 17:22:09 +0200 [thread overview]
Message-ID: <201306101722.10146.arnd@arndb.de> (raw)
In-Reply-To: <000001ce65b5$e45477f0$acfd67d0$@samsung.com>
On Monday 10 June 2013, Jingoo Han wrote:
> On Saturday, June 08, 2013 2:43 AM, Arnd Bergmann wrote:
> For multiple domains, how can I fix the DT properties?
Domains are a Linux concept, you have to pick a new domain number for each
struct hw_pci you register.
> Current DT properties are as below:
>
> + pcie0@40000000 {
> + compatible = "samsung,exynos5440-pcie";
> + reg = <0x40000000 0x4000
> + 0x290000 0x1000
> + 0x270000 0x1000
> + 0x271000 0x40>;
> + interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00200000 /* configuration space */
> + 0x81000000 0 0 0x40200000 0 0x00004000 /* downstream I/O */
> + 0x82000000 0 0 0x40204000 0 0x10000000>; /* non-prefetchable memory */
> + };
An unrelated comment: your first "reg" field seems to overlap with part
of your configuration space. Is that intentional?
Also, shouldn't your memory space end on a 256MB boundary, rather than
extend up to 0x50203fff?
Arnd
WARNING: multiple messages have this Message-ID (diff)
From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 6/6] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC
Date: Mon, 10 Jun 2013 17:22:09 +0200 [thread overview]
Message-ID: <201306101722.10146.arnd@arndb.de> (raw)
In-Reply-To: <000001ce65b5$e45477f0$acfd67d0$@samsung.com>
On Monday 10 June 2013, Jingoo Han wrote:
> On Saturday, June 08, 2013 2:43 AM, Arnd Bergmann wrote:
> For multiple domains, how can I fix the DT properties?
Domains are a Linux concept, you have to pick a new domain number for each
struct hw_pci you register.
> Current DT properties are as below:
>
> + pcie0 at 40000000 {
> + compatible = "samsung,exynos5440-pcie";
> + reg = <0x40000000 0x4000
> + 0x290000 0x1000
> + 0x270000 0x1000
> + 0x271000 0x40>;
> + interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00200000 /* configuration space */
> + 0x81000000 0 0 0x40200000 0 0x00004000 /* downstream I/O */
> + 0x82000000 0 0 0x40204000 0 0x10000000>; /* non-prefetchable memory */
> + };
An unrelated comment: your first "reg" field seems to overlap with part
of your configuration space. Is that intentional?
Also, shouldn't your memory space end on a 256MB boundary, rather than
extend up to 0x50203fff?
Arnd
next prev parent reply other threads:[~2013-06-10 15:22 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-23 4:04 [PATCH 1/6] of/pci: Provide support for parsing PCI DT ranges property Jingoo Han
2013-03-23 4:04 ` Jingoo Han
2013-03-23 4:05 ` [PATCH 2/6] of/pci: Add of_pci_parse_bus_range() function Jingoo Han
2013-03-23 4:05 ` Jingoo Han
2013-03-23 4:05 ` Jingoo Han
2013-03-23 4:06 ` [PATCH 3/6] pci: infrastructure to add drivers in drivers/pci/host Jingoo Han
2013-03-23 4:06 ` Jingoo Han
2013-03-23 4:07 ` [PATCH 4/6] pci: Add PCIe driver for Samsung Exynos Jingoo Han
2013-03-23 4:07 ` Jingoo Han
2013-03-23 4:07 ` Jingoo Han
2013-03-26 21:33 ` Rob Herring
2013-03-26 21:33 ` Rob Herring
2013-03-27 1:29 ` Jingoo Han
2013-03-27 1:29 ` Jingoo Han
2013-03-23 4:08 ` [PATCH 5/6] ARM: EXYNOS: Enable PCIe support for Exynos5440 Jingoo Han
2013-03-23 4:08 ` Jingoo Han
2013-03-23 4:09 ` [PATCH 6/6] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC Jingoo Han
2013-03-23 4:09 ` Jingoo Han
2013-03-25 17:04 ` Jason Gunthorpe
2013-03-25 17:04 ` Jason Gunthorpe
2013-03-27 8:35 ` Jingoo Han
2013-03-27 8:35 ` Jingoo Han
2013-03-27 8:35 ` Jingoo Han
2013-03-27 16:13 ` Jason Gunthorpe
2013-03-27 16:13 ` Jason Gunthorpe
2013-04-08 9:08 ` Jingoo Han
2013-04-08 9:08 ` Jingoo Han
2013-04-08 9:08 ` Jingoo Han
2013-04-08 16:56 ` Jason Gunthorpe
2013-04-08 16:56 ` Jason Gunthorpe
2013-06-07 9:19 ` Jingoo Han
2013-06-07 9:19 ` Jingoo Han
2013-06-07 11:59 ` Arnd Bergmann
2013-06-07 11:59 ` Arnd Bergmann
2013-06-07 16:20 ` Jason Gunthorpe
2013-06-07 16:20 ` Jason Gunthorpe
2013-06-07 17:43 ` Arnd Bergmann
2013-06-07 17:43 ` Arnd Bergmann
2013-06-10 8:38 ` Jingoo Han
2013-06-10 8:38 ` Jingoo Han
2013-06-10 15:22 ` Arnd Bergmann [this message]
2013-06-10 15:22 ` Arnd Bergmann
2013-06-11 6:00 ` Jingoo Han
2013-06-11 6:00 ` Jingoo Han
2013-06-12 15:10 ` Arnd Bergmann
2013-06-12 15:10 ` Arnd Bergmann
2013-03-23 10:41 ` [PATCH 1/6] of/pci: Provide support for parsing PCI DT ranges property Russell King - ARM Linux
2013-03-23 10:41 ` Russell King - ARM Linux
2013-03-23 13:37 ` Thomas Petazzoni
2013-03-23 13:37 ` Thomas Petazzoni
2013-03-25 10:21 ` Andrew Murray
2013-03-25 10:21 ` Andrew Murray
2013-03-25 10:21 ` Andrew Murray
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=201306101722.10146.arnd@arndb.de \
--to=arnd@arndb.de \
--cc=andrew.murray@arm.com \
--cc=bhelgaas@google.com \
--cc=devicetree-discuss@lists.ozlabs.org \
--cc=grant.likely@secretlab.ca \
--cc=jg1.han@samsung.com \
--cc=jgunthorpe@obsidianresearch.com \
--cc=kgene.kim@samsung.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-samsung-soc@vger.kernel.org \
--cc=siva.kallam@samsung.com \
--cc=suren.reddy@samsung.com \
--cc=thierry.reding@avionic-design.de \
--cc=thomas.abraham@linaro.org \
--cc=thomas.petazzoni@free-electrons.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.