From: Arnd Bergmann <arnd@arndb.de>
To: Jingoo Han <jg1.han@samsung.com>
Cc: "'Jason Gunthorpe'" <jgunthorpe@obsidianresearch.com>,
linux-arm-kernel@lists.infradead.org,
"'Thomas Petazzoni'" <thomas.petazzoni@free-electrons.com>,
linux-samsung-soc@vger.kernel.org,
"'Siva Reddy Kallam'" <siva.kallam@samsung.com>,
"'Surendranath Gurivireddy Balla'" <suren.reddy@samsung.com>,
linux-pci@vger.kernel.org, devicetree-discuss@lists.ozlabs.org,
"'Thierry Reding'" <thierry.reding@avionic-design.de>,
linux-kernel@vger.kernel.org,
"'Grant Likely'" <grant.likely@secretlab.ca>,
"'Kukjin Kim'" <kgene.kim@samsung.com>,
"'Thomas Abraham'" <thomas.abraham@linaro.org>,
"'Bjorn Helgaas'" <bhelgaas@google.com>,
"'Andrew Murray'" <andrew.murray@arm.com>
Subject: Re: [PATCH 6/6] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC
Date: Wed, 12 Jun 2013 17:10:58 +0200 [thread overview]
Message-ID: <201306121710.58601.arnd@arndb.de> (raw)
In-Reply-To: <002e01ce6668$f785dc20$e6919460$@samsung.com>
On Tuesday 11 June 2013, Jingoo Han wrote:
> > > + ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00200000 /* configuration space */
> > > + 0x81000000 0 0 0x40200000 0 0x00004000 /* downstream I/O */
> > > + 0x82000000 0 0 0x40204000 0 0x10000000>; /* non-prefetchable memory */
> > > + };
> >
> ...
> > Also, shouldn't your memory space end on a 256MB boundary, rather than
> > extend up to 0x50203fff?
>
> According to the manual of Exynos PCIe, each memory space for Exynos PCIe
> can support 512MB, including I/O, CFG regions.
>
> Is there any problem when over 256MB boundary is used?
> Please let me know. :)
No, that's not a problem, but I think you should have the window span
the entire space that is provided in hardware. If there are 512 MB total, why
not use them?
You could use
ranges = <0x82000000 0 0 0x40204000 0 0x1fdfc000>;
to pass a range for the memory space that extends all the way until
0x5fffffff.
Arnd
WARNING: multiple messages have this Message-ID (diff)
From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 6/6] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC
Date: Wed, 12 Jun 2013 17:10:58 +0200 [thread overview]
Message-ID: <201306121710.58601.arnd@arndb.de> (raw)
In-Reply-To: <002e01ce6668$f785dc20$e6919460$@samsung.com>
On Tuesday 11 June 2013, Jingoo Han wrote:
> > > + ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00200000 /* configuration space */
> > > + 0x81000000 0 0 0x40200000 0 0x00004000 /* downstream I/O */
> > > + 0x82000000 0 0 0x40204000 0 0x10000000>; /* non-prefetchable memory */
> > > + };
> >
> ...
> > Also, shouldn't your memory space end on a 256MB boundary, rather than
> > extend up to 0x50203fff?
>
> According to the manual of Exynos PCIe, each memory space for Exynos PCIe
> can support 512MB, including I/O, CFG regions.
>
> Is there any problem when over 256MB boundary is used?
> Please let me know. :)
No, that's not a problem, but I think you should have the window span
the entire space that is provided in hardware. If there are 512 MB total, why
not use them?
You could use
ranges = <0x82000000 0 0 0x40204000 0 0x1fdfc000>;
to pass a range for the memory space that extends all the way until
0x5fffffff.
Arnd
next prev parent reply other threads:[~2013-06-12 15:11 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-23 4:04 [PATCH 1/6] of/pci: Provide support for parsing PCI DT ranges property Jingoo Han
2013-03-23 4:04 ` Jingoo Han
2013-03-23 4:05 ` [PATCH 2/6] of/pci: Add of_pci_parse_bus_range() function Jingoo Han
2013-03-23 4:05 ` Jingoo Han
2013-03-23 4:05 ` Jingoo Han
2013-03-23 4:06 ` [PATCH 3/6] pci: infrastructure to add drivers in drivers/pci/host Jingoo Han
2013-03-23 4:06 ` Jingoo Han
2013-03-23 4:07 ` [PATCH 4/6] pci: Add PCIe driver for Samsung Exynos Jingoo Han
2013-03-23 4:07 ` Jingoo Han
2013-03-23 4:07 ` Jingoo Han
2013-03-26 21:33 ` Rob Herring
2013-03-26 21:33 ` Rob Herring
2013-03-27 1:29 ` Jingoo Han
2013-03-27 1:29 ` Jingoo Han
2013-03-23 4:08 ` [PATCH 5/6] ARM: EXYNOS: Enable PCIe support for Exynos5440 Jingoo Han
2013-03-23 4:08 ` Jingoo Han
2013-03-23 4:09 ` [PATCH 6/6] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC Jingoo Han
2013-03-23 4:09 ` Jingoo Han
2013-03-25 17:04 ` Jason Gunthorpe
2013-03-25 17:04 ` Jason Gunthorpe
2013-03-27 8:35 ` Jingoo Han
2013-03-27 8:35 ` Jingoo Han
2013-03-27 8:35 ` Jingoo Han
2013-03-27 16:13 ` Jason Gunthorpe
2013-03-27 16:13 ` Jason Gunthorpe
2013-04-08 9:08 ` Jingoo Han
2013-04-08 9:08 ` Jingoo Han
2013-04-08 9:08 ` Jingoo Han
2013-04-08 16:56 ` Jason Gunthorpe
2013-04-08 16:56 ` Jason Gunthorpe
2013-06-07 9:19 ` Jingoo Han
2013-06-07 9:19 ` Jingoo Han
2013-06-07 11:59 ` Arnd Bergmann
2013-06-07 11:59 ` Arnd Bergmann
2013-06-07 16:20 ` Jason Gunthorpe
2013-06-07 16:20 ` Jason Gunthorpe
2013-06-07 17:43 ` Arnd Bergmann
2013-06-07 17:43 ` Arnd Bergmann
2013-06-10 8:38 ` Jingoo Han
2013-06-10 8:38 ` Jingoo Han
2013-06-10 15:22 ` Arnd Bergmann
2013-06-10 15:22 ` Arnd Bergmann
2013-06-11 6:00 ` Jingoo Han
2013-06-11 6:00 ` Jingoo Han
2013-06-12 15:10 ` Arnd Bergmann [this message]
2013-06-12 15:10 ` Arnd Bergmann
2013-03-23 10:41 ` [PATCH 1/6] of/pci: Provide support for parsing PCI DT ranges property Russell King - ARM Linux
2013-03-23 10:41 ` Russell King - ARM Linux
2013-03-23 13:37 ` Thomas Petazzoni
2013-03-23 13:37 ` Thomas Petazzoni
2013-03-25 10:21 ` Andrew Murray
2013-03-25 10:21 ` Andrew Murray
2013-03-25 10:21 ` Andrew Murray
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