* [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-01 2:28 ` Heyi Guo
0 siblings, 0 replies; 22+ messages in thread
From: Heyi Guo @ 2019-03-01 2:28 UTC (permalink / raw)
To: qemu-arm, qemu-devel
Cc: wanghaibin.wang, Heyi Guo, Shannon Zhao, Peter Maydell,
Michael S. Tsirkin, Igor Mammedov, Heyi Guo
After the introduction of generic PCIe root port and PCIe-PCI bridge,
we will also have SHPC controller on ARM, so just enalbe SHPC native
hot plug.
Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Heyi Guo <guoheyi@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
hw/arm/virt-acpi-build.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 04b62c7..7849ec5 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
- aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
+
+ /*
+ * Allow OS control for all 5 features:
+ * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
+ */
+ aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
aml_name("CTRL")));
ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [Qemu-arm] [PATCH] hw/arm/acpi: enable SHPC native hot plug
2019-03-01 2:28 ` [Qemu-devel] " Heyi Guo
@ 2019-03-01 10:44 ` Igor Mammedov
-1 siblings, 0 replies; 22+ messages in thread
From: Igor Mammedov @ 2019-03-01 10:44 UTC (permalink / raw)
To: Heyi Guo
Cc: Peter Maydell, Michael S. Tsirkin, qemu-devel, Shannon Zhao,
Heyi Guo, qemu-arm, wanghaibin.wang
On Fri, 1 Mar 2019 10:28:30 +0800
Heyi Guo <guoheyi@huawei.com> wrote:
> After the introduction of generic PCIe root port and PCIe-PCI bridge,
> we will also have SHPC controller on ARM, so just enalbe SHPC native
> hot plug.
Just out of curiosity,
An understand the need for SHPC on plain PCI but in case of PCIe
why native PCIe hotplug isn't sufficient?
> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: "Michael S. Tsirkin" <mst@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> hw/arm/virt-acpi-build.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c7..7849ec5 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> +
> + /*
> + * Allow OS control for all 5 features:
> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + */
> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-01 10:44 ` Igor Mammedov
0 siblings, 0 replies; 22+ messages in thread
From: Igor Mammedov @ 2019-03-01 10:44 UTC (permalink / raw)
To: Heyi Guo
Cc: qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao,
Peter Maydell, Michael S. Tsirkin, Heyi Guo
On Fri, 1 Mar 2019 10:28:30 +0800
Heyi Guo <guoheyi@huawei.com> wrote:
> After the introduction of generic PCIe root port and PCIe-PCI bridge,
> we will also have SHPC controller on ARM, so just enalbe SHPC native
> hot plug.
Just out of curiosity,
An understand the need for SHPC on plain PCI but in case of PCIe
why native PCIe hotplug isn't sufficient?
> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: "Michael S. Tsirkin" <mst@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> hw/arm/virt-acpi-build.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c7..7849ec5 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> +
> + /*
> + * Allow OS control for all 5 features:
> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + */
> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-arm] [PATCH] hw/arm/acpi: enable SHPC native hot plug
2019-03-01 10:44 ` [Qemu-devel] " Igor Mammedov
@ 2019-03-01 11:37 ` Heyi Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Heyi Guo @ 2019-03-01 11:37 UTC (permalink / raw)
To: Igor Mammedov
Cc: Peter Maydell, Michael S. Tsirkin, qemu-devel, Shannon Zhao,
Heyi Guo, qemu-arm, wanghaibin.wang
On 2019/3/1 18:44, Igor Mammedov wrote:
> On Fri, 1 Mar 2019 10:28:30 +0800
> Heyi Guo <guoheyi@huawei.com> wrote:
>
>> After the introduction of generic PCIe root port and PCIe-PCI bridge,
>> we will also have SHPC controller on ARM, so just enalbe SHPC native
>> hot plug.
> Just out of curiosity,
> An understand the need for SHPC on plain PCI but in case of PCIe
> why native PCIe hotplug isn't sufficient?
For future extension and completeness:
1. PCI is sometimes more flexible than PCIe, for it can have up to 32 devices in virtual world. The shortage for PCIe hot plug is that the number of PCIe root ports is fixed.
2. We have SHPC when booting through device tree mode, but don't have it through ACPI mode.
If I missed something, please let me know.
Thanks,
Heyi
>
>> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
>> Cc: Peter Maydell <peter.maydell@linaro.org>
>> Cc: "Michael S. Tsirkin" <mst@redhat.com>
>> Cc: Igor Mammedov <imammedo@redhat.com>
>> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> hw/arm/virt-acpi-build.c | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>> index 04b62c7..7849ec5 100644
>> --- a/hw/arm/virt-acpi-build.c
>> +++ b/hw/arm/virt-acpi-build.c
>> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
>> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
>> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
>> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
>> +
>> + /*
>> + * Allow OS control for all 5 features:
>> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
>> + */
>> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
>> aml_name("CTRL")));
>>
>> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
>
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-01 11:37 ` Heyi Guo
0 siblings, 0 replies; 22+ messages in thread
From: Heyi Guo @ 2019-03-01 11:37 UTC (permalink / raw)
To: Igor Mammedov
Cc: qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao,
Peter Maydell, Michael S. Tsirkin, Heyi Guo
On 2019/3/1 18:44, Igor Mammedov wrote:
> On Fri, 1 Mar 2019 10:28:30 +0800
> Heyi Guo <guoheyi@huawei.com> wrote:
>
>> After the introduction of generic PCIe root port and PCIe-PCI bridge,
>> we will also have SHPC controller on ARM, so just enalbe SHPC native
>> hot plug.
> Just out of curiosity,
> An understand the need for SHPC on plain PCI but in case of PCIe
> why native PCIe hotplug isn't sufficient?
For future extension and completeness:
1. PCI is sometimes more flexible than PCIe, for it can have up to 32 devices in virtual world. The shortage for PCIe hot plug is that the number of PCIe root ports is fixed.
2. We have SHPC when booting through device tree mode, but don't have it through ACPI mode.
If I missed something, please let me know.
Thanks,
Heyi
>
>> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
>> Cc: Peter Maydell <peter.maydell@linaro.org>
>> Cc: "Michael S. Tsirkin" <mst@redhat.com>
>> Cc: Igor Mammedov <imammedo@redhat.com>
>> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> hw/arm/virt-acpi-build.c | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>> index 04b62c7..7849ec5 100644
>> --- a/hw/arm/virt-acpi-build.c
>> +++ b/hw/arm/virt-acpi-build.c
>> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
>> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
>> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
>> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
>> +
>> + /*
>> + * Allow OS control for all 5 features:
>> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
>> + */
>> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
>> aml_name("CTRL")));
>>
>> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
>
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
2019-03-01 2:28 ` [Qemu-devel] " Heyi Guo
@ 2019-03-01 13:47 ` Michael S. Tsirkin
-1 siblings, 0 replies; 22+ messages in thread
From: Michael S. Tsirkin @ 2019-03-01 13:47 UTC (permalink / raw)
To: Heyi Guo
Cc: Peter Maydell, qemu-devel, Shannon Zhao, Heyi Guo, qemu-arm,
Igor Mammedov, wanghaibin.wang
On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> After the introduction of generic PCIe root port and PCIe-PCI bridge,
> we will also have SHPC controller on ARM, so just enalbe SHPC native
> hot plug.
>
> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: "Michael S. Tsirkin" <mst@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
So when OS enables SHPC, should we block ACPI hotplug events?
> ---
> hw/arm/virt-acpi-build.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c7..7849ec5 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> +
> + /*
> + * Allow OS control for all 5 features:
> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + */
> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> --
> 1.8.3.1
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-01 13:47 ` Michael S. Tsirkin
0 siblings, 0 replies; 22+ messages in thread
From: Michael S. Tsirkin @ 2019-03-01 13:47 UTC (permalink / raw)
To: Heyi Guo
Cc: qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao,
Peter Maydell, Igor Mammedov, Heyi Guo
On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> After the introduction of generic PCIe root port and PCIe-PCI bridge,
> we will also have SHPC controller on ARM, so just enalbe SHPC native
> hot plug.
>
> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: "Michael S. Tsirkin" <mst@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
So when OS enables SHPC, should we block ACPI hotplug events?
> ---
> hw/arm/virt-acpi-build.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c7..7849ec5 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> +
> + /*
> + * Allow OS control for all 5 features:
> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + */
> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> --
> 1.8.3.1
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-arm] [PATCH] hw/arm/acpi: enable SHPC native hot plug
2019-03-01 13:47 ` Michael S. Tsirkin
@ 2019-03-01 14:04 ` Heyi Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Heyi Guo @ 2019-03-01 14:04 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Peter Maydell, qemu-devel, Shannon Zhao, Heyi Guo, qemu-arm,
Igor Mammedov, wanghaibin.wang
On 2019/3/1 21:47, Michael S. Tsirkin wrote:
> On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
>> After the introduction of generic PCIe root port and PCIe-PCI bridge,
>> we will also have SHPC controller on ARM, so just enalbe SHPC native
>> hot plug.
>>
>> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
>> Cc: Peter Maydell <peter.maydell@linaro.org>
>> Cc: "Michael S. Tsirkin" <mst@redhat.com>
>> Cc: Igor Mammedov <imammedo@redhat.com>
>> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>
> So when OS enables SHPC, should we block ACPI hotplug events?
I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently?
Thanks,
Heyi
>
>> ---
>> hw/arm/virt-acpi-build.c | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>> index 04b62c7..7849ec5 100644
>> --- a/hw/arm/virt-acpi-build.c
>> +++ b/hw/arm/virt-acpi-build.c
>> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
>> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
>> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
>> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
>> +
>> + /*
>> + * Allow OS control for all 5 features:
>> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
>> + */
>> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
>> aml_name("CTRL")));
>>
>> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
>> --
>> 1.8.3.1
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-01 14:04 ` Heyi Guo
0 siblings, 0 replies; 22+ messages in thread
From: Heyi Guo @ 2019-03-01 14:04 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao,
Peter Maydell, Igor Mammedov, Heyi Guo
On 2019/3/1 21:47, Michael S. Tsirkin wrote:
> On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
>> After the introduction of generic PCIe root port and PCIe-PCI bridge,
>> we will also have SHPC controller on ARM, so just enalbe SHPC native
>> hot plug.
>>
>> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
>> Cc: Peter Maydell <peter.maydell@linaro.org>
>> Cc: "Michael S. Tsirkin" <mst@redhat.com>
>> Cc: Igor Mammedov <imammedo@redhat.com>
>> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>
> So when OS enables SHPC, should we block ACPI hotplug events?
I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently?
Thanks,
Heyi
>
>> ---
>> hw/arm/virt-acpi-build.c | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>> index 04b62c7..7849ec5 100644
>> --- a/hw/arm/virt-acpi-build.c
>> +++ b/hw/arm/virt-acpi-build.c
>> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
>> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
>> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
>> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
>> +
>> + /*
>> + * Allow OS control for all 5 features:
>> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
>> + */
>> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
>> aml_name("CTRL")));
>>
>> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
>> --
>> 1.8.3.1
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-arm] [PATCH] hw/arm/acpi: enable SHPC native hot plug
2019-03-01 14:04 ` [Qemu-devel] " Heyi Guo
@ 2019-03-01 14:12 ` Michael S. Tsirkin
-1 siblings, 0 replies; 22+ messages in thread
From: Michael S. Tsirkin @ 2019-03-01 14:12 UTC (permalink / raw)
To: Heyi Guo
Cc: Peter Maydell, qemu-devel, Shannon Zhao, Heyi Guo, qemu-arm,
Igor Mammedov, wanghaibin.wang
On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote:
>
>
> On 2019/3/1 21:47, Michael S. Tsirkin wrote:
> > On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> > > After the introduction of generic PCIe root port and PCIe-PCI bridge,
> > > we will also have SHPC controller on ARM, so just enalbe SHPC native
> > > hot plug.
> > >
> > > Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> > > Cc: Peter Maydell <peter.maydell@linaro.org>
> > > Cc: "Michael S. Tsirkin" <mst@redhat.com>
> > > Cc: Igor Mammedov <imammedo@redhat.com>
> > > Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> > > Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> >
> > So when OS enables SHPC, should we block ACPI hotplug events?
> I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently?
>
> Thanks,
> Heyi
Oh I didn't realise. That explains it sorry about the noise.
> >
> > > ---
> > > hw/arm/virt-acpi-build.c | 7 ++++++-
> > > 1 file changed, 6 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > > index 04b62c7..7849ec5 100644
> > > --- a/hw/arm/virt-acpi-build.c
> > > +++ b/hw/arm/virt-acpi-build.c
> > > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> > > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> > > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> > > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> > > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> > > +
> > > + /*
> > > + * Allow OS control for all 5 features:
> > > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> > > + */
> > > + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> > > aml_name("CTRL")));
> > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> > > --
> > > 1.8.3.1
> > .
> >
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-01 14:12 ` Michael S. Tsirkin
0 siblings, 0 replies; 22+ messages in thread
From: Michael S. Tsirkin @ 2019-03-01 14:12 UTC (permalink / raw)
To: Heyi Guo
Cc: qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao,
Peter Maydell, Igor Mammedov, Heyi Guo
On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote:
>
>
> On 2019/3/1 21:47, Michael S. Tsirkin wrote:
> > On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> > > After the introduction of generic PCIe root port and PCIe-PCI bridge,
> > > we will also have SHPC controller on ARM, so just enalbe SHPC native
> > > hot plug.
> > >
> > > Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> > > Cc: Peter Maydell <peter.maydell@linaro.org>
> > > Cc: "Michael S. Tsirkin" <mst@redhat.com>
> > > Cc: Igor Mammedov <imammedo@redhat.com>
> > > Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> > > Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> >
> > So when OS enables SHPC, should we block ACPI hotplug events?
> I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently?
>
> Thanks,
> Heyi
Oh I didn't realise. That explains it sorry about the noise.
> >
> > > ---
> > > hw/arm/virt-acpi-build.c | 7 ++++++-
> > > 1 file changed, 6 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > > index 04b62c7..7849ec5 100644
> > > --- a/hw/arm/virt-acpi-build.c
> > > +++ b/hw/arm/virt-acpi-build.c
> > > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> > > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> > > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> > > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> > > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> > > +
> > > + /*
> > > + * Allow OS control for all 5 features:
> > > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> > > + */
> > > + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> > > aml_name("CTRL")));
> > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> > > --
> > > 1.8.3.1
> > .
> >
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
2019-03-01 14:12 ` [Qemu-devel] " Michael S. Tsirkin
@ 2019-03-01 14:33 ` Igor Mammedov
-1 siblings, 0 replies; 22+ messages in thread
From: Igor Mammedov @ 2019-03-01 14:33 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Peter Maydell, qemu-devel, Shannon Zhao, Heyi Guo, qemu-arm,
Heyi Guo, wanghaibin.wang
On Fri, 1 Mar 2019 09:12:33 -0500
"Michael S. Tsirkin" <mst@redhat.com> wrote:
> On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote:
> >
> >
> > On 2019/3/1 21:47, Michael S. Tsirkin wrote:
> > > On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> > > > After the introduction of generic PCIe root port and PCIe-PCI bridge,
> > > > we will also have SHPC controller on ARM, so just enalbe SHPC native
> > > > hot plug.
> > > >
> > > > Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> > > > Cc: Peter Maydell <peter.maydell@linaro.org>
> > > > Cc: "Michael S. Tsirkin" <mst@redhat.com>
> > > > Cc: Igor Mammedov <imammedo@redhat.com>
> > > > Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> > > > Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> > >
> > > So when OS enables SHPC, should we block ACPI hotplug events?
> > I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently?
> >
> > Thanks,
> > Heyi
>
> Oh I didn't realise. That explains it sorry about the noise.
And I thought we did not support them on PCIe completely (I mean q35/ich9).
(Or did I miss something)?
>
> > >
> > > > ---
> > > > hw/arm/virt-acpi-build.c | 7 ++++++-
> > > > 1 file changed, 6 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > > > index 04b62c7..7849ec5 100644
> > > > --- a/hw/arm/virt-acpi-build.c
> > > > +++ b/hw/arm/virt-acpi-build.c
> > > > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> > > > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> > > > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> > > > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> > > > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> > > > +
> > > > + /*
> > > > + * Allow OS control for all 5 features:
> > > > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> > > > + */
> > > > + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> > > > aml_name("CTRL")));
> > > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> > > > --
> > > > 1.8.3.1
> > > .
> > >
> >
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-01 14:33 ` Igor Mammedov
0 siblings, 0 replies; 22+ messages in thread
From: Igor Mammedov @ 2019-03-01 14:33 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Heyi Guo, qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao,
Peter Maydell, Heyi Guo
On Fri, 1 Mar 2019 09:12:33 -0500
"Michael S. Tsirkin" <mst@redhat.com> wrote:
> On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote:
> >
> >
> > On 2019/3/1 21:47, Michael S. Tsirkin wrote:
> > > On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> > > > After the introduction of generic PCIe root port and PCIe-PCI bridge,
> > > > we will also have SHPC controller on ARM, so just enalbe SHPC native
> > > > hot plug.
> > > >
> > > > Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> > > > Cc: Peter Maydell <peter.maydell@linaro.org>
> > > > Cc: "Michael S. Tsirkin" <mst@redhat.com>
> > > > Cc: Igor Mammedov <imammedo@redhat.com>
> > > > Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> > > > Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> > >
> > > So when OS enables SHPC, should we block ACPI hotplug events?
> > I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently?
> >
> > Thanks,
> > Heyi
>
> Oh I didn't realise. That explains it sorry about the noise.
And I thought we did not support them on PCIe completely (I mean q35/ich9).
(Or did I miss something)?
>
> > >
> > > > ---
> > > > hw/arm/virt-acpi-build.c | 7 ++++++-
> > > > 1 file changed, 6 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > > > index 04b62c7..7849ec5 100644
> > > > --- a/hw/arm/virt-acpi-build.c
> > > > +++ b/hw/arm/virt-acpi-build.c
> > > > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> > > > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> > > > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> > > > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> > > > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> > > > +
> > > > + /*
> > > > + * Allow OS control for all 5 features:
> > > > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> > > > + */
> > > > + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> > > > aml_name("CTRL")));
> > > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> > > > --
> > > > 1.8.3.1
> > > .
> > >
> >
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-arm] [PATCH] hw/arm/acpi: enable SHPC native hot plug
2019-03-01 14:33 ` Igor Mammedov
@ 2019-03-01 15:49 ` Michael S. Tsirkin
-1 siblings, 0 replies; 22+ messages in thread
From: Michael S. Tsirkin @ 2019-03-01 15:49 UTC (permalink / raw)
To: Igor Mammedov
Cc: Peter Maydell, qemu-devel, Shannon Zhao, Heyi Guo, qemu-arm,
Heyi Guo, wanghaibin.wang
On Fri, Mar 01, 2019 at 03:33:11PM +0100, Igor Mammedov wrote:
> On Fri, 1 Mar 2019 09:12:33 -0500
> "Michael S. Tsirkin" <mst@redhat.com> wrote:
>
> > On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote:
> > >
> > >
> > > On 2019/3/1 21:47, Michael S. Tsirkin wrote:
> > > > On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> > > > > After the introduction of generic PCIe root port and PCIe-PCI bridge,
> > > > > we will also have SHPC controller on ARM, so just enalbe SHPC native
> > > > > hot plug.
> > > > >
> > > > > Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> > > > > Cc: Peter Maydell <peter.maydell@linaro.org>
> > > > > Cc: "Michael S. Tsirkin" <mst@redhat.com>
> > > > > Cc: Igor Mammedov <imammedo@redhat.com>
> > > > > Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> > > > > Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> > > >
> > > > So when OS enables SHPC, should we block ACPI hotplug events?
> > > I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently?
> > >
> > > Thanks,
> > > Heyi
> >
> > Oh I didn't realise. That explains it sorry about the noise.
> And I thought we did not support them on PCIe completely (I mean q35/ich9).
> (Or did I miss something)?
True for PCIe.
> >
> > > >
> > > > > ---
> > > > > hw/arm/virt-acpi-build.c | 7 ++++++-
> > > > > 1 file changed, 6 insertions(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > > > > index 04b62c7..7849ec5 100644
> > > > > --- a/hw/arm/virt-acpi-build.c
> > > > > +++ b/hw/arm/virt-acpi-build.c
> > > > > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> > > > > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> > > > > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> > > > > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> > > > > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> > > > > +
> > > > > + /*
> > > > > + * Allow OS control for all 5 features:
> > > > > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> > > > > + */
> > > > > + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> > > > > aml_name("CTRL")));
> > > > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> > > > > --
> > > > > 1.8.3.1
> > > > .
> > > >
> > >
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-01 15:49 ` Michael S. Tsirkin
0 siblings, 0 replies; 22+ messages in thread
From: Michael S. Tsirkin @ 2019-03-01 15:49 UTC (permalink / raw)
To: Igor Mammedov
Cc: Heyi Guo, qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao,
Peter Maydell, Heyi Guo
On Fri, Mar 01, 2019 at 03:33:11PM +0100, Igor Mammedov wrote:
> On Fri, 1 Mar 2019 09:12:33 -0500
> "Michael S. Tsirkin" <mst@redhat.com> wrote:
>
> > On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote:
> > >
> > >
> > > On 2019/3/1 21:47, Michael S. Tsirkin wrote:
> > > > On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> > > > > After the introduction of generic PCIe root port and PCIe-PCI bridge,
> > > > > we will also have SHPC controller on ARM, so just enalbe SHPC native
> > > > > hot plug.
> > > > >
> > > > > Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> > > > > Cc: Peter Maydell <peter.maydell@linaro.org>
> > > > > Cc: "Michael S. Tsirkin" <mst@redhat.com>
> > > > > Cc: Igor Mammedov <imammedo@redhat.com>
> > > > > Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> > > > > Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> > > >
> > > > So when OS enables SHPC, should we block ACPI hotplug events?
> > > I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently?
> > >
> > > Thanks,
> > > Heyi
> >
> > Oh I didn't realise. That explains it sorry about the noise.
> And I thought we did not support them on PCIe completely (I mean q35/ich9).
> (Or did I miss something)?
True for PCIe.
> >
> > > >
> > > > > ---
> > > > > hw/arm/virt-acpi-build.c | 7 ++++++-
> > > > > 1 file changed, 6 insertions(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > > > > index 04b62c7..7849ec5 100644
> > > > > --- a/hw/arm/virt-acpi-build.c
> > > > > +++ b/hw/arm/virt-acpi-build.c
> > > > > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> > > > > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> > > > > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> > > > > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> > > > > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> > > > > +
> > > > > + /*
> > > > > + * Allow OS control for all 5 features:
> > > > > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> > > > > + */
> > > > > + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> > > > > aml_name("CTRL")));
> > > > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> > > > > --
> > > > > 1.8.3.1
> > > > .
> > > >
> > >
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-arm] [PATCH] hw/arm/acpi: enable SHPC native hot plug
2019-03-01 15:49 ` [Qemu-devel] " Michael S. Tsirkin
@ 2019-03-02 9:56 ` Heyi Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Heyi Guo @ 2019-03-02 9:56 UTC (permalink / raw)
To: Michael S. Tsirkin, Igor Mammedov
Cc: Peter Maydell, qemu-devel, Shannon Zhao, Heyi Guo, qemu-arm,
wanghaibin.wang
On 2019/3/1 23:49, Michael S. Tsirkin wrote:
> On Fri, Mar 01, 2019 at 03:33:11PM +0100, Igor Mammedov wrote:
>> On Fri, 1 Mar 2019 09:12:33 -0500
>> "Michael S. Tsirkin" <mst@redhat.com> wrote:
>>
>>> On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote:
>>>>
>>>> On 2019/3/1 21:47, Michael S. Tsirkin wrote:
>>>>> On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
>>>>>> After the introduction of generic PCIe root port and PCIe-PCI bridge,
>>>>>> we will also have SHPC controller on ARM, so just enalbe SHPC native
>>>>>> hot plug.
>>>>>>
>>>>>> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
>>>>>> Cc: Peter Maydell <peter.maydell@linaro.org>
>>>>>> Cc: "Michael S. Tsirkin" <mst@redhat.com>
>>>>>> Cc: Igor Mammedov <imammedo@redhat.com>
>>>>>> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
>>>>>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>>>>> So when OS enables SHPC, should we block ACPI hotplug events?
>>>> I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently?
>>>>
>>>> Thanks,
>>>> Heyi
>>> Oh I didn't realise. That explains it sorry about the noise.
>> And I thought we did not support them on PCIe completely (I mean q35/ich9).
>> (Or did I miss something)?
> True for PCIe.
So may I consider your comments as ACK for this patch :)
Thanks,
Heyi
>>>>>
>>>>>> ---
>>>>>> hw/arm/virt-acpi-build.c | 7 ++++++-
>>>>>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>>>>>> index 04b62c7..7849ec5 100644
>>>>>> --- a/hw/arm/virt-acpi-build.c
>>>>>> +++ b/hw/arm/virt-acpi-build.c
>>>>>> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
>>>>>> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
>>>>>> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
>>>>>> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>>>>>> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
>>>>>> +
>>>>>> + /*
>>>>>> + * Allow OS control for all 5 features:
>>>>>> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
>>>>>> + */
>>>>>> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
>>>>>> aml_name("CTRL")));
>>>>>> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
>>>>>> --
>>>>>> 1.8.3.1
>>>>> .
>>>>>
>>>>
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-02 9:56 ` Heyi Guo
0 siblings, 0 replies; 22+ messages in thread
From: Heyi Guo @ 2019-03-02 9:56 UTC (permalink / raw)
To: Michael S. Tsirkin, Igor Mammedov
Cc: qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao,
Peter Maydell, Heyi Guo
On 2019/3/1 23:49, Michael S. Tsirkin wrote:
> On Fri, Mar 01, 2019 at 03:33:11PM +0100, Igor Mammedov wrote:
>> On Fri, 1 Mar 2019 09:12:33 -0500
>> "Michael S. Tsirkin" <mst@redhat.com> wrote:
>>
>>> On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote:
>>>>
>>>> On 2019/3/1 21:47, Michael S. Tsirkin wrote:
>>>>> On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
>>>>>> After the introduction of generic PCIe root port and PCIe-PCI bridge,
>>>>>> we will also have SHPC controller on ARM, so just enalbe SHPC native
>>>>>> hot plug.
>>>>>>
>>>>>> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
>>>>>> Cc: Peter Maydell <peter.maydell@linaro.org>
>>>>>> Cc: "Michael S. Tsirkin" <mst@redhat.com>
>>>>>> Cc: Igor Mammedov <imammedo@redhat.com>
>>>>>> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
>>>>>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>>>>> So when OS enables SHPC, should we block ACPI hotplug events?
>>>> I supposed we don't support ACPI hotplug events on ARM virt; do we have any currently?
>>>>
>>>> Thanks,
>>>> Heyi
>>> Oh I didn't realise. That explains it sorry about the noise.
>> And I thought we did not support them on PCIe completely (I mean q35/ich9).
>> (Or did I miss something)?
> True for PCIe.
So may I consider your comments as ACK for this patch :)
Thanks,
Heyi
>>>>>
>>>>>> ---
>>>>>> hw/arm/virt-acpi-build.c | 7 ++++++-
>>>>>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>>>>>> index 04b62c7..7849ec5 100644
>>>>>> --- a/hw/arm/virt-acpi-build.c
>>>>>> +++ b/hw/arm/virt-acpi-build.c
>>>>>> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
>>>>>> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
>>>>>> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
>>>>>> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>>>>>> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
>>>>>> +
>>>>>> + /*
>>>>>> + * Allow OS control for all 5 features:
>>>>>> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
>>>>>> + */
>>>>>> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
>>>>>> aml_name("CTRL")));
>>>>>> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
>>>>>> --
>>>>>> 1.8.3.1
>>>>> .
>>>>>
>>>>
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Qemu-arm] [PATCH] hw/arm/acpi: enable SHPC native hot plug
2019-03-01 2:28 ` [Qemu-devel] " Heyi Guo
@ 2019-03-03 23:38 ` Michael S. Tsirkin
-1 siblings, 0 replies; 22+ messages in thread
From: Michael S. Tsirkin @ 2019-03-03 23:38 UTC (permalink / raw)
To: Heyi Guo
Cc: Peter Maydell, qemu-devel, Shannon Zhao, Heyi Guo, qemu-arm,
Igor Mammedov, wanghaibin.wang
On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> After the introduction of generic PCIe root port and PCIe-PCI bridge,
> we will also have SHPC controller on ARM, so just enalbe SHPC native
> hot plug.
>
> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: "Michael S. Tsirkin" <mst@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
I don't think you need two Signed-off-by lines.
Besides that:
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Pls feel free to merge through the ARM tree.
> ---
> hw/arm/virt-acpi-build.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c7..7849ec5 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> +
> + /*
> + * Allow OS control for all 5 features:
> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + */
> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> --
> 1.8.3.1
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-03 23:38 ` Michael S. Tsirkin
0 siblings, 0 replies; 22+ messages in thread
From: Michael S. Tsirkin @ 2019-03-03 23:38 UTC (permalink / raw)
To: Heyi Guo
Cc: qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao,
Peter Maydell, Igor Mammedov, Heyi Guo
On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> After the introduction of generic PCIe root port and PCIe-PCI bridge,
> we will also have SHPC controller on ARM, so just enalbe SHPC native
> hot plug.
>
> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: "Michael S. Tsirkin" <mst@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
I don't think you need two Signed-off-by lines.
Besides that:
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Pls feel free to merge through the ARM tree.
> ---
> hw/arm/virt-acpi-build.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 04b62c7..7849ec5 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
> +
> + /*
> + * Allow OS control for all 5 features:
> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + */
> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
> aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> --
> 1.8.3.1
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-arm] [PATCH] hw/arm/acpi: enable SHPC native hot plug
2019-03-03 23:38 ` [Qemu-devel] " Michael S. Tsirkin
@ 2019-03-04 0:46 ` Heyi Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Heyi Guo @ 2019-03-04 0:46 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Peter Maydell, qemu-devel, Shannon Zhao, Heyi Guo, qemu-arm,
Igor Mammedov, wanghaibin.wang
On 2019/3/4 7:38, Michael S. Tsirkin wrote:
> On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
>> After the introduction of generic PCIe root port and PCIe-PCI bridge,
>> we will also have SHPC controller on ARM, so just enalbe SHPC native
>> hot plug.
>>
>> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
>> Cc: Peter Maydell <peter.maydell@linaro.org>
>> Cc: "Michael S. Tsirkin" <mst@redhat.com>
>> Cc: Igor Mammedov <imammedo@redhat.com>
>> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> I don't think you need two Signed-off-by lines.
> Besides that:
>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
>
> Pls feel free to merge through the ARM tree.
Thanks, I'll change that and add your R-b, and send a v2 for some dear maintainer to commit it :)
Heyi
>
>> ---
>> hw/arm/virt-acpi-build.c | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>> index 04b62c7..7849ec5 100644
>> --- a/hw/arm/virt-acpi-build.c
>> +++ b/hw/arm/virt-acpi-build.c
>> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
>> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
>> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
>> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
>> +
>> + /*
>> + * Allow OS control for all 5 features:
>> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
>> + */
>> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
>> aml_name("CTRL")));
>>
>> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
>> --
>> 1.8.3.1
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug
@ 2019-03-04 0:46 ` Heyi Guo
0 siblings, 0 replies; 22+ messages in thread
From: Heyi Guo @ 2019-03-04 0:46 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: qemu-arm, qemu-devel, wanghaibin.wang, Shannon Zhao,
Peter Maydell, Igor Mammedov, Heyi Guo
On 2019/3/4 7:38, Michael S. Tsirkin wrote:
> On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
>> After the introduction of generic PCIe root port and PCIe-PCI bridge,
>> we will also have SHPC controller on ARM, so just enalbe SHPC native
>> hot plug.
>>
>> Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
>> Cc: Peter Maydell <peter.maydell@linaro.org>
>> Cc: "Michael S. Tsirkin" <mst@redhat.com>
>> Cc: Igor Mammedov <imammedo@redhat.com>
>> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> I don't think you need two Signed-off-by lines.
> Besides that:
>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
>
> Pls feel free to merge through the ARM tree.
Thanks, I'll change that and add your R-b, and send a v2 for some dear maintainer to commit it :)
Heyi
>
>> ---
>> hw/arm/virt-acpi-build.c | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>> index 04b62c7..7849ec5 100644
>> --- a/hw/arm/virt-acpi-build.c
>> +++ b/hw/arm/virt-acpi-build.c
>> @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
>> aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
>> aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
>> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>> - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
>> +
>> + /*
>> + * Allow OS control for all 5 features:
>> + * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
>> + */
>> + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
>> aml_name("CTRL")));
>>
>> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
>> --
>> 1.8.3.1
> .
>
^ permalink raw reply [flat|nested] 22+ messages in thread