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From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
	bmeng@tinylab.org, liweiwei@iscas.ac.cn,
	zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
	ajones@ventanamicro.com, philmd@linaro.org,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH v2 11/19] target/riscv: introduce KVM AccelCPUClass
Date: Wed,  6 Sep 2023 06:16:38 -0300	[thread overview]
Message-ID: <20230906091647.1667171-12-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20230906091647.1667171-1-dbarboza@ventanamicro.com>

Add a KVM accelerator class like we did with TCG. The difference is
that, at least for now, we won't be using a realize() implementation for
this accelerator.

We'll start by assiging kvm_riscv_cpu_add_kvm_properties(), renamed to
kvm_cpu_instance_init(), as a 'cpu_instance_init' implementation. Change
riscv_cpu_post_init() to invoke accel_cpu_instance_init(), which will go
through the 'cpu_instance_init' impl of the current acceleration (if
available) and execute it. The end result is that the KVM initial setup,
i.e. starting registers and adding its specific properties, will be done
via this hook.

Add a 'tcg_enabled()' condition in riscv_cpu_post_init() to avoid
calling riscv_cpu_add_user_properties() when running KVM. We'll remove
this condition when the TCG accel class get its own 'cpu_instance_init'
implementation.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
 target/riscv/cpu.c       |  8 +++-----
 target/riscv/kvm.c       | 26 ++++++++++++++++++++++++--
 target/riscv/kvm_riscv.h |  6 ------
 3 files changed, 27 insertions(+), 13 deletions(-)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 50be127f36..c8a19be1af 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1219,7 +1219,9 @@ static bool riscv_cpu_has_user_properties(Object *cpu_obj)
 
 static void riscv_cpu_post_init(Object *obj)
 {
-    if (riscv_cpu_has_user_properties(obj)) {
+    accel_cpu_instance_init(CPU(obj));
+
+    if (tcg_enabled() && riscv_cpu_has_user_properties(obj)) {
         riscv_cpu_add_user_properties(obj);
     }
 
@@ -1589,10 +1591,6 @@ static void riscv_cpu_add_multiext_prop_array(Object *obj,
 static void riscv_cpu_add_user_properties(Object *obj)
 {
 #ifndef CONFIG_USER_ONLY
-    if (kvm_enabled()) {
-        kvm_riscv_cpu_add_kvm_properties(obj);
-        return;
-    }
     riscv_add_satp_mode_properties(obj);
 #endif
 
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index ef6b2cfffe..492b97d19b 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -31,6 +31,7 @@
 #include "sysemu/kvm_int.h"
 #include "cpu.h"
 #include "trace.h"
+#include "hw/core/accel-cpu.h"
 #include "hw/pci/pci.h"
 #include "exec/memattrs.h"
 #include "exec/address-spaces.h"
@@ -1274,8 +1275,9 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift,
     kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled();
 }
 
-void kvm_riscv_cpu_add_kvm_properties(Object *obj)
+static void kvm_cpu_instance_init(CPUState *cs)
 {
+    Object *obj = OBJECT(RISCV_CPU(cs));
     DeviceState *dev = DEVICE(obj);
 
     riscv_init_user_properties(obj);
@@ -1287,7 +1289,7 @@ void kvm_riscv_cpu_add_kvm_properties(Object *obj)
     riscv_cpu_add_kvm_unavail_prop_array(obj, riscv_cpu_experimental_exts);
 
     for (Property *prop = riscv_cpu_options; prop && prop->name; prop++) {
-        /* Check if KVM created the property already */
+        /* Check if we have a specific KVM handler for the option */
         if (object_property_find(obj, prop->name)) {
             continue;
         }
@@ -1295,6 +1297,26 @@ void kvm_riscv_cpu_add_kvm_properties(Object *obj)
     }
 }
 
+static void kvm_cpu_accel_class_init(ObjectClass *oc, void *data)
+{
+    AccelCPUClass *acc = ACCEL_CPU_CLASS(oc);
+
+    acc->cpu_instance_init = kvm_cpu_instance_init;
+}
+
+static const TypeInfo kvm_cpu_accel_type_info = {
+    .name = ACCEL_CPU_NAME("kvm"),
+
+    .parent = TYPE_ACCEL_CPU,
+    .class_init = kvm_cpu_accel_class_init,
+    .abstract = true,
+};
+static void kvm_cpu_accel_register_types(void)
+{
+    type_register_static(&kvm_cpu_accel_type_info);
+}
+type_init(kvm_cpu_accel_register_types);
+
 static void riscv_host_cpu_init(Object *obj)
 {
     CPURISCVState *env = &RISCV_CPU(obj)->env;
diff --git a/target/riscv/kvm_riscv.h b/target/riscv/kvm_riscv.h
index c9ecd9a967..8fe6e3e6fb 100644
--- a/target/riscv/kvm_riscv.h
+++ b/target/riscv/kvm_riscv.h
@@ -20,7 +20,6 @@
 #define QEMU_KVM_RISCV_H
 
 #ifdef CONFIG_KVM
-void kvm_riscv_cpu_add_kvm_properties(Object *obj);
 void kvm_riscv_reset_vcpu(RISCVCPU *cpu);
 void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level);
 void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift,
@@ -29,11 +28,6 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift,
                           uint64_t guest_num);
 void riscv_kvm_aplic_request(void *opaque, int irq, int level);
 #else
-static inline void kvm_riscv_cpu_add_kvm_properties(Object *obj)
-{
-    g_assert_not_reached();
-}
-
 static inline void kvm_riscv_reset_vcpu(RISCVCPU *cpu)
 {
     g_assert_not_reached();
-- 
2.41.0



  parent reply	other threads:[~2023-09-06  9:18 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-06  9:16 [PATCH v2 00/19] riscv: split TCG/KVM accelerators from cpu.c Daniel Henrique Barboza
2023-09-06  9:16 ` [PATCH v2 01/19] target/riscv: introduce TCG AccelCPUClass Daniel Henrique Barboza
2023-09-19  9:51   ` LIU Zhiwei
2023-09-06  9:16 ` [PATCH v2 02/19] target/riscv: move riscv_cpu_realize_tcg() to TCG::cpu_realizefn() Daniel Henrique Barboza
2023-09-19  9:54   ` LIU Zhiwei
2023-09-06  9:16 ` [PATCH v2 03/19] target/riscv: move riscv_cpu_validate_set_extensions() to tcg-cpu.c Daniel Henrique Barboza
2023-09-19 10:59   ` LIU Zhiwei
2023-09-06  9:16 ` [PATCH v2 04/19] target/riscv: move riscv_tcg_ops " Daniel Henrique Barboza
2023-09-19 11:08   ` LIU Zhiwei
2023-09-06  9:16 ` [PATCH v2 05/19] target/riscv/cpu.c: add .instance_post_init() Daniel Henrique Barboza
2023-09-11  7:08   ` Andrew Jones
2023-09-19  9:16   ` LIU Zhiwei
2023-09-19 16:07     ` Daniel Henrique Barboza
2023-09-06  9:16 ` [PATCH v2 06/19] target/riscv: move 'host' CPU declaration to kvm.c Daniel Henrique Barboza
2023-09-19 11:11   ` LIU Zhiwei
2023-09-06  9:16 ` [PATCH v2 07/19] target/riscv/cpu.c: mark extensions arrays as 'const' Daniel Henrique Barboza
2023-09-19 11:19   ` LIU Zhiwei
2023-09-06  9:16 ` [PATCH v2 08/19] target/riscv: move riscv_cpu_add_kvm_properties() to kvm.c Daniel Henrique Barboza
2023-09-19 11:25   ` LIU Zhiwei
2023-09-06  9:16 ` [PATCH v2 09/19] target/riscv: make riscv_add_satp_mode_properties() public Daniel Henrique Barboza
2023-09-11  7:09   ` Andrew Jones
2023-09-19 11:26   ` LIU Zhiwei
2023-09-06  9:16 ` [PATCH v2 10/19] target/riscv: remove kvm-stub.c Daniel Henrique Barboza
2023-09-06 10:23   ` Philippe Mathieu-Daudé
2023-09-11  7:49     ` Andrew Jones
2023-09-11  9:04       ` Andrew Jones
2023-09-11 12:23         ` Daniel Henrique Barboza
2023-09-12 10:48           ` Daniel Henrique Barboza
2023-09-12 11:15             ` Philippe Mathieu-Daudé
2023-09-12 12:03               ` Daniel Henrique Barboza
2023-09-06  9:16 ` Daniel Henrique Barboza [this message]
2023-09-11  7:52   ` [PATCH v2 11/19] target/riscv: introduce KVM AccelCPUClass Andrew Jones
2023-09-19 11:37   ` LIU Zhiwei
2023-09-06  9:16 ` [PATCH v2 12/19] target/riscv: move KVM only files to kvm subdir Daniel Henrique Barboza
2023-09-19 11:37   ` LIU Zhiwei
2023-09-06  9:16 ` [PATCH v2 13/19] target/riscv/kvm: do not use riscv_cpu_add_misa_properties() Daniel Henrique Barboza
2023-09-06  9:16 ` [PATCH v2 14/19] target/riscv/cpu.c: export set_misa() Daniel Henrique Barboza
2023-09-06 10:18   ` Philippe Mathieu-Daudé
2023-09-11  7:54   ` Andrew Jones
2023-09-06  9:16 ` [PATCH v2 15/19] target/riscv/tcg: introduce tcg_cpu_instance_init() Daniel Henrique Barboza
2023-09-06  9:16 ` [PATCH v2 16/19] target/riscv/cpu.c: make misa_ext_cfgs[] 'const' Daniel Henrique Barboza
2023-09-11  7:56   ` Andrew Jones
2023-09-06  9:16 ` [PATCH v2 17/19] target/riscv/tcg: move riscv_cpu_add_misa_properties() to tcg-cpu.c Daniel Henrique Barboza
2023-09-06  9:16 ` [PATCH v2 18/19] target/riscv/cpu.c: export isa_edata_arr[] Daniel Henrique Barboza
2023-09-06  9:16 ` [PATCH v2 19/19] target/riscv/cpu: move priv spec functions to tcg-cpu.c Daniel Henrique Barboza

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