From: Simon Horman <horms@kernel.org>
To: Karol Kolacinski <karol.kolacinski@intel.com>
Cc: netdev@vger.kernel.org, anthony.l.nguyen@intel.com,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
intel-wired-lan@lists.osuosl.org, przemyslaw.kitszel@intel.com
Subject: Re: [Intel-wired-lan] [PATCH iwl-next 5/7] ice: Disable shared pin on E810 on setfunc
Date: Mon, 1 Jul 2024 14:27:21 +0100 [thread overview]
Message-ID: <20240701132721.GC17134@kernel.org> (raw)
In-Reply-To: <20240627151127.284884-14-karol.kolacinski@intel.com>
On Thu, Jun 27, 2024 at 05:09:29PM +0200, Karol Kolacinski wrote:
> When setting a new supported function for a pin on E810, disable other
> enabled pin that shares the same GPIO.
>
> Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> ---
> drivers/net/ethernet/intel/ice/ice_ptp.c | 65 ++++++++++++++++++++++++
> 1 file changed, 65 insertions(+)
>
> diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c
...
> @@ -1885,6 +1942,14 @@ static int ice_verify_pin(struct ptp_clock_info *info, unsigned int pin,
> return -EOPNOTSUPP;
> }
>
> + /* On adapters with SMA_CTRL disable other pins that share same GPIO */
> + if (ice_is_feature_supported(pf, ICE_F_SMA_CTRL)) {
> + ice_ptp_disable_shared_pin(pf, pin, func);
> + pf->ptp.pin_desc[pin].func = func;
> + pf->ptp.pin_desc[pin].chan = chan;
> + return ice_ptp_set_sma_cfg_e810t(pf);
This appears to be resolved in the following patch by calling
ice_ptp_set_sma_cfg_() instead, but this fails to build because
ice_ptp_set_sma_cfg_e810t() does not exits.
> + }
> +
> return 0;
> }
>
> --
> 2.45.2
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms@kernel.org>
To: Karol Kolacinski <karol.kolacinski@intel.com>
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Subject: Re: [PATCH iwl-next 5/7] ice: Disable shared pin on E810 on setfunc
Date: Mon, 1 Jul 2024 14:27:21 +0100 [thread overview]
Message-ID: <20240701132721.GC17134@kernel.org> (raw)
In-Reply-To: <20240627151127.284884-14-karol.kolacinski@intel.com>
On Thu, Jun 27, 2024 at 05:09:29PM +0200, Karol Kolacinski wrote:
> When setting a new supported function for a pin on E810, disable other
> enabled pin that shares the same GPIO.
>
> Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> ---
> drivers/net/ethernet/intel/ice/ice_ptp.c | 65 ++++++++++++++++++++++++
> 1 file changed, 65 insertions(+)
>
> diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c
...
> @@ -1885,6 +1942,14 @@ static int ice_verify_pin(struct ptp_clock_info *info, unsigned int pin,
> return -EOPNOTSUPP;
> }
>
> + /* On adapters with SMA_CTRL disable other pins that share same GPIO */
> + if (ice_is_feature_supported(pf, ICE_F_SMA_CTRL)) {
> + ice_ptp_disable_shared_pin(pf, pin, func);
> + pf->ptp.pin_desc[pin].func = func;
> + pf->ptp.pin_desc[pin].chan = chan;
> + return ice_ptp_set_sma_cfg_e810t(pf);
This appears to be resolved in the following patch by calling
ice_ptp_set_sma_cfg_() instead, but this fails to build because
ice_ptp_set_sma_cfg_e810t() does not exits.
> + }
> +
> return 0;
> }
>
> --
> 2.45.2
>
>
next prev parent reply other threads:[~2024-07-01 13:27 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-27 15:09 [Intel-wired-lan] [PATCH iwl-next 0/7] ice: Cleanup and refactor PTP pin handling Karol Kolacinski
2024-06-27 15:09 ` Karol Kolacinski
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 1/7] ice: Implement ice_ptp_pin_desc Karol Kolacinski
2024-06-27 15:09 ` Karol Kolacinski
2024-07-01 13:23 ` [Intel-wired-lan] " Simon Horman
2024-07-01 13:23 ` Simon Horman
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 2/7] ice: Add SDPs support for E825C Karol Kolacinski
2024-06-27 15:09 ` Karol Kolacinski
2024-07-01 13:25 ` [Intel-wired-lan] " Simon Horman
2024-07-01 13:25 ` Simon Horman
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 3/7] ice: Align E810T GPIO to other products Karol Kolacinski
2024-06-27 15:09 ` Karol Kolacinski
2024-07-01 13:25 ` [Intel-wired-lan] " Simon Horman
2024-07-01 13:25 ` Simon Horman
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 4/7] ice: Cache perout/extts requests and check flags Karol Kolacinski
2024-06-27 15:09 ` Karol Kolacinski
2024-07-01 13:26 ` [Intel-wired-lan] " Simon Horman
2024-07-01 13:26 ` Simon Horman
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 5/7] ice: Disable shared pin on E810 on setfunc Karol Kolacinski
2024-06-27 15:09 ` Karol Kolacinski
2024-07-01 13:27 ` Simon Horman [this message]
2024-07-01 13:27 ` Simon Horman
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 6/7] ice: Read SDP section from NVM for pin definitions Karol Kolacinski
2024-06-27 15:09 ` Karol Kolacinski
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 7/7] ice: Enable 1PPS out from CGU for E825C products Karol Kolacinski
2024-06-27 15:09 ` Karol Kolacinski
2024-06-27 15:37 ` [Intel-wired-lan] " Paul Menzel
2024-06-27 15:37 ` Paul Menzel
2024-07-01 13:49 ` Kolacinski, Karol
2024-07-01 13:49 ` Kolacinski, Karol
2024-07-01 13:27 ` Simon Horman
2024-07-01 13:27 ` Simon Horman
2024-07-01 15:08 ` [Intel-wired-lan] " Przemek Kitszel
2024-07-01 15:08 ` Przemek Kitszel
2024-07-02 10:56 ` [Intel-wired-lan] " Simon Horman
2024-07-02 10:56 ` Simon Horman
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