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From: Simon Horman <horms@kernel.org>
To: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Cc: Sergey Temerkhanov <sergey.temerkhanov@intel.com>,
	netdev@vger.kernel.org,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	Karol Kolacinski <karol.kolacinski@intel.com>,
	anthony.l.nguyen@intel.com, intel-wired-lan@lists.osuosl.org
Subject: Re: [Intel-wired-lan] [PATCH iwl-next 7/7] ice: Enable 1PPS out from CGU for E825C products
Date: Tue, 2 Jul 2024 11:56:15 +0100	[thread overview]
Message-ID: <20240702105615.GG598357@kernel.org> (raw)
In-Reply-To: <815f7f5c-6d98-4be2-8fc7-09851fe281d0@intel.com>

On Mon, Jul 01, 2024 at 05:08:09PM +0200, Przemek Kitszel wrote:
> On 7/1/24 15:27, Simon Horman wrote:
> > On Thu, Jun 27, 2024 at 05:09:31PM +0200, Karol Kolacinski wrote:
> > > From: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
> > > 
> > > Implement 1PPS signal enabling/disabling in CGU. The amplitude is
> > > always the maximum in this implementation
> > > 
> > > Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
> > > Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
> > > Co-developed-by: Karol Kolacinski <karol.kolacinski@intel.com>
> > > Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> > 
> > ...
> > 
> > > diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> > > index 07ecf2a86742..fa7cf8453b88 100644
> > > --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> > > +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> > > @@ -661,6 +661,27 @@ static int ice_cfg_cgu_pll_e825c(struct ice_hw *hw,
> > >   	return 0;
> > >   }
> > > +#define ICE_ONE_PPS_OUT_AMP_MAX 3
> > > +
> > > +/**
> > > + * ice_cgu_ena_pps_out - Enable/disable 1PPS output
> > > + * @hw: pointer to the HW struct
> > > + * @ena: Enable/disable 1PPS output
> > 
> > Please include a "Returns: " or "Return: " section in the kernel doc
> > for functions that have a return value.
> 
> last time I have checked only the singular "Return:" was supported (aka
> non-complained) by kdoc checker on W=2 builds

Yes, agreed.

My point was that the kernel document should have a (correct :)
section to document the return value.

> 
> > 
> > NIPA has recently got more picky about this.
> > Flagged by kernel-doc -none --Warn
> > 
> > > + */
> > > +int ice_cgu_ena_pps_out(struct ice_hw *hw, bool ena)
> > > +{
> > > +	union nac_cgu_dword9 dw9;
> > > +	int err;
> > > +
> > > +	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD9, &dw9.val);
> > > +	if (err)
> > > +		return err;
> > > +
> > > +	dw9.one_pps_out_en = ena;
> > > +	dw9.one_pps_out_amp = ena * ICE_ONE_PPS_OUT_AMP_MAX;
> > > +	return ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD9, dw9.val);
> > > +}
> > > +
> > >   /**
> > >    * ice_cfg_cgu_pll_dis_sticky_bits_e82x - disable TS PLL sticky bits
> > >    * @hw: pointer to the HW struct
> > 
> > ...
> > 
> 

WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms@kernel.org>
To: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Cc: Karol Kolacinski <karol.kolacinski@intel.com>,
	intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
	anthony.l.nguyen@intel.com,
	Sergey Temerkhanov <sergey.temerkhanov@intel.com>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Subject: Re: [PATCH iwl-next 7/7] ice: Enable 1PPS out from CGU for E825C products
Date: Tue, 2 Jul 2024 11:56:15 +0100	[thread overview]
Message-ID: <20240702105615.GG598357@kernel.org> (raw)
In-Reply-To: <815f7f5c-6d98-4be2-8fc7-09851fe281d0@intel.com>

On Mon, Jul 01, 2024 at 05:08:09PM +0200, Przemek Kitszel wrote:
> On 7/1/24 15:27, Simon Horman wrote:
> > On Thu, Jun 27, 2024 at 05:09:31PM +0200, Karol Kolacinski wrote:
> > > From: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
> > > 
> > > Implement 1PPS signal enabling/disabling in CGU. The amplitude is
> > > always the maximum in this implementation
> > > 
> > > Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
> > > Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
> > > Co-developed-by: Karol Kolacinski <karol.kolacinski@intel.com>
> > > Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> > 
> > ...
> > 
> > > diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> > > index 07ecf2a86742..fa7cf8453b88 100644
> > > --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> > > +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
> > > @@ -661,6 +661,27 @@ static int ice_cfg_cgu_pll_e825c(struct ice_hw *hw,
> > >   	return 0;
> > >   }
> > > +#define ICE_ONE_PPS_OUT_AMP_MAX 3
> > > +
> > > +/**
> > > + * ice_cgu_ena_pps_out - Enable/disable 1PPS output
> > > + * @hw: pointer to the HW struct
> > > + * @ena: Enable/disable 1PPS output
> > 
> > Please include a "Returns: " or "Return: " section in the kernel doc
> > for functions that have a return value.
> 
> last time I have checked only the singular "Return:" was supported (aka
> non-complained) by kdoc checker on W=2 builds

Yes, agreed.

My point was that the kernel document should have a (correct :)
section to document the return value.

> 
> > 
> > NIPA has recently got more picky about this.
> > Flagged by kernel-doc -none --Warn
> > 
> > > + */
> > > +int ice_cgu_ena_pps_out(struct ice_hw *hw, bool ena)
> > > +{
> > > +	union nac_cgu_dword9 dw9;
> > > +	int err;
> > > +
> > > +	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD9, &dw9.val);
> > > +	if (err)
> > > +		return err;
> > > +
> > > +	dw9.one_pps_out_en = ena;
> > > +	dw9.one_pps_out_amp = ena * ICE_ONE_PPS_OUT_AMP_MAX;
> > > +	return ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD9, dw9.val);
> > > +}
> > > +
> > >   /**
> > >    * ice_cfg_cgu_pll_dis_sticky_bits_e82x - disable TS PLL sticky bits
> > >    * @hw: pointer to the HW struct
> > 
> > ...
> > 
> 

  reply	other threads:[~2024-07-02 10:56 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-27 15:09 [Intel-wired-lan] [PATCH iwl-next 0/7] ice: Cleanup and refactor PTP pin handling Karol Kolacinski
2024-06-27 15:09 ` Karol Kolacinski
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 1/7] ice: Implement ice_ptp_pin_desc Karol Kolacinski
2024-06-27 15:09   ` Karol Kolacinski
2024-07-01 13:23   ` [Intel-wired-lan] " Simon Horman
2024-07-01 13:23     ` Simon Horman
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 2/7] ice: Add SDPs support for E825C Karol Kolacinski
2024-06-27 15:09   ` Karol Kolacinski
2024-07-01 13:25   ` [Intel-wired-lan] " Simon Horman
2024-07-01 13:25     ` Simon Horman
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 3/7] ice: Align E810T GPIO to other products Karol Kolacinski
2024-06-27 15:09   ` Karol Kolacinski
2024-07-01 13:25   ` [Intel-wired-lan] " Simon Horman
2024-07-01 13:25     ` Simon Horman
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 4/7] ice: Cache perout/extts requests and check flags Karol Kolacinski
2024-06-27 15:09   ` Karol Kolacinski
2024-07-01 13:26   ` [Intel-wired-lan] " Simon Horman
2024-07-01 13:26     ` Simon Horman
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 5/7] ice: Disable shared pin on E810 on setfunc Karol Kolacinski
2024-06-27 15:09   ` Karol Kolacinski
2024-07-01 13:27   ` [Intel-wired-lan] " Simon Horman
2024-07-01 13:27     ` Simon Horman
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 6/7] ice: Read SDP section from NVM for pin definitions Karol Kolacinski
2024-06-27 15:09   ` Karol Kolacinski
2024-06-27 15:09 ` [Intel-wired-lan] [PATCH iwl-next 7/7] ice: Enable 1PPS out from CGU for E825C products Karol Kolacinski
2024-06-27 15:09   ` Karol Kolacinski
2024-06-27 15:37   ` [Intel-wired-lan] " Paul Menzel
2024-06-27 15:37     ` Paul Menzel
2024-07-01 13:49     ` Kolacinski, Karol
2024-07-01 13:49       ` Kolacinski, Karol
2024-07-01 13:27   ` Simon Horman
2024-07-01 13:27     ` Simon Horman
2024-07-01 15:08     ` [Intel-wired-lan] " Przemek Kitszel
2024-07-01 15:08       ` Przemek Kitszel
2024-07-02 10:56       ` Simon Horman [this message]
2024-07-02 10:56         ` Simon Horman

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