From: Simon Horman <horms@kernel.org>
To: Grzegorz Nitka <grzegorz.nitka@intel.com>
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com,
Karol Kolacinski <karol.kolacinski@intel.com>
Subject: Re: [Intel-wired-lan] [PATCH iwl-next v1 1/3] ice: Add sync delay for E825C
Date: Fri, 7 Feb 2025 10:03:31 +0000 [thread overview]
Message-ID: <20250207100331.GJ554665@kernel.org> (raw)
In-Reply-To: <20250206083655.3005151-2-grzegorz.nitka@intel.com>
On Thu, Feb 06, 2025 at 09:36:53AM +0100, Grzegorz Nitka wrote:
> From: Karol Kolacinski <karol.kolacinski@intel.com>
>
> Implement setting GLTSYN_SYNC_DLAY for E825C products.
> This is the execution delay compensation of SYNC command between
> PHC and PHY.
> Also, refactor the code by changing ice_ptp_init_phc_eth56g function
> name to ice_ptp_init_phc_e825, to be consistent with the naming pattern
> for other devices.
Adding support for GLTSYN_SYNC_DLAY and the refactor seem
to be two distinct changes, albeit touching common code.
I think it would be slightly better to split this into two patches.
> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
...
WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms@kernel.org>
To: Grzegorz Nitka <grzegorz.nitka@intel.com>
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com,
Karol Kolacinski <karol.kolacinski@intel.com>
Subject: Re: [PATCH iwl-next v1 1/3] ice: Add sync delay for E825C
Date: Fri, 7 Feb 2025 10:03:31 +0000 [thread overview]
Message-ID: <20250207100331.GJ554665@kernel.org> (raw)
In-Reply-To: <20250206083655.3005151-2-grzegorz.nitka@intel.com>
On Thu, Feb 06, 2025 at 09:36:53AM +0100, Grzegorz Nitka wrote:
> From: Karol Kolacinski <karol.kolacinski@intel.com>
>
> Implement setting GLTSYN_SYNC_DLAY for E825C products.
> This is the execution delay compensation of SYNC command between
> PHC and PHY.
> Also, refactor the code by changing ice_ptp_init_phc_eth56g function
> name to ice_ptp_init_phc_e825, to be consistent with the naming pattern
> for other devices.
Adding support for GLTSYN_SYNC_DLAY and the refactor seem
to be two distinct changes, albeit touching common code.
I think it would be slightly better to split this into two patches.
> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
...
next prev parent reply other threads:[~2025-02-07 10:03 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-06 8:36 [Intel-wired-lan] [PATCH iwl-next v1 0/3] E825C PTP cleanup Grzegorz Nitka
2025-02-06 8:36 ` Grzegorz Nitka
2025-02-06 8:36 ` [Intel-wired-lan] [PATCH iwl-next v1 1/3] ice: Add sync delay for E825C Grzegorz Nitka
2025-02-06 8:36 ` Grzegorz Nitka
2025-02-07 10:03 ` Simon Horman [this message]
2025-02-07 10:03 ` Simon Horman
2025-02-10 10:54 ` [Intel-wired-lan] " Nitka, Grzegorz
2025-02-10 10:54 ` Nitka, Grzegorz
2025-02-06 8:36 ` [Intel-wired-lan] [PATCH iwl-next v1 2/3] ice: Refactor E825C PHY registers info struct Grzegorz Nitka
2025-02-06 8:36 ` Grzegorz Nitka
2025-02-07 10:03 ` [Intel-wired-lan] " Simon Horman
2025-02-07 10:03 ` Simon Horman
2025-02-07 10:05 ` [Intel-wired-lan] " Simon Horman
2025-02-07 10:05 ` Simon Horman
2025-02-10 11:05 ` [Intel-wired-lan] " Nitka, Grzegorz
2025-02-10 11:05 ` Nitka, Grzegorz
2025-02-06 8:36 ` [Intel-wired-lan] [PATCH iwl-next v1 3/3] ice: E825C PHY register cleanup Grzegorz Nitka
2025-02-06 8:36 ` Grzegorz Nitka
2025-02-07 10:07 ` [Intel-wired-lan] " Simon Horman
2025-02-07 10:07 ` Simon Horman
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