From: Jonathan Cameron via <qemu-arm@nongnu.org>
To: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
<linuxarm@huawei.com>
Cc: <qemu-arm@nongnu.org>, <qemu-devel@nongnu.org>,
<eric.auger@redhat.com>, <peter.maydell@linaro.org>,
<jgg@nvidia.com>, <nicolinc@nvidia.com>, <ddutile@redhat.com>,
<berrange@redhat.com>, <nathanc@nvidia.com>, <mochs@nvidia.com>,
<smostafa@google.com>, <wangzhou1@hisilicon.com>,
<jiangkunkun@huawei.com>, <jonathan.cameron@huawei.com>,
<zhangfei.gao@linaro.org>, <zhenzhong.duan@intel.com>,
<shameerkolothum@gmail.com>
Subject: Re: [RFC PATCH v3 06/15] hw/arm/smmuv3-accel: Restrict accelerated SMMUv3 to vfio-pci endpoints with iommufd
Date: Tue, 15 Jul 2025 10:51:14 +0100 [thread overview]
Message-ID: <20250715105114.0000260a@huawei.com> (raw)
In-Reply-To: <20250714155941.22176-7-shameerali.kolothum.thodi@huawei.com>
On Mon, 14 Jul 2025 16:59:32 +0100
Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> wrote:
> Accelerated SMMUv3 is only useful when the device can take advantage of
> the host's SMMUv3 in nested mode. To keep things simple and correct, we
> only allow this feature for vfio-pci endpoint devices that use the iommufd
> backend. We also allow non-endpoint emulated devices like PCI bridges and
> root ports, so that users can plug in these vfio-pci devices.
>
> Another reason for this limit is to avoid problems with IOTLB
> invalidations. Some commands (e.g., CMD_TLBI_NH_ASID) lack an associated
> SID, making it difficult to trace the originating device. If we allowed
> emulated endpoint devices, QEMU would have to invalidate both its own
> software IOTLB and the host's hardware IOTLB, which could slow things
> down.
>
> Since vfio-pci devices in nested mode rely on the host SMMUv3's nested
> translation (S1+S2), their get_address_space() callback must return the
> system address space to enable correct S2 mappings of guest RAM.
>
> So in short:
> - vfio-pci devices return the system address space
> - bridges and root ports return the IOMMU address space
>
> Note: On ARM, MSI doorbell addresses are also translated via SMMUv3.
> Hence, if a vfio-pci device is behind the SMMuv3 with translation enabled,
> it must return the IOMMU address space for MSI. Support for this will be
> added in a follow-up patch.
>
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> ---
> hw/arm/smmuv3-accel.c | 50 ++++++++++++++++++++++++++++-
> hw/arm/smmuv3-accel.h | 15 +++++++++
> hw/arm/smmuv3.c | 4 +++
> hw/pci-bridge/pci_expander_bridge.c | 1 -
> include/hw/arm/smmuv3.h | 1 +
> include/hw/pci/pci_bridge.h | 1 +
> 6 files changed, 70 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c
> index 2eac9c6ff4..0b0ddb03e2 100644
> --- a/hw/arm/smmuv3-accel.c
> +++ b/hw/arm/smmuv3-accel.c
> @@ -7,13 +7,19 @@
> */
>
> #include "qemu/osdep.h"
> +#include "qemu/error-report.h"
>
> #include "hw/arm/smmuv3.h"
> +#include "hw/pci/pci_bridge.h"
> +#include "hw/pci-host/gpex.h"
> +#include "hw/vfio/pci.h"
> +
> #include "smmuv3-accel.h"
>
> static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, SMMUPciBus *sbus,
> PCIBus *bus, int devfn)
> {
> + SMMUv3State *s = ARM_SMMUV3(bs);
> SMMUDevice *sdev = sbus->pbdev[devfn];
> SMMUv3AccelDevice *accel_dev;
>
> @@ -25,30 +31,72 @@ static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, SMMUPciBus *sbus,
>
> sbus->pbdev[devfn] = sdev;
> smmu_init_sdev(bs, sdev, bus, devfn);
> + address_space_init(&accel_dev->as_sysmem, &s->s_accel->root,
> + "smmuv3-accel-sysmem");
> }
>
> return accel_dev;
> }
>
> +static bool smmuv3_accel_pdev_allowed(PCIDevice *pdev, bool *vfio_pci)
> +{
> +
> + if (object_dynamic_cast(OBJECT(pdev), TYPE_PCI_BRIDGE) ||
> + object_dynamic_cast(OBJECT(pdev), "pxb-pcie") ||
> + object_dynamic_cast(OBJECT(pdev), "gpex-root")) {
Include gpex.h and TYPE_GPEX_ROOT_DEVICE
TYPE_IOMMUFD_BACKEND in iommufd.h
etc.
> + return true;
> + } else if ((object_dynamic_cast(OBJECT(pdev), TYPE_VFIO_PCI) &&
> + object_property_find(OBJECT(pdev), "iommufd"))) {
> + *vfio_pci = true;
> + return true;
> + }
> + return false;
> +}
> +
> static AddressSpace *smmuv3_accel_find_add_as(PCIBus *bus, void *opaque,
> int devfn)
> {
> + PCIDevice *pdev = pci_find_device(bus, pci_bus_num(bus), devfn);
> SMMUState *bs = opaque;
> + bool vfio_pci = false;
> SMMUPciBus *sbus;
> SMMUv3AccelDevice *accel_dev;
> SMMUDevice *sdev;
>
> + if (pdev && !smmuv3_accel_pdev_allowed(pdev, &vfio_pci)) {
> + error_report("Device(%s) not allowed. Only PCIe root complex devices "
> + "or PCI bridge devices or vfio-pci endpoint devices with "
> + "iommufd as backend is allowed with arm-smmuv3,accel=on",
> + pdev->name);
> + exit(1);
> + }
> sbus = smmu_get_sbus(bs, bus);
> accel_dev = smmuv3_accel_get_dev(bs, sbus, bus, devfn);
> sdev = &accel_dev->sdev;
>
> - return &sdev->as;
> + if (vfio_pci) {
> + return &accel_dev->as_sysmem;
> + } else {
> + return &sdev->as;
> + }
> }
>
> static const PCIIOMMUOps smmuv3_accel_ops = {
> .get_address_space = smmuv3_accel_find_add_as,
> };
>
> +void smmuv3_accel_init(SMMUv3State *s)
> +{
> + SMMUv3AccelState *s_accel;
> +
> + s->s_accel = s_accel = g_new0(SMMUv3AccelState, 1);
> + memory_region_init(&s_accel->root, OBJECT(s), "root", UINT64_MAX);
> + memory_region_init_alias(&s_accel->sysmem, OBJECT(s),
> + "smmuv3-accel-sysmem", get_system_memory(), 0,
> + memory_region_size(get_system_memory()));
> + memory_region_add_subregion(&s_accel->root, 0, &s_accel->sysmem);
> +}
> +
> static void smmuv3_accel_class_init(ObjectClass *oc, const void *data)
> {
> SMMUBaseClass *sbc = ARM_SMMU_CLASS(oc);
> diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
> index d183a62766..3bdb92391a 100644
> --- a/include/hw/arm/smmuv3.h
> +++ b/include/hw/arm/smmuv3.h
> @@ -63,6 +63,7 @@ struct SMMUv3State {
> qemu_irq irq[4];
> QemuMutex mutex;
> char *stage;
> + struct SMMUv3AccelState *s_accel;
bonus space.
> };
>
> typedef enum {
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
<linuxarm@huawei.com>
Cc: <qemu-arm@nongnu.org>, <qemu-devel@nongnu.org>,
<eric.auger@redhat.com>, <peter.maydell@linaro.org>,
<jgg@nvidia.com>, <nicolinc@nvidia.com>, <ddutile@redhat.com>,
<berrange@redhat.com>, <nathanc@nvidia.com>, <mochs@nvidia.com>,
<smostafa@google.com>, <wangzhou1@hisilicon.com>,
<jiangkunkun@huawei.com>, <jonathan.cameron@huawei.com>,
<zhangfei.gao@linaro.org>, <zhenzhong.duan@intel.com>,
<shameerkolothum@gmail.com>
Subject: Re: [RFC PATCH v3 06/15] hw/arm/smmuv3-accel: Restrict accelerated SMMUv3 to vfio-pci endpoints with iommufd
Date: Tue, 15 Jul 2025 10:51:14 +0100 [thread overview]
Message-ID: <20250715105114.0000260a@huawei.com> (raw)
In-Reply-To: <20250714155941.22176-7-shameerali.kolothum.thodi@huawei.com>
On Mon, 14 Jul 2025 16:59:32 +0100
Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> wrote:
> Accelerated SMMUv3 is only useful when the device can take advantage of
> the host's SMMUv3 in nested mode. To keep things simple and correct, we
> only allow this feature for vfio-pci endpoint devices that use the iommufd
> backend. We also allow non-endpoint emulated devices like PCI bridges and
> root ports, so that users can plug in these vfio-pci devices.
>
> Another reason for this limit is to avoid problems with IOTLB
> invalidations. Some commands (e.g., CMD_TLBI_NH_ASID) lack an associated
> SID, making it difficult to trace the originating device. If we allowed
> emulated endpoint devices, QEMU would have to invalidate both its own
> software IOTLB and the host's hardware IOTLB, which could slow things
> down.
>
> Since vfio-pci devices in nested mode rely on the host SMMUv3's nested
> translation (S1+S2), their get_address_space() callback must return the
> system address space to enable correct S2 mappings of guest RAM.
>
> So in short:
> - vfio-pci devices return the system address space
> - bridges and root ports return the IOMMU address space
>
> Note: On ARM, MSI doorbell addresses are also translated via SMMUv3.
> Hence, if a vfio-pci device is behind the SMMuv3 with translation enabled,
> it must return the IOMMU address space for MSI. Support for this will be
> added in a follow-up patch.
>
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> ---
> hw/arm/smmuv3-accel.c | 50 ++++++++++++++++++++++++++++-
> hw/arm/smmuv3-accel.h | 15 +++++++++
> hw/arm/smmuv3.c | 4 +++
> hw/pci-bridge/pci_expander_bridge.c | 1 -
> include/hw/arm/smmuv3.h | 1 +
> include/hw/pci/pci_bridge.h | 1 +
> 6 files changed, 70 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c
> index 2eac9c6ff4..0b0ddb03e2 100644
> --- a/hw/arm/smmuv3-accel.c
> +++ b/hw/arm/smmuv3-accel.c
> @@ -7,13 +7,19 @@
> */
>
> #include "qemu/osdep.h"
> +#include "qemu/error-report.h"
>
> #include "hw/arm/smmuv3.h"
> +#include "hw/pci/pci_bridge.h"
> +#include "hw/pci-host/gpex.h"
> +#include "hw/vfio/pci.h"
> +
> #include "smmuv3-accel.h"
>
> static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, SMMUPciBus *sbus,
> PCIBus *bus, int devfn)
> {
> + SMMUv3State *s = ARM_SMMUV3(bs);
> SMMUDevice *sdev = sbus->pbdev[devfn];
> SMMUv3AccelDevice *accel_dev;
>
> @@ -25,30 +31,72 @@ static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, SMMUPciBus *sbus,
>
> sbus->pbdev[devfn] = sdev;
> smmu_init_sdev(bs, sdev, bus, devfn);
> + address_space_init(&accel_dev->as_sysmem, &s->s_accel->root,
> + "smmuv3-accel-sysmem");
> }
>
> return accel_dev;
> }
>
> +static bool smmuv3_accel_pdev_allowed(PCIDevice *pdev, bool *vfio_pci)
> +{
> +
> + if (object_dynamic_cast(OBJECT(pdev), TYPE_PCI_BRIDGE) ||
> + object_dynamic_cast(OBJECT(pdev), "pxb-pcie") ||
> + object_dynamic_cast(OBJECT(pdev), "gpex-root")) {
Include gpex.h and TYPE_GPEX_ROOT_DEVICE
TYPE_IOMMUFD_BACKEND in iommufd.h
etc.
> + return true;
> + } else if ((object_dynamic_cast(OBJECT(pdev), TYPE_VFIO_PCI) &&
> + object_property_find(OBJECT(pdev), "iommufd"))) {
> + *vfio_pci = true;
> + return true;
> + }
> + return false;
> +}
> +
> static AddressSpace *smmuv3_accel_find_add_as(PCIBus *bus, void *opaque,
> int devfn)
> {
> + PCIDevice *pdev = pci_find_device(bus, pci_bus_num(bus), devfn);
> SMMUState *bs = opaque;
> + bool vfio_pci = false;
> SMMUPciBus *sbus;
> SMMUv3AccelDevice *accel_dev;
> SMMUDevice *sdev;
>
> + if (pdev && !smmuv3_accel_pdev_allowed(pdev, &vfio_pci)) {
> + error_report("Device(%s) not allowed. Only PCIe root complex devices "
> + "or PCI bridge devices or vfio-pci endpoint devices with "
> + "iommufd as backend is allowed with arm-smmuv3,accel=on",
> + pdev->name);
> + exit(1);
> + }
> sbus = smmu_get_sbus(bs, bus);
> accel_dev = smmuv3_accel_get_dev(bs, sbus, bus, devfn);
> sdev = &accel_dev->sdev;
>
> - return &sdev->as;
> + if (vfio_pci) {
> + return &accel_dev->as_sysmem;
> + } else {
> + return &sdev->as;
> + }
> }
>
> static const PCIIOMMUOps smmuv3_accel_ops = {
> .get_address_space = smmuv3_accel_find_add_as,
> };
>
> +void smmuv3_accel_init(SMMUv3State *s)
> +{
> + SMMUv3AccelState *s_accel;
> +
> + s->s_accel = s_accel = g_new0(SMMUv3AccelState, 1);
> + memory_region_init(&s_accel->root, OBJECT(s), "root", UINT64_MAX);
> + memory_region_init_alias(&s_accel->sysmem, OBJECT(s),
> + "smmuv3-accel-sysmem", get_system_memory(), 0,
> + memory_region_size(get_system_memory()));
> + memory_region_add_subregion(&s_accel->root, 0, &s_accel->sysmem);
> +}
> +
> static void smmuv3_accel_class_init(ObjectClass *oc, const void *data)
> {
> SMMUBaseClass *sbc = ARM_SMMU_CLASS(oc);
> diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
> index d183a62766..3bdb92391a 100644
> --- a/include/hw/arm/smmuv3.h
> +++ b/include/hw/arm/smmuv3.h
> @@ -63,6 +63,7 @@ struct SMMUv3State {
> qemu_irq irq[4];
> QemuMutex mutex;
> char *stage;
> + struct SMMUv3AccelState *s_accel;
bonus space.
> };
>
> typedef enum {
next prev parent reply other threads:[~2025-07-15 9:52 UTC|newest]
Thread overview: 165+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-14 15:59 [RFC PATCH v3 00/15] hw/arm/virt: Add support for user-creatable accelerated SMMUv3 Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 15:59 ` [RFC PATCH v3 01/15] backends/iommufd: Introduce iommufd_backend_alloc_viommu Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 16:22 ` Nicolin Chen
2025-07-15 9:14 ` Jonathan Cameron via
2025-07-15 9:14 ` Jonathan Cameron via
2025-07-14 15:59 ` [RFC PATCH v3 02/15] backends/iommufd: Introduce iommufd_vdev_alloc Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 16:27 ` Nicolin Chen
2025-07-15 9:19 ` Jonathan Cameron via
2025-07-15 9:19 ` Jonathan Cameron via
2025-07-14 15:59 ` [RFC PATCH v3 03/15] hw/arm/smmu-common: Factor out common helper functions and export Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-15 9:27 ` Jonathan Cameron via
2025-07-15 9:27 ` Jonathan Cameron via
2025-07-14 15:59 ` [RFC PATCH v3 04/15] hw/arm/smmu-common: Introduce smmu_iommu_ops_by_type() helper Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 16:38 ` Nicolin Chen via
2025-07-14 16:38 ` Nicolin Chen via
2025-07-15 9:30 ` Jonathan Cameron via
2025-07-15 9:30 ` Jonathan Cameron via
2025-09-04 7:55 ` Eric Auger
2025-07-14 15:59 ` [RFC PATCH v3 05/15] hw/arm/smmuv3-accel: Introduce smmuv3 accel device Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 17:23 ` Nicolin Chen
2025-09-04 14:33 ` Eric Auger
2025-09-05 8:22 ` Shameer Kolothum
2025-09-05 10:17 ` Eric Auger
2025-09-08 9:15 ` Shameer Kolothum
2025-09-09 13:38 ` Eric Auger
2025-07-15 9:45 ` Jonathan Cameron via
2025-07-15 9:45 ` Jonathan Cameron via
2025-07-15 10:48 ` Duan, Zhenzhong
2025-07-15 17:29 ` Nicolin Chen
2025-07-16 3:38 ` Duan, Zhenzhong
2025-07-16 9:27 ` Shameerali Kolothum Thodi via
2025-07-16 9:27 ` Shameerali Kolothum Thodi via
2025-09-04 14:31 ` Eric Auger
2025-09-10 16:10 ` Shameer Kolothum
2025-07-14 15:59 ` [RFC PATCH v3 06/15] hw/arm/smmuv3-accel: Restrict accelerated SMMUv3 to vfio-pci endpoints with iommufd Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 18:18 ` Nicolin Chen
2025-07-15 9:51 ` Jonathan Cameron via [this message]
2025-07-15 9:51 ` Jonathan Cameron via
2025-07-15 10:53 ` Duan, Zhenzhong
2025-07-15 17:59 ` Nicolin Chen
2025-07-16 6:26 ` Duan, Zhenzhong
2025-07-16 9:34 ` Shameerali Kolothum Thodi via
2025-07-16 9:34 ` Shameerali Kolothum Thodi via
2025-07-16 10:32 ` Duan, Zhenzhong
2025-07-16 17:51 ` Nicolin Chen
2025-07-16 18:21 ` Nicolin Chen
2025-09-05 8:34 ` Eric Auger
2025-09-05 8:14 ` Eric Auger
2025-09-08 7:41 ` Shameer Kolothum
2025-09-09 13:34 ` Eric Auger
2025-07-16 8:06 ` Shameerali Kolothum Thodi via
2025-07-16 8:06 ` Shameerali Kolothum Thodi via
2025-09-05 8:29 ` Eric Auger
2025-09-08 7:55 ` Shameer Kolothum
2025-08-06 0:55 ` Nicolin Chen
2025-09-16 10:33 ` Shameer Kolothum
2025-09-17 18:45 ` Nicolin Chen
2025-09-17 18:52 ` Shameer Kolothum
2025-09-17 19:04 ` Jason Gunthorpe
2025-09-18 13:31 ` Shameer Kolothum
2025-09-18 22:00 ` Nicolin Chen
2025-09-19 7:38 ` Shameer Kolothum
2025-09-19 18:36 ` Nicolin Chen
2025-09-20 13:03 ` Peter Maydell
2025-09-22 8:28 ` Shameer Kolothum
2025-09-05 8:42 ` Eric Auger
2025-09-08 8:03 ` Shameer Kolothum
2025-07-14 15:59 ` [RFC PATCH v3 07/15] hw/arm/smmuv3: Implement get_viommu_cap() callback Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 18:31 ` Nicolin Chen
2025-09-05 8:49 ` Eric Auger
2025-09-08 8:22 ` Shameer Kolothum
2025-09-08 13:40 ` Jason Gunthorpe
2025-09-09 13:37 ` Eric Auger
2025-07-14 15:59 ` [RFC PATCH v3 08/15] hw/arm/smmuv3-accel: Add set/unset_iommu_device callback Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 19:11 ` Nicolin Chen
2025-07-15 10:29 ` Jonathan Cameron via
2025-07-15 10:29 ` Jonathan Cameron via
2025-07-15 17:01 ` Nicolin Chen
2025-07-16 9:33 ` Jonathan Cameron via
2025-07-16 9:33 ` Jonathan Cameron via
2025-09-05 9:27 ` Eric Auger
2025-09-08 8:49 ` Shameer Kolothum
2025-07-14 15:59 ` [RFC PATCH v3 09/15] hw/arm/smmuv3-accel: Support nested STE install/uninstall support Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 19:37 ` Nicolin Chen
2025-07-15 23:12 ` Nicolin Chen
2025-07-16 8:36 ` Shameerali Kolothum Thodi via
2025-07-16 8:36 ` Shameerali Kolothum Thodi via
2025-07-16 18:17 ` Nicolin Chen
2025-09-05 9:51 ` Eric Auger
2025-09-05 9:40 ` Eric Auger
2025-07-14 15:59 ` [RFC PATCH v3 10/15] hw/arm/smmuv3-accel: Allocate a vDEVICE object for device Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 19:43 ` Nicolin Chen
2025-09-05 9:57 ` Eric Auger
2025-09-05 18:36 ` Nicolin Chen
2025-07-14 15:59 ` [RFC PATCH v3 11/15] hw/pci/pci: Introduce optional get_msi_address_space() callback Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 19:50 ` Nicolin Chen
2025-09-05 10:11 ` Eric Auger
2025-09-05 10:11 ` Eric Auger
2025-07-14 15:59 ` [RFC PATCH v3 12/15] hw/arm/smmuv3-accel: Introduce helpers to batch and issue cache invalidations Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 19:55 ` Nicolin Chen
2025-07-15 10:39 ` Jonathan Cameron via
2025-07-15 10:39 ` Jonathan Cameron via
2025-07-15 17:07 ` Nicolin Chen
2025-09-05 10:31 ` Eric Auger
2025-09-08 9:59 ` Shameer Kolothum
2025-09-08 19:29 ` Nicolin Chen
2025-07-14 15:59 ` [RFC PATCH v3 13/15] hw/arm/smmuv3: Forward invalidation commands to hw Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-15 10:46 ` Jonathan Cameron via
2025-07-15 10:46 ` Jonathan Cameron via
2025-07-15 17:22 ` Nicolin Chen
2025-07-16 7:32 ` Shameerali Kolothum Thodi via
2025-07-16 7:32 ` Shameerali Kolothum Thodi via
2025-09-05 12:45 ` Eric Auger
2025-09-08 12:22 ` Shameer Kolothum
2025-09-08 20:12 ` Nicolin Chen
2025-09-09 13:43 ` Eric Auger
2025-07-14 15:59 ` [RFC PATCH v3 14/15] Read and validate host SMMUv3 feature bits Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 20:04 ` Nicolin Chen via
2025-07-14 20:04 ` Nicolin Chen via
2025-07-14 20:24 ` Nicolin Chen via
2025-07-14 20:24 ` Nicolin Chen via
2025-07-15 10:48 ` Jonathan Cameron via
2025-07-15 10:48 ` Jonathan Cameron via
2025-07-16 2:57 ` Nicolin Chen via
2025-07-16 2:57 ` Nicolin Chen via
2025-07-16 10:26 ` Shameerali Kolothum Thodi via
2025-07-16 10:26 ` Shameerali Kolothum Thodi via
2025-07-16 18:37 ` Nicolin Chen
2025-07-16 11:51 ` Jason Gunthorpe
2025-07-16 17:35 ` Nicolin Chen
2025-07-16 17:45 ` Jason Gunthorpe
2025-07-16 18:09 ` Nicolin Chen
2025-07-16 18:42 ` Jason Gunthorpe
2025-07-16 18:53 ` Nicolin Chen
2025-09-05 13:04 ` Eric Auger
2025-07-22 17:42 ` Nicolin Chen
2025-09-05 13:20 ` Eric Auger
2025-07-14 15:59 ` [RFC PATCH v3 15/15] hw/arm/smmu-common: Add accel property for SMMU dev Shameer Kolothum via
2025-07-14 15:59 ` Shameer Kolothum via
2025-07-14 20:00 ` Nicolin Chen
2025-07-15 10:49 ` Jonathan Cameron via
2025-07-15 10:49 ` Jonathan Cameron via
2025-09-05 10:36 ` Eric Auger
2025-07-14 16:14 ` [RFC PATCH v3 00/15] hw/arm/virt: Add support for user-creatable accelerated SMMUv3 Nicolin Chen via
2025-07-14 16:14 ` Nicolin Chen via
2025-07-14 20:22 ` Nicolin Chen via
2025-07-14 20:22 ` Nicolin Chen via
2025-07-15 10:46 ` Duan, Zhenzhong
2025-07-16 7:27 ` Shameerali Kolothum Thodi via
2025-07-16 7:27 ` Shameerali Kolothum Thodi via
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