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From: Jamin Lin via <qemu-arm@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>
Subject: [PATCH v1 03/21] hw/arm/ast27x0: Move TSP coprocessor initialization from machine to SoC leve
Date: Thu, 17 Jul 2025 11:40:31 +0800	[thread overview]
Message-ID: <20250717034054.1903991-4-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250717034054.1903991-1-jamin_lin@aspeedtech.com>

In the previous design, the TSP coprocessor (aspeed27x0tsp-soc) was initialized
and realized at the machine level (e.g., AST2700FC). To allow proper
integration between coprocessors—such as shared use of SRAM, SCU, and memory
remap configuration—this commit moves TSP initialization into the AST2700 SoC.

By handling TSP initialization and realization at the SoC level, it becomes
easier to manage device ordering and ensure correct dependencies between
coprocessors and controllers. It also reflects the hardware design more
accurately, as these processors belong to the SoC, not the board.

Benefits of this change:
- TSP can share SCU, SRAM, and memory regions with other SoC devices.
- Centralizes coprocessor setup logic under SoC for better maintenance.
- Simplifies machine-level code in "aspeed_ast27x0-fc.c".

This is part of ongoing work to support shared SCU, SRAM, and memory remap
handling across PSP, SSP, and TSP. Future commits will add memory remap
mechanisms and tightly integrated SoC controller coordination.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 include/hw/arm/aspeed_soc.h | 26 ++++++++++++++------------
 hw/arm/aspeed_ast27x0-fc.c  | 32 ++------------------------------
 hw/arm/aspeed_ast27x0.c     | 28 ++++++++++++++++++++++++++++
 3 files changed, 44 insertions(+), 42 deletions(-)

diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 2831da91ab..3dd317cfee 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -141,6 +141,19 @@ struct Aspeed27x0SSPSoCState {
 #define TYPE_ASPEED27X0SSP_SOC "aspeed27x0ssp-soc"
 OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0SSPSoCState, ASPEED27X0SSP_SOC)
 
+struct Aspeed27x0TSPSoCState {
+    AspeedSoCState parent;
+    AspeedINTCState intc[2];
+    UnimplementedDeviceState ipc[2];
+    UnimplementedDeviceState scuio;
+    MemoryRegion memory;
+
+    ARMv7MState armv7m;
+};
+
+#define TYPE_ASPEED27X0TSP_SOC "aspeed27x0tsp-soc"
+OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0TSPSoCState, ASPEED27X0TSP_SOC)
+
 struct Aspeed27x0SoCState {
     AspeedSoCState parent;
 
@@ -150,6 +163,7 @@ struct Aspeed27x0SoCState {
     MemoryRegion dram_empty;
 
     Aspeed27x0SSPSoCState ssp;
+    Aspeed27x0TSPSoCState tsp;
 };
 
 #define TYPE_ASPEED27X0_SOC "aspeed27x0-soc"
@@ -161,18 +175,6 @@ struct Aspeed10x0SoCState {
     ARMv7MState armv7m;
 };
 
-struct Aspeed27x0TSPSoCState {
-    AspeedSoCState parent;
-    AspeedINTCState intc[2];
-    UnimplementedDeviceState ipc[2];
-    UnimplementedDeviceState scuio;
-
-    ARMv7MState armv7m;
-};
-
-#define TYPE_ASPEED27X0TSP_SOC "aspeed27x0tsp-soc"
-OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0TSPSoCState, ASPEED27X0TSP_SOC)
-
 #define TYPE_ASPEED10X0_SOC "aspeed10x0-soc"
 OBJECT_DECLARE_SIMPLE_TYPE(Aspeed10x0SoCState, ASPEED10X0_SOC)
 
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index c9b338fe78..eb25a2635b 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -37,18 +37,13 @@ struct Ast2700FCState {
     MemoryRegion ca35_memory;
     MemoryRegion ca35_dram;
     MemoryRegion ca35_boot_rom;
-    MemoryRegion tsp_memory;
-
-    Clock *tsp_sysclk;
 
     Aspeed27x0SoCState ca35;
-    Aspeed27x0TSPSoCState tsp;
 
     bool mmio_exec;
 };
 
 #define AST2700FC_BMC_RAM_SIZE (1 * GiB)
-#define AST2700FC_CM4_DRAM_SIZE (32 * MiB)
 
 #define AST2700FC_HW_STRAP1 0x000000C0
 #define AST2700FC_HW_STRAP2 0x00000003
@@ -157,6 +152,8 @@ static void ast2700fc_ca35_init(MachineState *machine)
     aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART12, serial_hd(0));
     aspeed_soc_uart_set_chr(ASPEED_SOC(&s->ca35.ssp), ASPEED_DEV_UART4,
                             serial_hd(1));
+    aspeed_soc_uart_set_chr(ASPEED_SOC(&s->ca35.tsp), ASPEED_DEV_UART7,
+                            serial_hd(2));
     if (!qdev_realize(DEVICE(&s->ca35), NULL, &error_abort)) {
         return;
     }
@@ -195,34 +192,9 @@ static void ast2700fc_ca35_init(MachineState *machine)
     arm_load_kernel(ARM_CPU(first_cpu), machine, &ast2700fc_board_info);
 }
 
-static void ast2700fc_tsp_init(MachineState *machine)
-{
-    AspeedSoCState *soc;
-    Ast2700FCState *s = AST2700A1FC(machine);
-    s->tsp_sysclk = clock_new(OBJECT(s), "TSP_SYSCLK");
-    clock_set_hz(s->tsp_sysclk, 200000000ULL);
-
-    object_initialize_child(OBJECT(s), "tsp", &s->tsp, TYPE_ASPEED27X0TSP_SOC);
-    memory_region_init(&s->tsp_memory, OBJECT(&s->tsp), "tsp-memory",
-                       UINT64_MAX);
-
-    qdev_connect_clock_in(DEVICE(&s->tsp), "sysclk", s->tsp_sysclk);
-    if (!object_property_set_link(OBJECT(&s->tsp), "memory",
-                                  OBJECT(&s->tsp_memory), &error_abort)) {
-        return;
-    }
-
-    soc = ASPEED_SOC(&s->tsp);
-    aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART7, serial_hd(2));
-    if (!qdev_realize(DEVICE(&s->tsp), NULL, &error_abort)) {
-        return;
-    }
-}
-
 static void ast2700fc_init(MachineState *machine)
 {
     ast2700fc_ca35_init(machine);
-    ast2700fc_tsp_init(machine);
 }
 
 static void ast2700fc_class_init(ObjectClass *oc, const void *data)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index ffbc32fef2..665627f788 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -433,6 +433,7 @@ static void aspeed_soc_ast2700_init(Object *obj)
     /* Coprocessors */
     if (mc->default_cpus > sc->num_cpus) {
         object_initialize_child(obj, "ssp", &a->ssp, TYPE_ASPEED27X0SSP_SOC);
+        object_initialize_child(obj, "tsp", &a->tsp, TYPE_ASPEED27X0TSP_SOC);
     }
 
     object_initialize_child(obj, "gic", &a->gic, gicv3_class_name());
@@ -643,6 +644,30 @@ static bool aspeed_soc_ast2700_ssp_realize(DeviceState *dev, Error **errp)
     return true;
 }
 
+static bool aspeed_soc_ast2700_tsp_realize(DeviceState *dev, Error **errp)
+{
+    Aspeed27x0SoCState *a = ASPEED27X0_SOC(dev);
+    AspeedSoCState *s = ASPEED_SOC(dev);
+    Clock *sysclk;
+
+    sysclk = clock_new(OBJECT(s), "TSP_SYSCLK");
+    clock_set_hz(sysclk, 200000000ULL);
+    qdev_connect_clock_in(DEVICE(&a->tsp), "sysclk", sysclk);
+
+    memory_region_init(&a->tsp.memory, OBJECT(&a->tsp), "tsp-memory",
+                       UINT64_MAX);
+    if (!object_property_set_link(OBJECT(&a->tsp), "memory",
+                                  OBJECT(&a->tsp.memory), &error_abort)) {
+        return false;
+    }
+
+    if (!qdev_realize(DEVICE(&a->tsp), NULL, &error_abort)) {
+        return false;
+    }
+
+    return true;
+}
+
 static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
 {
     int i;
@@ -759,6 +784,9 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
         if (!aspeed_soc_ast2700_ssp_realize(dev, errp)) {
             return;
         }
+        if (!aspeed_soc_ast2700_tsp_realize(dev, errp)) {
+            return;
+        }
     }
 
     /* UART */
-- 
2.43.0



WARNING: multiple messages have this Message-ID (diff)
From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>
Subject: [PATCH v1 03/21] hw/arm/ast27x0: Move TSP coprocessor initialization from machine to SoC leve
Date: Thu, 17 Jul 2025 11:40:31 +0800	[thread overview]
Message-ID: <20250717034054.1903991-4-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250717034054.1903991-1-jamin_lin@aspeedtech.com>

In the previous design, the TSP coprocessor (aspeed27x0tsp-soc) was initialized
and realized at the machine level (e.g., AST2700FC). To allow proper
integration between coprocessors—such as shared use of SRAM, SCU, and memory
remap configuration—this commit moves TSP initialization into the AST2700 SoC.

By handling TSP initialization and realization at the SoC level, it becomes
easier to manage device ordering and ensure correct dependencies between
coprocessors and controllers. It also reflects the hardware design more
accurately, as these processors belong to the SoC, not the board.

Benefits of this change:
- TSP can share SCU, SRAM, and memory regions with other SoC devices.
- Centralizes coprocessor setup logic under SoC for better maintenance.
- Simplifies machine-level code in "aspeed_ast27x0-fc.c".

This is part of ongoing work to support shared SCU, SRAM, and memory remap
handling across PSP, SSP, and TSP. Future commits will add memory remap
mechanisms and tightly integrated SoC controller coordination.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 include/hw/arm/aspeed_soc.h | 26 ++++++++++++++------------
 hw/arm/aspeed_ast27x0-fc.c  | 32 ++------------------------------
 hw/arm/aspeed_ast27x0.c     | 28 ++++++++++++++++++++++++++++
 3 files changed, 44 insertions(+), 42 deletions(-)

diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 2831da91ab..3dd317cfee 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -141,6 +141,19 @@ struct Aspeed27x0SSPSoCState {
 #define TYPE_ASPEED27X0SSP_SOC "aspeed27x0ssp-soc"
 OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0SSPSoCState, ASPEED27X0SSP_SOC)
 
+struct Aspeed27x0TSPSoCState {
+    AspeedSoCState parent;
+    AspeedINTCState intc[2];
+    UnimplementedDeviceState ipc[2];
+    UnimplementedDeviceState scuio;
+    MemoryRegion memory;
+
+    ARMv7MState armv7m;
+};
+
+#define TYPE_ASPEED27X0TSP_SOC "aspeed27x0tsp-soc"
+OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0TSPSoCState, ASPEED27X0TSP_SOC)
+
 struct Aspeed27x0SoCState {
     AspeedSoCState parent;
 
@@ -150,6 +163,7 @@ struct Aspeed27x0SoCState {
     MemoryRegion dram_empty;
 
     Aspeed27x0SSPSoCState ssp;
+    Aspeed27x0TSPSoCState tsp;
 };
 
 #define TYPE_ASPEED27X0_SOC "aspeed27x0-soc"
@@ -161,18 +175,6 @@ struct Aspeed10x0SoCState {
     ARMv7MState armv7m;
 };
 
-struct Aspeed27x0TSPSoCState {
-    AspeedSoCState parent;
-    AspeedINTCState intc[2];
-    UnimplementedDeviceState ipc[2];
-    UnimplementedDeviceState scuio;
-
-    ARMv7MState armv7m;
-};
-
-#define TYPE_ASPEED27X0TSP_SOC "aspeed27x0tsp-soc"
-OBJECT_DECLARE_SIMPLE_TYPE(Aspeed27x0TSPSoCState, ASPEED27X0TSP_SOC)
-
 #define TYPE_ASPEED10X0_SOC "aspeed10x0-soc"
 OBJECT_DECLARE_SIMPLE_TYPE(Aspeed10x0SoCState, ASPEED10X0_SOC)
 
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index c9b338fe78..eb25a2635b 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -37,18 +37,13 @@ struct Ast2700FCState {
     MemoryRegion ca35_memory;
     MemoryRegion ca35_dram;
     MemoryRegion ca35_boot_rom;
-    MemoryRegion tsp_memory;
-
-    Clock *tsp_sysclk;
 
     Aspeed27x0SoCState ca35;
-    Aspeed27x0TSPSoCState tsp;
 
     bool mmio_exec;
 };
 
 #define AST2700FC_BMC_RAM_SIZE (1 * GiB)
-#define AST2700FC_CM4_DRAM_SIZE (32 * MiB)
 
 #define AST2700FC_HW_STRAP1 0x000000C0
 #define AST2700FC_HW_STRAP2 0x00000003
@@ -157,6 +152,8 @@ static void ast2700fc_ca35_init(MachineState *machine)
     aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART12, serial_hd(0));
     aspeed_soc_uart_set_chr(ASPEED_SOC(&s->ca35.ssp), ASPEED_DEV_UART4,
                             serial_hd(1));
+    aspeed_soc_uart_set_chr(ASPEED_SOC(&s->ca35.tsp), ASPEED_DEV_UART7,
+                            serial_hd(2));
     if (!qdev_realize(DEVICE(&s->ca35), NULL, &error_abort)) {
         return;
     }
@@ -195,34 +192,9 @@ static void ast2700fc_ca35_init(MachineState *machine)
     arm_load_kernel(ARM_CPU(first_cpu), machine, &ast2700fc_board_info);
 }
 
-static void ast2700fc_tsp_init(MachineState *machine)
-{
-    AspeedSoCState *soc;
-    Ast2700FCState *s = AST2700A1FC(machine);
-    s->tsp_sysclk = clock_new(OBJECT(s), "TSP_SYSCLK");
-    clock_set_hz(s->tsp_sysclk, 200000000ULL);
-
-    object_initialize_child(OBJECT(s), "tsp", &s->tsp, TYPE_ASPEED27X0TSP_SOC);
-    memory_region_init(&s->tsp_memory, OBJECT(&s->tsp), "tsp-memory",
-                       UINT64_MAX);
-
-    qdev_connect_clock_in(DEVICE(&s->tsp), "sysclk", s->tsp_sysclk);
-    if (!object_property_set_link(OBJECT(&s->tsp), "memory",
-                                  OBJECT(&s->tsp_memory), &error_abort)) {
-        return;
-    }
-
-    soc = ASPEED_SOC(&s->tsp);
-    aspeed_soc_uart_set_chr(soc, ASPEED_DEV_UART7, serial_hd(2));
-    if (!qdev_realize(DEVICE(&s->tsp), NULL, &error_abort)) {
-        return;
-    }
-}
-
 static void ast2700fc_init(MachineState *machine)
 {
     ast2700fc_ca35_init(machine);
-    ast2700fc_tsp_init(machine);
 }
 
 static void ast2700fc_class_init(ObjectClass *oc, const void *data)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index ffbc32fef2..665627f788 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -433,6 +433,7 @@ static void aspeed_soc_ast2700_init(Object *obj)
     /* Coprocessors */
     if (mc->default_cpus > sc->num_cpus) {
         object_initialize_child(obj, "ssp", &a->ssp, TYPE_ASPEED27X0SSP_SOC);
+        object_initialize_child(obj, "tsp", &a->tsp, TYPE_ASPEED27X0TSP_SOC);
     }
 
     object_initialize_child(obj, "gic", &a->gic, gicv3_class_name());
@@ -643,6 +644,30 @@ static bool aspeed_soc_ast2700_ssp_realize(DeviceState *dev, Error **errp)
     return true;
 }
 
+static bool aspeed_soc_ast2700_tsp_realize(DeviceState *dev, Error **errp)
+{
+    Aspeed27x0SoCState *a = ASPEED27X0_SOC(dev);
+    AspeedSoCState *s = ASPEED_SOC(dev);
+    Clock *sysclk;
+
+    sysclk = clock_new(OBJECT(s), "TSP_SYSCLK");
+    clock_set_hz(sysclk, 200000000ULL);
+    qdev_connect_clock_in(DEVICE(&a->tsp), "sysclk", sysclk);
+
+    memory_region_init(&a->tsp.memory, OBJECT(&a->tsp), "tsp-memory",
+                       UINT64_MAX);
+    if (!object_property_set_link(OBJECT(&a->tsp), "memory",
+                                  OBJECT(&a->tsp.memory), &error_abort)) {
+        return false;
+    }
+
+    if (!qdev_realize(DEVICE(&a->tsp), NULL, &error_abort)) {
+        return false;
+    }
+
+    return true;
+}
+
 static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
 {
     int i;
@@ -759,6 +784,9 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
         if (!aspeed_soc_ast2700_ssp_realize(dev, errp)) {
             return;
         }
+        if (!aspeed_soc_ast2700_tsp_realize(dev, errp)) {
+            return;
+        }
     }
 
     /* UART */
-- 
2.43.0



  parent reply	other threads:[~2025-07-17  3:42 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-17  3:40 [PATCH v1 00/21] Control coprocessor reset for AST2700 Jamin Lin via
2025-07-17  3:40 ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 01/21] hw/arm/aspeed_ast27x0-fc: Support VBootRom Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-09-02  6:01   ` [SPAM] " Cédric Le Goater
2025-09-02  8:28     ` Jamin Lin
2025-09-02 13:23       ` Cédric Le Goater
2025-09-03  5:19         ` Jamin Lin
2025-09-03  8:48           ` Jamin Lin
2025-07-17  3:40 ` [PATCH v1 02/21] hw/arm/ast27x0: Move SSP coprocessor initialization from machine to SoC leve Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-09-02  6:20   ` [SPAM] " Cédric Le Goater
2025-09-02  7:27     ` Markus Armbruster
2025-09-02  8:49       ` Jamin Lin
2025-09-02  9:39         ` Markus Armbruster
2025-09-02  8:41     ` Jamin Lin
2025-09-02 13:24       ` Cédric Le Goater
2025-07-17  3:40 ` Jamin Lin via [this message]
2025-07-17  3:40   ` [PATCH v1 03/21] hw/arm/ast27x0: Move TSP " Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 04/21] hw/arm/aspeed_ast27x0-ssp: Switch SSP memory to SDRAM and use dram_container for remap support Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-09-02  7:36   ` [SPAM] " Cédric Le Goater
2025-09-03  1:45     ` Jamin Lin
2025-07-17  3:40 ` [PATCH v1 05/21] hw/arm/aspeed_ast27x0-tsp: Switch TSP " Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 06/21] hw/arm/ast27x0: Add SRAM alias for SSP and ensure correct device realization order Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-09-02  7:47   ` [SPAM] " Cédric Le Goater
2025-09-03  1:48     ` Jamin Lin
2025-07-17  3:40 ` [PATCH v1 07/21] hw/arm/ast27x0: Add SRAM alias for TSP " Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 08/21] hw/arm/ast27x0: Add SCU alias for SSP " Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-09-02  8:09   ` [SPAM] " Cédric Le Goater
2025-09-23  8:31     ` Jamin Lin
2025-09-23 11:33       ` Cédric Le Goater
2025-09-24  6:03         ` Jamin Lin
2025-09-24 11:13           ` Cédric Le Goater
2025-09-25  2:32             ` Jamin Lin
2025-09-26  3:13               ` Jamin Lin
2025-09-26  7:44                 ` Cédric Le Goater
2025-07-17  3:40 ` [PATCH v1 09/21] hw/arm/ast27x0: Add SCU alias for TSP " Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 10/21] hw/arm/ast27x0: Move DRAM and SDMC initialization earlier to support memory aliasing Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-09-02  7:51   ` [SPAM] " Cédric Le Goater
2025-09-03  1:50     ` Jamin Lin
2025-07-17  3:40 ` [PATCH v1 11/21] hw/arm/ast27x0: Add DRAM alias for SSP SDRAM remap and update realization order Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 12/21] hw/arm/ast27x0: Add DRAM alias for TSP " Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 13/21] hw/arm/ast27x0: Start SSP in powered-off state to match hardware behavior Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 14/21] hw/arm/ast27x0: Start TSP " Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 15/21] hw/misc/aspeed_scu: Add SCU support for SSP SDRAM remap Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 16/21] hw/misc/aspeed_scu: Add SCU support for TSP " Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 17/21] hw/misc/aspeed_scu: Implement SSP reset and power-on control via SCU registers Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 18/21] hw/misc/aspeed_scu: Implement TSP " Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 19/21] pc-bios: Update AST27x0 vBootrom with SSP/TSP SCU initialization support Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-22 15:21   ` [SPAM] " Cédric Le Goater
2025-07-23  2:42     ` Jamin Lin
2025-07-27 19:51   ` Michael Tokarev
2025-07-28  6:49     ` Cédric Le Goater
2025-07-28  7:02       ` Jamin Lin via
2025-07-28  7:02         ` Jamin Lin via
2025-07-28  7:11         ` Cédric Le Goater
2025-07-28  7:11         ` Michael Tokarev
2025-07-28  7:41           ` Jamin Lin via
2025-07-28  7:41             ` Jamin Lin via
2025-07-29  9:12             ` Cédric Le Goater
2025-07-30  1:47               ` Jamin Lin via
2025-07-30  1:47                 ` Jamin Lin via
2025-07-30  4:59                 ` Cédric Le Goater
2025-07-28  8:32       ` Michael Tokarev
2025-07-28  8:40         ` Cédric Le Goater
2025-07-17  3:40 ` [PATCH v1 20/21] tests/function/aspeed: Replace manual loader with vbootrom for ast2700fc test Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 21/21] docs: Add support vbootrom for ast2700fc Jamin Lin via
2025-07-17  3:40   ` Jamin Lin via
2025-07-17  5:22 ` [PATCH v1 00/21] Control coprocessor reset for AST2700 Jamin Lin

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