* [PULL 00/48] Accel patches for 2026-06-18
@ 2026-06-18 12:27 Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 01/48] system/cpu: Reset vCPU %exception_index before resuming it Philippe Mathieu-Daudé
` (48 more replies)
0 siblings, 49 replies; 50+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw)
To: qemu-devel
The following changes since commit c7cf7c810153d6f5f31aa2d5c0dee9087f6b4dff:
Merge tag 'firmware-20260617-pull-request' of https://gitlab.com/kraxel/qemu into staging (2026-06-17 10:17:29 -0400)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/accel-20260618
for you to fetch changes up to 1eaae985d4dec2aa0b187e362db50be46968d117:
accel/tcg: Restrict headers being TCG specific (2026-06-18 14:27:21 +0200)
----------------------------------------------------------------
Accelerators patches queue
- Avoid double hv_vcpu_destroy() call during teardown on HVF ARM
- Constify various AddressSpace/MemoryRegionCache arguments
- Clarify physical_memory_*() API in "system/physmem.h"
- Extract "accel/tcg/cpu-loop.h" out of "exec/cpu-common.h"
- Restrict few TCG-specific code
- Remove pre-C11 check
- Various header cleanups
----------------------------------------------------------------
Akihiko Odaki (1):
ui/cocoa: Use qemu_input_map_osx_to_linux
Bin Guo (1):
util/cutils: drop qemu_strnlen() in favor of strnlen()
Emmanuel Blot (1):
meson: build macOS signed binary as part of the default target
Matheus Tavares Bernardino (1):
accel/hvf: fix double hv_vcpu_destroy() causing teardown error on ARM
Matt Jacobson (1):
configure: honor --extra-ldflags when forced to use objc_LINKER
Osama Abdelkader (1):
accel/tcg: remove duplicate include
Philippe Mathieu-Daudé (42):
system/cpu: Reset vCPU %exception_index before resuming it
system/memory: Constify various AddressSpace arguments (checks)
system/memory: Constify various AddressSpace arguments (flat-range)
system/memory: Constify various AddressSpace arguments (notify)
system/memory: Constify various AddressSpace arguments (cache)
system/memory: Constify various AddressSpace arguments (access)
system/memory: Constify various MemoryRegionCache arguments
system: Document cpu_physical_memory_*() declarations
accel/kvm: Replace legacy cpu_physical_memory_write() call
gdbstub/system: Replace legacy cpu_physical_memory_read/write() calls
target/s390x: Factor common s390_ipl_read/write() helpers
target/s390x: Replace legacy cpu_physical_memory_read/write() calls
system: Move cpu_physical_memory_*() declarations to
'system/physmem.h'
hw/xen/interface: Remove pre-C99 checks
qom/object: Remove pre-C11 check
tcg: Include missing 'qemu/bitops.h' header in tcg-gvec-desc.h
target/i386: Report TPR accesses to HVF
target/arm: Only set CPU_INTERRUPT_EXITTB for TCG
target/arm: Remove vcpu_dirty=true assigments in
hvf_handle_exception()
target/arm: Better describe PMU depends on TCG or HVF
target/arm/ptw: Restrict PMSAv8 code to TCG
target/arm: Restrict TCG specific headers
target/ppc: Restrict TCGTBCPUState to TCG
target/loongarch: Remove unused 'accel/accel-cpu-target.h' header
target/sparc: Include missing 'accel/tcg/cpu-ops.h' header in cpu.c
accel/hvf: Reduce hvf_kernel_irqchip_override scope
accel/tcg: Restrict IOMMU declarations
exec/cpu-common.h: Include missing 'qemu/thread.h' header
exec/cpu-common.h: Avoid including unused 'exec/vaddr.h' header
exec/cpu-common.h: Avoid including unused 'tcg/debug-assert.h' header
exec/cpu-common.h: Avoid including unused exec/page-protection.h
header
system/memory: Remove unnecessary CONFIG_USER_ONLY guards
system/memory: Rename cpu_exec_init_all() -> machine_memory_init()
hw/s390x/ipl: Remove TCG dependency in handle_diag_308()
accel/tcg: Remove cpu_loop_exit() stub
accel/tcg: Move cpu_exec() out of 'exec/cpu-common.h'
accel/tcg: Move cpu_exec_step_atomic() out of 'exec/cpu-common.h'
accel/tcg: Move cpu_unwind_state_data() out of 'exec/cpu-common.h'
accel/tcg: Move cpu_restore_state() out of 'exec/cpu-common.h'
accel/tcg: Have cpu_loop_exit_requested() take const @cpu argument
accel/tcg: Move cpu_loop_exit_*() out of 'exec/cpu-common.h'
accel/tcg: Restrict headers being TCG specific
docs/devel/loads-stores.rst | 18 ++--
docs/devel/style.rst | 1 -
configure | 1 +
meson.build | 1 +
scripts/coccinelle/exec_rw_const.cocci | 16 +--
bsd-user/freebsd/os-proc.h | 1 +
hw/xtensa/bootparam.h | 6 +-
include/accel/tcg/cpu-loop.h | 76 ++++++++++++++
include/accel/tcg/cpu-mmu-index.h | 4 +
include/accel/tcg/cpu-ops.h | 4 +
include/accel/tcg/getpc.h | 4 +
include/accel/tcg/helper-retaddr.h | 4 +
include/accel/tcg/iommu.h | 7 ++
include/accel/tcg/probe.h | 4 +
include/accel/tcg/tb-cpu-state.h | 4 +
include/exec/cpu-common.h | 54 +---------
include/hw/xen/interface/physdev.h | 2 +-
include/hw/xen/interface/version.h | 5 +-
include/hw/xen/interface/xen-compat.h | 2 -
include/hw/xen/interface/xen.h | 14 ---
include/qemu/cutils.h | 17 +--
include/system/hvf_int.h | 1 -
include/system/memory.h | 18 ++--
include/system/memory_cached.h | 20 ++--
include/system/physmem.h | 50 +++++++++
include/tcg/tcg-gvec-desc.h | 2 +
include/user/cpu_loop.h | 2 +-
linux-user/qemu.h | 1 +
system/memory-internal.h | 4 +-
target/arm/internals.h | 4 +-
target/ppc/internal.h | 5 +-
target/ppc/mmu-hash32.h | 1 +
target/s390x/s390x-internal.h | 3 +-
include/system/memory_ldst_cached.h.inc | 15 +--
accel/hvf/hvf-all.c | 2 +-
accel/kvm/kvm-all.c | 12 +--
accel/stubs/tcg-stub.c | 19 ----
accel/tcg/cpu-exec-common.c | 1 +
accel/tcg/cpu-exec.c | 5 +-
accel/tcg/cputlb.c | 2 +-
accel/tcg/tb-maint.c | 2 +-
accel/tcg/tcg-accel-ops-mttcg.c | 1 +
accel/tcg/tcg-accel-ops-rr.c | 1 +
accel/tcg/tcg-accel-ops.c | 1 +
accel/tcg/tcg-runtime.c | 1 +
accel/tcg/translate-all.c | 2 +-
accel/tcg/user-exec.c | 1 +
accel/tcg/watchpoint.c | 1 +
bsd-user/main.c | 1 +
bsd-user/uaccess.c | 4 +-
dump/dump.c | 3 +-
dump/win_dump-x86.c | 5 +-
gdbstub/system.c | 11 +-
hw/acpi/ghes.c | 24 ++---
hw/acpi/nvdimm.c | 13 +--
hw/acpi/vmgenid.c | 3 +-
hw/audio/marvell_88w8618.c | 3 +-
hw/char/riscv_htif.c | 5 +-
hw/display/exynos4210_fimd.c | 7 +-
hw/display/omap_lcdc.c | 5 +-
hw/display/ramfb.c | 7 +-
hw/dma/i8257.c | 9 +-
hw/dma/omap_dma.c | 6 +-
hw/dma/rc4030.c | 3 +-
hw/dma/sifive_pdma.c | 9 +-
hw/hyperv/hyperv.c | 25 ++---
hw/hyperv/syndbg.c | 13 +--
hw/hyperv/vmbus.c | 9 +-
hw/i386/kvm/clock.c | 3 +-
hw/i386/vapic.c | 21 ++--
hw/intc/apic.c | 3 +-
hw/intc/xive2.c | 3 +-
hw/m68k/next-cube.c | 3 +-
hw/microblaze/boot.c | 3 +-
hw/misc/mips_itu.c | 1 +
hw/misc/pc-testdev.c | 5 +-
hw/net/fsl_etsec/rings.c | 13 +--
hw/net/mcf_fec.c | 11 +-
hw/net/opencores_eth.c | 9 +-
hw/nvram/spapr_nvram.c | 9 +-
hw/ppc/amigaone.c | 5 +-
hw/ppc/e500.c | 3 +-
hw/ppc/pegasos.c | 11 +-
hw/ppc/pnv.c | 5 +-
hw/ppc/ppc440_uc.c | 9 +-
hw/ppc/ppc_booke.c | 1 +
hw/ppc/spapr.c | 3 +-
hw/ppc/spapr_drc.c | 3 +-
hw/ppc/spapr_events.c | 9 +-
hw/ppc/spapr_hcall.c | 17 +--
hw/ppc/spapr_rtas.c | 5 +-
hw/ppc/spapr_tpm_proxy.c | 5 +-
hw/ppc/virtex_ml507.c | 3 +-
hw/s390x/css.c | 5 +-
hw/s390x/ipl.c | 14 +--
hw/s390x/s390-pci-bus.c | 5 +-
hw/s390x/virtio-ccw.c | 5 +-
hw/scsi/vmw_pvscsi.c | 12 +--
hw/xen/xen_pt_graphics.c | 4 +-
hw/xtensa/xtfpga.c | 5 +-
linux-user/arm/elfload.c | 1 +
linux-user/hppa/elfload.c | 1 +
linux-user/uaccess.c | 2 +-
linux-user/x86_64/elfload.c | 1 +
plugins/api.c | 1 +
qom/object.c | 14 +--
semihosting/console.c | 1 +
system/cpus.c | 4 +-
system/memory.c | 16 +--
system/physmem.c | 44 ++++----
system/vl.c | 3 +-
target/alpha/helper.c | 1 +
target/alpha/mem_helper.c | 1 +
target/arm/cpu-irq.c | 3 +-
target/arm/cpu.c | 2 +-
target/arm/helper.c | 2 +-
target/arm/hvf/hvf.c | 11 +-
target/arm/machine.c | 10 +-
target/arm/ptw.c | 20 +++-
target/arm/tcg/cpregs-at.c | 1 +
target/arm/tcg/helper-a64.c | 1 +
target/arm/tcg/op_helper.c | 1 +
target/arm/tcg/tlb_helper.c | 1 +
target/avr/helper.c | 1 +
target/hexagon/op_helper.c | 1 +
target/hppa/cpu.c | 1 +
target/hppa/mem_helper.c | 1 +
target/hppa/op_helper.c | 1 +
target/i386/helper.c | 3 +-
target/i386/tcg/excp_helper.c | 1 +
target/i386/tcg/misc_helper.c | 1 +
target/i386/tcg/system/bpt_helper.c | 1 +
target/i386/tcg/system/misc_helper.c | 1 +
target/i386/tcg/system/svm_helper.c | 1 +
target/i386/tcg/user/excp_helper.c | 1 +
target/i386/tcg/user/seg_helper.c | 1 +
target/loongarch/cpu_helper.c | 1 +
target/loongarch/tcg/tcg_cpu.c | 3 +-
target/loongarch/tcg/tlb_helper.c | 1 +
target/m68k/helper.c | 1 +
target/m68k/op_helper.c | 1 +
target/microblaze/helper.c | 1 +
target/microblaze/op_helper.c | 1 +
target/mips/tcg/exception.c | 1 +
target/mips/tcg/system/tlb_helper.c | 1 +
target/or1k/exception.c | 1 +
target/or1k/exception_helper.c | 1 +
target/or1k/fpu_helper.c | 1 +
target/or1k/mmu.c | 1 +
target/or1k/sys_helper.c | 1 +
target/ppc/cpu_init.c | 1 +
target/ppc/helper_regs.c | 3 +-
target/ppc/tcg-excp_helper.c | 1 +
target/ppc/user_only_helper.c | 1 +
target/riscv/cpu_helper.c | 1 +
target/riscv/csr.c | 1 +
target/riscv/op_helper.c | 1 +
target/rx/op_helper.c | 1 +
target/s390x/diag.c | 75 ++++++++------
target/s390x/mmu_helper.c | 3 +
target/s390x/tcg/cc_helper.c | 1 +
target/s390x/tcg/debug.c | 1 +
target/s390x/tcg/excp_helper.c | 1 +
target/s390x/tcg/mem_helper.c | 1 +
target/s390x/tcg/misc_helper.c | 6 +-
target/sh4/helper.c | 1 +
target/sh4/op_helper.c | 1 +
target/sparc/cpu.c | 1 +
target/sparc/helper.c | 1 +
target/sparc/mmu_helper.c | 1 +
target/tricore/helper.c | 1 +
target/tricore/op_helper.c | 1 +
target/xtensa/exc_helper.c | 1 +
target/xtensa/helper.c | 1 +
util/cutils.c | 15 +--
accel/stubs/meson.build | 1 -
ui/cocoa.m | 131 +-----------------------
177 files changed, 644 insertions(+), 583 deletions(-)
create mode 100644 include/accel/tcg/cpu-loop.h
delete mode 100644 accel/stubs/tcg-stub.c
--
2.53.0
^ permalink raw reply [flat|nested] 50+ messages in thread* [PULL 01/48] system/cpu: Reset vCPU %exception_index before resuming it 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 02/48] system/memory: Constify various AddressSpace arguments (checks) Philippe Mathieu-Daudé ` (47 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260423170229.64655-8-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- system/cpus.c | 1 + 1 file changed, 1 insertion(+) diff --git a/system/cpus.c b/system/cpus.c index bded87feb1c..b4c7f94332d 100644 --- a/system/cpus.c +++ b/system/cpus.c @@ -621,6 +621,7 @@ void cpu_pause(CPUState *cpu) void cpu_resume(CPUState *cpu) { + cpu->exception_index = -1; cpu->stop = false; cpu->stopped = false; qemu_cpu_kick(cpu); -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 02/48] system/memory: Constify various AddressSpace arguments (checks) 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 01/48] system/cpu: Reset vCPU %exception_index before resuming it Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 03/48] system/memory: Constify various AddressSpace arguments (flat-range) Philippe Mathieu-Daudé ` (46 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> Mark the AddressSpace structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020359.18627-2-philmd@oss.qualcomm.com> --- include/system/memory.h | 3 ++- system/physmem.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/system/memory.h b/include/system/memory.h index 9cd17847ab0..3acaa309755 100644 --- a/include/system/memory.h +++ b/include/system/memory.h @@ -2850,7 +2850,8 @@ static inline MemoryRegion *address_space_translate(AddressSpace *as, * @is_write: indicates the transfer direction * @attrs: memory attributes */ -bool address_space_access_valid(AddressSpace *as, hwaddr addr, hwaddr len, +bool address_space_access_valid(const AddressSpace *as, + hwaddr addr, hwaddr len, bool is_write, MemTxAttrs attrs); /** diff --git a/system/physmem.c b/system/physmem.c index 7bcbf875736..a0561177afd 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3646,7 +3646,7 @@ static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, return true; } -bool address_space_access_valid(AddressSpace *as, hwaddr addr, +bool address_space_access_valid(const AddressSpace *as, hwaddr addr, hwaddr len, bool is_write, MemTxAttrs attrs) { -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 03/48] system/memory: Constify various AddressSpace arguments (flat-range) 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 01/48] system/cpu: Reset vCPU %exception_index before resuming it Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 02/48] system/memory: Constify various AddressSpace arguments (checks) Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 04/48] system/memory: Constify various AddressSpace arguments (notify) Philippe Mathieu-Daudé ` (45 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> Mark the AddressSpace structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020359.18627-3-philmd@oss.qualcomm.com> --- system/memory.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/system/memory.c b/system/memory.c index 28807cf0519..93c714104b2 100644 --- a/system/memory.c +++ b/system/memory.c @@ -889,7 +889,8 @@ static void address_space_update_ioeventfds(AddressSpace *as) * range `cmr'. Only the part that has intersection of the specified * FlatRange will be sent. */ -static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as, +static void flat_range_coalesced_io_notify(FlatRange *fr, + const AddressSpace *as, CoalescedMemoryRange *cmr, bool add) { AddrRange tmp; @@ -913,7 +914,7 @@ static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as, } } -static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as) +static void flat_range_coalesced_io_del(FlatRange *fr, const AddressSpace *as) { CoalescedMemoryRange *cmr; @@ -922,7 +923,7 @@ static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as) } } -static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as) +static void flat_range_coalesced_io_add(FlatRange *fr, const AddressSpace *as) { MemoryRegion *mr = fr->mr; CoalescedMemoryRange *cmr; @@ -940,7 +941,8 @@ static void flat_range_coalesced_io_notify_listener_add_del(FlatRange *fr, MemoryRegionSection *mrs, MemoryListener *listener, - AddressSpace *as, bool add) + const AddressSpace *as, + bool add) { CoalescedMemoryRange *cmr; MemoryRegion *mr = fr->mr; -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 04/48] system/memory: Constify various AddressSpace arguments (notify) 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (2 preceding siblings ...) 2026-06-18 12:27 ` [PULL 03/48] system/memory: Constify various AddressSpace arguments (flat-range) Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 05/48] system/memory: Constify various AddressSpace arguments (cache) Philippe Mathieu-Daudé ` (44 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> Mark the AddressSpace structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020359.18627-4-philmd@oss.qualcomm.com> --- include/system/memory.h | 2 +- system/memory.c | 6 +++--- system/physmem.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/include/system/memory.h b/include/system/memory.h index 3acaa309755..7ecad33130c 100644 --- a/include/system/memory.h +++ b/include/system/memory.h @@ -2703,7 +2703,7 @@ void address_space_destroy_free(AddressSpace *as); * * @as: an initialized #AddressSpace */ -void address_space_remove_listeners(AddressSpace *as); +void address_space_remove_listeners(const AddressSpace *as); /** * address_space_rw: read from or write to an address space. diff --git a/system/memory.c b/system/memory.c index 93c714104b2..8436668c181 100644 --- a/system/memory.c +++ b/system/memory.c @@ -3009,7 +3009,7 @@ void memory_global_dirty_log_stop(unsigned int flags) } static void listener_add_address_space(MemoryListener *listener, - AddressSpace *as) + const AddressSpace *as) { unsigned i; FlatView *view; @@ -3074,7 +3074,7 @@ static void listener_add_address_space(MemoryListener *listener, } static void listener_del_address_space(MemoryListener *listener, - AddressSpace *as) + const AddressSpace *as) { unsigned i; FlatView *view; @@ -3179,7 +3179,7 @@ void memory_listener_unregister(MemoryListener *listener) listener->address_space = NULL; } -void address_space_remove_listeners(AddressSpace *as) +void address_space_remove_listeners(const AddressSpace *as) { while (!QTAILQ_EMPTY(&as->listeners)) { memory_listener_unregister(QTAILQ_FIRST(&as->listeners)); diff --git a/system/physmem.c b/system/physmem.c index a0561177afd..e8a2c438c7d 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3565,7 +3565,7 @@ address_space_unregister_map_client_do(AddressSpaceMapClient *client) g_free(client); } -static void address_space_notify_map_clients_locked(AddressSpace *as) +static void address_space_notify_map_clients_locked(const AddressSpace *as) { AddressSpaceMapClient *client; -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 05/48] system/memory: Constify various AddressSpace arguments (cache) 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (3 preceding siblings ...) 2026-06-18 12:27 ` [PULL 04/48] system/memory: Constify various AddressSpace arguments (notify) Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 06/48] system/memory: Constify various AddressSpace arguments (access) Philippe Mathieu-Daudé ` (43 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> Mark the AddressSpace structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020359.18627-5-philmd@oss.qualcomm.com> --- include/system/memory_cached.h | 2 +- system/physmem.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/system/memory_cached.h b/include/system/memory_cached.h index 6eb6179140b..760ecb38c19 100644 --- a/include/system/memory_cached.h +++ b/include/system/memory_cached.h @@ -117,7 +117,7 @@ void address_space_stb_cached(MemoryRegionCache *cache, * are relative to @addr. */ int64_t address_space_cache_init(MemoryRegionCache *cache, - AddressSpace *as, + const AddressSpace *as, hwaddr addr, hwaddr len, bool is_write); diff --git a/system/physmem.c b/system/physmem.c index e8a2c438c7d..b33aa14ab64 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3829,7 +3829,7 @@ void cpu_physical_memory_unmap(void *buffer, hwaddr len, #include "memory_ldst.c.inc" int64_t address_space_cache_init(MemoryRegionCache *cache, - AddressSpace *as, + const AddressSpace *as, hwaddr addr, hwaddr len, bool is_write) -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 06/48] system/memory: Constify various AddressSpace arguments (access) 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (4 preceding siblings ...) 2026-06-18 12:27 ` [PULL 05/48] system/memory: Constify various AddressSpace arguments (cache) Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 07/48] system/memory: Constify various MemoryRegionCache arguments Philippe Mathieu-Daudé ` (42 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> Mark the AddressSpace structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020359.18627-6-philmd@oss.qualcomm.com> --- include/system/memory.h | 13 +++++++------ system/physmem.c | 14 ++++++++------ 2 files changed, 15 insertions(+), 12 deletions(-) diff --git a/include/system/memory.h b/include/system/memory.h index 7ecad33130c..e143c9c3f39 100644 --- a/include/system/memory.h +++ b/include/system/memory.h @@ -2719,7 +2719,7 @@ void address_space_remove_listeners(const AddressSpace *as); * @len: the number of bytes to read or write * @is_write: indicates the transfer direction */ -MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, +MemTxResult address_space_rw(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr len, bool is_write); @@ -2736,7 +2736,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, * @buf: buffer with the data transferred * @len: the number of bytes to write */ -MemTxResult address_space_write(AddressSpace *as, hwaddr addr, +MemTxResult address_space_write(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, const void *buf, hwaddr len); @@ -2799,7 +2799,8 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, #include "system/memory_ldst_phys.h.inc" #endif -void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len); +void address_space_flush_icache_range(AddressSpace *as, + hwaddr addr, hwaddr len); /* address_space_get_iotlb_entry: translate an address into an IOTLB * entry. Should be called from an RCU critical section. @@ -2919,7 +2920,7 @@ void address_space_register_map_client(AddressSpace *as, QEMUBH *bh); void address_space_unregister_map_client(AddressSpace *as, QEMUBH *bh); /* Internal functions, part of the implementation of address_space_read. */ -MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, +MemTxResult address_space_read_full(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr len); MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, MemTxAttrs attrs, void *buf, @@ -2974,7 +2975,7 @@ static inline bool memory_access_is_direct(const MemoryRegion *mr, * @len: length of the data transferred */ static inline __attribute__((__always_inline__)) -MemTxResult address_space_read(AddressSpace *as, hwaddr addr, +MemTxResult address_space_read(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr len) { @@ -3017,7 +3018,7 @@ MemTxResult address_space_read(AddressSpace *as, hwaddr addr, * @len: the number of bytes to fill with the constant byte * @attrs: memory transaction attributes */ -MemTxResult address_space_set(AddressSpace *as, hwaddr addr, +MemTxResult address_space_set(const AddressSpace *as, hwaddr addr, uint8_t c, hwaddr len, MemTxAttrs attrs); /* Coalesced MMIO regions are areas where write operations can be reordered. diff --git a/system/physmem.c b/system/physmem.c index b33aa14ab64..7ea65395863 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3416,7 +3416,7 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr addr, mr_addr, l, mr); } -MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, +MemTxResult address_space_read_full(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr len) { MemTxResult result = MEMTX_OK; @@ -3431,7 +3431,7 @@ MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, return result; } -MemTxResult address_space_write(AddressSpace *as, hwaddr addr, +MemTxResult address_space_write(const AddressSpace *as, hwaddr addr, MemTxAttrs attrs, const void *buf, hwaddr len) { @@ -3447,8 +3447,9 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, return result; } -MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - void *buf, hwaddr len, bool is_write) +MemTxResult address_space_rw(const AddressSpace *as, hwaddr addr, + MemTxAttrs attrs, void *buf, + hwaddr len, bool is_write) { if (is_write) { return address_space_write(as, addr, attrs, buf, len); @@ -3457,7 +3458,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, } } -MemTxResult address_space_set(AddressSpace *as, hwaddr addr, +MemTxResult address_space_set(const AddressSpace *as, hwaddr addr, uint8_t c, hwaddr len, MemTxAttrs attrs) { #define FILLBUF_SIZE 512 @@ -3514,7 +3515,8 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, return MEMTX_OK; } -void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len) +void address_space_flush_icache_range(AddressSpace *as, + hwaddr addr, hwaddr len) { /* * This function should do the same thing as an icache flush that was -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 07/48] system/memory: Constify various MemoryRegionCache arguments 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (5 preceding siblings ...) 2026-06-18 12:27 ` [PULL 06/48] system/memory: Constify various AddressSpace arguments (access) Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 08/48] system: Document cpu_physical_memory_*() declarations Philippe Mathieu-Daudé ` (41 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> Mark the MemoryRegionCache structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020359.18627-7-philmd@oss.qualcomm.com> --- include/system/memory_cached.h | 18 +++++++++--------- include/system/memory_ldst_cached.h.inc | 15 +++++++++------ system/physmem.c | 10 +++++----- 3 files changed, 23 insertions(+), 20 deletions(-) diff --git a/include/system/memory_cached.h b/include/system/memory_cached.h index 760ecb38c19..09d46821bec 100644 --- a/include/system/memory_cached.h +++ b/include/system/memory_cached.h @@ -51,12 +51,12 @@ struct MemoryRegionCache { #define SUFFIX _cached_slow #define ARG1 cache -#define ARG1_DECL MemoryRegionCache *cache +#define ARG1_DECL const MemoryRegionCache *cache #include "system/memory_ldst.h.inc" /* Inline fast path for direct RAM access. */ static inline -uint8_t address_space_ldub_cached(MemoryRegionCache *cache, hwaddr addr, +uint8_t address_space_ldub_cached(const MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len); @@ -68,7 +68,7 @@ uint8_t address_space_ldub_cached(MemoryRegionCache *cache, hwaddr addr, } static inline -void address_space_stb_cached(MemoryRegionCache *cache, +void address_space_stb_cached(const MemoryRegionCache *cache, hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result) { @@ -93,7 +93,7 @@ void address_space_stb_cached(MemoryRegionCache *cache, #define SUFFIX _cached #define ARG1 cache -#define ARG1_DECL MemoryRegionCache *cache +#define ARG1_DECL const MemoryRegionCache *cache #include "system/memory_ldst_phys.h.inc" /** @@ -145,7 +145,7 @@ static inline void address_space_cache_init_empty(MemoryRegionCache *cache) * address that was passed to @address_space_cache_init. * @access_len: The number of bytes that were written starting at @addr. */ -void address_space_cache_invalidate(MemoryRegionCache *cache, +void address_space_cache_invalidate(const MemoryRegionCache *cache, hwaddr addr, hwaddr access_len); @@ -160,9 +160,9 @@ void address_space_cache_destroy(MemoryRegionCache *cache); * Internal functions, part of the implementation of address_space_read_cached * and address_space_write_cached. */ -MemTxResult address_space_read_cached_slow(MemoryRegionCache *cache, +MemTxResult address_space_read_cached_slow(const MemoryRegionCache *cache, hwaddr addr, void *buf, hwaddr len); -MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache, +MemTxResult address_space_write_cached_slow(const MemoryRegionCache *cache, hwaddr addr, const void *buf, hwaddr len); @@ -175,7 +175,7 @@ MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache, * @len: length of the data transferred */ static inline MemTxResult -address_space_read_cached(MemoryRegionCache *cache, hwaddr addr, +address_space_read_cached(const MemoryRegionCache *cache, hwaddr addr, void *buf, hwaddr len) { assert(addr < cache->len && len <= cache->len - addr); @@ -197,7 +197,7 @@ address_space_read_cached(MemoryRegionCache *cache, hwaddr addr, * @len: length of the data transferred */ static inline MemTxResult -address_space_write_cached(MemoryRegionCache *cache, hwaddr addr, +address_space_write_cached(const MemoryRegionCache *cache, hwaddr addr, const void *buf, hwaddr len) { assert(addr < cache->len && len <= cache->len - addr); diff --git a/include/system/memory_ldst_cached.h.inc b/include/system/memory_ldst_cached.h.inc index d7834f852c4..b4c696bff1f 100644 --- a/include/system/memory_ldst_cached.h.inc +++ b/include/system/memory_ldst_cached.h.inc @@ -24,7 +24,8 @@ #define LD_P(size) \ glue(glue(ld, size), glue(ENDIANNESS, _p)) -static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache, +static inline +uint16_t ADDRESS_SPACE_LD_CACHED(uw)(const MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 2 <= cache->len - addr); @@ -36,7 +37,8 @@ static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache, } } -static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache, +static inline +uint32_t ADDRESS_SPACE_LD_CACHED(l)(const MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 4 <= cache->len - addr); @@ -48,7 +50,8 @@ static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache, } } -static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache, +static inline +uint64_t ADDRESS_SPACE_LD_CACHED(q)(const MemoryRegionCache *cache, hwaddr addr, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 8 <= cache->len - addr); @@ -71,7 +74,7 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache, #define ST_P(size) \ glue(glue(st, size), glue(ENDIANNESS, _p)) -static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache, +static inline void ADDRESS_SPACE_ST_CACHED(w)(const MemoryRegionCache *cache, hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 2 <= cache->len - addr); @@ -82,7 +85,7 @@ static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache, } } -static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache, +static inline void ADDRESS_SPACE_ST_CACHED(l)(const MemoryRegionCache *cache, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 4 <= cache->len - addr); @@ -93,7 +96,7 @@ static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache, } } -static inline void ADDRESS_SPACE_ST_CACHED(q)(MemoryRegionCache *cache, +static inline void ADDRESS_SPACE_ST_CACHED(q)(const MemoryRegionCache *cache, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result) { assert(addr < cache->len && 8 <= cache->len - addr); diff --git a/system/physmem.c b/system/physmem.c index 7ea65395863..9b3f461b123 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3878,7 +3878,7 @@ int64_t address_space_cache_init(MemoryRegionCache *cache, return l; } -void address_space_cache_invalidate(MemoryRegionCache *cache, +void address_space_cache_invalidate(const MemoryRegionCache *cache, hwaddr addr, hwaddr access_len) { @@ -3909,7 +3909,7 @@ void address_space_cache_destroy(MemoryRegionCache *cache) * address_space_cache_init. */ static inline MemoryRegion *address_space_translate_cached( - MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat, + const MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat, hwaddr *plen, bool is_write, MemTxAttrs attrs) { MemoryRegionSection section; @@ -3990,7 +3990,7 @@ static MemTxResult address_space_read_continue_cached(MemTxAttrs attrs, * out of line function when the target is an MMIO or IOMMU region. */ MemTxResult -address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr, +address_space_read_cached_slow(const MemoryRegionCache *cache, hwaddr addr, void *buf, hwaddr len) { hwaddr mr_addr, l; @@ -4007,7 +4007,7 @@ address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr, * out of line function when the target is an MMIO or IOMMU region. */ MemTxResult -address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, +address_space_write_cached_slow(const MemoryRegionCache *cache, hwaddr addr, const void *buf, hwaddr len) { hwaddr mr_addr, l; @@ -4020,7 +4020,7 @@ address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, buf, len, mr_addr, l, mr); } -#define ARG1_DECL MemoryRegionCache *cache +#define ARG1_DECL const MemoryRegionCache *cache #define ARG1 cache #define SUFFIX _cached_slow #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__) -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 08/48] system: Document cpu_physical_memory_*() declarations 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (6 preceding siblings ...) 2026-06-18 12:27 ` [PULL 07/48] system/memory: Constify various MemoryRegionCache arguments Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 09/48] accel/kvm: Replace legacy cpu_physical_memory_write() call Philippe Mathieu-Daudé ` (40 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel Document the following methods use the global address space and discard success/failure access information: - cpu_physical_memory_read() - cpu_physical_memory_write() - cpu_physical_memory_map() - cpu_physical_memory_unmap() Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020839.19104-2-philmd@oss.qualcomm.com> --- docs/devel/loads-stores.rst | 10 +++++---- include/exec/cpu-common.h | 41 +++++++++++++++++++++++++++++++++++++ 2 files changed, 47 insertions(+), 4 deletions(-) diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index c719241a7f5..f2c66e44454 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -443,15 +443,17 @@ Regexes for git grep: ~~~~~~~~~~~~~~~~~~~~~~~~~ These are convenience functions which are identical to -``address_space_*`` but operate specifically on the system address space, -always pass a ``MEMTXATTRS_UNSPECIFIED`` set of memory attributes and -ignore whether the memory transaction succeeded or failed. -For new code they are better avoided: +``address_space_*`` but operate specifically on the legacy global +``&address_space_memory`` address space (which might not be used by all +machines), always pass a ``MEMTXATTRS_UNSPECIFIED`` set of memory attributes +and ignore whether the memory transaction succeeded or failed. Expected +users are hardware device models. For new code they are better avoided: * there is likely to be behaviour you need to model correctly for a failed read or write operation * a device should usually perform operations on its own AddressSpace rather than using the system address space +* some machines do not use this global address space at all ``cpu_physical_memory_read`` diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 1eb28734601..9cd67d3ef9d 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -64,11 +64,52 @@ void cpu_address_space_init(CPUState *cpu, int asidx, */ void cpu_destroy_address_spaces(CPUState *cpu); +/** + * cpu_physical_memory_read: Read from the legacy global address space. + * + * This function access the legacy global #address_space_memory address + * space and does not say whether the operation succeeded or failed. + * + * @addr: address within the legacy global address space + * @buf: buffer with the data transferred + * @len: length of the data transferred + */ void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len); +/** + * cpu_physical_memory_write: Write to the legacy global address space. + * + * This function access the legacy global #address_space_memory address + * space and does not say whether the operation succeeded or failed. + * + * @addr: address within the legacy global address space + * @buf: buffer with the data transferred + * @len: the number of bytes to write + */ void cpu_physical_memory_write(hwaddr addr, const void *buf, hwaddr len); +/** + * cpu_physical_memory_map: Map guest physical memory region into host virtual + * address. + * + * Map a memory region from the legacy global #address_space_memory address + * space. May return %NULL and set *@plen to zero(0), if resources needed to + * perform the mapping are exhausted. + * + * @addr: address within that address space + * @len: pointer to length of buffer; updated on return + * @is_write: whether the translation operation is for write + */ void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, bool is_write); +/** + * cpu_physical_memory_unmap: Unmaps a memory region previously mapped by + * cpu_physical_memory_map() + * + * @buffer: host pointer as returned by cpu_physical_memory_map() + * @len: buffer length as returned by cpu_physical_memory_map() + * @is_write: whether the translation operation is for write + * @access_len: amount of data actually transferred + */ void cpu_physical_memory_unmap(void *buffer, hwaddr len, bool is_write, hwaddr access_len); -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 09/48] accel/kvm: Replace legacy cpu_physical_memory_write() call 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (7 preceding siblings ...) 2026-06-18 12:27 ` [PULL 08/48] system: Document cpu_physical_memory_*() declarations Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 10/48] gdbstub/system: Replace legacy cpu_physical_memory_read/write() calls Philippe Mathieu-Daudé ` (39 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel cpu_physical_memory_write() is legacy (see commit b7ecba0f6f6), replace it by address_space_write(). Both if() ladders only differ in the address space argument: rework to have a single address_space_write() call. No logical change intended. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020839.19104-3-philmd@oss.qualcomm.com> --- accel/kvm/kvm-all.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 96f90ebb240..f4f0e64fbd0 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -3178,16 +3178,12 @@ void kvm_flush_coalesced_mmio_buffer(void) struct kvm_coalesced_mmio_ring *ring = s->coalesced_mmio_ring; while (ring->first != ring->last) { struct kvm_coalesced_mmio *ent; + const AddressSpace *as; ent = &ring->coalesced_mmio[ring->first]; - - if (ent->pio == 1) { - address_space_write(&address_space_io, ent->phys_addr, - MEMTXATTRS_UNSPECIFIED, ent->data, - ent->len); - } else { - cpu_physical_memory_write(ent->phys_addr, ent->data, ent->len); - } + as = ent->pio == 1 ? &address_space_io : &address_space_memory; + address_space_write(as, ent->phys_addr, MEMTXATTRS_UNSPECIFIED, + ent->data, ent->len); smp_wmb(); ring->first = (ring->first + 1) % KVM_COALESCED_MMIO_MAX; } -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 10/48] gdbstub/system: Replace legacy cpu_physical_memory_read/write() calls 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (8 preceding siblings ...) 2026-06-18 12:27 ` [PULL 09/48] accel/kvm: Replace legacy cpu_physical_memory_write() call Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 11/48] target/s390x: Factor common s390_ipl_read/write() helpers Philippe Mathieu-Daudé ` (38 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel cpu_physical_memory_read() and cpu_physical_memory_write() are legacy (see commit b7ecba0f6f6), replace the two calls by a single one to address_space_rw(). So far there is no logical change, but stop ignoring these functions returned value and propagate it, respecting the *memory_rw_debug() family error path. Thus this is effectively a logical change. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020839.19104-4-philmd@oss.qualcomm.com> --- gdbstub/system.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/gdbstub/system.c b/gdbstub/system.c index e86c5870abc..2063b63b2f8 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -20,6 +20,7 @@ #include "exec/hwaddr.h" #include "accel/accel-ops.h" #include "accel/accel-cpu-ops.h" +#include "system/address-spaces.h" #include "system/cpus.h" #include "system/runstate.h" #include "system/replay.h" @@ -453,12 +454,10 @@ int gdb_target_memory_rw_debug(CPUState *cpu, hwaddr addr, uint8_t *buf, int len, bool is_write) { if (phy_memory_mode) { - if (is_write) { - cpu_physical_memory_write(addr, buf, len); - } else { - cpu_physical_memory_read(addr, buf, len); - } - return 0; + MemTxResult res = address_space_rw(&address_space_memory, addr, + MEMTXATTRS_UNSPECIFIED, buf, len, + is_write); + return res == MEMTX_OK ? 0 : -1; } if (cpu->cc->memory_rw_debug) { -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 11/48] target/s390x: Factor common s390_ipl_read/write() helpers 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (9 preceding siblings ...) 2026-06-18 12:27 ` [PULL 10/48] gdbstub/system: Replace legacy cpu_physical_memory_read/write() calls Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 12/48] target/s390x: Replace legacy cpu_physical_memory_read/write() calls Philippe Mathieu-Daudé ` (37 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> Prevent duplication factoring common helpers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jared Rossi <jrossi@linux.ibm.com> Message-Id: <20260616020839.19104-5-philmd@oss.qualcomm.com> --- target/s390x/diag.c | 41 +++++++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 18 deletions(-) diff --git a/target/s390x/diag.c b/target/s390x/diag.c index da44b0133ed..bc1791067d8 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -73,11 +73,30 @@ static int diag308_parm_check(CPUS390XState *env, uint64_t r1, uint64_t addr, return 0; } +static void s390_ipl_read(CPUS390XState *env, uint64_t addr, + IplParameterBlock *iplb, size_t size) +{ + if (s390_is_pv()) { + s390_cpu_pv_mem_read(env_archcpu(env), 0, iplb, size); + } else { + cpu_physical_memory_read(addr, iplb, size); + } +} + +static void s390_ipl_write(CPUS390XState *env, uint64_t addr, + IplParameterBlock *iplb, size_t size) +{ + if (s390_is_pv()) { + s390_cpu_pv_mem_write(env_archcpu(env), 0, iplb, size); + } else { + cpu_physical_memory_write(addr, iplb, size); + } +} + void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) { bool valid; CPUState *cs = env_cpu(env); - S390CPU *cpu = env_archcpu(env); uint64_t addr = env->regs[r1]; uint64_t subcode = env->regs[r3]; IplParameterBlock *iplb; @@ -114,22 +133,12 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) return; } iplb = g_new0(IplParameterBlock, 1); - if (!s390_is_pv()) { - cpu_physical_memory_read(addr, iplb, sizeof(iplb->len)); - } else { - s390_cpu_pv_mem_read(cpu, 0, iplb, sizeof(iplb->len)); - } - + s390_ipl_read(env, addr, iplb, sizeof(iplb->len)); if (!iplb_valid_len(iplb)) { env->regs[r1 + 1] = DIAG_308_RC_INVALID; goto out; } - - if (!s390_is_pv()) { - cpu_physical_memory_read(addr, iplb, be32_to_cpu(iplb->len)); - } else { - s390_cpu_pv_mem_read(cpu, 0, iplb, be32_to_cpu(iplb->len)); - } + s390_ipl_read(env, addr, iplb, be32_to_cpu(iplb->len)); valid = subcode == DIAG308_PV_SET ? iplb_valid_pv(iplb) : iplb_valid(iplb); if (!valid) { @@ -164,11 +173,7 @@ out: return; } - if (!s390_is_pv()) { - cpu_physical_memory_write(addr, iplb, be32_to_cpu(iplb->len)); - } else { - s390_cpu_pv_mem_write(cpu, 0, iplb, be32_to_cpu(iplb->len)); - } + s390_ipl_write(env, addr, iplb, be32_to_cpu(iplb->len)); env->regs[r1 + 1] = DIAG_308_RC_OK; return; case DIAG308_PV_START: -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 12/48] target/s390x: Replace legacy cpu_physical_memory_read/write() calls 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (10 preceding siblings ...) 2026-06-18 12:27 ` [PULL 11/48] target/s390x: Factor common s390_ipl_read/write() helpers Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 13/48] system: Move cpu_physical_memory_*() declarations to 'system/physmem.h' Philippe Mathieu-Daudé ` (36 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> cpu_physical_memory_read() and cpu_physical_memory_write() are legacy (see commit b7ecba0f6f6), replace by address_space_read() and address_space_write() respectively, accessing the per-vCPU address space instead of the global &address_space_memory one. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jared Rossi <jrossi@linux.ibm.com> Message-Id: <20260616020839.19104-6-philmd@oss.qualcomm.com> --- target/s390x/diag.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/s390x/diag.c b/target/s390x/diag.c index bc1791067d8..01cc802eaed 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -79,7 +79,8 @@ static void s390_ipl_read(CPUS390XState *env, uint64_t addr, if (s390_is_pv()) { s390_cpu_pv_mem_read(env_archcpu(env), 0, iplb, size); } else { - cpu_physical_memory_read(addr, iplb, size); + address_space_read(cpu_get_address_space(env_cpu(env), 0), addr, + MEMTXATTRS_UNSPECIFIED, iplb, size); } } @@ -89,7 +90,8 @@ static void s390_ipl_write(CPUS390XState *env, uint64_t addr, if (s390_is_pv()) { s390_cpu_pv_mem_write(env_archcpu(env), 0, iplb, size); } else { - cpu_physical_memory_write(addr, iplb, size); + address_space_write(cpu_get_address_space(env_cpu(env), 0), addr, + MEMTXATTRS_UNSPECIFIED, iplb, size); } } -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 13/48] system: Move cpu_physical_memory_*() declarations to 'system/physmem.h' 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (11 preceding siblings ...) 2026-06-18 12:27 ` [PULL 12/48] target/s390x: Replace legacy cpu_physical_memory_read/write() calls Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 14/48] hw/xen/interface: Remove pre-C99 checks Philippe Mathieu-Daudé ` (35 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel The following cpu_physical_memory_*() methods do not involve any vCPU but only access physical memory: - cpu_physical_memory_read() - cpu_physical_memory_write() - cpu_physical_memory_map() - cpu_physical_memory_unmap() Rename them removing the 'cpu_' prefix, and move then to the "system/physmem.h" header with the other methods involved in global physical address space. Mechanical change using sed, then adding missing headers manually. No logical change intended. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020839.19104-7-philmd@oss.qualcomm.com> --- docs/devel/loads-stores.rst | 8 ++--- scripts/coccinelle/exec_rw_const.cocci | 16 ++++----- hw/xtensa/bootparam.h | 6 ++-- include/exec/cpu-common.h | 50 -------------------------- include/system/physmem.h | 50 ++++++++++++++++++++++++++ dump/dump.c | 3 +- dump/win_dump-x86.c | 5 +-- hw/acpi/ghes.c | 24 ++++++------- hw/acpi/nvdimm.c | 13 +++---- hw/acpi/vmgenid.c | 3 +- hw/audio/marvell_88w8618.c | 3 +- hw/char/riscv_htif.c | 5 +-- hw/display/exynos4210_fimd.c | 7 ++-- hw/display/omap_lcdc.c | 5 +-- hw/display/ramfb.c | 7 ++-- hw/dma/i8257.c | 9 ++--- hw/dma/omap_dma.c | 6 ++-- hw/dma/rc4030.c | 3 +- hw/dma/sifive_pdma.c | 9 ++--- hw/hyperv/hyperv.c | 25 ++++++------- hw/hyperv/syndbg.c | 13 +++---- hw/hyperv/vmbus.c | 9 ++--- hw/i386/kvm/clock.c | 3 +- hw/i386/vapic.c | 21 +++++------ hw/intc/apic.c | 3 +- hw/intc/xive2.c | 3 +- hw/m68k/next-cube.c | 3 +- hw/microblaze/boot.c | 3 +- hw/misc/pc-testdev.c | 5 +-- hw/net/fsl_etsec/rings.c | 13 +++---- hw/net/mcf_fec.c | 11 +++--- hw/net/opencores_eth.c | 9 ++--- hw/nvram/spapr_nvram.c | 9 ++--- hw/ppc/amigaone.c | 5 +-- hw/ppc/e500.c | 3 +- hw/ppc/pegasos.c | 11 +++--- hw/ppc/pnv.c | 5 +-- hw/ppc/ppc440_uc.c | 9 ++--- hw/ppc/spapr.c | 3 +- hw/ppc/spapr_drc.c | 3 +- hw/ppc/spapr_events.c | 9 ++--- hw/ppc/spapr_hcall.c | 17 ++++----- hw/ppc/spapr_rtas.c | 5 +-- hw/ppc/spapr_tpm_proxy.c | 5 +-- hw/ppc/virtex_ml507.c | 3 +- hw/s390x/css.c | 5 +-- hw/s390x/ipl.c | 9 ++--- hw/s390x/s390-pci-bus.c | 5 +-- hw/s390x/virtio-ccw.c | 5 +-- hw/scsi/vmw_pvscsi.c | 12 +++---- hw/xen/xen_pt_graphics.c | 4 +-- hw/xtensa/xtfpga.c | 5 +-- system/cpus.c | 3 +- system/physmem.c | 12 +++---- 54 files changed, 270 insertions(+), 230 deletions(-) diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index f2c66e44454..3aeb8bbe8ba 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -439,7 +439,7 @@ Regexes for git grep: - ``\<ldu\?[bwlq]\(_[bl]e\)\?_phys\>`` - ``\<st[bwlq]\(_[bl]e\)\?_phys\>`` -``cpu_physical_memory_*`` +``physical_memory_*`` ~~~~~~~~~~~~~~~~~~~~~~~~~ These are convenience functions which are identical to @@ -455,12 +455,12 @@ users are hardware device models. For new code they are better avoided: rather than using the system address space * some machines do not use this global address space at all -``cpu_physical_memory_read`` +``physical_memory_read`` -``cpu_physical_memory_write`` +``physical_memory_write`` Regexes for git grep: - - ``\<cpu_physical_memory_\(read\|write\)\>`` + - ``\<physical_memory_\(read\|write\)\>`` ``cpu_memory_rw_debug`` ~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci index 4c02c94e04e..6d16db6aa4e 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -21,11 +21,11 @@ expression E1, E2, E3, E4, E5; + address_space_rw(E1, E2, E3, E4, E5, true) | -- cpu_physical_memory_map(E1, E2, 0) -+ cpu_physical_memory_map(E1, E2, false) +- physical_memory_map(E1, E2, 0) ++ physical_memory_map(E1, E2, false) | -- cpu_physical_memory_map(E1, E2, 1) -+ cpu_physical_memory_map(E1, E2, true) +- physical_memory_map(E1, E2, 1) ++ physical_memory_map(E1, E2, true) ) // Use address_space_write instead of casting to non-const @@ -74,11 +74,11 @@ type T; + address_space_write_rom(E1, E2, E3, E4, E5) | -- cpu_physical_memory_read(E1, (T *)(E2), E3) -+ cpu_physical_memory_read(E1, E2, E3) +- physical_memory_read(E1, (T *)(E2), E3) ++ physical_memory_read(E1, E2, E3) | -- cpu_physical_memory_write(E1, (T *)(E2), E3) -+ cpu_physical_memory_write(E1, E2, E3) +- physical_memory_write(E1, (T *)(E2), E3) ++ physical_memory_write(E1, E2, E3) | - dma_memory_read(E1, E2, (T *)(E3), E4) diff --git a/hw/xtensa/bootparam.h b/hw/xtensa/bootparam.h index 4418c78d5bb..1eb741c909d 100644 --- a/hw/xtensa/bootparam.h +++ b/hw/xtensa/bootparam.h @@ -1,8 +1,8 @@ #ifndef HW_XTENSA_BOOTPARAM_H #define HW_XTENSA_BOOTPARAM_H -#include "exec/cpu-common.h" #include "exec/tswap.h" +#include "system/physmem.h" #define BP_TAG_COMMAND_LINE 0x1001 /* command line (0-terminated string)*/ #define BP_TAG_INITRD 0x1002 /* ramdisk addr and size (bp_meminfo) */ @@ -41,9 +41,9 @@ static inline ram_addr_t put_tag(ram_addr_t addr, uint16_t tag, .size = tswap16((size + 3) & ~3), }; - cpu_physical_memory_write(addr, &bp_tag, sizeof(bp_tag)); + physical_memory_write(addr, &bp_tag, sizeof(bp_tag)); addr += sizeof(bp_tag); - cpu_physical_memory_write(addr, data, size); + physical_memory_write(addr, data, size); addr += (size + 3) & ~3; return addr; diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 9cd67d3ef9d..830e57dc5fc 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -9,7 +9,6 @@ #define CPU_COMMON_H #include "exec/vaddr.h" -#include "exec/hwaddr.h" #include "hw/core/cpu.h" #include "tcg/debug-assert.h" #include "exec/page-protection.h" @@ -64,55 +63,6 @@ void cpu_address_space_init(CPUState *cpu, int asidx, */ void cpu_destroy_address_spaces(CPUState *cpu); -/** - * cpu_physical_memory_read: Read from the legacy global address space. - * - * This function access the legacy global #address_space_memory address - * space and does not say whether the operation succeeded or failed. - * - * @addr: address within the legacy global address space - * @buf: buffer with the data transferred - * @len: length of the data transferred - */ -void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len); -/** - * cpu_physical_memory_write: Write to the legacy global address space. - * - * This function access the legacy global #address_space_memory address - * space and does not say whether the operation succeeded or failed. - * - * @addr: address within the legacy global address space - * @buf: buffer with the data transferred - * @len: the number of bytes to write - */ -void cpu_physical_memory_write(hwaddr addr, const void *buf, hwaddr len); -/** - * cpu_physical_memory_map: Map guest physical memory region into host virtual - * address. - * - * Map a memory region from the legacy global #address_space_memory address - * space. May return %NULL and set *@plen to zero(0), if resources needed to - * perform the mapping are exhausted. - * - * @addr: address within that address space - * @len: pointer to length of buffer; updated on return - * @is_write: whether the translation operation is for write - */ -void *cpu_physical_memory_map(hwaddr addr, - hwaddr *plen, - bool is_write); -/** - * cpu_physical_memory_unmap: Unmaps a memory region previously mapped by - * cpu_physical_memory_map() - * - * @buffer: host pointer as returned by cpu_physical_memory_map() - * @len: buffer length as returned by cpu_physical_memory_map() - * @is_write: whether the translation operation is for write - * @access_len: amount of data actually transferred - */ -void cpu_physical_memory_unmap(void *buffer, hwaddr len, - bool is_write, hwaddr access_len); - /* vl.c */ void list_cpus(void); diff --git a/include/system/physmem.h b/include/system/physmem.h index da91b77bd9b..c47b378025c 100644 --- a/include/system/physmem.h +++ b/include/system/physmem.h @@ -11,6 +11,56 @@ #include "exec/hwaddr.h" #include "system/ramlist.h" +/** + * physical_memory_map: Map guest physical memory region into host virtual + * address. + * + * Map a memory region from the legacy global #address_space_memory address + * space. May return %NULL and set *@plen to zero(0), if resources needed to + * perform the mapping are exhausted. + * + * @addr: address within that address space + * @len: pointer to length of buffer; updated on return + * @is_write: whether the translation operation is for write + */ +void *physical_memory_map(hwaddr addr, hwaddr *plen, bool is_write); + +/** + * physical_memory_unmap: Unmaps a memory region previously mapped by + * physical_memory_map() + * + * @buffer: host pointer as returned by physical_memory_map() + * @len: buffer length as returned by physical_memory_map() + * @is_write: whether the translation operation is for write + * @access_len: amount of data actually transferred + */ +void physical_memory_unmap(void *buffer, hwaddr len, + bool is_write, hwaddr access_len); + +/** + * physical_memory_read: Read from the legacy global address space. + * + * This function access the legacy global #address_space_memory address + * space and does not say whether the operation succeeded or failed. + * + * @addr: address within the legacy global address space + * @buf: buffer with the data transferred + * @len: length of the data transferred + */ +void physical_memory_read(hwaddr addr, void *buf, hwaddr len); + +/** + * physical_memory_write: Write to the legacy global address space. + * + * This function access the legacy global #address_space_memory address + * space and does not say whether the operation succeeded or failed. + * + * @addr: address within the legacy global address space + * @buf: buffer with the data transferred + * @len: the number of bytes to write + */ +void physical_memory_write(hwaddr addr, const void *buf, hwaddr len); + #define DIRTY_CLIENTS_ALL ((1 << DIRTY_MEMORY_NUM) - 1) #define DIRTY_CLIENTS_NOCODE (DIRTY_CLIENTS_ALL & ~(1 << DIRTY_MEMORY_CODE)) diff --git a/dump/dump.c b/dump/dump.c index 1f216e74f5f..eb2ee1c10df 100644 --- a/dump/dump.c +++ b/dump/dump.c @@ -21,6 +21,7 @@ #include "system/dump.h" #include "system/runstate.h" #include "system/cpus.h" +#include "system/physmem.h" #include "qapi/error.h" #include "qapi/qapi-commands-dump.h" #include "qapi/qapi-events-dump.h" @@ -1892,7 +1893,7 @@ static void dump_init(DumpState *s, int fd, bool has_format, warn_report("guest note format is unsupported: %" PRIu16, guest_format); } else { s->guest_note = g_malloc(size + 1); /* +1 for adding \0 */ - cpu_physical_memory_read(addr, s->guest_note, size); + physical_memory_read(addr, s->guest_note, size); get_note_sizes(s, s->guest_note, NULL, &name_size, &desc_size); s->guest_note_size = ELF_NOTE_SIZE(note_head_size, name_size, diff --git a/dump/win_dump-x86.c b/dump/win_dump-x86.c index d893dea7f19..8848c8bfca3 100644 --- a/dump/win_dump-x86.c +++ b/dump/win_dump-x86.c @@ -10,6 +10,7 @@ #include "qemu/osdep.h" #include "system/dump.h" +#include "system/physmem.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "exec/cpu-defs.h" @@ -55,7 +56,7 @@ static size_t write_run(uint64_t base_page, uint64_t page_count, while (size) { len = size; - buf = cpu_physical_memory_map(addr, &len, false); + buf = physical_memory_map(addr, &len, false); if (!buf) { error_setg(errp, "win-dump: failed to map physical range" " 0x%016" PRIx64 "-0x%016" PRIx64, addr, addr + size - 1); @@ -64,7 +65,7 @@ static size_t write_run(uint64_t base_page, uint64_t page_count, l = qemu_write_full(fd, buf, len); eno = errno; - cpu_physical_memory_unmap(buf, addr, false, len); + physical_memory_unmap(buf, addr, false, len); if (l != len) { error_setg_errno(errp, eno, "win-dump: failed to save memory"); return 0; diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index c42f1721c42..b2d5e349932 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -28,6 +28,7 @@ #include "hw/nvram/fw_cfg.h" #include "qemu/uuid.h" #include "exec/cpu-common.h" +#include "system/physmem.h" #define ACPI_HW_ERROR_FW_CFG_FILE "etc/hardware_errors" #define ACPI_HW_ERROR_ADDR_FW_CFG_FILE "etc/hardware_errors_addr" @@ -432,9 +433,7 @@ static void get_hw_error_offsets(uint64_t ghes_addr, * the source ID, as it is stored inside the HEST table. */ - cpu_physical_memory_read(ghes_addr, cper_addr, - sizeof(*cper_addr)); - + physical_memory_read(ghes_addr, cper_addr, sizeof(*cper_addr)); *cper_addr = le64_to_cpu(*cper_addr); /* @@ -456,8 +455,7 @@ static bool get_ghes_source_offsets(uint16_t source_id, hest_addr += ACPI_DESC_HEADER_OFFSET; - cpu_physical_memory_read(hest_addr, &num_sources, - sizeof(num_sources)); + physical_memory_read(hest_addr, &num_sources, sizeof(num_sources)); num_sources = le32_to_cpu(num_sources); err_source_entry = hest_addr + sizeof(num_sources); @@ -469,7 +467,7 @@ static bool get_ghes_source_offsets(uint16_t source_id, uint64_t addr = err_source_entry; uint16_t type, src_id; - cpu_physical_memory_read(addr, &type, sizeof(type)); + physical_memory_read(addr, &type, sizeof(type)); type = le16_to_cpu(type); /* For now, we only know the size of GHESv2 table */ @@ -480,7 +478,7 @@ static bool get_ghes_source_offsets(uint16_t source_id, /* Compare CPER source ID at the GHESv2 structure */ addr += sizeof(type); - cpu_physical_memory_read(addr, &src_id, sizeof(src_id)); + physical_memory_read(addr, &src_id, sizeof(src_id)); if (le16_to_cpu(src_id) == source_id) { break; } @@ -496,17 +494,17 @@ static bool get_ghes_source_offsets(uint16_t source_id, hest_err_block_addr = err_source_entry + GHES_ERR_STATUS_ADDR_OFF + GAS_ADDR_OFFSET; - cpu_physical_memory_read(hest_err_block_addr, &error_block_addr, + physical_memory_read(hest_err_block_addr, &error_block_addr, sizeof(error_block_addr)); error_block_addr = le64_to_cpu(error_block_addr); - cpu_physical_memory_read(error_block_addr, cper_addr, + physical_memory_read(error_block_addr, cper_addr, sizeof(*cper_addr)); *cper_addr = le64_to_cpu(*cper_addr); hest_read_ack_addr = err_source_entry + GHES_READ_ACK_ADDR_OFF + GAS_ADDR_OFFSET; - cpu_physical_memory_read(hest_read_ack_addr, read_ack_start_addr, + physical_memory_read(hest_read_ack_addr, read_ack_start_addr, sizeof(*read_ack_start_addr)); *read_ack_start_addr = le64_to_cpu(*read_ack_start_addr); @@ -535,7 +533,7 @@ bool ghes_record_cper_errors(AcpiGhesState *ags, const void *cper, size_t len, return false; } - cpu_physical_memory_read(read_ack_register_addr, + physical_memory_read(read_ack_register_addr, &read_ack_register, sizeof(read_ack_register)); /* zero means OSPM does not acknowledge the error */ @@ -551,11 +549,11 @@ bool ghes_record_cper_errors(AcpiGhesState *ags, const void *cper, size_t len, * Clear the Read Ack Register, OSPM will write 1 to this register when * it acknowledges the error. */ - cpu_physical_memory_write(read_ack_register_addr, + physical_memory_write(read_ack_register_addr, &read_ack_register, sizeof(uint64_t)); /* Write the generic error data entry into guest memory */ - cpu_physical_memory_write(cper_addr, cper, len); + physical_memory_write(cper_addr, cper, len); notifier_list_notify(&acpi_generic_error_notifiers, &source_id); diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c index eb4b4770765..703e854951e 100644 --- a/hw/acpi/nvdimm.c +++ b/hw/acpi/nvdimm.c @@ -35,6 +35,7 @@ #include "hw/nvram/fw_cfg.h" #include "hw/mem/nvdimm.h" #include "qemu/nvdimm-utils.h" +#include "system/physmem.h" #include "trace.h" #include "exec/cpu-common.h" @@ -515,7 +516,7 @@ nvdimm_dsm_function0(uint32_t supported_func, hwaddr dsm_mem_addr) .len = cpu_to_le32(sizeof(func0)), .supported_func = cpu_to_le32(supported_func), }; - cpu_physical_memory_write(dsm_mem_addr, &func0, sizeof(func0)); + physical_memory_write(dsm_mem_addr, &func0, sizeof(func0)); } static void @@ -525,7 +526,7 @@ nvdimm_dsm_no_payload(uint32_t func_ret_status, hwaddr dsm_mem_addr) .len = cpu_to_le32(sizeof(out)), .func_ret_status = cpu_to_le32(func_ret_status), }; - cpu_physical_memory_write(dsm_mem_addr, &out, sizeof(out)); + physical_memory_write(dsm_mem_addr, &out, sizeof(out)); } #define NVDIMM_DSM_RET_STATUS_SUCCESS 0 /* Success */ @@ -580,7 +581,7 @@ exit: read_fit_out->func_ret_status = cpu_to_le32(func_ret_status); memcpy(read_fit_out->fit, fit->data + read_fit->offset, read_len); - cpu_physical_memory_write(dsm_mem_addr, read_fit_out, size); + physical_memory_write(dsm_mem_addr, read_fit_out, size); g_free(read_fit_out); } @@ -666,7 +667,7 @@ static void nvdimm_dsm_label_size(NVDIMMDevice *nvdimm, hwaddr dsm_mem_addr) label_size_out.label_size = cpu_to_le32(label_size); label_size_out.max_xfer = cpu_to_le32(mxfer); - cpu_physical_memory_write(dsm_mem_addr, &label_size_out, + physical_memory_write(dsm_mem_addr, &label_size_out, sizeof(label_size_out)); } @@ -735,7 +736,7 @@ static void nvdimm_dsm_get_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in, nvc->read_label_data(nvdimm, get_label_data_out->out_buf, get_label_data->length, get_label_data->offset); - cpu_physical_memory_write(dsm_mem_addr, get_label_data_out, size); + physical_memory_write(dsm_mem_addr, get_label_data_out, size); g_free(get_label_data_out); } @@ -845,7 +846,7 @@ nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) * this by copying DSM memory to QEMU local memory. */ in = g_new(NvdimmDsmIn, 1); - cpu_physical_memory_read(dsm_mem_addr, in, sizeof(*in)); + physical_memory_read(dsm_mem_addr, in, sizeof(*in)); in->revision = le32_to_cpu(in->revision); in->function = le32_to_cpu(in->function); diff --git a/hw/acpi/vmgenid.c b/hw/acpi/vmgenid.c index 70ad029057b..27cc0128d11 100644 --- a/hw/acpi/vmgenid.c +++ b/hw/acpi/vmgenid.c @@ -20,6 +20,7 @@ #include "hw/core/qdev-properties.h" #include "hw/core/qdev-properties-system.h" #include "migration/vmstate.h" +#include "system/physmem.h" #include "system/reset.h" #include "exec/cpu-common.h" @@ -156,7 +157,7 @@ static void vmgenid_update_guest(VmGenIdState *vms) * in order to implement the "OVMF SDT Header probe suppressor" * see docs/specs/vmgenid.rst for more details. */ - cpu_physical_memory_write(vmgenid_addr, guid_le.data, + physical_memory_write(vmgenid_addr, guid_le.data, sizeof(guid_le.data)); /* Send _GPE.E05 event */ acpi_send_event(DEVICE(obj), ACPI_VMGENID_CHANGE_STATUS); diff --git a/hw/audio/marvell_88w8618.c b/hw/audio/marvell_88w8618.c index 4ad4a220a98..061d076dade 100644 --- a/hw/audio/marvell_88w8618.c +++ b/hw/audio/marvell_88w8618.c @@ -21,6 +21,7 @@ #include "qapi/error.h" #include "qemu/module.h" #include "qom/object.h" +#include "system/physmem.h" #define MP_AUDIO_SIZE 0x00001000 @@ -87,7 +88,7 @@ static void mv88w8618_audio_callback(void *opaque, int free_out, int free_in) if (block_size > 4096) { return; } - cpu_physical_memory_read(s->target_buffer + s->play_pos, buf, block_size); + physical_memory_read(s->target_buffer + s->play_pos, buf, block_size); mem_buffer = buf; if (s->playback_mode & MP_AUDIO_16BIT_SAMPLE) { if (s->playback_mode & MP_AUDIO_MONO) { diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c index a53d2ace020..488f938d98d 100644 --- a/hw/char/riscv_htif.c +++ b/hw/char/riscv_htif.c @@ -30,6 +30,7 @@ #include "qemu/error-report.h" #include "system/address-spaces.h" #include "system/dma.h" +#include "system/physmem.h" #include "system/runstate.h" #include "exec/cpu-common.h" #include "trace.h" @@ -209,12 +210,12 @@ static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written) return; } else { uint64_t syscall[8]; - cpu_physical_memory_read(payload, syscall, sizeof(syscall)); + physical_memory_read(payload, syscall, sizeof(syscall)); if (le64_to_cpu(syscall[0]) == PK_SYS_WRITE && le64_to_cpu(syscall[1]) == HTIF_DEV_CONSOLE && le64_to_cpu(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) { uint8_t ch; - cpu_physical_memory_read(le64_to_cpu(syscall[2]), &ch, 1); + physical_memory_read(le64_to_cpu(syscall[2]), &ch, 1); /* * XXX this blocks entire thread. Rewrite to use * qemu_chr_fe_write and background I/O callbacks diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index e715183ad54..7507e4fd3ca 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -28,6 +28,7 @@ #include "hw/core/sysbus.h" #include "exec/cpu-common.h" #include "migration/vmstate.h" +#include "system/physmem.h" #include "ui/console.h" #include "ui/pixel_ops.h" #include "qemu/bswap.h" @@ -1076,7 +1077,7 @@ static void fimd_update_memory_section(Exynos4210fimdState *s, unsigned win) } if (w->host_fb_addr) { - cpu_physical_memory_unmap(w->host_fb_addr, w->fb_len, 0, 0); + physical_memory_unmap(w->host_fb_addr, w->fb_len, 0, 0); w->host_fb_addr = NULL; w->fb_len = 0; } @@ -1115,7 +1116,7 @@ static void fimd_update_memory_section(Exynos4210fimdState *s, unsigned win) goto error_return; } - w->host_fb_addr = cpu_physical_memory_map(fb_start_addr, &fb_mapped_len, + w->host_fb_addr = physical_memory_map(fb_start_addr, &fb_mapped_len, false); if (!w->host_fb_addr) { qemu_log_mask(LOG_GUEST_ERROR, @@ -1127,7 +1128,7 @@ static void fimd_update_memory_section(Exynos4210fimdState *s, unsigned win) qemu_log_mask(LOG_GUEST_ERROR, "FIMD: Window %u mapped framebuffer length is less than " "expected\n", win); - cpu_physical_memory_unmap(w->host_fb_addr, fb_mapped_len, 0, 0); + physical_memory_unmap(w->host_fb_addr, fb_mapped_len, 0, 0); goto error_return; } memory_region_set_log(w->mem_section.mr, true, DIRTY_MEMORY_VGA); diff --git a/hw/display/omap_lcdc.c b/hw/display/omap_lcdc.c index 2a8d5ffdd57..b88ea5f2f19 100644 --- a/hw/display/omap_lcdc.c +++ b/hw/display/omap_lcdc.c @@ -24,6 +24,7 @@ #include "framebuffer.h" #include "ui/pixel_ops.h" #include "exec/cpu-common.h" +#include "system/physmem.h" struct omap_lcd_panel_s { MemoryRegion *sysmem; @@ -217,7 +218,7 @@ static bool omap_update_display(void *opaque) frame_offset = 0; if (omap_lcd->plm != 2) { - cpu_physical_memory_read( + physical_memory_read( omap_lcd->dma->phys_framebuffer[omap_lcd->dma->current_frame], omap_lcd->palette, 0x200); switch (omap_lcd->palette[0] >> 12 & 7) { @@ -371,7 +372,7 @@ static void omap_lcd_update(struct omap_lcd_panel_s *s) { s->dma->phys_framebuffer[1] = s->dma->src_f2_top; if (s->plm != 2 && !s->palette_done) { - cpu_physical_memory_read( + physical_memory_read( s->dma->phys_framebuffer[s->dma->current_frame], s->palette, 0x200); s->palette_done = 1; diff --git a/hw/display/ramfb.c b/hw/display/ramfb.c index 7a88f934e11..f477bdcc218 100644 --- a/hw/display/ramfb.c +++ b/hw/display/ramfb.c @@ -17,6 +17,7 @@ #include "hw/display/ramfb.h" #include "hw/display/bochs-vbe.h" /* for limits */ #include "ui/console.h" +#include "system/physmem.h" #include "system/reset.h" #include "exec/cpu-common.h" @@ -42,7 +43,7 @@ static void ramfb_unmap_display_surface(pixman_image_t *image, void *unused) void *data = pixman_image_get_data(image); uint32_t size = pixman_image_get_stride(image) * pixman_image_get_height(image); - cpu_physical_memory_unmap(data, size, 0, 0); + physical_memory_unmap(data, size, 0, 0); } static DisplaySurface *ramfb_create_display_surface(int width, int height, @@ -64,9 +65,9 @@ static DisplaySurface *ramfb_create_display_surface(int width, int height, } mapsize = size = stride * (height - 1) + linesize; - data = cpu_physical_memory_map(addr, &mapsize, false); + data = physical_memory_map(addr, &mapsize, false); if (size != mapsize) { - cpu_physical_memory_unmap(data, mapsize, 0, 0); + physical_memory_unmap(data, mapsize, 0, 0); return NULL; } diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index 3637d8f82d7..7d7e5434275 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -28,6 +28,7 @@ #include "migration/vmstate.h" #include "hw/dma/i8257.h" #include "exec/cpu-common.h" +#include "system/physmem.h" #include "qapi/error.h" #include "qemu/main-loop.h" #include "qemu/module.h" @@ -414,7 +415,7 @@ static int i8257_dma_read_memory(IsaDma *obj, int nchan, void *buf, int pos, int i; uint8_t *p = buf; - cpu_physical_memory_read (addr - pos - len, buf, len); + physical_memory_read(addr - pos - len, buf, len); /* What about 16bit transfers? */ for (i = 0; i < len >> 1; i++) { uint8_t b = p[len - i - 1]; @@ -422,7 +423,7 @@ static int i8257_dma_read_memory(IsaDma *obj, int nchan, void *buf, int pos, } } else - cpu_physical_memory_read (addr + pos, buf, len); + physical_memory_read(addr + pos, buf, len); return len; } @@ -442,7 +443,7 @@ static int i8257_dma_write_memory(IsaDma *obj, int nchan, void *buf, int pos, int i; uint8_t *p = buf; - cpu_physical_memory_write (addr - pos - len, buf, len); + physical_memory_write(addr - pos - len, buf, len); /* What about 16bit transfers? */ for (i = 0; i < len; i++) { uint8_t b = p[len - i - 1]; @@ -450,7 +451,7 @@ static int i8257_dma_write_memory(IsaDma *obj, int nchan, void *buf, int pos, } } else - cpu_physical_memory_write (addr + pos, buf, len); + physical_memory_write(addr + pos, buf, len); return len; } diff --git a/hw/dma/omap_dma.c b/hw/dma/omap_dma.c index 668fc490548..77f14414989 100644 --- a/hw/dma/omap_dma.c +++ b/hw/dma/omap_dma.c @@ -23,7 +23,7 @@ #include "hw/arm/omap.h" #include "hw/core/irq.h" #include "hw/arm/soc_dma.h" -#include "exec/cpu-common.h" +#include "system/physmem.h" struct omap_dma_channel_s { /* transfer data */ @@ -348,12 +348,12 @@ static void omap_dma_transfer_generic(struct soc_dma_ch_s *dma) /* Transfer a single element */ /* FIXME: check the endianness */ if (!ch->constant_fill) - cpu_physical_memory_read(a->src, value, ch->data_type); + physical_memory_read(a->src, value, ch->data_type); else *(uint32_t *) value = ch->color; if (!ch->transparent_copy || *(uint32_t *) value != ch->color) - cpu_physical_memory_write(a->dest, value, ch->data_type); + physical_memory_write(a->dest, value, ch->data_type); a->src += a->elem_delta[0]; a->dest += a->elem_delta[1]; diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 159d0173913..546ff67908a 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -34,6 +34,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "system/address-spaces.h" +#include "system/physmem.h" #include "trace.h" #include "qom/object.h" @@ -303,7 +304,7 @@ static void rc4030_write(void *opaque, hwaddr addr, uint64_t data, if (s->cache_ltag == 0x80000001 && s->cache_bmask == 0xf0f0f0f) { hwaddr dest = s->cache_ptag & ~0x1; dest += (s->cache_maint & 0x3) << 3; - cpu_physical_memory_write(dest, &val, 4); + physical_memory_write(dest, &val, 4); } break; /* Remote Speed Registers */ diff --git a/hw/dma/sifive_pdma.c b/hw/dma/sifive_pdma.c index 7b22e514923..c4d2c77beac 100644 --- a/hw/dma/sifive_pdma.c +++ b/hw/dma/sifive_pdma.c @@ -30,6 +30,7 @@ #include "exec/cpu-common.h" #include "migration/vmstate.h" #include "system/dma.h" +#include "system/physmem.h" #include "hw/dma/sifive_pdma.h" #define DMA_CONTROL 0x000 @@ -121,16 +122,16 @@ static void sifive_pdma_run(SiFivePDMAState *s, int ch) s->chan[ch].exec_src = src; for (n = 0; n < bytes / size; n++) { - cpu_physical_memory_read(s->chan[ch].exec_src, buf, size); - cpu_physical_memory_write(s->chan[ch].exec_dst, buf, size); + physical_memory_read(s->chan[ch].exec_src, buf, size); + physical_memory_write(s->chan[ch].exec_dst, buf, size); s->chan[ch].exec_src += size; s->chan[ch].exec_dst += size; s->chan[ch].exec_bytes -= size; } if (remainder) { - cpu_physical_memory_read(s->chan[ch].exec_src, buf, remainder); - cpu_physical_memory_write(s->chan[ch].exec_dst, buf, remainder); + physical_memory_read(s->chan[ch].exec_src, buf, remainder); + physical_memory_write(s->chan[ch].exec_dst, buf, remainder); s->chan[ch].exec_src += remainder; s->chan[ch].exec_dst += remainder; s->chan[ch].exec_bytes -= remainder; diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c index a854a4927a0..4d900327857 100644 --- a/hw/hyperv/hyperv.c +++ b/hw/hyperv/hyperv.c @@ -17,6 +17,7 @@ #include "exec/cpu-common.h" #include "linux/kvm.h" #include "system/kvm.h" +#include "system/physmem.h" #include "qemu/bitops.h" #include "qemu/error-report.h" #include "qemu/lockable.h" @@ -622,7 +623,7 @@ uint16_t hyperv_hcall_post_message(uint64_t param, bool fast) } len = sizeof(*msg); - msg = cpu_physical_memory_map(param, &len, 0); + msg = physical_memory_map(param, &len, 0); if (len < sizeof(*msg)) { ret = HV_STATUS_INSUFFICIENT_MEMORY; goto unmap; @@ -643,7 +644,7 @@ uint16_t hyperv_hcall_post_message(uint64_t param, bool fast) } unmap: - cpu_physical_memory_unmap(msg, len, 0, 0); + physical_memory_unmap(msg, len, 0, 0); return ret; } @@ -766,7 +767,7 @@ uint16_t hyperv_hcall_reset_dbg_session(uint64_t outgpa) } len = sizeof(*reset_dbg_session); - reset_dbg_session = cpu_physical_memory_map(outgpa, &len, 1); + reset_dbg_session = physical_memory_map(outgpa, &len, 1); if (!reset_dbg_session || len < sizeof(*reset_dbg_session)) { ret = HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; @@ -789,7 +790,7 @@ uint16_t hyperv_hcall_reset_dbg_session(uint64_t outgpa) sizeof(reset_dbg_session->target_mac)); cleanup: if (reset_dbg_session) { - cpu_physical_memory_unmap(reset_dbg_session, + physical_memory_unmap(reset_dbg_session, sizeof(*reset_dbg_session), 1, len); } @@ -811,14 +812,14 @@ uint16_t hyperv_hcall_retreive_dbg_data(uint64_t ingpa, uint64_t outgpa, } in_len = sizeof(*debug_data_in); - debug_data_in = cpu_physical_memory_map(ingpa, &in_len, 0); + debug_data_in = physical_memory_map(ingpa, &in_len, 0); if (!debug_data_in || in_len < sizeof(*debug_data_in)) { ret = HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; } out_len = sizeof(*debug_data_out); - debug_data_out = cpu_physical_memory_map(outgpa, &out_len, 1); + debug_data_out = physical_memory_map(outgpa, &out_len, 1); if (!debug_data_out || out_len < sizeof(*debug_data_out)) { ret = HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; @@ -844,12 +845,12 @@ uint16_t hyperv_hcall_retreive_dbg_data(uint64_t ingpa, uint64_t outgpa, debug_data_in->count - msg.u.recv.retrieved_count; cleanup: if (debug_data_out) { - cpu_physical_memory_unmap(debug_data_out, sizeof(*debug_data_out), 1, + physical_memory_unmap(debug_data_out, sizeof(*debug_data_out), 1, out_len); } if (debug_data_in) { - cpu_physical_memory_unmap(debug_data_in, sizeof(*debug_data_in), 0, + physical_memory_unmap(debug_data_in, sizeof(*debug_data_in), 0, in_len); } @@ -870,7 +871,7 @@ uint16_t hyperv_hcall_post_dbg_data(uint64_t ingpa, uint64_t outgpa, bool fast) } in_len = sizeof(*post_data_in); - post_data_in = cpu_physical_memory_map(ingpa, &in_len, 0); + post_data_in = physical_memory_map(ingpa, &in_len, 0); if (!post_data_in || in_len < sizeof(*post_data_in)) { ret = HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; @@ -882,7 +883,7 @@ uint16_t hyperv_hcall_post_dbg_data(uint64_t ingpa, uint64_t outgpa, bool fast) } out_len = sizeof(*post_data_out); - post_data_out = cpu_physical_memory_map(outgpa, &out_len, 1); + post_data_out = physical_memory_map(outgpa, &out_len, 1); if (!post_data_out || out_len < sizeof(*post_data_out)) { ret = HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; @@ -902,12 +903,12 @@ uint16_t hyperv_hcall_post_dbg_data(uint64_t ingpa, uint64_t outgpa, bool fast) HV_STATUS_SUCCESS; cleanup: if (post_data_out) { - cpu_physical_memory_unmap(post_data_out, + physical_memory_unmap(post_data_out, sizeof(*post_data_out), 1, out_len); } if (post_data_in) { - cpu_physical_memory_unmap(post_data_in, + physical_memory_unmap(post_data_in, sizeof(*post_data_in), 0, in_len); } diff --git a/hw/hyperv/syndbg.c b/hw/hyperv/syndbg.c index 10171b19e8f..e0057bb3990 100644 --- a/hw/hyperv/syndbg.c +++ b/hw/hyperv/syndbg.c @@ -20,6 +20,7 @@ #include "hw/hyperv/vmbus-bridge.h" #include "hw/hyperv/hyperv-proto.h" #include "exec/cpu-common.h" +#include "system/physmem.h" #include "net/net.h" #include "net/eth.h" #include "net/checksum.h" @@ -62,10 +63,10 @@ static void set_pending_state(HvSynDbg *syndbg, bool has_pending) } out_len = 1; - out_data = cpu_physical_memory_map(syndbg->pending_page_gpa, &out_len, 1); + out_data = physical_memory_map(syndbg->pending_page_gpa, &out_len, 1); if (out_data) { *(uint8_t *)out_data = !!has_pending; - cpu_physical_memory_unmap(out_data, out_len, 1, out_len); + physical_memory_unmap(out_data, out_len, 1, out_len); } } @@ -110,7 +111,7 @@ static uint16_t handle_send_msg(HvSynDbg *syndbg, uint64_t ingpa, int sent_count; data_len = count; - debug_data = cpu_physical_memory_map(ingpa, &data_len, 0); + debug_data = physical_memory_map(ingpa, &data_len, 0); if (!debug_data || data_len < count) { ret = HV_STATUS_INSUFFICIENT_MEMORY; goto cleanup; @@ -135,7 +136,7 @@ static uint16_t handle_send_msg(HvSynDbg *syndbg, uint64_t ingpa, ret = HV_STATUS_SUCCESS; cleanup: if (debug_data) { - cpu_physical_memory_unmap(debug_data, count, 0, data_len); + physical_memory_unmap(debug_data, count, 0, data_len); } return ret; @@ -224,7 +225,7 @@ static uint16_t handle_recv_msg(HvSynDbg *syndbg, uint64_t outgpa, out_len += UDP_PKT_HEADER_SIZE; } out_requested_len = out_len; - out_data = cpu_physical_memory_map(outgpa, &out_len, 1); + out_data = physical_memory_map(outgpa, &out_len, 1); ret = HV_STATUS_INSUFFICIENT_MEMORY; if (!out_data || out_len < out_requested_len) { goto cleanup_out_data; @@ -243,7 +244,7 @@ static uint16_t handle_recv_msg(HvSynDbg *syndbg, uint64_t outgpa, cleanup_out_data: if (out_data) { - cpu_physical_memory_unmap(out_data, out_len, 1, out_len); + physical_memory_unmap(out_data, out_len, 1, out_len); } return ret; } diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c index dcfce700052..c5259d1a764 100644 --- a/hw/hyperv/vmbus.c +++ b/hw/hyperv/vmbus.c @@ -21,6 +21,7 @@ #include "hw/core/sysbus.h" #include "exec/cpu-common.h" #include "system/kvm.h" +#include "system/physmem.h" #include "trace.h" enum { @@ -750,7 +751,7 @@ static int vmbus_channel_notify_guest(VMBusChannel *chan) return hyperv_set_event_flag(chan->notify_route, chan->id); } - int_map = cpu_physical_memory_map(addr, &len, 1); + int_map = physical_memory_map(addr, &len, 1); if (len != TARGET_PAGE_SIZE / 2) { res = -ENXIO; goto unmap; @@ -764,7 +765,7 @@ static int vmbus_channel_notify_guest(VMBusChannel *chan) } unmap: - cpu_physical_memory_unmap(int_map, len, 1, dirty); + physical_memory_unmap(int_map, len, 1, dirty); return res; } @@ -2249,7 +2250,7 @@ static void vmbus_signal_event(EventNotifier *e) addr = vmbus->int_page_gpa + TARGET_PAGE_SIZE / 2; len = TARGET_PAGE_SIZE / 2; - int_map = cpu_physical_memory_map(addr, &len, 1); + int_map = physical_memory_map(addr, &len, 1); if (len != TARGET_PAGE_SIZE / 2) { goto unmap; } @@ -2265,7 +2266,7 @@ static void vmbus_signal_event(EventNotifier *e) } unmap: - cpu_physical_memory_unmap(int_map, len, 1, is_dirty); + physical_memory_unmap(int_map, len, 1, is_dirty); } static void vmbus_dev_realize(DeviceState *dev, Error **errp) diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c index 7d167c8b006..e3dad136d31 100644 --- a/hw/i386/kvm/clock.c +++ b/hw/i386/kvm/clock.c @@ -19,6 +19,7 @@ #include "system/kvm.h" #include "system/runstate.h" #include "system/hw_accel.h" +#include "system/physmem.h" #include "kvm/kvm_i386.h" #include "migration/vmstate.h" #include "hw/core/sysbus.h" @@ -85,7 +86,7 @@ static uint64_t kvmclock_current_nsec(KVMClockState *s) } kvmclock_struct_pa = env->system_time_msr & ~1ULL; - cpu_physical_memory_read(kvmclock_struct_pa, &time, sizeof(time)); + physical_memory_read(kvmclock_struct_pa, &time, sizeof(time)); assert(time.tsc_timestamp <= migration_tsc); delta = migration_tsc - time.tsc_timestamp; diff --git a/hw/i386/vapic.c b/hw/i386/vapic.c index 781bf2a7fa5..8dd9188d96f 100644 --- a/hw/i386/vapic.c +++ b/hw/i386/vapic.c @@ -19,6 +19,7 @@ #include "system/whpx.h" #include "system/runstate.h" #include "system/address-spaces.h" +#include "system/physmem.h" #include "hw/i386/apic_internal.h" #include "hw/core/sysbus.h" #include "hw/core/boards.h" @@ -138,13 +139,13 @@ static const TPRInstruction tpr_instr[] = { static void read_guest_rom_state(VAPICROMState *s) { - cpu_physical_memory_read(s->rom_state_paddr, &s->rom_state, + physical_memory_read(s->rom_state_paddr, &s->rom_state, sizeof(GuestROMState)); } static void write_guest_rom_state(VAPICROMState *s) { - cpu_physical_memory_write(s->rom_state_paddr, &s->rom_state, + physical_memory_write(s->rom_state_paddr, &s->rom_state, sizeof(GuestROMState)); } @@ -327,14 +328,14 @@ static int update_rom_mapping(VAPICROMState *s, CPUX86State *env, target_ulong i for (pos = le32_to_cpu(s->rom_state.fixup_start); pos < le32_to_cpu(s->rom_state.fixup_end); pos += 4) { - cpu_physical_memory_read(paddr + pos - s->rom_state.vaddr, + physical_memory_read(paddr + pos - s->rom_state.vaddr, &offset, sizeof(offset)); offset = le32_to_cpu(offset); - cpu_physical_memory_read(paddr + offset, &patch, sizeof(patch)); + physical_memory_read(paddr + offset, &patch, sizeof(patch)); patch = le32_to_cpu(patch); patch += rom_state_vaddr - le32_to_cpu(s->rom_state.vaddr); patch = cpu_to_le32(patch); - cpu_physical_memory_write(paddr + offset, &patch, sizeof(patch)); + physical_memory_write(paddr + offset, &patch, sizeof(patch)); } read_guest_rom_state(s); s->vapic_paddr = paddr + le32_to_cpu(s->rom_state.vapic_vaddr) - @@ -378,7 +379,7 @@ static int vapic_enable(VAPICROMState *s, X86CPU *cpu) } vapic_paddr = s->vapic_paddr + (((hwaddr)cpu_number) << VAPIC_CPU_SHIFT); - cpu_physical_memory_write(vapic_paddr + offsetof(VAPICState, enabled), + physical_memory_write(vapic_paddr + offsetof(VAPICState, enabled), &enabled, sizeof(enabled)); apic_enable_vapic(cpu->apic_state, vapic_paddr); @@ -549,7 +550,7 @@ static int patch_hypercalls(VAPICROMState *s) uint8_t *rom; rom = g_malloc(s->rom_size); - cpu_physical_memory_read(rom_paddr, rom, s->rom_size); + physical_memory_read(rom_paddr, rom, s->rom_size); for (pos = 0; pos < s->rom_size - sizeof(vmcall_pattern); pos++) { if (kvm_enabled() && kvm_irqchip_in_kernel()) { @@ -565,7 +566,7 @@ static int patch_hypercalls(VAPICROMState *s) } if (memcmp(rom + pos, pattern, 7) == 0 && (rom[pos + 7] == alternates[0] || rom[pos + 7] == alternates[1])) { - cpu_physical_memory_write(rom_paddr + pos + 5, patch, 3); + physical_memory_write(rom_paddr + pos + 5, patch, 3); /* * Don't flush the tb here. Under ordinary conditions, the patched * calls are miles away from the current IP. Under malicious @@ -755,7 +756,7 @@ static void do_vapic_enable(CPUState *cs, run_on_cpu_data data) X86CPU *cpu = X86_CPU(cs); static const uint8_t enabled = 1; - cpu_physical_memory_write(s->vapic_paddr + offsetof(VAPICState, enabled), + physical_memory_write(s->vapic_paddr + offsetof(VAPICState, enabled), &enabled, sizeof(enabled)); apic_enable_vapic(cpu->apic_state, s->vapic_paddr); s->state = VAPIC_ACTIVE; @@ -776,7 +777,7 @@ static void vapic_vm_state_change(void *opaque, bool running, RunState state) run_on_cpu(first_cpu, do_vapic_enable, RUN_ON_CPU_HOST_PTR(s)); } else { zero = g_malloc0(s->rom_state.vapic_size); - cpu_physical_memory_write(s->vapic_paddr, zero, + physical_memory_write(s->vapic_paddr, zero, s->rom_state.vapic_size); g_free(zero); } diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 0e8932005fa..74e25c60a80 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -28,6 +28,7 @@ #include "qemu/host-utils.h" #include "system/kvm.h" #include "system/mshv.h" +#include "system/physmem.h" #include "trace.h" #include "hw/i386/apic-msidef.h" #include "exec/cpu-common.h" @@ -107,7 +108,7 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type) return; } if (sync_type & SYNC_FROM_VAPIC) { - cpu_physical_memory_read(s->vapic_paddr, &vapic_state, + physical_memory_read(s->vapic_paddr, &vapic_state, sizeof(vapic_state)); s->tpr = vapic_state.tpr; } diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index d353391208e..5def5a6b733 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -13,6 +13,7 @@ #include "target/ppc/cpu.h" #include "system/cpus.h" #include "system/dma.h" +#include "system/physmem.h" #include "hw/core/qdev-properties.h" #include "hw/ppc/xive.h" #include "hw/ppc/xive2.h" @@ -1170,7 +1171,7 @@ static void xive2_tctx_accept_el(XivePresenter *xptr, XiveTCTX *tctx, report_data[0] = (rd >> 8) & 0xff; report_data[1] = rd & 0xff; } - cpu_physical_memory_write(phys_addr, report_data, REPORT_LINE_GEN1_SIZE); + physical_memory_write(phys_addr, report_data, REPORT_LINE_GEN1_SIZE); } void xive2_tm_ack_os_el(XivePresenter *xptr, XiveTCTX *tctx, diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 4bfe5bcf569..9a0a57c0cc4 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -14,6 +14,7 @@ #include "exec/hwaddr.h" #include "exec/cpu-common.h" #include "exec/cpu-interrupt.h" +#include "system/physmem.h" #include "system/system.h" #include "system/qtest.h" #include "hw/core/irq.h" @@ -585,7 +586,7 @@ static void nextdma_write(void *opaque, uint8_t *buf, int size, int type) base_addr = next_state->dma[type].next_initbuf; } - cpu_physical_memory_write(base_addr, buf, size); + physical_memory_write(base_addr, buf, size); next_state->dma[type].next_initbuf = 0; diff --git a/hw/microblaze/boot.c b/hw/microblaze/boot.c index a93b68e1e48..c9c813d0d8b 100644 --- a/hw/microblaze/boot.c +++ b/hw/microblaze/boot.c @@ -32,6 +32,7 @@ #include "qemu/error-report.h" #include "qemu/guest-random.h" #include "system/device_tree.h" +#include "system/physmem.h" #include "system/reset.h" #include "exec/cpu-common.h" #include "hw/core/boards.h" @@ -106,7 +107,7 @@ static int microblaze_load_dtb(hwaddr addr, initrd_end); } - cpu_physical_memory_write(addr, fdt, fdt_size); + physical_memory_write(addr, fdt, fdt_size); g_free(fdt); return fdt_size; } diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c index 228012e772f..7f2753320fa 100644 --- a/hw/misc/pc-testdev.c +++ b/hw/misc/pc-testdev.c @@ -40,6 +40,7 @@ #include "hw/core/irq.h" #include "hw/isa/isa.h" #include "exec/cpu-common.h" +#include "system/physmem.h" #include "qom/object.h" #define IOMEM_LEN 0x10000 @@ -126,7 +127,7 @@ static void test_flush_page_write(void *opaque, hwaddr addr, uint64_t data, unsigned len) { hwaddr page = 4096; - void *a = cpu_physical_memory_map(data & ~0xffful, &page, false); + void *a = physical_memory_map(data & ~0xffful, &page, false); /* We might not be able to get the full page, only mprotect what we actually have mapped */ @@ -134,7 +135,7 @@ static void test_flush_page_write(void *opaque, hwaddr addr, uint64_t data, mprotect(a, page, PROT_NONE); mprotect(a, page, PROT_READ|PROT_WRITE); #endif - cpu_physical_memory_unmap(a, page, 0, 0); + physical_memory_unmap(a, page, 0, 0); } static const MemoryRegionOps test_flush_ops = { diff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c index 22660c32b84..6d2bf71b52f 100644 --- a/hw/net/fsl_etsec/rings.c +++ b/hw/net/fsl_etsec/rings.c @@ -26,6 +26,7 @@ #include "qemu/log.h" #include "etsec.h" #include "registers.h" +#include "system/physmem.h" #include "exec/cpu-common.h" /* #define ETSEC_RING_DEBUG */ @@ -111,7 +112,7 @@ static void read_buffer_descriptor(eTSEC *etsec, assert(bd != NULL); RING_DEBUG("READ Buffer Descriptor @ 0x" HWADDR_FMT_plx"\n", addr); - cpu_physical_memory_read(addr, + physical_memory_read(addr, bd, sizeof(eTSEC_rxtx_bd)); @@ -143,7 +144,7 @@ static void write_buffer_descriptor(eTSEC *etsec, } RING_DEBUG("Write Buffer Descriptor @ 0x" HWADDR_FMT_plx"\n", addr); - cpu_physical_memory_write(addr, + physical_memory_write(addr, bd, sizeof(eTSEC_rxtx_bd)); } @@ -240,7 +241,7 @@ static void process_tx_bd(eTSEC *etsec, etsec->tx_buffer = g_realloc(etsec->tx_buffer, etsec->tx_buffer_len + bd->length); tmp_buff = etsec->tx_buffer + etsec->tx_buffer_len; - cpu_physical_memory_read(bd->bufptr + tbdbth, tmp_buff, bd->length); + physical_memory_read(bd->bufptr + tbdbth, tmp_buff, bd->length); /* Update buffer length */ etsec->tx_buffer_len += bd->length; @@ -401,7 +402,7 @@ static void fill_rx_bd(eTSEC *etsec, /* This operation will only write FCB */ if (etsec->rx_fcb_size != 0) { - cpu_physical_memory_write(bufptr, etsec->rx_fcb, etsec->rx_fcb_size); + physical_memory_write(bufptr, etsec->rx_fcb, etsec->rx_fcb_size); bufptr += etsec->rx_fcb_size; bd->length += etsec->rx_fcb_size; @@ -417,7 +418,7 @@ static void fill_rx_bd(eTSEC *etsec, /* This operation can only write packet data and no padding */ if (to_write > 0) { - cpu_physical_memory_write(bufptr, *buf, to_write); + physical_memory_write(bufptr, *buf, to_write); *buf += to_write; bufptr += to_write; @@ -439,7 +440,7 @@ static void fill_rx_bd(eTSEC *etsec, etsec->rx_padding -= rem; *size -= rem; bd->length += rem; - cpu_physical_memory_write(bufptr, padd, rem); + physical_memory_write(bufptr, padd, rem); } } } diff --git a/hw/net/mcf_fec.c b/hw/net/mcf_fec.c index 79a5c4385c6..9df359eae87 100644 --- a/hw/net/mcf_fec.c +++ b/hw/net/mcf_fec.c @@ -8,6 +8,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" +#include "system/physmem.h" #include "hw/core/irq.h" #include "net/net.h" #include "qemu/module.h" @@ -175,7 +176,7 @@ typedef struct { static void mcf_fec_read_bd(mcf_fec_bd *bd, uint32_t addr) { - cpu_physical_memory_read(addr, bd, sizeof(*bd)); + physical_memory_read(addr, bd, sizeof(*bd)); be16_to_cpus(&bd->flags); be16_to_cpus(&bd->length); be32_to_cpus(&bd->data); @@ -187,7 +188,7 @@ static void mcf_fec_write_bd(mcf_fec_bd *bd, uint32_t addr) tmp.flags = cpu_to_be16(bd->flags); tmp.length = cpu_to_be16(bd->length); tmp.data = cpu_to_be32(bd->data); - cpu_physical_memory_write(addr, &tmp, sizeof(tmp)); + physical_memory_write(addr, &tmp, sizeof(tmp)); } static void mcf_fec_update(mcf_fec_state *s) @@ -260,7 +261,7 @@ static void mcf_fec_do_tx(mcf_fec_state *s) len = FEC_MAX_FRAME_SIZE - frame_size; s->eir |= FEC_INT_BABT; } - cpu_physical_memory_read(bd.data, ptr, len); + physical_memory_read(bd.data, ptr, len); ptr += len; frame_size += len; if (bd.flags & FEC_BD_L) { @@ -596,10 +597,10 @@ static ssize_t mcf_fec_receive(NetClientState *nc, const uint8_t *buf, size_t si if (size < 4) buf_len += size - 4; buf_addr = bd.data; - cpu_physical_memory_write(buf_addr, buf, buf_len); + physical_memory_write(buf_addr, buf, buf_len); buf += buf_len; if (size < 4) { - cpu_physical_memory_write(buf_addr + buf_len, crc_ptr, 4 - size); + physical_memory_write(buf_addr + buf_len, crc_ptr, 4 - size); crc_ptr += 4 - size; } bd.flags &= ~FEC_BD_E; diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c index a25f8eccff3..5a07bcde09d 100644 --- a/hw/net/opencores_eth.c +++ b/hw/net/opencores_eth.c @@ -32,6 +32,7 @@ */ #include "qemu/osdep.h" +#include "system/physmem.h" #include "hw/core/irq.h" #include "hw/net/mii.h" #include "hw/core/qdev-properties.h" @@ -431,7 +432,7 @@ static ssize_t open_eth_receive(NetClientState *nc, } #endif - cpu_physical_memory_write(desc->buf_ptr, buf, copy_size); + physical_memory_write(desc->buf_ptr, buf, copy_size); if (GET_REGBIT(s, MODER, PAD) && copy_size < minfl) { if (minfl - copy_size > fcsl) { @@ -443,7 +444,7 @@ static ssize_t open_eth_receive(NetClientState *nc, size_t zero_sz = minfl - copy_size < sizeof(zero) ? minfl - copy_size : sizeof(zero); - cpu_physical_memory_write(desc->buf_ptr + copy_size, + physical_memory_write(desc->buf_ptr + copy_size, zero, zero_sz); copy_size += zero_sz; } @@ -453,7 +454,7 @@ static ssize_t open_eth_receive(NetClientState *nc, * Don't do it if the frame is cut at the MAXFL or padded with 4 or * more bytes to the MINFL. */ - cpu_physical_memory_write(desc->buf_ptr + copy_size, zero, fcsl); + physical_memory_write(desc->buf_ptr + copy_size, zero, fcsl); copy_size += fcsl; SET_FIELD(desc->len_flags, RXD_LEN, copy_size); @@ -509,7 +510,7 @@ static void open_eth_start_xmit(OpenEthState *s, desc *tx) if (len > tx_len) { len = tx_len; } - cpu_physical_memory_read(tx->buf_ptr, buf, len); + physical_memory_read(tx->buf_ptr, buf, len); if (tx_len > len) { memset(buf + len, 0, tx_len - len); } diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c index 3af7e6ecbec..b0f9fe8633f 100644 --- a/hw/nvram/spapr_nvram.c +++ b/hw/nvram/spapr_nvram.c @@ -30,6 +30,7 @@ #include "system/block-backend.h" #include "system/device_tree.h" +#include "system/physmem.h" #include "system/system.h" #include "system/runstate.h" #include "migration/vmstate.h" @@ -89,9 +90,9 @@ static void rtas_nvram_fetch(PowerPCCPU *cpu, SpaprMachineState *spapr, assert(nvram->buf); - membuf = cpu_physical_memory_map(buffer, &len, true); + membuf = physical_memory_map(buffer, &len, true); memcpy(membuf, nvram->buf + offset, len); - cpu_physical_memory_unmap(membuf, len, 1, len); + physical_memory_unmap(membuf, len, 1, len); rtas_st(rets, 0, RTAS_OUT_SUCCESS); rtas_st(rets, 1, len); @@ -127,7 +128,7 @@ static void rtas_nvram_store(PowerPCCPU *cpu, SpaprMachineState *spapr, return; } - membuf = cpu_physical_memory_map(buffer, &len, false); + membuf = physical_memory_map(buffer, &len, false); ret = 0; if (nvram->blk) { @@ -137,7 +138,7 @@ static void rtas_nvram_store(PowerPCCPU *cpu, SpaprMachineState *spapr, assert(nvram->buf); memcpy(nvram->buf + offset, membuf, len); - cpu_physical_memory_unmap(membuf, len, 0, len); + physical_memory_unmap(membuf, len, 0, len); rtas_st(rets, 0, (ret < 0) ? RTAS_OUT_HW_ERROR : RTAS_OUT_SUCCESS); rtas_st(rets, 1, (ret < 0) ? 0 : len); diff --git a/hw/ppc/amigaone.c b/hw/ppc/amigaone.c index 9fba5ca03a6..2e94e80b569 100644 --- a/hw/ppc/amigaone.c +++ b/hw/ppc/amigaone.c @@ -22,6 +22,7 @@ #include "hw/i2c/smbus_eeprom.h" #include "exec/cpu-common.h" #include "system/block-backend.h" +#include "system/physmem.h" #include "system/qtest.h" #include "system/reset.h" #include "kvm_ppc.h" @@ -231,7 +232,7 @@ static void create_bd_info(hwaddr addr, ram_addr_t ram_size) bd->bi_busfreq = cpu_to_be32(BUS_FREQ_HZ); bd->bi_baudrate = cpu_to_be32(115200); - cpu_physical_memory_write(addr, bd, sizeof(*bd)); + physical_memory_write(addr, bd, sizeof(*bd)); } static void amigaone_cpu_reset(void *opaque) @@ -386,7 +387,7 @@ static void amigaone_init(MachineState *machine) size_t len = strlen(machine->kernel_cmdline); loadaddr = bi->bd_info + 1 * MiB; - cpu_physical_memory_write(loadaddr, machine->kernel_cmdline, len + 1); + physical_memory_write(loadaddr, machine->kernel_cmdline, len + 1); bi->cmdline_start = loadaddr; bi->cmdline_end = loadaddr + len + 1; /* including terminating '\0' */ } diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 5be2f2095f6..1876882a040 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -29,6 +29,7 @@ #include "hw/char/serial-mm.h" #include "hw/pci/pci.h" #include "system/block-backend-io.h" +#include "system/physmem.h" #include "system/system.h" #include "system/kvm.h" #include "system/reset.h" @@ -661,7 +662,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms, done: if (!dry_run) { - cpu_physical_memory_write(addr, fdt, fdt_size); + physical_memory_write(addr, fdt, fdt_size); /* Set machine->fdt for 'dumpdtb' QMP/HMP command */ g_free(machine->fdt); diff --git a/hw/ppc/pegasos.c b/hw/ppc/pegasos.c index ac9fc5a6542..9d7e279123b 100644 --- a/hw/ppc/pegasos.c +++ b/hw/ppc/pegasos.c @@ -21,6 +21,7 @@ #include "hw/ide/pci.h" #include "hw/i2c/smbus_eeprom.h" #include "hw/core/qdev-properties.h" +#include "system/physmem.h" #include "system/reset.h" #include "system/runstate.h" #include "system/qtest.h" @@ -314,22 +315,22 @@ static void pegasos_init(MachineState *machine) static void pegasos_superio_write(uint8_t addr, uint8_t val) { - cpu_physical_memory_write(0xfe0003f0, &addr, 1); - cpu_physical_memory_write(0xfe0003f1, &val, 1); + physical_memory_write(0xfe0003f0, &addr, 1); + physical_memory_write(0xfe0003f1, &val, 1); } static void pegasos1_pci_config_write(PegasosMachineState *pm, int bus, uint32_t addr, uint32_t len, uint32_t val) { addr |= BIT(31); - cpu_physical_memory_write(0xfec00cf8, &addr, 4); - cpu_physical_memory_write(0xfee00cfc, &val, len); + physical_memory_write(0xfec00cf8, &addr, 4); + physical_memory_write(0xfee00cfc, &val, len); } static void pegasos1_chipset_reset(PegasosMachineState *pm) { uint8_t elcr = 0x2e; - cpu_physical_memory_write(0xfe0004d1, &elcr, sizeof(elcr)); + physical_memory_write(0xfe0004d1, &elcr, sizeof(elcr)); pegasos1_pci_config_write(pm, 0, PCI_COMMAND, 2, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 8df697da94c..62812f22f8c 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -25,6 +25,7 @@ #include "qemu/units.h" #include "qemu/cutils.h" #include "qapi/error.h" +#include "system/physmem.h" #include "system/qtest.h" #include "system/system.h" #include "system/numa.h" @@ -843,11 +844,11 @@ static void pnv_reset(MachineState *machine, ResetType type) .thread_size = cpu_to_be32(sizeof(MpiplPreservedCPUState)), }; - cpu_physical_memory_write(PROC_DUMP_AREA_OFF, &proc_area, + physical_memory_write(PROC_DUMP_AREA_OFF, &proc_area, sizeof(proc_area)); } - cpu_physical_memory_write(PNV_FDT_ADDR, fdt, fdt_totalsize(fdt)); + physical_memory_write(PNV_FDT_ADDR, fdt, fdt_totalsize(fdt)); /* Free previous device tree set by pnv_init/reset/machine_init_done */ g_free(machine->fdt); diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 634046506e8..016c756c19e 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -18,6 +18,7 @@ #include "hw/core/qdev-properties.h" #include "hw/pci/pci.h" #include "exec/cpu-common.h" +#include "system/physmem.h" #include "system/reset.h" #include "target/ppc/cpu.h" #include "ppc440.h" @@ -606,9 +607,9 @@ static void dcr_write_dma(void *opaque, int dcrn, uint32_t val) width = 1 << ((val & DMA0_CR_PW) >> 25); xferlen = count * width; wlen = rlen = xferlen; - rptr = cpu_physical_memory_map(dma->ch[chnl].sa, &rlen, + rptr = physical_memory_map(dma->ch[chnl].sa, &rlen, false); - wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen, + wptr = physical_memory_map(dma->ch[chnl].da, &wlen, true); if (rptr && rlen == xferlen && wptr && wlen == xferlen) { if (!(val & DMA0_CR_DEC) && @@ -631,10 +632,10 @@ static void dcr_write_dma(void *opaque, int dcrn, uint32_t val) } } if (wptr) { - cpu_physical_memory_unmap(wptr, wlen, 1, didx); + physical_memory_unmap(wptr, wlen, 1, didx); } if (rptr) { - cpu_physical_memory_unmap(rptr, rlen, 0, sidx); + physical_memory_unmap(rptr, rlen, 0, sidx); } } } diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index f0e99bb5be7..b79828b4e90 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -38,6 +38,7 @@ #include "system/system.h" #include "system/hostmem.h" #include "system/numa.h" +#include "system/physmem.h" #include "system/tcg.h" #include "system/qtest.h" #include "system/reset.h" @@ -1858,7 +1859,7 @@ static void spapr_machine_reset(MachineState *machine, ResetType type) spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, 0, fdt_addr, 0); - cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); + physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); } g_free(spapr->fdt_blob); diff --git a/hw/ppc/spapr_drc.c b/hw/ppc/spapr_drc.c index 9bc65c760ea..5c2150b71c8 100644 --- a/hw/ppc/spapr_drc.c +++ b/hw/ppc/spapr_drc.c @@ -25,6 +25,7 @@ #include "hw/ppc/spapr_nvdimm.h" #include "exec/cpu-common.h" #include "system/device_tree.h" +#include "system/physmem.h" #include "system/reset.h" #include "trace.h" @@ -1150,7 +1151,7 @@ out: static void configure_connector_st(target_ulong addr, target_ulong offset, const void *buf, size_t len) { - cpu_physical_memory_write(ppc64_phys_to_real(addr + offset), + physical_memory_write(ppc64_phys_to_real(addr + offset), buf, MIN(len, CC_WA_LEN - offset)); } diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index ab23e3f477b..eb4d360122a 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -28,6 +28,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "system/device_tree.h" +#include "system/physmem.h" #include "system/runstate.h" #include "hw/ppc/fdt.h" @@ -855,9 +856,9 @@ static void spapr_mce_dispatch_elog(SpaprMachineState *spapr, PowerPCCPU *cpu, stq_be_phys(&address_space_memory, rtas_addr + RTAS_ERROR_LOG_OFFSET, env->gpr[3]); - cpu_physical_memory_write(rtas_addr + RTAS_ERROR_LOG_OFFSET + + physical_memory_write(rtas_addr + RTAS_ERROR_LOG_OFFSET + sizeof(env->gpr[3]), &log, sizeof(log)); - cpu_physical_memory_write(rtas_addr + RTAS_ERROR_LOG_OFFSET + + physical_memory_write(rtas_addr + RTAS_ERROR_LOG_OFFSET + sizeof(env->gpr[3]) + sizeof(log), ext_elog, sizeof(*ext_elog)); g_free(ext_elog); @@ -964,8 +965,8 @@ static void check_exception(PowerPCCPU *cpu, SpaprMachineState *spapr, header.summary = cpu_to_be32(event->summary); header.extended_length = cpu_to_be32(event->extended_length); - cpu_physical_memory_write(buf, &header, sizeof(header)); - cpu_physical_memory_write(buf + sizeof(header), event->extended_log, + physical_memory_write(buf, &header, sizeof(header)); + physical_memory_write(buf + sizeof(header), event->extended_log, event->extended_length); rtas_st(rets, 0, RTAS_OUT_SUCCESS); g_free(event->extended_log); diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 60ba215e861..23bcd788daf 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -2,6 +2,7 @@ #include "qemu/cutils.h" #include "qapi/error.h" #include "system/hw_accel.h" +#include "system/physmem.h" #include "system/runstate.h" #include "system/tcg.h" #include "qemu/log.h" @@ -273,7 +274,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr, if (!is_ram_address(spapr, dst) || (dst & ~TARGET_PAGE_MASK) != 0) { return H_PARAMETER; } - pdst = cpu_physical_memory_map(dst, &len, true); + pdst = physical_memory_map(dst, &len, true); if (!pdst || len != TARGET_PAGE_SIZE) { return H_PARAMETER; } @@ -284,13 +285,13 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr, ret = H_PARAMETER; goto unmap_out; } - psrc = cpu_physical_memory_map(src, &len, false); + psrc = physical_memory_map(src, &len, false); if (!psrc || len != TARGET_PAGE_SIZE) { ret = H_PARAMETER; goto unmap_out; } memcpy(pdst, psrc, len); - cpu_physical_memory_unmap(psrc, len, 0, len); + physical_memory_unmap(psrc, len, 0, len); } else if (flags & H_ZERO_PAGE) { memset(pdst, 0, len); /* Just clear the destination page */ } @@ -309,7 +310,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr, } unmap_out: - cpu_physical_memory_unmap(pdst, TARGET_PAGE_SIZE, 1, len); + physical_memory_unmap(pdst, TARGET_PAGE_SIZE, 1, len); return ret; } @@ -1382,8 +1383,8 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu, spapr->fdt_size = fdt_totalsize(spapr->fdt_blob); spapr->fdt_initial_size = spapr->fdt_size; - cpu_physical_memory_write(fdt_buf, &hdr, sizeof(hdr)); - cpu_physical_memory_write(fdt_buf + sizeof(hdr), spapr->fdt_blob, + physical_memory_write(fdt_buf, &hdr, sizeof(hdr)); + physical_memory_write(fdt_buf + sizeof(hdr), spapr->fdt_blob, spapr->fdt_size); trace_spapr_cas_continue(spapr->fdt_size + sizeof(hdr)); } @@ -1487,7 +1488,7 @@ static target_ulong h_update_dt(PowerPCCPU *cpu, SpaprMachineState *spapr, unsigned cb; void *fdt; - cpu_physical_memory_read(dt, &hdr, sizeof(hdr)); + physical_memory_read(dt, &hdr, sizeof(hdr)); cb = fdt32_to_cpu(hdr.totalsize); /* Check that the fdt did not grow out of proportion */ @@ -1498,7 +1499,7 @@ static target_ulong h_update_dt(PowerPCCPU *cpu, SpaprMachineState *spapr, } fdt = g_malloc0(cb); - cpu_physical_memory_read(dt, fdt, cb); + physical_memory_read(dt, fdt, cb); /* Check the fdt consistency */ if (fdt_check_full(fdt, cb)) { diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 0871425237e..328fc27c400 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -32,6 +32,7 @@ #include "system/device_tree.h" #include "system/cpus.h" #include "system/hw_accel.h" +#include "system/physmem.h" #include "system/runstate.h" #include "system/qtest.h" #include "kvm_ppc.h" @@ -279,7 +280,7 @@ static inline int sysparm_st(target_ulong addr, target_ulong len, return RTAS_OUT_SYSPARM_PARAM_ERROR; } stw_be_phys(&address_space_memory, phys, vallen); - cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen)); + physical_memory_write(phys + 2, val, MIN(len - 2, vallen)); return RTAS_OUT_SUCCESS; } @@ -441,7 +442,7 @@ static void rtas_ibm_os_term(PowerPCCPU *cpu, return trigger_fadump_boot(spapr, rets); } - cpu_physical_memory_read(msgaddr, msg, sizeof(msg) - 1); + physical_memory_read(msgaddr, msg, sizeof(msg) - 1); msg[sizeof(msg) - 1] = 0; error_report("OS terminated: %s", msg); diff --git a/hw/ppc/spapr_tpm_proxy.c b/hw/ppc/spapr_tpm_proxy.c index 361a3dc817d..19889e80bc1 100644 --- a/hw/ppc/spapr_tpm_proxy.c +++ b/hw/ppc/spapr_tpm_proxy.c @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/error-report.h" +#include "system/physmem.h" #include "system/reset.h" #include "hw/ppc/spapr.h" #include "hw/core/qdev-properties.h" @@ -69,7 +70,7 @@ static ssize_t tpm_execute(SpaprTpmProxy *tpm_proxy, target_ulong *args) } } - cpu_physical_memory_read(data_in, buf_in, data_in_size); + physical_memory_read(data_in, buf_in, data_in_size); do { ret = write(tpm_proxy->host_fd, buf_in, data_in_size); @@ -94,7 +95,7 @@ static ssize_t tpm_execute(SpaprTpmProxy *tpm_proxy, target_ulong *args) return H_RESOURCE; } - cpu_physical_memory_write(data_out, buf_out, ret); + physical_memory_write(data_out, buf_out, ret); args[0] = ret; return H_SUCCESS; diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index d10d9135890..09686360e16 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -30,6 +30,7 @@ #include "hw/core/sysbus.h" #include "hw/char/serial-mm.h" #include "hw/block/flash.h" +#include "system/physmem.h" #include "system/system.h" #include "system/reset.h" #include "hw/core/boards.h" @@ -174,7 +175,7 @@ static int xilinx_load_device_tree(MachineState *machine, machine->kernel_cmdline); if (r < 0) fprintf(stderr, "couldn't set /chosen/bootargs\n"); - cpu_physical_memory_write(addr, fdt, fdt_size); + physical_memory_write(addr, fdt, fdt_size); /* Set machine->fdt for 'dumpdtb' QMP/HMP command */ machine->fdt = fdt; diff --git a/hw/s390x/css.c b/hw/s390x/css.c index ecd28fed5c3..96d5378f3c1 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -15,6 +15,7 @@ #include "qemu/bitops.h" #include "qemu/error-report.h" #include "system/address-spaces.h" +#include "system/physmem.h" #include "hw/s390x/ioinst.h" #include "hw/core/qdev-properties.h" #include "hw/s390x/css.h" @@ -755,13 +756,13 @@ static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1) CCW1 ret; if (fmt1) { - cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1)); + physical_memory_read(addr, &tmp1, sizeof(tmp1)); ret.cmd_code = tmp1.cmd_code; ret.flags = tmp1.flags; ret.count = be16_to_cpu(tmp1.count); ret.cda = be32_to_cpu(tmp1.cda); } else { - cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0)); + physical_memory_read(addr, &tmp0, sizeof(tmp0)); if ((tmp0.cmd_code & 0x0f) == CCW_CMD_TIC) { ret.cmd_code = CCW_CMD_TIC; ret.flags = 0; diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index 1babcd2b7dd..fa50749a7d3 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -15,6 +15,7 @@ #include "qemu/osdep.h" #include "qemu/datadir.h" #include "qapi/error.h" +#include "system/physmem.h" #include "system/reset.h" #include "system/runstate.h" #include "system/tcg.h" @@ -431,7 +432,7 @@ static uint64_t s390_ipl_map_iplb_chain(IplParameterBlock *iplb_chain) uint64_t len = sizeof(IplParameterBlock) * count; uint64_t chain_addr = find_iplb_chain_addr(ipl->bios_start_addr, count); - cpu_physical_memory_write(chain_addr, iplb_chain, len); + physical_memory_write(chain_addr, iplb_chain, len); return chain_addr; } @@ -722,13 +723,13 @@ static void s390_ipl_prepare_qipl(S390CPU *cpu) uint8_t *addr; uint64_t len = 4096; - addr = cpu_physical_memory_map(cpu->env.psa, &len, true); + addr = physical_memory_map(cpu->env.psa, &len, true); if (!addr || len < QIPL_ADDRESS + sizeof(QemuIplParameters)) { error_report("Cannot set QEMU IPL parameters"); return; } memcpy(addr + QIPL_ADDRESS, &ipl->qipl, sizeof(QemuIplParameters)); - cpu_physical_memory_unmap(addr, len, 1, len); + physical_memory_unmap(addr, len, 1, len); } int s390_ipl_prepare_pv_header(struct S390PVResponse *pv_resp, Error **errp) @@ -738,7 +739,7 @@ int s390_ipl_prepare_pv_header(struct S390PVResponse *pv_resp, Error **errp) void *hdr = g_malloc(ipib_pv->pv_header_len); int rc; - cpu_physical_memory_read(ipib_pv->pv_header_addr, hdr, + physical_memory_read(ipib_pv->pv_header_addr, hdr, ipib_pv->pv_header_len); rc = s390_pv_set_sec_parms((uintptr_t)hdr, ipib_pv->pv_header_len, pv_resp, errp); diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index eb2b6185db0..eff980fdfe9 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -28,6 +28,7 @@ #include "exec/cpu-common.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "system/physmem.h" #include "system/reset.h" #include "system/runstate.h" @@ -668,7 +669,7 @@ static bool set_ind_bit_atomic(uint64_t ind_loc, uint8_t to_be_set) /* avoid multiple fetches */ uint8_t volatile *ind_addr; - ind_addr = cpu_physical_memory_map(ind_loc, &len, true); + ind_addr = physical_memory_map(ind_loc, &len, true); if (!ind_addr) { s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0); return false; @@ -678,7 +679,7 @@ static bool set_ind_bit_atomic(uint64_t ind_loc, uint8_t to_be_set) expected = actual; actual = qatomic_cmpxchg(ind_addr, expected, expected | to_be_set); } while (actual != expected); - cpu_physical_memory_unmap((void *)ind_addr, len, 1, len); + physical_memory_unmap((void *)ind_addr, len, 1, len); return (actual & to_be_set) ? false : true; } diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c index cdad862ec23..d82874ed27e 100644 --- a/hw/s390x/virtio-ccw.c +++ b/hw/s390x/virtio-ccw.c @@ -14,6 +14,7 @@ #include "qapi/error.h" #include "system/address-spaces.h" #include "system/kvm.h" +#include "system/physmem.h" #include "net/net.h" #include "hw/virtio/virtio.h" #include "migration/qemu-file-types.h" @@ -834,7 +835,7 @@ static uint8_t virtio_set_ind_atomic(SubchDev *sch, uint64_t ind_loc, /* avoid multiple fetches */ uint8_t volatile *ind_addr; - ind_addr = cpu_physical_memory_map(ind_loc, &len, true); + ind_addr = physical_memory_map(ind_loc, &len, true); if (!ind_addr) { error_report("%s(%x.%x.%04x): unable to access indicator", __func__, sch->cssid, sch->ssid, sch->schid); @@ -846,7 +847,7 @@ static uint8_t virtio_set_ind_atomic(SubchDev *sch, uint64_t ind_loc, actual = qatomic_cmpxchg(ind_addr, expected, expected | to_be_set); } while (actual != expected); trace_virtio_ccw_set_ind(ind_loc, actual, actual | to_be_set); - cpu_physical_memory_unmap((void *)ind_addr, len, 1, len); + physical_memory_unmap((void *)ind_addr, len, 1, len); return actual; } diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index 11ae6b9b747..4398aa54990 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -34,7 +34,7 @@ #include "scsi/constants.h" #include "hw/pci/msi.h" #include "hw/core/qdev-properties.h" -#include "exec/cpu-common.h" +#include "system/physmem.h" #include "vmw_pvscsi.h" #include "trace.h" #include "qom/object.h" @@ -395,7 +395,7 @@ pvscsi_cmp_ring_put(PVSCSIState *s, struct PVSCSIRingCmpDesc *cmp_desc) cmp_descr_pa = pvscsi_ring_pop_cmp_descr(&s->rings); trace_pvscsi_cmp_ring_put(cmp_descr_pa); - cpu_physical_memory_write(cmp_descr_pa, cmp_desc, sizeof(*cmp_desc)); + physical_memory_write(cmp_descr_pa, cmp_desc, sizeof(*cmp_desc)); } static void @@ -405,7 +405,7 @@ pvscsi_msg_ring_put(PVSCSIState *s, struct PVSCSIRingMsgDesc *msg_desc) msg_descr_pa = pvscsi_ring_pop_msg_descr(&s->rings); trace_pvscsi_msg_ring_put(msg_descr_pa); - cpu_physical_memory_write(msg_descr_pa, msg_desc, sizeof(*msg_desc)); + physical_memory_write(msg_descr_pa, msg_desc, sizeof(*msg_desc)); } static void @@ -480,7 +480,7 @@ pvscsi_get_next_sg_elem(PVSCSISGState *sg) { struct PVSCSISGElement elem; - cpu_physical_memory_read(sg->elemAddr, &elem, sizeof(elem)); + physical_memory_read(sg->elemAddr, &elem, sizeof(elem)); if ((elem.flags & ~PVSCSI_KNOWN_FLAGS) != 0) { /* * There is PVSCSI_SGE_FLAG_CHAIN_ELEMENT flag described in @@ -501,7 +501,7 @@ pvscsi_write_sense(PVSCSIRequest *r, uint8_t *sense, int len) { r->cmp.senseLen = MIN(r->req.senseLen, len); r->sense_key = sense[(sense[0] & 2) ? 1 : 2]; - cpu_physical_memory_write(r->req.senseAddr, sense, r->cmp.senseLen); + physical_memory_write(r->req.senseAddr, sense, r->cmp.senseLen); } static void @@ -758,7 +758,7 @@ pvscsi_process_io(PVSCSIState *s) smp_rmb(); trace_pvscsi_process_io(next_descr_pa); - cpu_physical_memory_read(next_descr_pa, &descr, sizeof(descr)); + physical_memory_read(next_descr_pa, &descr, sizeof(descr)); pvscsi_process_request_descriptor(s, &descr); } diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c index 445f33e1726..7df93445002 100644 --- a/hw/xen/xen_pt_graphics.c +++ b/hw/xen/xen_pt_graphics.c @@ -5,8 +5,8 @@ #include "qapi/error.h" #include "hw/xen/xen_pt.h" #include "hw/xen/xen_igd.h" -#include "exec/cpu-common.h" #include "xen-host-pci-device.h" +#include "system/physmem.h" static unsigned long igd_guest_opregion; static unsigned long igd_host_opregion; @@ -223,7 +223,7 @@ void xen_pt_setup_vga(XenPCIPassthroughState *s, XenHostPCIDevice *dev, } /* Currently we fixed this address as a primary for legacy BIOS. */ - cpu_physical_memory_write(0xc0000, bios, bios_size); + physical_memory_write(0xc0000, bios, bios_size); } uint32_t igd_read_opregion(XenPCIPassthroughState *s) diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 33a2d9485cf..8f85fc8ddb4 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -35,6 +35,7 @@ #include "hw/core/qdev-properties.h" #include "elf.h" #include "system/memory.h" +#include "system/physmem.h" #include "exec/tswap.h" #include "hw/char/serial-mm.h" #include "net/net.h" @@ -370,7 +371,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) exit(EXIT_FAILURE); } - cpu_physical_memory_write(cur_lowmem, fdt, fdt_size); + physical_memory_write(cur_lowmem, fdt, fdt_size); cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT, sizeof(dtb_addr), &dtb_addr); cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4 * KiB); @@ -449,7 +450,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) memcpy(boot + 4, &entry_pc, sizeof(entry_pc)); memcpy(boot + 8, &entry_a2, sizeof(entry_a2)); - cpu_physical_memory_write(env->pc, boot, boot_sz); + physical_memory_write(env->pc, boot, boot_sz); } } else { if (flash) { diff --git a/system/cpus.c b/system/cpus.c index b4c7f94332d..49f6daec3cd 100644 --- a/system/cpus.c +++ b/system/cpus.c @@ -40,6 +40,7 @@ #include "system/cpus.h" #include "qemu/guest-random.h" #include "hw/core/nmi.h" +#include "system/physmem.h" #include "system/replay.h" #include "system/runstate.h" #include "system/cpu-timers.h" @@ -898,7 +899,7 @@ void qmp_pmemsave(uint64_t addr, uint64_t size, const char *filename, l = sizeof(buf); if (l > size) l = size; - cpu_physical_memory_read(addr, buf, l); + physical_memory_read(addr, buf, l); if (fwrite(buf, 1, l, f) != l) { error_setg(errp, "writing memory to '%s' failed", filename); diff --git a/system/physmem.c b/system/physmem.c index 9b3f461b123..883ac0f314b 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3477,13 +3477,13 @@ MemTxResult address_space_set(const AddressSpace *as, hwaddr addr, return error; } -void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len) +void physical_memory_read(hwaddr addr, void *buf, hwaddr len) { address_space_read(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, buf, len); } -void cpu_physical_memory_write(hwaddr addr, const void *buf, hwaddr len) +void physical_memory_write(hwaddr addr, const void *buf, hwaddr len) { address_space_write(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, buf, len); @@ -3808,16 +3808,14 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, address_space_notify_map_clients(as); } -void *cpu_physical_memory_map(hwaddr addr, - hwaddr *plen, - bool is_write) +void *physical_memory_map(hwaddr addr, hwaddr *plen, bool is_write) { return address_space_map(&address_space_memory, addr, plen, is_write, MEMTXATTRS_UNSPECIFIED); } -void cpu_physical_memory_unmap(void *buffer, hwaddr len, - bool is_write, hwaddr access_len) +void physical_memory_unmap(void *buffer, hwaddr len, + bool is_write, hwaddr access_len) { return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); } -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 14/48] hw/xen/interface: Remove pre-C99 checks 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (12 preceding siblings ...) 2026-06-18 12:27 ` [PULL 13/48] system: Move cpu_physical_memory_*() declarations to 'system/physmem.h' Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 15/48] qom/object: Remove pre-C11 check Philippe Mathieu-Daudé ` (34 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel We mandate a compiler supporting C99 since 2019-01-17 in commit 7be41675f7c ("configure: Force the C standard to gnu99"), thus supporting flexible array members [*]. Remove what is now dead code. [*] https://www.gnu.org/software/c-intro-and-ref/manual/html_node/Flexible-Array-Fields.html Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260615091308.4458-2-philmd@oss.qualcomm.com> --- include/hw/xen/interface/physdev.h | 2 +- include/hw/xen/interface/version.h | 5 ++--- include/hw/xen/interface/xen-compat.h | 2 -- include/hw/xen/interface/xen.h | 14 -------------- 4 files changed, 3 insertions(+), 20 deletions(-) diff --git a/include/hw/xen/interface/physdev.h b/include/hw/xen/interface/physdev.h index f0c0d4727c0..ca2bcbfd159 100644 --- a/include/hw/xen/interface/physdev.h +++ b/include/hw/xen/interface/physdev.h @@ -283,7 +283,7 @@ struct physdev_pci_device_add { * First element ([0]) is PXM domain associated with the device (if * XEN_PCI_DEV_PXM is set) */ - uint32_t optarr[XEN_FLEX_ARRAY_DIM]; + uint32_t optarr[]; }; typedef struct physdev_pci_device_add physdev_pci_device_add_t; DEFINE_XEN_GUEST_HANDLE(physdev_pci_device_add_t); diff --git a/include/hw/xen/interface/version.h b/include/hw/xen/interface/version.h index 9c78b4f3b6a..2f183c3efd4 100644 --- a/include/hw/xen/interface/version.h +++ b/include/hw/xen/interface/version.h @@ -77,9 +77,8 @@ typedef char xen_commandline_t[1024]; */ #define XENVER_build_id 10 struct xen_build_id { - uint32_t len; /* IN: size of buf[]. */ - unsigned char buf[XEN_FLEX_ARRAY_DIM]; - /* OUT: Variable length buffer with build_id. */ + uint32_t len; /* IN: size of buf[]. */ + unsigned char buf[]; /* OUT: Variable length buffer with build_id. */ }; typedef struct xen_build_id xen_build_id_t; diff --git a/include/hw/xen/interface/xen-compat.h b/include/hw/xen/interface/xen-compat.h index 97fe6984989..582c0182367 100644 --- a/include/hw/xen/interface/xen-compat.h +++ b/include/hw/xen/interface/xen-compat.h @@ -24,6 +24,4 @@ #error "These header files do not support the requested interface version." #endif -#define COMPAT_FLEX_ARRAY_DIM XEN_FLEX_ARRAY_DIM - #endif /* __XEN_PUBLIC_XEN_COMPAT_H__ */ diff --git a/include/hw/xen/interface/xen.h b/include/hw/xen/interface/xen.h index 920567e0062..a6f4aa61993 100644 --- a/include/hw/xen/interface/xen.h +++ b/include/hw/xen/interface/xen.h @@ -36,15 +36,6 @@ DEFINE_XEN_GUEST_HANDLE(uint64_t); DEFINE_XEN_GUEST_HANDLE(xen_pfn_t); DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); -/* Define a variable length array (depends on compiler). */ -#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L -#define XEN_FLEX_ARRAY_DIM -#elif defined(__GNUC__) -#define XEN_FLEX_ARRAY_DIM 0 -#else -#define XEN_FLEX_ARRAY_DIM 1 /* variable size */ -#endif - /* Turn a plain number into a C unsigned (long (long)) constant. */ #define __xen_mk_uint(x) x ## U #define __xen_mk_ulong(x) x ## UL @@ -986,13 +977,8 @@ typedef struct { ((d) >> 8) & 0xFF, ((d) >> 0) & 0xFF, \ e1, e2, e3, e4, e5, e6}} -#if defined(__STDC_VERSION__) ? __STDC_VERSION__ >= 199901L : defined(__GNUC__) #define XEN_DEFINE_UUID(a, b, c, d, e1, e2, e3, e4, e5, e6) \ ((xen_uuid_t)XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6)) -#else -#define XEN_DEFINE_UUID(a, b, c, d, e1, e2, e3, e4, e5, e6) \ - XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6) -#endif /* __STDC_VERSION__ / __GNUC__ */ #endif /* !__ASSEMBLY__ */ -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 15/48] qom/object: Remove pre-C11 check 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (13 preceding siblings ...) 2026-06-18 12:27 ` [PULL 14/48] hw/xen/interface: Remove pre-C99 checks Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 16/48] tcg: Include missing 'qemu/bitops.h' header in tcg-gvec-desc.h Philippe Mathieu-Daudé ` (33 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel We mandate a compiler supporting C11 since 2021-06-15 in commit d22797ce36a ("configure: Use -std=gnu11"), thus the max_align_t type definition exists. Remove what is now dead code. Note, C11 provides aligned_alloc(). Using it is left as a future cleanup step. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260615091308.4458-3-philmd@oss.qualcomm.com> --- qom/object.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) diff --git a/qom/object.c b/qom/object.c index 0ac201de4c1..f79b2cf3618 100644 --- a/qom/object.c +++ b/qom/object.c @@ -675,18 +675,6 @@ static void object_finalize(void *data) } } -/* Find the minimum alignment guaranteed by the system malloc. */ -#if __STDC_VERSION__ >= 201112L -typedef max_align_t qemu_max_align_t; -#else -typedef union { - long l; - void *p; - double d; - long double ld; -} qemu_max_align_t; -#endif - static Object *object_new_with_type(Type type) { Object *obj; @@ -703,7 +691,7 @@ static Object *object_new_with_type(Type type) * Do not use qemu_memalign unless required. Depending on the * implementation, extra alignment implies extra overhead. */ - if (likely(align <= __alignof__(qemu_max_align_t))) { + if (likely(align <= __alignof__(max_align_t))) { obj = g_malloc(size); obj_free = g_free; } else { -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 16/48] tcg: Include missing 'qemu/bitops.h' header in tcg-gvec-desc.h 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (14 preceding siblings ...) 2026-06-18 12:27 ` [PULL 15/48] qom/object: Remove pre-C11 check Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 17/48] target/i386: Report TPR accesses to HVF Philippe Mathieu-Daudé ` (32 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel Include the missing 'qemu/bitops.h' header to avoid when refactoring unrelated headers: In file included from target/arm/internals.h:34: include/tcg/tcg-gvec-desc.h:48:12: error: call to undeclared function 'extract32' 48 | return extract32(desc, SIMD_MAXSZ_SHIFT, SIMD_MAXSZ_BITS) * 8 + 8; | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616153432.92939-2-philmd@oss.qualcomm.com> --- include/tcg/tcg-gvec-desc.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/tcg/tcg-gvec-desc.h b/include/tcg/tcg-gvec-desc.h index 704bd864549..94c7d14b264 100644 --- a/include/tcg/tcg-gvec-desc.h +++ b/include/tcg/tcg-gvec-desc.h @@ -20,6 +20,8 @@ #ifndef TCG_TCG_GVEC_DESC_H #define TCG_TCG_GVEC_DESC_H +#include "qemu/bitops.h" + /* * This configuration allows MAXSZ to represent 2048 bytes, and * OPRSZ to match MAXSZ, or represent the smaller values 8, 16, or 32. -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 17/48] target/i386: Report TPR accesses to HVF 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (15 preceding siblings ...) 2026-06-18 12:27 ` [PULL 16/48] tcg: Include missing 'qemu/bitops.h' header in tcg-gvec-desc.h Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 18/48] target/arm: Only set CPU_INTERRUPT_EXITTB for TCG Philippe Mathieu-Daudé ` (31 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> HVF should be able to handle task priority register accesses. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20250616090632.55214-1-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- target/i386/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/helper.c b/target/i386/helper.c index 30f1fa41b32..c3cba04e142 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -566,7 +566,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access) X86CPU *cpu = env_archcpu(env); CPUState *cs = env_cpu(env); - if (kvm_enabled() || whpx_enabled() || nvmm_enabled()) { + if (kvm_enabled() || whpx_enabled() || nvmm_enabled() || hvf_enabled()) { env->tpr_access_type = access; cpu_interrupt(cs, CPU_INTERRUPT_TPR); -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 18/48] target/arm: Only set CPU_INTERRUPT_EXITTB for TCG 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (16 preceding siblings ...) 2026-06-18 12:27 ` [PULL 17/48] target/i386: Report TPR accesses to HVF Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 19/48] target/arm: Remove vcpu_dirty=true assigments in hvf_handle_exception() Philippe Mathieu-Daudé ` (30 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> Commit 34c45d53026 ("target-arm: kvm - re-inject guest debug exceptions") removed CPU_INTERRUPT_EXITTB from KVM, but it also appears on HVF. Better to restrict it to TCG. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com> Message-Id: <20250630130937.3487-2-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 22e71a28042..a234aa031c0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9633,7 +9633,7 @@ void arm_cpu_do_interrupt(CPUState *cs) arm_call_el_change_hook(cpu); - if (!kvm_enabled()) { + if (tcg_enabled()) { cpu_set_interrupt(cs, CPU_INTERRUPT_EXITTB); } -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 19/48] target/arm: Remove vcpu_dirty=true assigments in hvf_handle_exception() 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (17 preceding siblings ...) 2026-06-18 12:27 ` [PULL 18/48] target/arm: Only set CPU_INTERRUPT_EXITTB for TCG Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 20/48] target/arm: Better describe PMU depends on TCG or HVF Philippe Mathieu-Daudé ` (29 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> Commit 2a425aae0b5 ("target/arm: ensure PSCI register updates are flushed") manually sets %vcpu_dirty in hvf_handle_exception(), but these calls follow calls to cpu_synchronize_state() which itself sets %vcpu_dirty. Better have the generic CPU API handle this, but add a pair of assertions when serializing the accelerator state to be safe. Suggested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260423170229.64655-13-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- target/arm/hvf/hvf.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index d88cbe7c82a..a5b30b9ef0d 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -794,6 +794,8 @@ int hvf_arch_get_registers(CPUState *cpu) hv_simd_fp_uchar16_t fpval; int i, n; + assert(!cpu->vcpu_dirty); + for (i = 0; i < ARRAY_SIZE(hvf_reg_match); i++) { ret = hv_vcpu_get_reg(cpu->accel->fd, hvf_reg_match[i].reg, &val); *(uint64_t *)((void *)env + hvf_reg_match[i].offset) = val; @@ -945,6 +947,8 @@ int hvf_arch_put_registers(CPUState *cpu) hv_simd_fp_uchar16_t fpval; int i, n; + assert(cpu->vcpu_dirty); + /* * Set SVCR first because changing it will zero out Z/P (including NEON) * regs @@ -2498,7 +2502,6 @@ static int hvf_handle_exception(CPUState *cpu, hv_vcpu_exit_exception_t *excp) /* SMCCC 1.3 section 5.2 says every unknown SMCCC call returns -1 */ env->xregs[0] = -1; } - cpu->vcpu_dirty = true; } else { trace_hvf_unknown_hvc(env->pc, env->xregs[0]); hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); @@ -2515,7 +2518,6 @@ static int hvf_handle_exception(CPUState *cpu, hv_vcpu_exit_exception_t *excp) /* SMCCC 1.3 section 5.2 says every unknown SMCCC call returns -1 */ env->xregs[0] = -1; } - cpu->vcpu_dirty = true; } else { trace_hvf_unknown_smc(env->xregs[0]); hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 20/48] target/arm: Better describe PMU depends on TCG or HVF 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (18 preceding siblings ...) 2026-06-18 12:27 ` [PULL 19/48] target/arm: Remove vcpu_dirty=true assigments in hvf_handle_exception() Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 21/48] target/arm/ptw: Restrict PMSAv8 code to TCG Philippe Mathieu-Daudé ` (28 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> PMU is supported by TCG / HVF but not KVM. Make it explicit rewriting '!KVM' as 'TCG || HVF' (ignoring QTest, because vCPUs are not available there). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20251028054238.14949-57-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- target/arm/cpu.c | 2 +- target/arm/machine.c | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 419e0b3ed41..86aae36ae55 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2183,7 +2183,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) if (arm_feature(env, ARM_FEATURE_PMU)) { pmu_init(cpu); - if (!kvm_enabled()) { + if (tcg_enabled() || hvf_enabled()) { arm_register_pre_el_change_hook(cpu, &pmu_pre_el_change, 0); arm_register_el_change_hook(cpu, &pmu_post_el_change, 0); } diff --git a/target/arm/machine.c b/target/arm/machine.c index fde3b3e8d75..89127e5d83c 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -3,7 +3,7 @@ #include "cpregs.h" #include "trace.h" #include "qemu/error-report.h" -#include "system/kvm.h" +#include "system/hvf.h" #include "system/tcg.h" #include "kvm_arm.h" #include "internals.h" @@ -983,7 +983,7 @@ static int cpu_pre_save(void *opaque) { ARMCPU *cpu = opaque; - if (!kvm_enabled()) { + if (tcg_enabled() || hvf_enabled()) { pmu_op_start(&cpu->env); } @@ -1021,7 +1021,7 @@ static void cpu_post_save(void *opaque) { ARMCPU *cpu = opaque; - if (!kvm_enabled()) { + if (tcg_enabled() || hvf_enabled()) { pmu_op_finish(&cpu->env); } @@ -1055,7 +1055,7 @@ static int cpu_pre_load(void *opaque) */ env->irq_line_state = UINT32_MAX; - if (!kvm_enabled()) { + if (tcg_enabled() || hvf_enabled()) { pmu_op_start(env); } @@ -1234,7 +1234,7 @@ static int cpu_post_load(void *opaque, int version_id) } } - if (!kvm_enabled()) { + if (tcg_enabled() || hvf_enabled()) { pmu_op_finish(env); } -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 21/48] target/arm/ptw: Restrict PMSAv8 code to TCG 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (19 preceding siblings ...) 2026-06-18 12:27 ` [PULL 20/48] target/arm: Better describe PMU depends on TCG or HVF Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 22/48] target/arm: Restrict TCG specific headers Philippe Mathieu-Daudé ` (27 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel Armv8-M Protected Memory System Architecture can only be emulated, therefore restrict it to TCG to avoid compiling it on hardware accelerators. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20260616153432.92939-3-philmd@oss.qualcomm.com> --- target/arm/ptw.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 8b54018c988..1470de30108 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -13,11 +13,13 @@ #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" +#ifdef CONFIG_TCG #include "accel/tcg/probe.h" +#include "target/arm/tcg/idau.h" +#endif #include "cpu.h" #include "internals.h" #include "cpu-features.h" -#include "target/arm/tcg/idau.h" typedef struct S1Translate { /* @@ -2818,6 +2820,8 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, return (ptw->in_prot_check & ~result->f.prot) == 0; } +#ifdef CONFIG_TCG + static uint32_t *regime_rbar(CPUARMState *env, ARMMMUIdx mmu_idx, uint32_t secure) { @@ -3247,6 +3251,20 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, return ret; } +#else /* !CONFIG_TCG */ + +static bool get_phys_addr_pmsav8(CPUARMState *env, + S1Translate *ptw, + uint32_t address, + MMUAccessType access_type, + GetPhysAddrResult *result, + ARMMMUFaultInfo *fi) +{ + g_assert_not_reached(); +} + +#endif /* !CONFIG_TCG */ + /* * Translate from the 4-bit stage 2 representation of * memory attributes (without cache-allocation hints) to -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 22/48] target/arm: Restrict TCG specific headers 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (20 preceding siblings ...) 2026-06-18 12:27 ` [PULL 21/48] target/arm/ptw: Restrict PMSAv8 code to TCG Philippe Mathieu-Daudé @ 2026-06-18 12:27 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 23/48] target/ppc: Restrict TCGTBCPUState to TCG Philippe Mathieu-Daudé ` (26 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:27 UTC (permalink / raw) To: qemu-devel Avoid including TCG-specific headers in non-TCG builds. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617171438.75914-2-philmd@oss.qualcomm.com> --- target/arm/internals.h | 4 +++- target/arm/cpu-irq.c | 3 ++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index f7a57d3ea70..fcce3804f34 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -29,9 +29,11 @@ #include "exec/vaddr.h" #include "exec/breakpoint.h" #include "exec/memop.h" +#ifdef CONFIG_TCG #include "accel/tcg/tb-cpu-state.h" -#include "hw/core/registerfields.h" #include "tcg/tcg-gvec-desc.h" +#endif +#include "hw/core/registerfields.h" #include "system/memory.h" #include "syndrome.h" #include "cpu-features.h" diff --git a/target/arm/cpu-irq.c b/target/arm/cpu-irq.c index fe514cc93af..883e8a176c3 100644 --- a/target/arm/cpu-irq.c +++ b/target/arm/cpu-irq.c @@ -8,10 +8,11 @@ #include "qemu/osdep.h" #include "cpu.h" -#include "accel/tcg/cpu-ops.h" #include "internals.h" #ifdef CONFIG_TCG +#include "accel/tcg/cpu-ops.h" + static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, unsigned int target_el, unsigned int cur_el, bool secure, -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 23/48] target/ppc: Restrict TCGTBCPUState to TCG 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (21 preceding siblings ...) 2026-06-18 12:27 ` [PULL 22/48] target/arm: Restrict TCG specific headers Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 24/48] target/loongarch: Remove unused 'accel/accel-cpu-target.h' header Philippe Mathieu-Daudé ` (25 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel TCGTBCPUState is a structure used during TCG translation, therefore not needed when TCG is not available. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616153432.92939-4-philmd@oss.qualcomm.com> --- target/ppc/internal.h | 5 ++++- target/ppc/helper_regs.c | 3 ++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index dda23b66096..a3bb12afd93 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -22,7 +22,6 @@ #include "exec/memop.h" #include "hw/core/registerfields.h" #include "exec/page-protection.h" -#include "accel/tcg/tb-cpu-state.h" static inline bool ppc_env_is_little_endian(const CPUPPCState *env) { @@ -326,6 +325,10 @@ static inline int ger_pack_masks(int pmsk, int ymsk, int xmsk) return msk; } +#ifdef CONFIG_TCG +#include "accel/tcg/tb-cpu-state.h" + TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs); +#endif #endif /* PPC_INTERNAL_H */ diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index a07e6a7b7b6..acf74c543a1 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -27,7 +27,6 @@ #include "power8-pmu.h" #include "cpu-models.h" #include "spr_common.h" -#include "accel/tcg/cpu-ops.h" #include "internal.h" /* Swap temporary saved registers with GPRs */ @@ -261,6 +260,7 @@ void hreg_update_pmu_hflags(CPUPPCState *env) env->hflags |= hreg_compute_pmu_hflags_value(env); } +#ifdef CONFIG_TCG TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs) { CPUPPCState *env = cpu_env(cs); @@ -277,6 +277,7 @@ TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs) return (TCGTBCPUState){ .pc = env->nip, .flags = hflags_current }; } +#endif /* CONFIG_TCG */ #ifndef CONFIG_USER_ONLY void cpu_interrupt_exittb(CPUState *cs) -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 24/48] target/loongarch: Remove unused 'accel/accel-cpu-target.h' header 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (22 preceding siblings ...) 2026-06-18 12:28 ` [PULL 23/48] target/ppc: Restrict TCGTBCPUState to TCG Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 25/48] target/sparc: Include missing 'accel/tcg/cpu-ops.h' header in cpu.c Philippe Mathieu-Daudé ` (24 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel From: Philippe Mathieu-Daudé <philmd@linaro.org> "accel/accel-cpu-target.h" is to register accelerator target specific hooks via TypeInfo::ACCEL_CPU_NAME(), which LoongArch TCG frontend does not. Remove as unused header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com> Message-Id: <20260529194940.97143-2-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- target/loongarch/tcg/tcg_cpu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c index 66b3f458077..f556234d9d2 100644 --- a/target/loongarch/tcg/tcg_cpu.c +++ b/target/loongarch/tcg/tcg_cpu.c @@ -9,7 +9,6 @@ #include "qemu/error-report.h" #include "qemu/log.h" #include "qemu/plugin.h" -#include "accel/accel-cpu-target.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/cpu-ops.h" #include "exec/translation-block.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 25/48] target/sparc: Include missing 'accel/tcg/cpu-ops.h' header in cpu.c 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (23 preceding siblings ...) 2026-06-18 12:28 ` [PULL 24/48] target/loongarch: Remove unused 'accel/accel-cpu-target.h' header Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 26/48] accel/hvf: fix double hv_vcpu_destroy() causing teardown error on ARM Philippe Mathieu-Daudé ` (23 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel target/sparc/cpu.c implement a TCGCPUOps structure, which is defined in "accel/tcg/cpu-ops.h": 1040 static const TCGCPUOps sparc_tcg_ops = { ... While this header is currently included indirectly, make the inclusion explicit to avoid issue when refactoring unrelated headers. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617160426.64461-2-philmd@oss.qualcomm.com> --- target/sparc/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 3df199ada7b..13ebb122a38 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -23,6 +23,7 @@ #include "qemu/module.h" #include "qemu/qemu-print.h" #include "accel/tcg/cpu-mmu-index.h" +#include "accel/tcg/cpu-ops.h" #include "exec/translation-block.h" #include "hw/core/qdev-properties.h" #include "qapi/visitor.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 26/48] accel/hvf: fix double hv_vcpu_destroy() causing teardown error on ARM 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (24 preceding siblings ...) 2026-06-18 12:28 ` [PULL 25/48] target/sparc: Include missing 'accel/tcg/cpu-ops.h' header in cpu.c Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 27/48] accel/hvf: Reduce hvf_kernel_irqchip_override scope Philippe Mathieu-Daudé ` (22 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel From: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com> The following callstack causes hv_vcpu_destroy() to be called twice, producing HV_BAD_ARGUMENT on the already-destroyed handler: hvf_vcpu_destroy | |_ hv_vcpu_destroy | |_ hvf_arch_vcpu_destroy | |_ hv_vcpu_destroy The first hv_vcpu_destroy call covers both x86 and arm. Let's remove the second one, as it is redundant. This reverts commit feee55d36a1c5d494ee73812d279b439bb05137c. Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <ee6f642af1dab29aaf99f86ac9254ddd25765bf8.1776172276.git.matheus.bernardino@oss.qualcomm.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- target/arm/hvf/hvf.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index a5b30b9ef0d..8b902c68829 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1301,15 +1301,10 @@ void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu) void hvf_arch_vcpu_destroy(CPUState *cpu) { - hv_return_t ret; - if (!hvf_irqchip_in_kernel()) { timer_free(cpu->accel->wfi_timer); cpu->accel->wfi_timer = NULL; } - - ret = hv_vcpu_destroy(cpu->accel->fd); - assert_hvf_ok(ret); } static bool hvf_arm_el2_supported(void) -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 27/48] accel/hvf: Reduce hvf_kernel_irqchip_override scope 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (25 preceding siblings ...) 2026-06-18 12:28 ` [PULL 26/48] accel/hvf: fix double hv_vcpu_destroy() causing teardown error on ARM Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 28/48] accel/tcg: remove duplicate include Philippe Mathieu-Daudé ` (21 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel hvf_kernel_irqchip_override is only used within the accel/hvf/hvf-all.c file, no need to expose the symbol. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr> Message-Id: <20260613145356.88410-1-philmd@oss.qualcomm.com> --- include/system/hvf_int.h | 1 - accel/hvf/hvf-all.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/include/system/hvf_int.h b/include/system/hvf_int.h index d5eaf26dda8..58fb865ebae 100644 --- a/include/system/hvf_int.h +++ b/include/system/hvf_int.h @@ -113,5 +113,4 @@ bool hvf_arch_cpu_realize(CPUState *cpu, Error **errp); uint32_t hvf_arch_get_default_ipa_bit_size(void); uint32_t hvf_arch_get_max_ipa_bit_size(void); -extern bool hvf_kernel_irqchip_override; #endif diff --git a/accel/hvf/hvf-all.c b/accel/hvf/hvf-all.c index 946dbca59d0..21b9b71a6df 100644 --- a/accel/hvf/hvf-all.c +++ b/accel/hvf/hvf-all.c @@ -25,7 +25,7 @@ bool hvf_allowed; bool hvf_kernel_irqchip; bool hvf_nested_virt; -bool hvf_kernel_irqchip_override; +static bool hvf_kernel_irqchip_override; void hvf_nested_virt_enable(bool nested_virt) { -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 28/48] accel/tcg: remove duplicate include 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (26 preceding siblings ...) 2026-06-18 12:28 ` [PULL 27/48] accel/hvf: Reduce hvf_kernel_irqchip_override scope Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 29/48] accel/tcg: Restrict IOMMU declarations Philippe Mathieu-Daudé ` (20 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel From: Osama Abdelkader <osama.abdelkader@gmail.com> tb-internal.h is included twice Signed-off-by: Osama Abdelkader <osama.abdelkader@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Tested-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-ID: <20251126214322.64855-1-osama.abdelkader@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- accel/tcg/cputlb.c | 1 - accel/tcg/tb-maint.c | 1 - accel/tcg/translate-all.c | 1 - 3 files changed, 3 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index d6115bbb0a4..b4239ed5be2 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -44,7 +44,6 @@ #include "tb-internal.h" #include "trace.h" #include "tb-hash.h" -#include "tb-internal.h" #include "tlb-bounds.h" #include "internal-common.h" #ifdef CONFIG_PLUGIN diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 0c7ac5a72c0..7a29a349110 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -32,7 +32,6 @@ #include "tcg/tcg.h" #include "tb-hash.h" #include "tb-context.h" -#include "tb-internal.h" #include "internal-common.h" #ifdef CONFIG_USER_ONLY #include "user/page-protection.h" diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 05d9ce512a4..5235c73bc26 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -33,7 +33,6 @@ #include "tb-jmp-cache.h" #include "tb-hash.h" #include "tb-context.h" -#include "tb-internal.h" #include "internal-common.h" #include "tcg/perf.h" #include "tcg/insn-start-words.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 29/48] accel/tcg: Restrict IOMMU declarations 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (27 preceding siblings ...) 2026-06-18 12:28 ` [PULL 28/48] accel/tcg: remove duplicate include Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 30/48] meson: build macOS signed binary as part of the default target Philippe Mathieu-Daudé ` (19 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Move the two TCG-specific IOMMU method declarations from the generic "exec/cpu-common.h" header to "accel/tcg/iommu.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616153633.93267-1-philmd@oss.qualcomm.com> --- include/accel/tcg/iommu.h | 7 +++++++ include/exec/cpu-common.h | 3 --- accel/tcg/cpu-exec.c | 4 +++- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/include/accel/tcg/iommu.h b/include/accel/tcg/iommu.h index 547f8ea0ef0..a4032a292e5 100644 --- a/include/accel/tcg/iommu.h +++ b/include/accel/tcg/iommu.h @@ -7,6 +7,10 @@ #ifndef ACCEL_TCG_IOMMU_H #define ACCEL_TCG_IOMMU_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #ifdef CONFIG_USER_ONLY #error Cannot include accel/tcg/iommu.h from user emulation #endif @@ -14,6 +18,9 @@ #include "exec/hwaddr.h" #include "exec/memattrs.h" +void tcg_iommu_init_notifier_list(CPUState *cpu); +void tcg_iommu_free_notifier_list(CPUState *cpu); + MemoryRegionSection *address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 830e57dc5fc..74337d84640 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -34,9 +34,6 @@ unsigned int cpu_list_generation_id_get(void); int cpu_get_free_index(void); -void tcg_iommu_init_notifier_list(CPUState *cpu); -void tcg_iommu_free_notifier_list(CPUState *cpu); - /** * cpu_address_space_init: * @cpu: CPU to add this address space to diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index ad94f96b252..7292ff15060 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -26,7 +26,6 @@ #include "accel/tcg/helper-retaddr.h" #include "trace.h" #include "disas/disas.h" -#include "exec/cpu-common.h" #include "exec/cpu-interrupt.h" #include "exec/page-protection.h" #include "exec/mmap-lock.h" @@ -46,6 +45,9 @@ #include "tb-context.h" #include "tb-internal.h" #include "internal-common.h" +#if !defined(CONFIG_USER_ONLY) +#include "accel/tcg/iommu.h" +#endif /* -icount align implementation. */ -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 30/48] meson: build macOS signed binary as part of the default target 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (28 preceding siblings ...) 2026-06-18 12:28 ` [PULL 29/48] accel/tcg: Restrict IOMMU declarations Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 31/48] configure: honor --extra-ldflags when forced to use objc_LINKER Philippe Mathieu-Daudé ` (18 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel From: Emmanuel Blot <eblot@meta.com> Signed-off-by: Emmanuel Blot <eblot@meta.com> Tested-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com> Message-ID: <20260609-macos-default-signed-bin-v1-1-e013ccb5ccb7@meta.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- meson.build | 1 + 1 file changed, 1 insertion(+) diff --git a/meson.build b/meson.build index 19e123423b5..e026851309e 100644 --- a/meson.build +++ b/meson.build @@ -4453,6 +4453,7 @@ foreach target : target_dirs emulators += {exe['name'] : custom_target(exe['name'], input: build_input, output: exe['name'], + build_by_default: true, command: [entitlement, '@OUTPUT@', '@INPUT@']) } -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 31/48] configure: honor --extra-ldflags when forced to use objc_LINKER 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (29 preceding siblings ...) 2026-06-18 12:28 ` [PULL 30/48] meson: build macOS signed binary as part of the default target Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 32/48] util/cutils: drop qemu_strnlen() in favor of strnlen() Philippe Mathieu-Daudé ` (17 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel From: Matt Jacobson <mhjacobson@me.com> 3220b38a8d had the side effect of making the individual target link steps use objc_LINKER on macOS, because `coreaudio.m` became visible to Meson as a source file. (The preexisting presence of `cocoa.m` is masked by the fact that it gets built into libsystem and then extracted back out as an object file.) `configure` correctly passes `$EXTRA_LDFLAGS` to the "C linker" and "C++ linker", but it neglected to do so for the "Objective-C linker". Fix that. Signed-off-by: Matt Jacobson <mhjacobson@me.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-ID: <20260615045547.23422-1-mhjacobson@me.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- configure | 1 + 1 file changed, 1 insertion(+) diff --git a/configure b/configure index d786d3a7c9b..d773c3c46a0 100755 --- a/configure +++ b/configure @@ -1849,6 +1849,7 @@ if test "$skip_meson" = no; then test -n "$objcc" && echo "objc_args = [$(meson_quote $OBJCFLAGS $EXTRA_OBJCFLAGS)]" >> $cross echo "c_link_args = [$(meson_quote $CFLAGS $LDFLAGS $EXTRA_CFLAGS $EXTRA_LDFLAGS)]" >> $cross echo "cpp_link_args = [$(meson_quote $CXXFLAGS $LDFLAGS $EXTRA_CXXFLAGS $EXTRA_LDFLAGS)]" >> $cross + test -n "$objcc" && echo "objc_link_args = [$(meson_quote $OBJCFLAGS $LDFLAGS $EXTRA_OBJCFLAGS $EXTRA_LDFLAGS)]" >> $cross # Only enable by default for git builds and on select OSes echo "# environment defaults, can still be overridden on " >> $cross -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 32/48] util/cutils: drop qemu_strnlen() in favor of strnlen() 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (30 preceding siblings ...) 2026-06-18 12:28 ` [PULL 31/48] configure: honor --extra-ldflags when forced to use objc_LINKER Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 33/48] ui/cocoa: Use qemu_input_map_osx_to_linux Philippe Mathieu-Daudé ` (16 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel From: Bin Guo <guobin@linux.alibaba.com> There are only three call sites, and strnlen() is available on all supported platforms (POSIX.1-2008, Windows via UCRT, MinGW). Remove the hand-rolled wrapper and use the standard function directly. While here, align bsd-user/uaccess.c to use size_t for max_len/len, matching linux-user/uaccess.c and eliminating a signed/unsigned mismatch. Also remove the stale qemu_strnlen() entry from docs/devel/style.rst. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Bin Guo <guobin@linux.alibaba.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-ID: <20260530062816.59206-1-guobin@linux.alibaba.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- docs/devel/style.rst | 1 - include/qemu/cutils.h | 17 +---------------- bsd-user/uaccess.c | 4 ++-- linux-user/uaccess.c | 2 +- util/cutils.c | 15 +-------------- 5 files changed, 5 insertions(+), 34 deletions(-) diff --git a/docs/devel/style.rst b/docs/devel/style.rst index f4da16a0e83..6c5f94cc509 100644 --- a/docs/devel/style.rst +++ b/docs/devel/style.rst @@ -519,7 +519,6 @@ QEMU provides other useful string functions: int strstart(const char *str, const char *val, const char **ptr) int stristart(const char *str, const char *val, const char **ptr) - int qemu_strnlen(const char *s, int max_len) There are also replacement character processing macros for isxyz and toxyz, so instead of e.g. isalnum you should use qemu_isalnum. diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h index 36c68ce86c5..d249f226766 100644 --- a/include/qemu/cutils.h +++ b/include/qemu/cutils.h @@ -101,22 +101,7 @@ int strstart(const char *str, const char *val, const char **ptr); * false otherwise. */ int stristart(const char *str, const char *val, const char **ptr); -/** - * qemu_strnlen: - * @s: string - * @max_len: maximum number of bytes in @s to scan - * - * Return the length of the string @s, like strlen(), but do not - * examine more than @max_len bytes of the memory pointed to by @s. - * If no NUL terminator is found within @max_len bytes, then return - * @max_len instead. - * - * This function has the same behaviour as the POSIX strnlen() - * function. - * - * Returns: length of @s in bytes, or @max_len, whichever is smaller. - */ -int qemu_strnlen(const char *s, int max_len); + /** * qemu_strsep: * @input: pointer to string to parse diff --git a/bsd-user/uaccess.c b/bsd-user/uaccess.c index 89163257f4a..7ad4b580f44 100644 --- a/bsd-user/uaccess.c +++ b/bsd-user/uaccess.c @@ -43,7 +43,7 @@ abi_long target_strlen(abi_ulong guest_addr1) { uint8_t *ptr; abi_ulong guest_addr; - int max_len, len; + size_t max_len, len; guest_addr = guest_addr1; for (;;) { @@ -51,7 +51,7 @@ abi_long target_strlen(abi_ulong guest_addr1) ptr = lock_user(VERIFY_READ, guest_addr, max_len, 1); if (!ptr) return -TARGET_EFAULT; - len = qemu_strnlen((const char *)ptr, max_len); + len = strnlen((const char *)ptr, max_len); unlock_user(ptr, guest_addr, 0); guest_addr += len; /* we don't allow wrapping or integer overflow */ diff --git a/linux-user/uaccess.c b/linux-user/uaccess.c index 27e841e6510..f9bd713edd7 100644 --- a/linux-user/uaccess.c +++ b/linux-user/uaccess.c @@ -99,7 +99,7 @@ ssize_t target_strlen(abi_ulong guest_addr1) ptr = lock_user(VERIFY_READ, guest_addr, max_len, 1); if (!ptr) return -TARGET_EFAULT; - len = qemu_strnlen((const char *)ptr, max_len); + len = strnlen((const char *)ptr, max_len); unlock_user(ptr, guest_addr, 0); guest_addr += len; /* we don't allow wrapping or integer overflow */ diff --git a/util/cutils.c b/util/cutils.c index 76a94420859..96c80d4d429 100644 --- a/util/cutils.c +++ b/util/cutils.c @@ -54,7 +54,7 @@ void strpadcpy(char *buf, int buf_size, const char *str, char pad) { - int len = qemu_strnlen(str, buf_size); + size_t len = strnlen(str, buf_size); memcpy(buf, str, len); memset(buf + len, pad, buf_size - len); } @@ -118,19 +118,6 @@ int stristart(const char *str, const char *val, const char **ptr) return 1; } -/* XXX: use host strnlen if available ? */ -int qemu_strnlen(const char *s, int max_len) -{ - int i; - - for(i = 0; i < max_len; i++) { - if (s[i] == '\0') { - break; - } - } - return i; -} - char *qemu_strsep(char **input, const char *delim) { char *result = *input; -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 33/48] ui/cocoa: Use qemu_input_map_osx_to_linux 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (31 preceding siblings ...) 2026-06-18 12:28 ` [PULL 32/48] util/cutils: drop qemu_strnlen() in favor of strnlen() Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 34/48] exec/cpu-common.h: Include missing 'qemu/thread.h' header Philippe Mathieu-Daudé ` (15 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel From: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> ui/cocoa used to have a conversion table from macOS keycode to Linux key code. It is an unnecessary redundancy as ui/input-keymap.c already has such a table. Worse, I added an incorrect mapping of kVK_JIS_Eisu and kVK_JIS_Kana with commit 708b72557ff5 ("ui/cocoa: Support unique keys of JIS keyboards"). According to the following documentations, the definitions in ui/keycodemapdb/keymaps.csv, which ui/input-keymap.c uses, are correct: https://developer.apple.com/documentation/uikit/uikeyboardhidusage/uikeyboardhidusagekeyboardlang1?language=objc https://developer.apple.com/documentation/uikit/uikeyboardhidusage/uikeyboardhidusagekeyboardlang2?language=objc https://docs.microsoft.com/en-us/windows-hardware/design/component-guidelines/keyboard-japan-ime Use qemu_input_map_osx_to_linux to eliminate the redundancy and incorrect mappings. Fixes: 708b72557ff5 ("ui/cocoa: Support unique keys of JIS keyboards") Signed-off-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Reviewed-by: Philippe Mathieu-Daudé <philmd@mailo.com> Message-ID: <20260604-osx-v3-1-453b4ee0e072@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- ui/cocoa.m | 131 ++--------------------------------------------------- 1 file changed, 3 insertions(+), 128 deletions(-) diff --git a/ui/cocoa.m b/ui/cocoa.m index c5e639ab98d..e157ad01d85 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -141,138 +141,13 @@ static bool bool_with_bql(BoolCodeBlock block) return val; } -// Mac to Linux conversion -static const unsigned int mac_to_linux_map[] = { - [kVK_ANSI_A] = KEY_A, - [kVK_ANSI_B] = KEY_B, - [kVK_ANSI_C] = KEY_C, - [kVK_ANSI_D] = KEY_D, - [kVK_ANSI_E] = KEY_E, - [kVK_ANSI_F] = KEY_F, - [kVK_ANSI_G] = KEY_G, - [kVK_ANSI_H] = KEY_H, - [kVK_ANSI_I] = KEY_I, - [kVK_ANSI_J] = KEY_J, - [kVK_ANSI_K] = KEY_K, - [kVK_ANSI_L] = KEY_L, - [kVK_ANSI_M] = KEY_M, - [kVK_ANSI_N] = KEY_N, - [kVK_ANSI_O] = KEY_O, - [kVK_ANSI_P] = KEY_P, - [kVK_ANSI_Q] = KEY_Q, - [kVK_ANSI_R] = KEY_R, - [kVK_ANSI_S] = KEY_S, - [kVK_ANSI_T] = KEY_T, - [kVK_ANSI_U] = KEY_U, - [kVK_ANSI_V] = KEY_V, - [kVK_ANSI_W] = KEY_W, - [kVK_ANSI_X] = KEY_X, - [kVK_ANSI_Y] = KEY_Y, - [kVK_ANSI_Z] = KEY_Z, - - [kVK_ANSI_0] = KEY_0, - [kVK_ANSI_1] = KEY_1, - [kVK_ANSI_2] = KEY_2, - [kVK_ANSI_3] = KEY_3, - [kVK_ANSI_4] = KEY_4, - [kVK_ANSI_5] = KEY_5, - [kVK_ANSI_6] = KEY_6, - [kVK_ANSI_7] = KEY_7, - [kVK_ANSI_8] = KEY_8, - [kVK_ANSI_9] = KEY_9, - - [kVK_ANSI_Grave] = KEY_GRAVE, - [kVK_ANSI_Minus] = KEY_MINUS, - [kVK_ANSI_Equal] = KEY_EQUAL, - [kVK_Delete] = KEY_BACKSPACE, - [kVK_CapsLock] = KEY_CAPSLOCK, - [kVK_Tab] = KEY_TAB, - [kVK_Return] = KEY_ENTER, - [kVK_ANSI_LeftBracket] = KEY_LEFTBRACE, - [kVK_ANSI_RightBracket] = KEY_RIGHTBRACE, - [kVK_ANSI_Backslash] = KEY_BACKSLASH, - [kVK_ANSI_Semicolon] = KEY_SEMICOLON, - [kVK_ANSI_Quote] = KEY_APOSTROPHE, - [kVK_ANSI_Comma] = KEY_COMMA, - [kVK_ANSI_Period] = KEY_DOT, - [kVK_ANSI_Slash] = KEY_SLASH, - [kVK_Space] = KEY_SPACE, - - [kVK_ANSI_Keypad0] = KEY_KP0, - [kVK_ANSI_Keypad1] = KEY_KP1, - [kVK_ANSI_Keypad2] = KEY_KP2, - [kVK_ANSI_Keypad3] = KEY_KP3, - [kVK_ANSI_Keypad4] = KEY_KP4, - [kVK_ANSI_Keypad5] = KEY_KP5, - [kVK_ANSI_Keypad6] = KEY_KP6, - [kVK_ANSI_Keypad7] = KEY_KP7, - [kVK_ANSI_Keypad8] = KEY_KP8, - [kVK_ANSI_Keypad9] = KEY_KP9, - [kVK_ANSI_KeypadDecimal] = KEY_KPDOT, - [kVK_ANSI_KeypadEnter] = KEY_KPENTER, - [kVK_ANSI_KeypadPlus] = KEY_KPPLUS, - [kVK_ANSI_KeypadMinus] = KEY_KPMINUS, - [kVK_ANSI_KeypadMultiply] = KEY_KPASTERISK, - [kVK_ANSI_KeypadDivide] = KEY_KPSLASH, - [kVK_ANSI_KeypadEquals] = KEY_KPEQUAL, - [kVK_ANSI_KeypadClear] = KEY_NUMLOCK, - - [kVK_UpArrow] = KEY_UP, - [kVK_DownArrow] = KEY_DOWN, - [kVK_LeftArrow] = KEY_LEFT, - [kVK_RightArrow] = KEY_RIGHT, - - [kVK_Help] = KEY_INSERT, - [kVK_Home] = KEY_HOME, - [kVK_PageUp] = KEY_PAGEUP, - [kVK_PageDown] = KEY_PAGEDOWN, - [kVK_End] = KEY_END, - [kVK_ForwardDelete] = KEY_DELETE, - - [kVK_Escape] = KEY_ESC, - - /* The Power key can't be used directly because the operating system uses - * it. This key can be emulated by using it in place of another key such as - * F1. Don't forget to disable the real key binding. - */ - /* [kVK_F1] = KEY_POWER, */ - - [kVK_F1] = KEY_F1, - [kVK_F2] = KEY_F2, - [kVK_F3] = KEY_F3, - [kVK_F4] = KEY_F4, - [kVK_F5] = KEY_F5, - [kVK_F6] = KEY_F6, - [kVK_F7] = KEY_F7, - [kVK_F8] = KEY_F8, - [kVK_F9] = KEY_F9, - [kVK_F10] = KEY_F10, - [kVK_F11] = KEY_F11, - [kVK_F12] = KEY_F12, - [kVK_F13] = KEY_SYSRQ, - [kVK_F14] = KEY_SCROLLLOCK, - [kVK_F15] = KEY_PAUSE, - - // JIS keyboards only - [kVK_JIS_Yen] = KEY_YEN, - [kVK_JIS_Underscore] = KEY_RO, - [kVK_JIS_KeypadComma] = KEY_KPCOMMA, - [kVK_JIS_Eisu] = KEY_MUHENKAN, - [kVK_JIS_Kana] = KEY_HENKAN, - - /* - * The eject and volume keys can't be used here because they are handled at - * a lower level than what an Application can see. - */ -}; - -static unsigned int cocoa_keycode_to_linux(int keycode) +static int cocoa_keycode_to_linux(int keycode) { - if (ARRAY_SIZE(mac_to_linux_map) <= keycode) { + if (qemu_input_map_osx_to_linux_len <= keycode) { error_report("(cocoa) warning unknown keycode 0x%x", keycode); return 0; } - return mac_to_linux_map[keycode]; + return qemu_input_map_osx_to_linux[keycode]; } /* Displays an alert dialog box with the specified message */ -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 34/48] exec/cpu-common.h: Include missing 'qemu/thread.h' header 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (32 preceding siblings ...) 2026-06-18 12:28 ` [PULL 33/48] ui/cocoa: Use qemu_input_map_osx_to_linux Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 35/48] exec/cpu-common.h: Avoid including unused 'exec/vaddr.h' header Philippe Mathieu-Daudé ` (14 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Unfortunately we need to include "qemu/thread.h" -- which is currently indirectly pulled in -- to get the QemuMutex type definition: extern QemuMutex qemu_cpu_list_lock; Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617160426.64461-3-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 74337d84640..8cddd32ca8b 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -8,6 +8,7 @@ #ifndef CPU_COMMON_H #define CPU_COMMON_H +#include "qemu/thread.h" #include "exec/vaddr.h" #include "hw/core/cpu.h" #include "tcg/debug-assert.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 35/48] exec/cpu-common.h: Avoid including unused 'exec/vaddr.h' header 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (33 preceding siblings ...) 2026-06-18 12:28 ` [PULL 34/48] exec/cpu-common.h: Include missing 'qemu/thread.h' header Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 36/48] exec/cpu-common.h: Avoid including unused 'tcg/debug-assert.h' header Philippe Mathieu-Daudé ` (13 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel We neglected to remove the "exec/vaddr.h" header when moving cpu_memory_rw_debug() around in commit e9048f099b3 ("exec/cpu: Declare cpu_memory_rw_debug() in 'hw/core/cpu.h' and document"). Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617160426.64461-4-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 8cddd32ca8b..7dc8cab3263 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -9,7 +9,6 @@ #define CPU_COMMON_H #include "qemu/thread.h" -#include "exec/vaddr.h" #include "hw/core/cpu.h" #include "tcg/debug-assert.h" #include "exec/page-protection.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 36/48] exec/cpu-common.h: Avoid including unused 'tcg/debug-assert.h' header 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (34 preceding siblings ...) 2026-06-18 12:28 ` [PULL 35/48] exec/cpu-common.h: Avoid including unused 'exec/vaddr.h' header Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 37/48] exec/cpu-common.h: Avoid including unused exec/page-protection.h header Philippe Mathieu-Daudé ` (12 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Since commit efe25c260cd ("include/exec: Split out accel/tcg/cpu-mmu-index.h") the "exec/cpu-common.h" isn't using anything defined in "tcg/debug-assert.h". Include it in target/loongarch/tcg/tcg_cpu.c however, where it is required but included indirectly, otherwise we'd get: target/loongarch/tcg/tcg_cpu.c:291:5: error: call to undeclared function 'tcg_debug_assert' 291 | tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617160426.64461-5-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 1 - target/loongarch/tcg/tcg_cpu.c | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 7dc8cab3263..d1a04025363 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -10,7 +10,6 @@ #include "qemu/thread.h" #include "hw/core/cpu.h" -#include "tcg/debug-assert.h" #include "exec/page-protection.h" #define EXCP_INTERRUPT 0x10000 /* async interruption */ diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c index f556234d9d2..83291c22c2a 100644 --- a/target/loongarch/tcg/tcg_cpu.c +++ b/target/loongarch/tcg/tcg_cpu.c @@ -13,6 +13,7 @@ #include "accel/tcg/cpu-ops.h" #include "exec/translation-block.h" #include "exec/target_page.h" +#include "tcg/debug-assert.h" #include "tcg_loongarch.h" #include "internals.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 37/48] exec/cpu-common.h: Avoid including unused exec/page-protection.h header 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (35 preceding siblings ...) 2026-06-18 12:28 ` [PULL 36/48] exec/cpu-common.h: Avoid including unused 'tcg/debug-assert.h' header Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 38/48] system/memory: Remove unnecessary CONFIG_USER_ONLY guards Philippe Mathieu-Daudé ` (11 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Since commit e74781c0888e ("exec/cpu: Extract page-protection definitions to page-protection.h") the "exec/cpu-common.h" isn't using anything defined in "exec/page-protection.h"; remove it. Include it in few files where it is currently pulled in indirectly, otherwise we'd get: linux-user/qemu.h:182:22: error: ‘PAGE_READ’ undeclared 182 | #define VERIFY_READ PAGE_READ | ^~~~~~~~~ target/loongarch/cpu_helper.c:329:25: error: use of undeclared identifier 'PAGE_READ' 329 | context->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; | ^ target/loongarch/cpu_helper.c:329:37: error: use of undeclared identifier 'PAGE_WRITE' 329 | context->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; | ^ target/loongarch/cpu_helper.c:329:50: error: use of undeclared identifier 'PAGE_EXEC' 329 | context->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; | ^ target/ppc/mmu-hash32.h:98:20: error: use of undeclared identifier 'PAGE_READ' 98 | prot = PAGE_READ | PAGE_WRITE; | ^ target/ppc/mmu-hash32.h:98:32: error: use of undeclared identifier 'PAGE_WRITE' 98 | prot = PAGE_READ | PAGE_WRITE; | ^ hw/ppc/ppc_booke.c:39:17: error: use of undeclared identifier 'PAGE_RWX' 39 | tlb->prot = PAGE_RWX << 4 | PAGE_VALID; | ^ hw/ppc/ppc_booke.c:39:33: error: use of undeclared identifier 'PAGE_VALID' 39 | tlb->prot = PAGE_RWX << 4 | PAGE_VALID; | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617160426.64461-6-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 1 - linux-user/qemu.h | 1 + target/ppc/mmu-hash32.h | 1 + hw/ppc/ppc_booke.c | 1 + linux-user/arm/elfload.c | 1 + linux-user/hppa/elfload.c | 1 + linux-user/x86_64/elfload.c | 1 + target/arm/tcg/cpregs-at.c | 1 + target/loongarch/cpu_helper.c | 1 + target/ppc/cpu_init.c | 1 + 10 files changed, 9 insertions(+), 1 deletion(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index d1a04025363..7eb45a95b6c 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -10,7 +10,6 @@ #include "qemu/thread.h" #include "hw/core/cpu.h" -#include "exec/page-protection.h" #define EXCP_INTERRUPT 0x10000 /* async interruption */ #define EXCP_HLT 0x10001 /* hlt instruction reached */ diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 07fe8016282..fc5d7973021 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -6,6 +6,7 @@ #include "user/abitypes.h" #include "user/page-protection.h" +#include "exec/page-protection.h" #include "syscall_defs.h" #include "target_syscall.h" diff --git a/target/ppc/mmu-hash32.h b/target/ppc/mmu-hash32.h index bfea03ea872..c6e2c60db19 100644 --- a/target/ppc/mmu-hash32.h +++ b/target/ppc/mmu-hash32.h @@ -3,6 +3,7 @@ #ifndef CONFIG_USER_ONLY +#include "exec/page-protection.h" #include "system/memory.h" bool ppc_hash32_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type, diff --git a/hw/ppc/ppc_booke.c b/hw/ppc/ppc_booke.c index 052c8c931ae..6f0cad1c752 100644 --- a/hw/ppc/ppc_booke.c +++ b/hw/ppc/ppc_booke.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "target/ppc/cpu.h" +#include "exec/page-protection.h" #include "exec/target_page.h" #include "hw/ppc/ppc.h" #include "qemu/timer.h" diff --git a/linux-user/arm/elfload.c b/linux-user/arm/elfload.c index fef61022a3d..13b589ea2c5 100644 --- a/linux-user/arm/elfload.c +++ b/linux-user/arm/elfload.c @@ -2,6 +2,7 @@ #include "qemu/osdep.h" #include "qemu.h" +#include "exec/page-protection.h" #include "loader.h" #include "user-internals.h" #include "target_elf.h" diff --git a/linux-user/hppa/elfload.c b/linux-user/hppa/elfload.c index 3354e1b840d..2ebb9924f19 100644 --- a/linux-user/hppa/elfload.c +++ b/linux-user/hppa/elfload.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include "qemu/osdep.h" +#include "exec/page-protection.h" #include "qemu.h" #include "loader.h" #include "target_elf.h" diff --git a/linux-user/x86_64/elfload.c b/linux-user/x86_64/elfload.c index 5914f76e833..49a6f6180e0 100644 --- a/linux-user/x86_64/elfload.c +++ b/linux-user/x86_64/elfload.c @@ -2,6 +2,7 @@ #include "qemu/osdep.h" #include "qemu/error-report.h" +#include "exec/page-protection.h" #include "qemu.h" #include "loader.h" #include "target_elf.h" diff --git a/target/arm/tcg/cpregs-at.c b/target/arm/tcg/cpregs-at.c index 1c819c1cdb2..d6d5b73430a 100644 --- a/target/arm/tcg/cpregs-at.c +++ b/target/arm/tcg/cpregs-at.c @@ -4,6 +4,7 @@ */ #include "qemu/osdep.h" +#include "exec/page-protection.h" #include "cpu.h" #include "cpu-features.h" #include "internals.h" diff --git a/target/loongarch/cpu_helper.c b/target/loongarch/cpu_helper.c index 7f0e64a8739..123cad3d930 100644 --- a/target/loongarch/cpu_helper.c +++ b/target/loongarch/cpu_helper.c @@ -11,6 +11,7 @@ #include "system/tcg.h" #include "cpu.h" #include "accel/tcg/cpu-mmu-index.h" +#include "exec/page-protection.h" #include "exec/target_page.h" #include "internals.h" #include "cpu-csr.h" diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index d25f69f13ba..a02187ce5af 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -40,6 +40,7 @@ #include "qemu/cutils.h" #include "disas/capstone.h" #include "fpu/softfloat.h" +#include "exec/page-protection.h" #include "exec/watchpoint.h" #include "helper_regs.h" #include "internal.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 38/48] system/memory: Remove unnecessary CONFIG_USER_ONLY guards 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (36 preceding siblings ...) 2026-06-18 12:28 ` [PULL 37/48] exec/cpu-common.h: Avoid including unused exec/page-protection.h header Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 39/48] system/memory: Rename cpu_exec_init_all() -> machine_memory_init() Philippe Mathieu-Daudé ` (10 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel This header is only used when building system units, checking for CONFIG_USER_ONLY is pointless. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616153754.93545-2-philmd@oss.qualcomm.com> --- system/memory-internal.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/system/memory-internal.h b/system/memory-internal.h index 0066ffdffb6..c7573a68b5e 100644 --- a/system/memory-internal.h +++ b/system/memory-internal.h @@ -14,7 +14,6 @@ #ifndef MEMORY_INTERNAL_H #define MEMORY_INTERNAL_H -#ifndef CONFIG_USER_ONLY static inline AddressSpaceDispatch *flatview_to_dispatch(FlatView *fv) { return fv->dispatch; @@ -57,4 +56,3 @@ static inline MemOp devend_memop(enum device_endian end) } #endif -#endif -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 39/48] system/memory: Rename cpu_exec_init_all() -> machine_memory_init() 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (37 preceding siblings ...) 2026-06-18 12:28 ` [PULL 38/48] system/memory: Remove unnecessary CONFIG_USER_ONLY guards Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 40/48] hw/s390x/ipl: Remove TCG dependency in handle_diag_308() Philippe Mathieu-Daudé ` (9 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel cpu_exec_init_all() is system specific: it initializes globals for the memory subsystem. Rename it as machine_memory_init() and restrict its declaration to 'system/' namespace. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616153754.93545-3-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 1 - system/memory-internal.h | 2 ++ system/physmem.c | 2 +- system/vl.c | 3 ++- 4 files changed, 5 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 7eb45a95b6c..a781dba770b 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -18,7 +18,6 @@ #define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another */ #define EXCP_ATOMIC 0x10005 /* stop-the-world and emulate atomic */ -void cpu_exec_init_all(void); void cpu_exec_step_atomic(CPUState *cpu); #define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size()) diff --git a/system/memory-internal.h b/system/memory-internal.h index c7573a68b5e..b2b9b5b0c5e 100644 --- a/system/memory-internal.h +++ b/system/memory-internal.h @@ -14,6 +14,8 @@ #ifndef MEMORY_INTERNAL_H #define MEMORY_INTERNAL_H +void machine_memory_init(void); + static inline AddressSpaceDispatch *flatview_to_dispatch(FlatView *fv) { return fv->dispatch; diff --git a/system/physmem.c b/system/physmem.c index 883ac0f314b..9e5b50c5b1c 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3592,7 +3592,7 @@ void address_space_register_map_client(AddressSpace *as, QEMUBH *bh) } } -void cpu_exec_init_all(void) +void machine_memory_init(void) { qemu_mutex_init(&ram_list.mutex); /* The data structures we set up here depend on knowing the page size, diff --git a/system/vl.c b/system/vl.c index dbdd4f22572..1c0da7df293 100644 --- a/system/vl.c +++ b/system/vl.c @@ -143,6 +143,7 @@ #include "system/iothread.h" #include "qemu/guest-random.h" #include "qemu/keyval.h" +#include "memory-internal.h" #define MAX_VIRTIO_CONSOLES 1 @@ -2217,7 +2218,7 @@ static void qemu_create_machine(QDict *qdict) } } - cpu_exec_init_all(); + machine_memory_init(); /* * Get the default machine options from the machine if it is not already -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 40/48] hw/s390x/ipl: Remove TCG dependency in handle_diag_308() 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (38 preceding siblings ...) 2026-06-18 12:28 ` [PULL 39/48] system/memory: Rename cpu_exec_init_all() -> machine_memory_init() Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 41/48] accel/tcg: Remove cpu_loop_exit() stub Philippe Mathieu-Daudé ` (8 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Rather than calling a TCG specific method in s390_ipl_reset_request(), have handle_diag_308() return whether a vCPU reset is pending, and use that in the TCG DIAG helper to return to the main loop. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jared Rossi <jrossi@linux.ibm.com> Message-Id: <20260617164035.70788-4-philmd@oss.qualcomm.com> --- target/s390x/s390x-internal.h | 3 ++- hw/s390x/ipl.c | 5 ----- target/s390x/diag.c | 32 ++++++++++++++++---------------- target/s390x/tcg/misc_helper.c | 5 ++++- 4 files changed, 22 insertions(+), 23 deletions(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index e7e4f2b45d4..35d1e34ef4d 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -385,7 +385,8 @@ int mmu_translate_real(CPUS390XState *env, hwaddr raddr, int rw, /* misc_helper.c */ int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3); -void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, +/* Return whether a CPU reset is pending */ +bool handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra); diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index fa50749a7d3..4cca21c6217 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -18,7 +18,6 @@ #include "system/physmem.h" #include "system/reset.h" #include "system/runstate.h" -#include "system/tcg.h" #include "elf.h" #include "hw/core/loader.h" #include "hw/core/qdev-properties.h" @@ -690,10 +689,6 @@ void s390_ipl_reset_request(CPUState *cs, enum s390_reset reset_type) } else { qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); } - /* as this is triggered by a CPU, make sure to exit the loop */ - if (tcg_enabled()) { - cpu_loop_exit(cs); - } } void s390_ipl_get_reset_request(CPUState **cs, enum s390_reset *reset_type) diff --git a/target/s390x/diag.c b/target/s390x/diag.c index 01cc802eaed..80f09584789 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -95,7 +95,7 @@ static void s390_ipl_write(CPUS390XState *env, uint64_t addr, } } -void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) +bool handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) { bool valid; CPUState *cs = env_cpu(env); @@ -105,34 +105,34 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) if (env->psw.mask & PSW_MASK_PSTATE) { s390_program_interrupt(env, PGM_PRIVILEGED, ra); - return; + return false; } if (subcode & ~0x0ffffULL) { s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return; + return false; } if (subcode >= DIAG308_PV_SET && !s390_has_feat(S390_FEAT_UNPACK)) { s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return; + return false; } switch (subcode) { case DIAG308_RESET_MOD_CLR: s390_ipl_reset_request(cs, S390_RESET_MODIFIED_CLEAR); - break; + return true; case DIAG308_RESET_LOAD_NORM: s390_ipl_reset_request(cs, S390_RESET_LOAD_NORMAL); - break; + return true; case DIAG308_LOAD_CLEAR: /* Well we still lack the clearing bit... */ s390_ipl_reset_request(cs, S390_RESET_REIPL); - break; + return true; case DIAG308_SET: case DIAG308_PV_SET: if (diag308_parm_check(env, r1, addr, ra, false)) { - return; + return false; } iplb = g_new0(IplParameterBlock, 1); s390_ipl_read(env, addr, iplb, sizeof(iplb->len)); @@ -159,11 +159,11 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) env->regs[r1 + 1] = DIAG_308_RC_OK; out: g_free(iplb); - return; + return false; case DIAG308_STORE: case DIAG308_PV_STORE: if (diag308_parm_check(env, r1, addr, ra, true)) { - return; + return false; } if (subcode == DIAG308_PV_STORE) { iplb = s390_ipl_get_iplb_pv(); @@ -172,30 +172,30 @@ out: } if (!iplb) { env->regs[r1 + 1] = DIAG_308_RC_NO_CONF; - return; + return false; } s390_ipl_write(env, addr, iplb, be32_to_cpu(iplb->len)); env->regs[r1 + 1] = DIAG_308_RC_OK; - return; + return false; case DIAG308_PV_START: iplb = s390_ipl_get_iplb_pv(); if (!iplb) { env->regs[r1 + 1] = DIAG_308_RC_NO_PV_CONF; - return; + return false; } if (kvm_enabled() && kvm_s390_get_hpage_1m()) { error_report("Protected VMs can currently not be backed with " "huge pages"); env->regs[r1 + 1] = DIAG_308_RC_INVAL_FOR_PV; - return; + return false; } s390_ipl_reset_request(cs, S390_RESET_PV); - break; + return true; default: s390_program_interrupt(env, PGM_SPECIFICATION, ra); - break; + return false; } } diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c index 3d13c8bd8ea..036be93fb32 100644 --- a/target/s390x/tcg/misc_helper.c +++ b/target/s390x/tcg/misc_helper.c @@ -135,7 +135,10 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num) case 0x308: /* ipl */ bql_lock(); - handle_diag_308(env, r1, r3, GETPC()); + if (handle_diag_308(env, r1, r3, GETPC())) { + /* As reset is triggered by the CPU, make sure to exit the loop */ + cpu_loop_exit(CPU(env_archcpu(env))); + } bql_unlock(); r = 0; break; -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 41/48] accel/tcg: Remove cpu_loop_exit() stub 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (39 preceding siblings ...) 2026-06-18 12:28 ` [PULL 40/48] hw/s390x/ipl: Remove TCG dependency in handle_diag_308() Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 42/48] accel/tcg: Move cpu_exec() out of 'exec/cpu-common.h' Philippe Mathieu-Daudé ` (7 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Last commit removed the last non-TCG use of cpu_loop_exit(). This method is now only called within TCG files, so we can remove its stub for non-TCG accelerators. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617171438.75914-4-philmd@oss.qualcomm.com> --- accel/stubs/tcg-stub.c | 19 ------------------- accel/stubs/meson.build | 1 - 2 files changed, 20 deletions(-) delete mode 100644 accel/stubs/tcg-stub.c diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c deleted file mode 100644 index 77055e39644..00000000000 --- a/accel/stubs/tcg-stub.c +++ /dev/null @@ -1,19 +0,0 @@ -/* - * QEMU TCG accelerator stub - * - * Copyright Red Hat, Inc. 2013 - * - * Author: Paolo Bonzini <pbonzini@redhat.com> - * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - * - */ - -#include "qemu/osdep.h" -#include "exec/cpu-common.h" - -G_NORETURN void cpu_loop_exit(CPUState *cpu) -{ - g_assert_not_reached(); -} diff --git a/accel/stubs/meson.build b/accel/stubs/meson.build index ccad583e647..7c6d7ad9432 100644 --- a/accel/stubs/meson.build +++ b/accel/stubs/meson.build @@ -4,7 +4,6 @@ stub_ss.add(files( 'nitro-stub.c', 'mshv-stub.c', 'nvmm-stub.c', - 'tcg-stub.c', 'whpx-stub.c', 'xen-stub.c', )) -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 42/48] accel/tcg: Move cpu_exec() out of 'exec/cpu-common.h' 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (40 preceding siblings ...) 2026-06-18 12:28 ` [PULL 41/48] accel/tcg: Remove cpu_loop_exit() stub Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 43/48] accel/tcg: Move cpu_exec_step_atomic() " Philippe Mathieu-Daudé ` (6 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel In order to keep TCG-specific functions under a TCG API namespace, add the "accel/tcg/cpu-loop.h" header and move cpu_exec() declaration to it. Add a bit of documentation. Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617171438.75914-5-philmd@oss.qualcomm.com> --- bsd-user/freebsd/os-proc.h | 1 + include/accel/tcg/cpu-loop.h | 21 +++++++++++++++++++++ include/exec/cpu-common.h | 3 --- include/user/cpu_loop.h | 2 +- accel/tcg/cpu-exec.c | 1 + accel/tcg/tcg-accel-ops.c | 1 + bsd-user/main.c | 1 + 7 files changed, 26 insertions(+), 4 deletions(-) create mode 100644 include/accel/tcg/cpu-loop.h diff --git a/bsd-user/freebsd/os-proc.h b/bsd-user/freebsd/os-proc.h index 72ccf23e17e..1cf3c43de34 100644 --- a/bsd-user/freebsd/os-proc.h +++ b/bsd-user/freebsd/os-proc.h @@ -14,6 +14,7 @@ #include <sys/procdesc.h> #include <sys/wait.h> +#include "accel/tcg/cpu-loop.h" #include "target_arch_cpu.h" pid_t safe_wait4(pid_t wpid, int *status, int options, struct rusage *rusage); diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h new file mode 100644 index 00000000000..6a3c8ed48b2 --- /dev/null +++ b/include/accel/tcg/cpu-loop.h @@ -0,0 +1,21 @@ +/* + * QEMU TCG CPU loop API + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef ACCEL_TCG_CPU_LOOP_COMMON_H +#define ACCEL_TCG_CPU_LOOP_COMMON_H + +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + +/** + * cpu_exec: + * @cpu: the cpu context + * + * Returns one of the EXCP_* definitions (see "exec/cpu-common.h"). + */ +int cpu_exec(CPUState *cpu); + +#endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index a781dba770b..09915dc4c44 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -111,9 +111,6 @@ G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); #endif /* CONFIG_TCG */ G_NORETURN void cpu_loop_exit(CPUState *cpu); -/* accel/tcg/cpu-exec.c */ -int cpu_exec(CPUState *cpu); - /** * env_archcpu(env) * @env: The architecture environment diff --git a/include/user/cpu_loop.h b/include/user/cpu_loop.h index 346e37ede8b..c9d49398f01 100644 --- a/include/user/cpu_loop.h +++ b/include/user/cpu_loop.h @@ -22,7 +22,7 @@ #include "exec/vaddr.h" #include "exec/mmu-access-type.h" - +#include "accel/tcg/cpu-loop.h" /** * adjust_signal_pc: diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 7292ff15060..9c754b03656 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -22,6 +22,7 @@ #include "qapi/error.h" #include "qapi/type-helpers.h" #include "hw/core/cpu.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "accel/tcg/helper-retaddr.h" #include "trace.h" diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 3bd98005042..c179cd4adeb 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -28,6 +28,7 @@ #include "qemu/osdep.h" #include "accel/accel-ops.h" #include "accel/accel-cpu-ops.h" +#include "accel/tcg/cpu-loop.h" #include "system/tcg.h" #include "system/replay.h" #include "exec/icount.h" diff --git a/bsd-user/main.c b/bsd-user/main.c index 73aae8c3274..4f1544342eb 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -39,6 +39,7 @@ #include "user/guest-base.h" #include "user/page-protection.h" #include "accel/accel-ops.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/startup.h" #include "qemu/timer.h" #include "qemu/envlist.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 43/48] accel/tcg: Move cpu_exec_step_atomic() out of 'exec/cpu-common.h' 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (41 preceding siblings ...) 2026-06-18 12:28 ` [PULL 42/48] accel/tcg: Move cpu_exec() out of 'exec/cpu-common.h' Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 44/48] accel/tcg: Move cpu_unwind_state_data() " Philippe Mathieu-Daudé ` (5 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Move the TCG-specific cpu_exec_step_atomic() declaration out of the generic "exec/cpu-common.h" header, to the recently created "accel/tcg/cpu-loop.h" one. Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617171438.75914-6-philmd@oss.qualcomm.com> --- include/accel/tcg/cpu-loop.h | 2 ++ include/exec/cpu-common.h | 2 -- accel/tcg/tcg-accel-ops-mttcg.c | 1 + accel/tcg/tcg-accel-ops-rr.c | 1 + 4 files changed, 4 insertions(+), 2 deletions(-) diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h index 6a3c8ed48b2..94e91eb9a36 100644 --- a/include/accel/tcg/cpu-loop.h +++ b/include/accel/tcg/cpu-loop.h @@ -18,4 +18,6 @@ */ int cpu_exec(CPUState *cpu); +void cpu_exec_step_atomic(CPUState *cpu); + #endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 09915dc4c44..a97bb6faf42 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -18,8 +18,6 @@ #define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another */ #define EXCP_ATOMIC 0x10005 /* stop-the-world and emulate atomic */ -void cpu_exec_step_atomic(CPUState *cpu); - #define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size()) /* The CPU list lock nests outside page_(un)lock or mmap_(un)lock */ diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttcg.c index 4160e2ba947..69560fdb9d8 100644 --- a/accel/tcg/tcg-accel-ops-mttcg.c +++ b/accel/tcg/tcg-accel-ops-mttcg.c @@ -32,6 +32,7 @@ #include "qemu/notify.h" #include "qemu/guest-random.h" #include "hw/core/boards.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/startup.h" #include "tcg-accel-ops.h" #include "tcg-accel-ops-mttcg.h" diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c index f84342e0449..5b132d3d5d8 100644 --- a/accel/tcg/tcg-accel-ops-rr.c +++ b/accel/tcg/tcg-accel-ops-rr.c @@ -32,6 +32,7 @@ #include "qemu/notify.h" #include "qemu/guest-random.h" #include "exec/cpu-common.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/startup.h" #include "tcg-accel-ops.h" #include "tcg-accel-ops-rr.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 44/48] accel/tcg: Move cpu_unwind_state_data() out of 'exec/cpu-common.h' 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (42 preceding siblings ...) 2026-06-18 12:28 ` [PULL 43/48] accel/tcg: Move cpu_exec_step_atomic() " Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 45/48] accel/tcg: Move cpu_restore_state() " Philippe Mathieu-Daudé ` (4 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Move the TCG-specific cpu_unwind_state_data() declaration out of the generic "exec/cpu-common.h" header, to the recently created "accel/tcg/cpu-loop.h" one. Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617171438.75914-7-philmd@oss.qualcomm.com> --- include/accel/tcg/cpu-loop.h | 13 +++++++++++++ include/exec/cpu-common.h | 13 ------------- accel/tcg/translate-all.c | 1 + target/i386/helper.c | 1 + target/or1k/sys_helper.c | 1 + target/riscv/csr.c | 1 + 6 files changed, 17 insertions(+), 13 deletions(-) diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h index 94e91eb9a36..88333d39200 100644 --- a/include/accel/tcg/cpu-loop.h +++ b/include/accel/tcg/cpu-loop.h @@ -20,4 +20,17 @@ int cpu_exec(CPUState *cpu); void cpu_exec_step_atomic(CPUState *cpu); +/** + * cpu_unwind_state_data: + * @cpu: the cpu context + * @host_pc: the host pc within the translation + * @data: output data + * + * Attempt to load the unwind state for a host pc occurring in + * translated code. If @host_pc is not in translated code, the + * function returns false; otherwise @data is loaded. + * This is the same unwind info as given to restore_state_to_opc. + */ +bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data); + #endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index a97bb6faf42..7c9631efb06 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -61,19 +61,6 @@ void list_cpus(void); #ifdef CONFIG_TCG #include "qemu/atomic.h" -/** - * cpu_unwind_state_data: - * @cpu: the cpu context - * @host_pc: the host pc within the translation - * @data: output data - * - * Attempt to load the unwind state for a host pc occurring in - * translated code. If @host_pc is not in translated code, the - * function returns false; otherwise @data is loaded. - * This is the same unwind info as given to restore_state_to_opc. - */ -bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data); - /** * cpu_restore_state: * @cpu: the cpu context diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 5235c73bc26..3f1a3a28438 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -29,6 +29,7 @@ #include "qemu/target-info.h" #include "exec/log.h" #include "exec/icount.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "tb-jmp-cache.h" #include "tb-hash.h" diff --git a/target/i386/helper.c b/target/i386/helper.c index c3cba04e142..68362141621 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -32,6 +32,7 @@ #endif #include "qemu/log.h" #ifdef CONFIG_TCG +#include "accel/tcg/cpu-loop.h" #include "tcg/insn-start-words.h" #endif diff --git a/target/or1k/sys_helper.c b/target/or1k/sys_helper.c index ca627bd7194..8ffa31b84fd 100644 --- a/target/or1k/sys_helper.c +++ b/target/or1k/sys_helper.c @@ -23,6 +23,7 @@ #include "exec/cputlb.h" #include "exec/target_page.h" #include "exec/helper-proto.h" +#include "accel/tcg/cpu-loop.h" #include "exception.h" #ifndef CONFIG_USER_ONLY #include "hw/core/boards.h" diff --git a/target/riscv/csr.c b/target/riscv/csr.c index ec931a8c3dd..dd9726fcf4c 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -27,6 +27,7 @@ #include "time_helper.h" #include "exec/cputlb.h" #include "exec/icount.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/getpc.h" #include "qemu/guest-random.h" #include "qapi/error.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 45/48] accel/tcg: Move cpu_restore_state() out of 'exec/cpu-common.h' 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (43 preceding siblings ...) 2026-06-18 12:28 ` [PULL 44/48] accel/tcg: Move cpu_unwind_state_data() " Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 46/48] accel/tcg: Have cpu_loop_exit_requested() take const @cpu argument Philippe Mathieu-Daudé ` (3 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Move the TCG-specific cpu_restore_state() declaration out of the generic "exec/cpu-common.h" header, to the recently created "accel/tcg/cpu-loop.h" one. Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617171438.75914-8-philmd@oss.qualcomm.com> --- include/accel/tcg/cpu-loop.h | 12 ++++++++++++ include/exec/cpu-common.h | 12 ------------ accel/tcg/cpu-exec-common.c | 1 + accel/tcg/user-exec.c | 1 + target/alpha/helper.c | 1 + target/alpha/mem_helper.c | 1 + target/arm/tcg/op_helper.c | 1 + target/arm/tcg/tlb_helper.c | 1 + target/hppa/cpu.c | 1 + target/hppa/mem_helper.c | 1 + target/hppa/op_helper.c | 1 + target/i386/tcg/system/svm_helper.c | 1 + target/m68k/op_helper.c | 1 + target/microblaze/helper.c | 1 + target/ppc/tcg-excp_helper.c | 1 + target/s390x/tcg/excp_helper.c | 1 + target/sh4/op_helper.c | 1 + target/tricore/op_helper.c | 1 + target/xtensa/helper.c | 1 + 19 files changed, 29 insertions(+), 12 deletions(-) diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h index 88333d39200..d98a8a2e0cd 100644 --- a/include/accel/tcg/cpu-loop.h +++ b/include/accel/tcg/cpu-loop.h @@ -33,4 +33,16 @@ void cpu_exec_step_atomic(CPUState *cpu); */ bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data); +/** + * cpu_restore_state: + * @cpu: the cpu context + * @host_pc: the host pc within the translation + * @return: true if state was restored, false otherwise + * + * Attempt to restore the state for a fault occurring in translated + * code. If @host_pc is not in translated code no state is + * restored and the function returns false. + */ +bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc); + #endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 7c9631efb06..db67c7bb864 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -61,18 +61,6 @@ void list_cpus(void); #ifdef CONFIG_TCG #include "qemu/atomic.h" -/** - * cpu_restore_state: - * @cpu: the cpu context - * @host_pc: the host pc within the translation - * @return: true if state was restored, false otherwise - * - * Attempt to restore the state for a fault occurring in translated - * code. If @host_pc is not in translated code no state is - * restored and the function returns false. - */ -bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc); - /** * cpu_loop_exit_requested: * @cpu: The CPU state to be tested diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c index c5c513f1e4a..e48ea31373f 100644 --- a/accel/tcg/cpu-exec-common.c +++ b/accel/tcg/cpu-exec-common.c @@ -21,6 +21,7 @@ #include "exec/log.h" #include "system/tcg.h" #include "qemu/plugin.h" +#include "accel/tcg/cpu-loop.h" #include "internal-common.h" bool tcg_allowed; diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index d283d3cc724..7704e4017dd 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -25,6 +25,7 @@ #include "qemu/bitops.h" #include "qemu/rcu.h" #include "accel/tcg/cpu-ldst-common.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/helper-retaddr.h" #include "accel/tcg/probe.h" #include "user/cpu_loop.h" diff --git a/target/alpha/helper.c b/target/alpha/helper.c index 2abf07c1919..c3614ecafda 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -28,6 +28,7 @@ #include "exec/helper-proto.h" #include "qemu/qemu-print.h" #include "system/memory.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/plugin.h" diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c index 572ea9cb418..b3988417e4b 100644 --- a/target/alpha/mem_helper.c +++ b/target/alpha/mem_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" static void do_unaligned_access(CPUAlphaState *env, vaddr addr, uintptr_t retaddr) { diff --git a/target/arm/tcg/op_helper.c b/target/arm/tcg/op_helper.c index 504526153a6..9f9ea39be5a 100644 --- a/target/arm/tcg/op_helper.c +++ b/target/arm/tcg/op_helper.c @@ -23,6 +23,7 @@ #include "helper.h" #include "internals.h" #include "cpu-features.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/probe.h" #include "cpregs.h" diff --git a/target/arm/tcg/tlb_helper.c b/target/arm/tcg/tlb_helper.c index cbef9cb03ef..4c3f16dc2aa 100644 --- a/target/arm/tcg/tlb_helper.c +++ b/target/arm/tcg/tlb_helper.c @@ -8,6 +8,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "helper.h" +#include "accel/tcg/cpu-loop.h" #include "internals.h" #include "cpu-features.h" #include "hw/intc/armv7m_nvic.h" diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 6443122cf1a..a68152f9682 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -29,6 +29,7 @@ #include "fpu/softfloat.h" #include "tcg/tcg.h" #include "hw/hppa/hppa_hardware.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" static void hppa_cpu_set_pc(CPUState *cs, vaddr value) diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index f5076492264..01e6149c811 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/cputlb.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-mmu-index.h" #include "accel/tcg/probe.h" #include "exec/page-protection.h" diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index f961046e4c5..76a8d8a0d34 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/probe.h" #include "qemu/timer.h" #include "trace.h" diff --git a/target/i386/tcg/system/svm_helper.c b/target/i386/tcg/system/svm_helper.c index d5ffabc2f4d..52a234e7fac 100644 --- a/target/i386/tcg/system/svm_helper.c +++ b/target/i386/tcg/system/svm_helper.c @@ -23,6 +23,7 @@ #include "exec/helper-proto.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/helper-tcg.h" /* Secure Virtual Machine helpers */ diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 8148a8852e7..38f7a689814 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "semihosting/semihost.h" #include "qemu/plugin.h" diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index 6a982c18c0f..05a90f5ecb2 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/cputlb.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-mmu-index.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/ppc/tcg-excp_helper.c b/target/ppc/tcg-excp_helper.c index 5e6c1e326d4..b04f07a6377 100644 --- a/target/ppc/tcg-excp_helper.c +++ b/target/ppc/tcg-excp_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "target/ppc/cpu.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "exec/helper-proto.h" #include "system/runstate.h" diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index 05e448d3f20..d952bb20cf1 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -24,6 +24,7 @@ #include "exec/helper-proto.h" #include "exec/cputlb.h" #include "exec/target_page.h" +#include "accel/tcg/cpu-loop.h" #include "s390x-internal.h" #include "tcg_s390x.h" #ifndef CONFIG_USER_ONLY diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index cf0f80e4a54..90c065b217b 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -20,6 +20,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "fpu/softfloat.h" #ifndef CONFIG_USER_ONLY diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c index 3cff5000c73..46b17da2bc6 100644 --- a/target/tricore/op_helper.c +++ b/target/tricore/op_helper.c @@ -19,6 +19,7 @@ #include "qemu/host-utils.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/plugin.h" #include <zlib.h> /* for crc32 */ diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index 2d93b45036d..5a0e8655146 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -32,6 +32,7 @@ #include "exec/target_page.h" #include "gdbstub/helpers.h" #include "exec/helper-proto.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/error-report.h" #include "qemu/qemu-print.h" #include "qemu/host-utils.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 46/48] accel/tcg: Have cpu_loop_exit_requested() take const @cpu argument 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (44 preceding siblings ...) 2026-06-18 12:28 ` [PULL 45/48] accel/tcg: Move cpu_restore_state() " Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 47/48] accel/tcg: Move cpu_loop_exit_*() out of 'exec/cpu-common.h' Philippe Mathieu-Daudé ` (2 subsequent siblings) 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Since the CPUState argument is simply read-only accessed, make it const. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617171438.75914-9-philmd@oss.qualcomm.com> --- include/exec/cpu-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index db67c7bb864..919ba41a013 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -73,7 +73,7 @@ void list_cpus(void); * call can be used to check if it makes sense to return to the main loop * or to continue executing the interruptible instruction. */ -static inline bool cpu_loop_exit_requested(CPUState *cpu) +static inline bool cpu_loop_exit_requested(const CPUState *cpu) { return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0; } -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 47/48] accel/tcg: Move cpu_loop_exit_*() out of 'exec/cpu-common.h' 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (45 preceding siblings ...) 2026-06-18 12:28 ` [PULL 46/48] accel/tcg: Have cpu_loop_exit_requested() take const @cpu argument Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 48/48] accel/tcg: Restrict headers being TCG specific Philippe Mathieu-Daudé 2026-06-18 17:54 ` [PULL 00/48] Accel patches for 2026-06-18 Stefan Hajnoczi 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Move the following TCG-specific cpu_loop_exit_*() declarations out of the generic "exec/cpu-common.h" header, to the recently created "accel/tcg/cpu-loop.h" one, documenting them: - cpu_loop_exit_noexc() - cpu_loop_exit_atomic() - cpu_loop_exit_restore() - cpu_loop_exit() Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617171438.75914-11-philmd@oss.qualcomm.com> --- include/accel/tcg/cpu-loop.h | 28 ++++++++++++++++++++++++++++ include/exec/cpu-common.h | 5 ----- accel/tcg/cputlb.c | 1 + accel/tcg/tb-maint.c | 1 + accel/tcg/tcg-runtime.c | 1 + accel/tcg/watchpoint.c | 1 + hw/misc/mips_itu.c | 1 + plugins/api.c | 1 + semihosting/console.c | 1 + target/arm/tcg/helper-a64.c | 1 + target/avr/helper.c | 1 + target/hexagon/op_helper.c | 1 + target/i386/tcg/excp_helper.c | 1 + target/i386/tcg/misc_helper.c | 1 + target/i386/tcg/system/bpt_helper.c | 1 + target/i386/tcg/system/misc_helper.c | 1 + target/i386/tcg/user/excp_helper.c | 1 + target/i386/tcg/user/seg_helper.c | 1 + target/loongarch/tcg/tcg_cpu.c | 1 + target/loongarch/tcg/tlb_helper.c | 1 + target/m68k/helper.c | 1 + target/microblaze/op_helper.c | 1 + target/mips/tcg/exception.c | 1 + target/mips/tcg/system/tlb_helper.c | 1 + target/or1k/exception.c | 1 + target/or1k/exception_helper.c | 1 + target/or1k/fpu_helper.c | 1 + target/or1k/mmu.c | 1 + target/ppc/user_only_helper.c | 1 + target/riscv/cpu_helper.c | 1 + target/riscv/op_helper.c | 1 + target/rx/op_helper.c | 1 + target/s390x/mmu_helper.c | 3 +++ target/s390x/tcg/cc_helper.c | 1 + target/s390x/tcg/debug.c | 1 + target/s390x/tcg/mem_helper.c | 1 + target/s390x/tcg/misc_helper.c | 1 + target/sh4/helper.c | 1 + target/sparc/helper.c | 1 + target/sparc/mmu_helper.c | 1 + target/tricore/helper.c | 1 + target/xtensa/exc_helper.c | 1 + 42 files changed, 70 insertions(+), 5 deletions(-) diff --git a/include/accel/tcg/cpu-loop.h b/include/accel/tcg/cpu-loop.h index d98a8a2e0cd..f4d38bc2bca 100644 --- a/include/accel/tcg/cpu-loop.h +++ b/include/accel/tcg/cpu-loop.h @@ -45,4 +45,32 @@ bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data); */ bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc); +/** + * cpu_loop_exit_noexc: + * @cpu: the cpu context + * + * Exit the current TB, but without causing any exception to be raised. + */ +G_NORETURN void cpu_loop_exit_noexc(CPUState *cpu); + +/** + * cpu_loop_exit_restore: + * @cpu: the cpu context + * @host_pc: the host pc within the translation + * + * Attempt to restore the state for a fault occurring in translated + * code. If @host_pc is not in translated code no state is + * restored. Finally, exit the current TB. + */ +G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t host_pc); +G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t host_pc); + +/** + * cpu_loop_exit: + * @cpu: the cpu context + * + * Exit the current TB. + */ +G_NORETURN void cpu_loop_exit(CPUState *cpu); + #endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 919ba41a013..6594f7fa1be 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -77,12 +77,7 @@ static inline bool cpu_loop_exit_requested(const CPUState *cpu) { return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0; } - -G_NORETURN void cpu_loop_exit_noexc(CPUState *cpu); -G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc); -G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); #endif /* CONFIG_TCG */ -G_NORETURN void cpu_loop_exit(CPUState *cpu); /** * env_archcpu(env) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index b4239ed5be2..6e66f3c6e93 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "qemu/target-info.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "accel/tcg/iommu.h" #include "accel/tcg/probe.h" diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 7a29a349110..c33dbf65e7f 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -26,6 +26,7 @@ #include "exec/mmap-lock.h" #include "exec/tb-flush.h" #include "exec/target_page.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "tb-internal.h" #include "system/tcg.h" diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index f483c9c2ba2..7c0aab98a80 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -25,6 +25,7 @@ #include "qemu/host-utils.h" #include "exec/cpu-common.h" #include "exec/helper-proto-common.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/getpc.h" #define HELPER_H "accel/tcg/tcg-runtime.h" diff --git a/accel/tcg/watchpoint.c b/accel/tcg/watchpoint.c index cfb37a49e72..c75ed278459 100644 --- a/accel/tcg/watchpoint.c +++ b/accel/tcg/watchpoint.c @@ -25,6 +25,7 @@ #include "exec/translation-block.h" #include "system/tcg.h" #include "system/replay.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "hw/core/cpu.h" #include "internal-common.h" diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c index 82c0a90f704..c20eca28a1e 100644 --- a/hw/misc/mips_itu.c +++ b/hw/misc/mips_itu.c @@ -25,6 +25,7 @@ #include "hw/core/cpu.h" #include "hw/misc/mips_itu.h" #include "hw/core/qdev-properties.h" +#include "accel/tcg/cpu-loop.h" #include "target/mips/cpu.h" #define ITC_TAG_ADDRSPACE_SZ (ITC_ADDRESSMAP_NUM * 8) diff --git a/plugins/api.c b/plugins/api.c index 0038da6d706..eb982f9aad7 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -40,6 +40,7 @@ #include "qemu/plugin.h" #include "qemu/log.h" #include "system/memory.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/tcg.h" #include "exec/cpu-common.h" #include "exec/gdbstub.h" diff --git a/semihosting/console.c b/semihosting/console.c index a4db8d8e76d..91e5d50d502 100644 --- a/semihosting/console.c +++ b/semihosting/console.c @@ -18,6 +18,7 @@ #include "qemu/osdep.h" #include "semihosting/semihost.h" #include "semihosting/console.h" +#include "accel/tcg/cpu-loop.h" #include "exec/cpu-common.h" #include "exec/gdbstub.h" #include "qemu/log.h" diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c index a0f9215f1c9..05ab9ab6d31 100644 --- a/target/arm/tcg/helper-a64.c +++ b/target/arm/tcg/helper-a64.c @@ -31,6 +31,7 @@ #include "qemu/crc32c.h" #include "exec/cpu-common.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/helper-retaddr.h" #include "accel/tcg/probe.h" #include "exec/target_page.h" diff --git a/target/avr/helper.c b/target/avr/helper.c index f3be8483b27..f452c9d9040 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -23,6 +23,7 @@ #include "qemu/error-report.h" #include "cpu.h" #include "accel/tcg/cpu-ops.h" +#include "accel/tcg/cpu-loop.h" #include "exec/cputlb.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 368391bb846..0a946433644 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -18,6 +18,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/probe.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" diff --git a/target/i386/tcg/excp_helper.c b/target/i386/tcg/excp_helper.c index 32f2784e923..1eaa602c91d 100644 --- a/target/i386/tcg/excp_helper.c +++ b/target/i386/tcg/excp_helper.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "qemu/log.h" #include "system/runstate.h" diff --git a/target/i386/tcg/misc_helper.c b/target/i386/tcg/misc_helper.c index 2b5f092a23f..f7342871ded 100644 --- a/target/i386/tcg/misc_helper.c +++ b/target/i386/tcg/misc_helper.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "exec/cputlb.h" diff --git a/target/i386/tcg/system/bpt_helper.c b/target/i386/tcg/system/bpt_helper.c index aebb5caac37..2feea69c8a1 100644 --- a/target/i386/tcg/system/bpt_helper.c +++ b/target/i386/tcg/system/bpt_helper.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "exec/watchpoint.h" diff --git a/target/i386/tcg/system/misc_helper.c b/target/i386/tcg/system/misc_helper.c index bb79d4e470e..2998b1aae75 100644 --- a/target/i386/tcg/system/misc_helper.c +++ b/target/i386/tcg/system/misc_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "system/address-spaces.h" #include "system/memory.h" #include "exec/cputlb.h" diff --git a/target/i386/tcg/user/excp_helper.c b/target/i386/tcg/user/excp_helper.c index 6c5df5e0e88..0957ad2e9ec 100644 --- a/target/i386/tcg/user/excp_helper.c +++ b/target/i386/tcg/user/excp_helper.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "tcg/helper-tcg.h" diff --git a/target/i386/tcg/user/seg_helper.c b/target/i386/tcg/user/seg_helper.c index 28bbef1bbae..3a4a6d5a745 100644 --- a/target/i386/tcg/user/seg_helper.c +++ b/target/i386/tcg/user/seg_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "tcg/helper-tcg.h" #include "tcg/seg_helper.h" diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c index 83291c22c2a..4b1d44a1644 100644 --- a/target/loongarch/tcg/tcg_cpu.c +++ b/target/loongarch/tcg/tcg_cpu.c @@ -10,6 +10,7 @@ #include "qemu/log.h" #include "qemu/plugin.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "exec/translation-block.h" #include "exec/target_page.h" diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c index 7623f4f9bdb..a4b90beca65 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -17,6 +17,7 @@ #include "exec/page-protection.h" #include "exec/target_page.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "exec/log.h" #include "cpu-csr.h" #include "tcg/tcg_loongarch.h" diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 2dd9ec1bdcb..5f91d206f59 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -25,6 +25,7 @@ #include "exec/target_page.h" #include "exec/gdbstub.h" #include "exec/helper-proto.h" +#include "accel/tcg/cpu-loop.h" #include "system/memory.h" #include "gdbstub/helpers.h" #include "fpu/softfloat.h" diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index 84c60c2636e..3da0c68da39 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -24,6 +24,7 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "accel/tcg/cpu-ldst-common.h" +#include "accel/tcg/cpu-loop.h" #include "fpu/softfloat.h" void helper_put(uint32_t id, uint32_t ctrl, uint32_t data) diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c index d32bcebf469..630b8b809fa 100644 --- a/target/mips/tcg/exception.c +++ b/target/mips/tcg/exception.c @@ -24,6 +24,7 @@ #include "internal.h" #include "exec/helper-proto.h" #include "exec/translation-block.h" +#include "accel/tcg/cpu-loop.h" target_ulong exception_resume_pc(CPUMIPSState *env) { diff --git a/target/mips/tcg/system/tlb_helper.c b/target/mips/tcg/system/tlb_helper.c index c850ddd9650..4398c6f80b4 100644 --- a/target/mips/tcg/system/tlb_helper.c +++ b/target/mips/tcg/system/tlb_helper.c @@ -26,6 +26,7 @@ #include "exec/page-protection.h" #include "exec/target_page.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "exec/log.h" #include "exec/helper-proto.h" diff --git a/target/or1k/exception.c b/target/or1k/exception.c index e213be36b6b..0479a069592 100644 --- a/target/or1k/exception.c +++ b/target/or1k/exception.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exception.h" diff --git a/target/or1k/exception_helper.c b/target/or1k/exception_helper.c index c2c9d136528..3bd82b29719 100644 --- a/target/or1k/exception_helper.c +++ b/target/or1k/exception_helper.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "accel/tcg/cpu-loop.h" #include "exec/helper-proto.h" #include "exception.h" diff --git a/target/or1k/fpu_helper.c b/target/or1k/fpu_helper.c index 39b6195dd7d..e680606d4da 100644 --- a/target/or1k/fpu_helper.c +++ b/target/or1k/fpu_helper.c @@ -19,6 +19,7 @@ */ #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" diff --git a/target/or1k/mmu.c b/target/or1k/mmu.c index 3ff288a1f94..3fc56e1b771 100644 --- a/target/or1k/mmu.c +++ b/target/or1k/mmu.c @@ -24,6 +24,7 @@ #include "exec/cputlb.h" #include "exec/page-protection.h" #include "exec/target_page.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/host-utils.h" #include "hw/core/loader.h" diff --git a/target/ppc/user_only_helper.c b/target/ppc/user_only_helper.c index ae210eb8474..cc6d7ee88aa 100644 --- a/target/ppc/user_only_helper.c +++ b/target/ppc/user_only_helper.c @@ -19,6 +19,7 @@ */ #include "qemu/osdep.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "internal.h" diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index e5653a57302..59edcdd3704 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -29,6 +29,7 @@ #include "system/memory.h" #include "instmap.h" #include "tcg/tcg-op.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-ops.h" #include "trace.h" #include "semihosting/common-semi.h" diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 3dc8c4f6b3b..6d4849b135e 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -24,6 +24,7 @@ #include "internals.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/probe.h" #include "exec/helper-proto.h" #include "exec/tlb-flags.h" diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index ca3e9e85fc7..36df7d377e5 100644 --- a/target/rx/op_helper.c +++ b/target/rx/op_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "fpu/softfloat.h" #include "tcg/debug-assert.h" diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 255271b9d34..2f886d424a1 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -24,6 +24,9 @@ #include "system/kvm.h" #include "system/tcg.h" #include "system/memory.h" +#ifdef CONFIG_TCG +#include "accel/tcg/cpu-loop.h" +#endif #include "exec/page-protection.h" #include "exec/target_page.h" #include "hw/core/hw-error.h" diff --git a/target/s390x/tcg/cc_helper.c b/target/s390x/tcg/cc_helper.c index 6595ac763c3..e538a75d713 100644 --- a/target/s390x/tcg/cc_helper.c +++ b/target/s390x/tcg/cc_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "accel/tcg/cpu-loop.h" #include "s390x-internal.h" #include "tcg_s390x.h" #include "exec/helper-proto.h" diff --git a/target/s390x/tcg/debug.c b/target/s390x/tcg/debug.c index 50d2853d443..99140b1ac9a 100644 --- a/target/s390x/tcg/debug.c +++ b/target/s390x/tcg/debug.c @@ -7,6 +7,7 @@ #include "qemu/osdep.h" #include "exec/breakpoint.h" #include "exec/watchpoint.h" +#include "accel/tcg/cpu-loop.h" #include "target/s390x/cpu.h" #include "target/s390x/s390x-internal.h" #include "tcg_s390x.h" diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 8474a694110..414e6838c87 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -28,6 +28,7 @@ #include "exec/cputlb.h" #include "exec/page-protection.h" #include "accel/tcg/cpu-ldst.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/probe.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c index 036be93fb32..09a45e58a5d 100644 --- a/target/s390x/tcg/misc_helper.c +++ b/target/s390x/tcg/misc_helper.c @@ -28,6 +28,7 @@ #include "qemu/timer.h" #include "exec/cputlb.h" #include "accel/tcg/cpu-ldst-common.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-mmu-index.h" #include "exec/target_page.h" #include "qapi/error.h" diff --git a/target/sh4/helper.c b/target/sh4/helper.c index b3ec7ce64d0..b6b057f104b 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -24,6 +24,7 @@ #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/log.h" +#include "accel/tcg/cpu-loop.h" #include "qemu/plugin.h" #if !defined(CONFIG_USER_ONLY) diff --git a/target/sparc/helper.c b/target/sparc/helper.c index c5d88de37c9..8de261b0e30 100644 --- a/target/sparc/helper.c +++ b/target/sparc/helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "qemu/timer.h" #include "qemu/host-utils.h" +#include "accel/tcg/cpu-loop.h" #include "exec/cpu-common.h" #include "exec/helper-proto.h" diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index e441ffb8f7e..07ba25dfcea 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/cputlb.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-mmu-index.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/tricore/helper.c b/target/tricore/helper.c index ce1693622b7..273713a1473 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -20,6 +20,7 @@ #include "hw/core/registerfields.h" #include "cpu.h" #include "exec/cputlb.h" +#include "accel/tcg/cpu-loop.h" #include "accel/tcg/cpu-mmu-index.h" #include "exec/page-protection.h" #include "exec/target_page.h" diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c index fdc522698dc..7cb67d179a8 100644 --- a/target/xtensa/exc_helper.c +++ b/target/xtensa/exc_helper.c @@ -28,6 +28,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu/main-loop.h" +#include "accel/tcg/cpu-loop.h" #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PULL 48/48] accel/tcg: Restrict headers being TCG specific 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (46 preceding siblings ...) 2026-06-18 12:28 ` [PULL 47/48] accel/tcg: Move cpu_loop_exit_*() out of 'exec/cpu-common.h' Philippe Mathieu-Daudé @ 2026-06-18 12:28 ` Philippe Mathieu-Daudé 2026-06-18 17:54 ` [PULL 00/48] Accel patches for 2026-06-18 Stefan Hajnoczi 48 siblings, 0 replies; 50+ messages in thread From: Philippe Mathieu-Daudé @ 2026-06-18 12:28 UTC (permalink / raw) To: qemu-devel Forbid including TCG-specific headers in non-TCG builds. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617171438.75914-12-philmd@oss.qualcomm.com> --- include/accel/tcg/cpu-mmu-index.h | 4 ++++ include/accel/tcg/cpu-ops.h | 4 ++++ include/accel/tcg/getpc.h | 4 ++++ include/accel/tcg/helper-retaddr.h | 4 ++++ include/accel/tcg/probe.h | 4 ++++ include/accel/tcg/tb-cpu-state.h | 4 ++++ 6 files changed, 24 insertions(+) diff --git a/include/accel/tcg/cpu-mmu-index.h b/include/accel/tcg/cpu-mmu-index.h index e681a90844c..e0fb6ef91c8 100644 --- a/include/accel/tcg/cpu-mmu-index.h +++ b/include/accel/tcg/cpu-mmu-index.h @@ -9,6 +9,10 @@ #ifndef ACCEL_TCG_CPU_MMU_INDEX_H #define ACCEL_TCG_CPU_MMU_INDEX_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "hw/core/cpu.h" #include "accel/tcg/cpu-ops.h" #include "tcg/debug-assert.h" diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h index 5950cdcaab1..710da12b828 100644 --- a/include/accel/tcg/cpu-ops.h +++ b/include/accel/tcg/cpu-ops.h @@ -10,6 +10,10 @@ #ifndef TCG_CPU_OPS_H #define TCG_CPU_OPS_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "exec/breakpoint.h" #include "exec/hwaddr.h" #include "exec/memattrs.h" diff --git a/include/accel/tcg/getpc.h b/include/accel/tcg/getpc.h index 0fc08addcf3..8a97ce34e76 100644 --- a/include/accel/tcg/getpc.h +++ b/include/accel/tcg/getpc.h @@ -8,6 +8,10 @@ #ifndef ACCEL_TCG_GETPC_H #define ACCEL_TCG_GETPC_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + /* GETPC is the true target of the return instruction that we'll execute. */ #ifdef CONFIG_TCG_INTERPRETER extern __thread uintptr_t tci_tb_ptr; diff --git a/include/accel/tcg/helper-retaddr.h b/include/accel/tcg/helper-retaddr.h index 037fda2b83d..ebdc8b378d4 100644 --- a/include/accel/tcg/helper-retaddr.h +++ b/include/accel/tcg/helper-retaddr.h @@ -6,6 +6,10 @@ #ifndef ACCEL_TCG_HELPER_RETADDR_H #define ACCEL_TCG_HELPER_RETADDR_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + /* * For user-only, helpers that use guest to host address translation * must protect the actual host memory access by recording 'retaddr' diff --git a/include/accel/tcg/probe.h b/include/accel/tcg/probe.h index dd9ecbbdf11..0b788901ba0 100644 --- a/include/accel/tcg/probe.h +++ b/include/accel/tcg/probe.h @@ -7,6 +7,10 @@ #ifndef ACCEL_TCG_PROBE_H #define ACCEL_TCG_PROBE_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "exec/mmu-access-type.h" #include "exec/vaddr.h" diff --git a/include/accel/tcg/tb-cpu-state.h b/include/accel/tcg/tb-cpu-state.h index 8f912900ca6..1903af4c2a2 100644 --- a/include/accel/tcg/tb-cpu-state.h +++ b/include/accel/tcg/tb-cpu-state.h @@ -6,6 +6,10 @@ #ifndef EXEC_TB_CPU_STATE_H #define EXEC_TB_CPU_STATE_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "exec/vaddr.h" typedef struct TCGTBCPUState { -- 2.53.0 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* Re: [PULL 00/48] Accel patches for 2026-06-18 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé ` (47 preceding siblings ...) 2026-06-18 12:28 ` [PULL 48/48] accel/tcg: Restrict headers being TCG specific Philippe Mathieu-Daudé @ 2026-06-18 17:54 ` Stefan Hajnoczi 48 siblings, 0 replies; 50+ messages in thread From: Stefan Hajnoczi @ 2026-06-18 17:54 UTC (permalink / raw) To: Philippe Mathieu-Daudé; +Cc: qemu-devel [-- Attachment #1: Type: text/plain, Size: 116 bytes --] Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/11.1 for any user-visible changes. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] ^ permalink raw reply [flat|nested] 50+ messages in thread
end of thread, other threads:[~2026-06-18 17:54 UTC | newest] Thread overview: 50+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 01/48] system/cpu: Reset vCPU %exception_index before resuming it Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 02/48] system/memory: Constify various AddressSpace arguments (checks) Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 03/48] system/memory: Constify various AddressSpace arguments (flat-range) Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 04/48] system/memory: Constify various AddressSpace arguments (notify) Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 05/48] system/memory: Constify various AddressSpace arguments (cache) Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 06/48] system/memory: Constify various AddressSpace arguments (access) Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 07/48] system/memory: Constify various MemoryRegionCache arguments Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 08/48] system: Document cpu_physical_memory_*() declarations Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 09/48] accel/kvm: Replace legacy cpu_physical_memory_write() call Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 10/48] gdbstub/system: Replace legacy cpu_physical_memory_read/write() calls Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 11/48] target/s390x: Factor common s390_ipl_read/write() helpers Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 12/48] target/s390x: Replace legacy cpu_physical_memory_read/write() calls Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 13/48] system: Move cpu_physical_memory_*() declarations to 'system/physmem.h' Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 14/48] hw/xen/interface: Remove pre-C99 checks Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 15/48] qom/object: Remove pre-C11 check Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 16/48] tcg: Include missing 'qemu/bitops.h' header in tcg-gvec-desc.h Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 17/48] target/i386: Report TPR accesses to HVF Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 18/48] target/arm: Only set CPU_INTERRUPT_EXITTB for TCG Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 19/48] target/arm: Remove vcpu_dirty=true assigments in hvf_handle_exception() Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 20/48] target/arm: Better describe PMU depends on TCG or HVF Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 21/48] target/arm/ptw: Restrict PMSAv8 code to TCG Philippe Mathieu-Daudé 2026-06-18 12:27 ` [PULL 22/48] target/arm: Restrict TCG specific headers Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 23/48] target/ppc: Restrict TCGTBCPUState to TCG Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 24/48] target/loongarch: Remove unused 'accel/accel-cpu-target.h' header Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 25/48] target/sparc: Include missing 'accel/tcg/cpu-ops.h' header in cpu.c Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 26/48] accel/hvf: fix double hv_vcpu_destroy() causing teardown error on ARM Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 27/48] accel/hvf: Reduce hvf_kernel_irqchip_override scope Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 28/48] accel/tcg: remove duplicate include Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 29/48] accel/tcg: Restrict IOMMU declarations Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 30/48] meson: build macOS signed binary as part of the default target Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 31/48] configure: honor --extra-ldflags when forced to use objc_LINKER Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 32/48] util/cutils: drop qemu_strnlen() in favor of strnlen() Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 33/48] ui/cocoa: Use qemu_input_map_osx_to_linux Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 34/48] exec/cpu-common.h: Include missing 'qemu/thread.h' header Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 35/48] exec/cpu-common.h: Avoid including unused 'exec/vaddr.h' header Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 36/48] exec/cpu-common.h: Avoid including unused 'tcg/debug-assert.h' header Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 37/48] exec/cpu-common.h: Avoid including unused exec/page-protection.h header Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 38/48] system/memory: Remove unnecessary CONFIG_USER_ONLY guards Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 39/48] system/memory: Rename cpu_exec_init_all() -> machine_memory_init() Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 40/48] hw/s390x/ipl: Remove TCG dependency in handle_diag_308() Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 41/48] accel/tcg: Remove cpu_loop_exit() stub Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 42/48] accel/tcg: Move cpu_exec() out of 'exec/cpu-common.h' Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 43/48] accel/tcg: Move cpu_exec_step_atomic() " Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 44/48] accel/tcg: Move cpu_unwind_state_data() " Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 45/48] accel/tcg: Move cpu_restore_state() " Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 46/48] accel/tcg: Have cpu_loop_exit_requested() take const @cpu argument Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 47/48] accel/tcg: Move cpu_loop_exit_*() out of 'exec/cpu-common.h' Philippe Mathieu-Daudé 2026-06-18 12:28 ` [PULL 48/48] accel/tcg: Restrict headers being TCG specific Philippe Mathieu-Daudé 2026-06-18 17:54 ` [PULL 00/48] Accel patches for 2026-06-18 Stefan Hajnoczi
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