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From: sashiko-bot@kernel.org
To: "Dapeng Mi" <dapeng1.mi@linux.intel.com>
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [Patch v9 06/24] perf/x86: Use x86_perf_regs in NMI handlers
Date: Mon, 06 Jul 2026 02:31:34 +0000	[thread overview]
Message-ID: <20260706023135.63D411F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260706015439.3040804-7-dapeng1.mi@linux.intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Concurrent use of `x86_pebs_regs` and `x86_user_regs` per-CPU variables between NMI and IRQ-disabled contexts corrupts PEBS samples.
--

commit a90fb4d272f2182569ad5a2105f6b3f7c429263d
Author: Dapeng Mi <dapeng1.mi@linux.intel.com>

perf/x86: Use x86_perf_regs in NMI handlers

Support for sampling additional register state in NMI context requires an
x86-specific register container. This switches x86 NMI handlers to use
the x86_perf_regs structure.

> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 0888d3b0923e1..d83ea02e24577 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -1788,9 +1788,11 @@ void perf_put_guest_lvtpc(void)
>  EXPORT_SYMBOL_FOR_KVM(perf_put_guest_lvtpc);
>  #endif /* CONFIG_PERF_GUEST_MEDIATED_PMU */
>  
> +static DEFINE_PER_CPU(struct x86_perf_regs, x86_intr_regs);
>  static int
>  perf_event_nmi_handler(unsigned int cmd, struct pt_regs *regs)
>  {
> +	struct x86_perf_regs *x86_regs = this_cpu_ptr(&x86_intr_regs);
>  	u64 start_clock;
>  	u64 finish_clock;
>  	int ret;
> @@ -1814,7 +1816,8 @@ perf_event_nmi_handler(unsigned int cmd, struct pt_regs *regs)
>  		return NMI_DONE;
>  
>  	start_clock = sched_clock();
> -	ret = static_call(x86_pmu_handle_irq)(regs);
> +	x86_regs->regs = *regs;
> +	ret = static_call(x86_pmu_handle_irq)(&x86_regs->regs);

[Severity: High]
Is this call path safe from NMI reentrancy when accessing the per-CPU
variables introduced earlier in this series?

If intel_pmu_drain_pebs_buffer() is called from a non-NMI context (e.g.
intel_pmu_read_event() via the perf_event_read syscall) with local IRQs
disabled, NMIs can still fire.

If a hardware PMI fires during the execution of __intel_pmu_pebs_events(),
the CPU will jump here to perf_event_nmi_handler().

The NMI handler calls x86_pmu_handle_irq() -> handle_pmi_common(), which
also calls x86_pmu_drain_pebs(). Since the earlier patch in this series
"perf/x86/intel: Convert x86_perf_regs to per-cpu variables" replaced stack
allocations with shared per-CPU variables:

arch/x86/events/intel/ds.c:__intel_pmu_pebs_events() {
    ...
	struct x86_perf_regs *perf_regs = this_cpu_ptr(&x86_pebs_regs);
	struct pt_regs *regs = &perf_regs->regs;
    ...
}

And similarly for user regs:

arch/x86/events/core.c:x86_pmu_get_regs_user() {
    ...
	struct x86_perf_regs *x86_regs_user = this_cpu_ptr(&x86_user_regs);
    ...
}

Will the NMI handler overwrite the same per-CPU structures the interrupted
non-NMI context was actively using, leading to corrupted PEBS samples when
the original context resumes?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260706015439.3040804-1-dapeng1.mi@linux.intel.com?part=6

  reply	other threads:[~2026-07-06  2:31 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-06  1:54 [Patch v9 00/24] Support SIMD/eGPRs/SSP registers sampling for perf Dapeng Mi
2026-07-06  1:54 ` [Patch v9 01/24] perf/x86: Fix two error-path and hybrid PMU guard issues Dapeng Mi
2026-07-06  2:21   ` sashiko-bot
2026-07-06  8:05     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 02/24] perf/x86: Move hybrid PMU initialization before x86_pmu_starting_cpu() Dapeng Mi
2026-07-06  2:18   ` sashiko-bot
2026-07-06  8:33     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 03/24] perf/x86/intel: Enable large PEBS sampling for XMMs Dapeng Mi
2026-07-06  1:54 ` [Patch v9 04/24] perf/x86/intel: Convert x86_perf_regs to per-cpu variables Dapeng Mi
2026-07-06  1:54 ` [Patch v9 05/24] perf: Eliminate duplicate arch-specific function definitions Dapeng Mi
2026-07-06  1:54 ` [Patch v9 06/24] perf/x86: Use x86_perf_regs in NMI handlers Dapeng Mi
2026-07-06  2:31   ` sashiko-bot [this message]
2026-07-06  8:43     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 07/24] x86/fpu/xstate: Add xsaves_nmi() helper Dapeng Mi
2026-07-06  2:18   ` sashiko-bot
2026-07-06  9:09     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 08/24] x86/fpu: Add update_fpu_state_and_flag() helper Dapeng Mi
2026-07-06  2:22   ` sashiko-bot
2026-07-06  9:15     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 09/24] perf: Move and enhance has_extended_regs() for arch-specific use Dapeng Mi
2026-07-06  1:54 ` [Patch v9 10/24] perf/x86/intel: Consolidate PMU capability updates Dapeng Mi
2026-07-06  1:54 ` [Patch v9 11/24] perf/x86: Enable XMM register sampling for non-PEBS events Dapeng Mi
2026-07-06  2:34   ` sashiko-bot
2026-07-06  9:47     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 12/24] perf/x86: Enable XMM register sampling for REGS_USER case Dapeng Mi
2026-07-06  2:35   ` sashiko-bot
2026-07-07  9:59     ` Mi, Dapeng
2026-07-08  0:56       ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 13/24] perf: Add sampling support for SIMD registers Dapeng Mi
2026-07-06  2:34   ` sashiko-bot
2026-07-08  1:13     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 14/24] perf/x86: Support XMM sampling using sample_simd_vec_reg_* fields Dapeng Mi
2026-07-06  6:45   ` sashiko-bot
2026-07-08  1:27     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 15/24] perf/x86: Support YMM " Dapeng Mi
2026-07-06  1:54 ` [Patch v9 16/24] perf/x86: Support ZMM " Dapeng Mi
2026-07-06  1:54 ` [Patch v9 17/24] perf/x86: Support OPMASK sampling using sample_simd_pred_reg_* fields Dapeng Mi
2026-07-06  1:54 ` [Patch v9 18/24] perf: Enhance perf_reg_validate() with simd_enabled argument Dapeng Mi
2026-07-06  1:54 ` [Patch v9 19/24] perf/x86: Support eGPRs sampling using sample_regs_* fields Dapeng Mi
2026-07-06  1:54 ` [Patch v9 20/24] perf/x86: Support SSP " Dapeng Mi
2026-07-06  1:54 ` [Patch v9 21/24] perf/x86/intel: Support arch-PEBS based SIMD/eGPRs/SSP sampling Dapeng Mi
2026-07-06  1:54 ` [Patch v9 22/24] perf/x86/intel: Enable PERF_PMU_CAP_SIMD_REGS capability Dapeng Mi
2026-07-06  2:57   ` sashiko-bot
2026-07-08  1:51     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 23/24] perf/x86: Activate back-to-back NMI detection for arch-PEBS induced NMIs Dapeng Mi
2026-07-06  1:54 ` [Patch v9 24/24] perf/x86/intel: Add sanity check for PEBS fragment size Dapeng Mi
2026-07-06  5:04   ` sashiko-bot
2026-07-08  2:03     ` Mi, Dapeng

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