From: Amit Machhiwal <amachhiw@linux.ibm.com>
To: Chinmay Rath <rathc@linux.ibm.com>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
harshpb@linux.ibm.com, milesg@linux.ibm.com, npiggin@gmail.com,
richard.henderson@linaro.org, vishalc@linux.ibm.com,
tshah@linux.ibm.com, shivangu@linux.ibm.com,
ojaswin@linux.ibm.com, aboorvad@linux.ibm.com,
amachhiw@linux.ibm.com, shivani@linux.ibm.com,
mkchauras@gmail.com, uverma@linux.ibm.com,
nikhilks@linux.ibm.com
Subject: Re: [PATCH v2 05/37] target/ppc: Move vector pack instructions to decodetree
Date: Wed, 26 Aug 2026 16:34:12 +0530 [thread overview]
Message-ID: <20260826163344.8da7f783-8b-amachhiw@linux.ibm.com> (raw)
In-Reply-To: <20260826050923.74756-6-rathc@linux.ibm.com>
On 2026/08/26 10:38 AM, Chinmay Rath wrote:
> From: Aboorva Devarajan <aboorvad@linux.ibm.com>
>
> Move below instructions to decodetree specification:
>
> vpkuhum, vpkuwum, vpkuhus, vpkuwus : VX-form (PPC_ALTIVEC)
> vpkshus, vpkswus, vpkshss, vpkswss : VX-form (PPC_ALTIVEC)
> vpkpx : VX-form (PPC_ALTIVEC)
> vpkudum, vpkudus, vpksdus, vpksdss : VX-form (PPC2_ALTIVEC_207)
>
> The legacy GEN_VXFORM_ENV/GEN_VXFORM macros that generated gen_vpk*()
> functions reading register fields from ctx->opcode are replaced by new
> do_vpk_env()/do_vpk() helpers in vmx-impl.c.inc that use the
> pre-extracted decodetree argument fields (a->vrt, a->vra, a->vrb)
> directly. The existing gen_helper_vpk*() implementations in
> int_helper.c are reused without changes.
>
> The changes were verified by validating that the tcg ops generated by
> those instructions remain the same, which were captured with the '-d
> in_asm,op' option before and after the patch.
>
> Signed-off-by: Aboorva Devarajan <aboorvad@linux.ibm.com>
> Reviewed-by: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
> Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
> Signed-off-by: Chinmay Rath <rathc@linux.ibm.com>
> ---
> target/ppc/helper.h | 26 +++++++--------
> target/ppc/insn32.decode | 16 +++++++++
> target/ppc/int_helper.c | 28 ++++++++--------
> target/ppc/translate/vmx-impl.c.inc | 51 +++++++++++++++++++++--------
> target/ppc/translate/vmx-ops.c.inc | 13 --------
> 5 files changed, 81 insertions(+), 53 deletions(-)
Reviewed-by: Amit Machhiwal <amachhiw@linux.ibm.com>
>
> diff --git a/target/ppc/helper.h b/target/ppc/helper.h
> index 6db917935c..6df3de6516 100644
> --- a/target/ppc/helper.h
> +++ b/target/ppc/helper.h
> @@ -249,19 +249,19 @@ DEF_HELPER_FLAGS_4(VMSUMUBM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
> DEF_HELPER_FLAGS_4(VMSUMMBM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
> DEF_HELPER_FLAGS_4(VPERM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
> DEF_HELPER_FLAGS_4(VPERMR, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
> -DEF_HELPER_4(vpkshss, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpkshus, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpkswss, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpkswus, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpksdss, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpksdus, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpkuhus, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpkuwus, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpkudus, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpkuhum, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpkuwum, void, env, avr, avr, avr)
> -DEF_HELPER_4(vpkudum, void, env, avr, avr, avr)
> -DEF_HELPER_FLAGS_3(vpkpx, TCG_CALL_NO_RWG, void, avr, avr, avr)
> +DEF_HELPER_4(VPKSHSS, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKSHUS, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKSWSS, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKSWUS, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKSDSS, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKSDUS, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKUHUS, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKUWUS, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKUDUS, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKUHUM, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKUWUM, void, env, avr, avr, avr)
> +DEF_HELPER_4(VPKUDUM, void, env, avr, avr, avr)
> +DEF_HELPER_FLAGS_3(VPKPX, TCG_CALL_NO_RWG, void, avr, avr, avr)
> DEF_HELPER_5(VMHADDSHS, void, env, avr, avr, avr, avr)
> DEF_HELPER_5(VMHRADDSHS, void, env, avr, avr, avr, avr)
> DEF_HELPER_FLAGS_4(VMSUMUHM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
> diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
> index 8aca8a00c0..c51efbfd33 100644
> --- a/target/ppc/insn32.decode
> +++ b/target/ppc/insn32.decode
> @@ -1054,6 +1054,22 @@ VSTRIHR 000100 ..... 00011 ..... . 0000001101 @VX_tb_rc
> VCLRLB 000100 ..... ..... ..... 00110001101 @VX
> VCLRRB 000100 ..... ..... ..... 00111001101 @VX
>
> +## Vector Pack Instructions
> +
> +VPKUHUM 000100 ..... ..... ..... 0000000111 0 @VX
> +VPKUWUM 000100 ..... ..... ..... 0000100111 0 @VX
> +VPKUDUM 000100 ..... ..... ..... 1000100111 0 @VX
> +VPKUHUS 000100 ..... ..... ..... 0001000111 0 @VX
> +VPKUWUS 000100 ..... ..... ..... 0001100111 0 @VX
> +VPKUDUS 000100 ..... ..... ..... 1001100111 0 @VX
> +VPKSHUS 000100 ..... ..... ..... 0010000111 0 @VX
> +VPKSWUS 000100 ..... ..... ..... 0010100111 0 @VX
> +VPKSDUS 000100 ..... ..... ..... 1010100111 0 @VX
> +VPKSHSS 000100 ..... ..... ..... 0011000111 0 @VX
> +VPKSWSS 000100 ..... ..... ..... 0011100111 0 @VX
> +VPKSDSS 000100 ..... ..... ..... 1011100111 0 @VX
> +VPKPX 000100 ..... ..... ..... 0110000111 0 @VX
> +
> # VSX Load/Store Instructions
>
> LXSD 111001 ..... ..... .............. 10 @DS
> diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
> index a3adf746bd..dc55ccadf7 100644
> --- a/target/ppc/int_helper.c
> +++ b/target/ppc/int_helper.c
> @@ -1465,7 +1465,7 @@ void helper_VPMSUMD(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> #else
> #define PKBIG 0
> #endif
> -void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> +void helper_VPKPX(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> {
> int i, j;
> ppc_avr_t result;
> @@ -1488,7 +1488,7 @@ void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> }
>
> #define VPK(suffix, from, to, cvt, dosat) \
> - void helper_vpk##suffix(CPUPPCState *env, ppc_avr_t *r, \
> + void helper_VPK##suffix(CPUPPCState *env, ppc_avr_t *r, \
> ppc_avr_t *a, ppc_avr_t *b) \
> { \
> int i; \
> @@ -1507,18 +1507,18 @@ void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> } \
> }
> #define I(x, y) (x)
> -VPK(shss, s16, s8, cvtshsb, 1)
> -VPK(shus, s16, u8, cvtshub, 1)
> -VPK(swss, s32, s16, cvtswsh, 1)
> -VPK(swus, s32, u16, cvtswuh, 1)
> -VPK(sdss, s64, s32, cvtsdsw, 1)
> -VPK(sdus, s64, u32, cvtsduw, 1)
> -VPK(uhus, u16, u8, cvtuhub, 1)
> -VPK(uwus, u32, u16, cvtuwuh, 1)
> -VPK(udus, u64, u32, cvtuduw, 1)
> -VPK(uhum, u16, u8, I, 0)
> -VPK(uwum, u32, u16, I, 0)
> -VPK(udum, u64, u32, I, 0)
> +VPK(SHSS, s16, s8, cvtshsb, 1)
> +VPK(SHUS, s16, u8, cvtshub, 1)
> +VPK(SWSS, s32, s16, cvtswsh, 1)
> +VPK(SWUS, s32, u16, cvtswuh, 1)
> +VPK(SDSS, s64, s32, cvtsdsw, 1)
> +VPK(SDUS, s64, u32, cvtsduw, 1)
> +VPK(UHUS, u16, u8, cvtuhub, 1)
> +VPK(UWUS, u32, u16, cvtuwuh, 1)
> +VPK(UDUS, u64, u32, cvtuduw, 1)
> +VPK(UHUM, u16, u8, I, 0)
> +VPK(UWUM, u32, u16, I, 0)
> +VPK(UDUM, u64, u32, I, 0)
> #undef I
> #undef VPK
> #undef PKBIG
> diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc
> index 00b359f031..65230f3461 100644
> --- a/target/ppc/translate/vmx-impl.c.inc
> +++ b/target/ppc/translate/vmx-impl.c.inc
> @@ -1070,19 +1070,44 @@ TRANS(VRLQMI, do_vector_rotl_quad, false, true)
>
> GEN_VXFORM_TRANS(vsl, 2, 7);
> GEN_VXFORM_TRANS(vsr, 2, 11);
> -GEN_VXFORM_ENV(vpkuhum, 7, 0);
> -GEN_VXFORM_ENV(vpkuwum, 7, 1);
> -GEN_VXFORM_ENV(vpkudum, 7, 17);
> -GEN_VXFORM_ENV(vpkuhus, 7, 2);
> -GEN_VXFORM_ENV(vpkuwus, 7, 3);
> -GEN_VXFORM_ENV(vpkudus, 7, 19);
> -GEN_VXFORM_ENV(vpkshus, 7, 4);
> -GEN_VXFORM_ENV(vpkswus, 7, 5);
> -GEN_VXFORM_ENV(vpksdus, 7, 21);
> -GEN_VXFORM_ENV(vpkshss, 7, 6);
> -GEN_VXFORM_ENV(vpkswss, 7, 7);
> -GEN_VXFORM_ENV(vpksdss, 7, 23);
> -GEN_VXFORM(vpkpx, 7, 12);
> +static bool do_vpk_env(DisasContext *ctx, arg_VX *a,
> + void (*gen_helper)(TCGv_ptr, TCGv_ptr,
> + TCGv_ptr, TCGv_ptr))
> +{
> + TCGv_ptr ra, rb, rd;
> + REQUIRE_VECTOR(ctx);
> + ra = gen_avr_ptr(a->vra);
> + rb = gen_avr_ptr(a->vrb);
> + rd = gen_avr_ptr(a->vrt);
> + gen_helper(tcg_env, rd, ra, rb);
> + return true;
> +}
> +
> +static bool do_vpk(DisasContext *ctx, arg_VX *a,
> + void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_ptr))
> +{
> + TCGv_ptr ra, rb, rd;
> + REQUIRE_VECTOR(ctx);
> + ra = gen_avr_ptr(a->vra);
> + rb = gen_avr_ptr(a->vrb);
> + rd = gen_avr_ptr(a->vrt);
> + gen_helper(rd, ra, rb);
> + return true;
> +}
> +
> +TRANS_FLAGS(ALTIVEC, VPKUHUM, do_vpk_env, gen_helper_VPKUHUM)
> +TRANS_FLAGS(ALTIVEC, VPKUWUM, do_vpk_env, gen_helper_VPKUWUM)
> +TRANS_FLAGS2(ALTIVEC_207, VPKUDUM, do_vpk_env, gen_helper_VPKUDUM)
> +TRANS_FLAGS(ALTIVEC, VPKUHUS, do_vpk_env, gen_helper_VPKUHUS)
> +TRANS_FLAGS(ALTIVEC, VPKUWUS, do_vpk_env, gen_helper_VPKUWUS)
> +TRANS_FLAGS2(ALTIVEC_207, VPKUDUS, do_vpk_env, gen_helper_VPKUDUS)
> +TRANS_FLAGS(ALTIVEC, VPKSHUS, do_vpk_env, gen_helper_VPKSHUS)
> +TRANS_FLAGS(ALTIVEC, VPKSWUS, do_vpk_env, gen_helper_VPKSWUS)
> +TRANS_FLAGS2(ALTIVEC_207, VPKSDUS, do_vpk_env, gen_helper_VPKSDUS)
> +TRANS_FLAGS(ALTIVEC, VPKSHSS, do_vpk_env, gen_helper_VPKSHSS)
> +TRANS_FLAGS(ALTIVEC, VPKSWSS, do_vpk_env, gen_helper_VPKSWSS)
> +TRANS_FLAGS2(ALTIVEC_207, VPKSDSS, do_vpk_env, gen_helper_VPKSDSS)
> +TRANS_FLAGS(ALTIVEC, VPKPX, do_vpk, gen_helper_VPKPX)
> GEN_VXFORM_ENV(vsum4ubs, 4, 24);
> GEN_VXFORM_ENV(vsum4sbs, 4, 28);
> GEN_VXFORM_ENV(vsum4shs, 4, 25);
> diff --git a/target/ppc/translate/vmx-ops.c.inc b/target/ppc/translate/vmx-ops.c.inc
> index b8f77d3d2c..2820976c0f 100644
> --- a/target/ppc/translate/vmx-ops.c.inc
> +++ b/target/ppc/translate/vmx-ops.c.inc
> @@ -59,19 +59,6 @@ GEN_VXFORM_300(bcdtrunc, 0, 20),
> GEN_VXFORM_300(bcdutrunc, 0, 21),
> GEN_VXFORM(vsl, 2, 7),
> GEN_VXFORM(vsr, 2, 11),
> -GEN_VXFORM(vpkuhum, 7, 0),
> -GEN_VXFORM(vpkuwum, 7, 1),
> -GEN_VXFORM_207(vpkudum, 7, 17),
> -GEN_VXFORM(vpkuhus, 7, 2),
> -GEN_VXFORM(vpkuwus, 7, 3),
> -GEN_VXFORM_207(vpkudus, 7, 19),
> -GEN_VXFORM(vpkshus, 7, 4),
> -GEN_VXFORM(vpkswus, 7, 5),
> -GEN_VXFORM_207(vpksdus, 7, 21),
> -GEN_VXFORM(vpkshss, 7, 6),
> -GEN_VXFORM(vpkswss, 7, 7),
> -GEN_VXFORM_207(vpksdss, 7, 23),
> -GEN_VXFORM(vpkpx, 7, 12),
> GEN_VXFORM(vsum4ubs, 4, 24),
> GEN_VXFORM(vsum4sbs, 4, 28),
> GEN_VXFORM(vsum4shs, 4, 25),
> --
> 2.55.0
>
next prev parent reply other threads:[~2026-08-26 11:04 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-26 5:08 [PATCH v2 00/37] target/ppc: PPC TCG Improvements (decodetree migrations + ISA 2.07 flag updates) Chinmay Rath
2026-08-26 5:08 ` [PATCH v2 01/37] target/ppc: Migrate extswsli to decodetree Chinmay Rath
2026-08-26 7:33 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 02/37] target/ppc: Migrate atomic loads " Chinmay Rath
2026-08-26 9:20 ` Amit Machhiwal
2026-08-26 12:28 ` Chinmay Rath
2026-08-26 12:30 ` Chinmay Rath
2026-08-26 5:08 ` [PATCH v2 03/37] target/ppc: Convert cache instructions " Chinmay Rath
2026-08-26 10:20 ` Amit Machhiwal
2026-08-26 13:09 ` Chinmay Rath
2026-08-26 13:17 ` Amit Machhiwal
2026-08-27 9:13 ` Chinmay Rath
2026-08-27 8:37 ` Chinmay Rath
2026-08-26 5:08 ` [PATCH v2 04/37] target/ppc: Move vector merge " Chinmay Rath
2026-08-26 10:57 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 05/37] target/ppc: Move vector pack " Chinmay Rath
2026-08-26 11:04 ` Amit Machhiwal [this message]
2026-08-26 5:08 ` [PATCH v2 06/37] target/ppc: Move st{b, h, w, d, q}cx " Chinmay Rath
2026-08-26 11:18 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 07/37] target/ppc: convert slw, srw instruction via decode spec Chinmay Rath
2026-08-26 11:28 ` Amit Machhiwal
2026-08-26 11:30 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 08/37] target/ppc: convert sraw[i] " Chinmay Rath
2026-08-26 11:41 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 09/37] target/ppc: Convert mcrf to decode tree Chinmay Rath
2026-08-26 11:52 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 10/37] target/ppc: Move fixed-point Shift insns to decodetree Chinmay Rath
2026-08-26 5:08 ` [PATCH v2 11/37] target/ppc: Move fixed-point byte-reversal store " Chinmay Rath
2026-08-26 5:08 ` [PATCH v2 12/37] target/ppc: Move GPR atomic load/store instructions " Chinmay Rath
2026-08-26 12:05 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 13/37] target/ppc: Move isync instruction " Chinmay Rath
2026-08-26 12:20 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 14/37] target/ppc: Convert b{a, l, la} to decode tree Chinmay Rath
2026-08-26 12:24 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 15/37] target/ppc: move various conditional branch insns to decodetree Chinmay Rath
2026-08-26 12:38 ` Amit Machhiwal
2026-08-26 12:45 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 16/37] target/ppc: Fix TRANS* macro variadic arguments handling Chinmay Rath
2026-08-26 12:50 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 17/37] target/ppc: Move wait instruction to decodetree Chinmay Rath
2026-08-26 13:12 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 18/37] target/ppc: Move sleep & friends " Chinmay Rath
2026-08-26 13:26 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 19/37] target/ppc: Refactor sleep and its variants to use a common helper Chinmay Rath
2026-08-26 13:38 ` Amit Machhiwal
2026-08-26 14:30 ` Miles Glenn
2026-08-26 5:08 ` [PATCH v2 20/37] target/ppc: Move Condition Register access instructions to decodetree Chinmay Rath
2026-08-26 14:24 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 21/37] target/ppc: Move Condition Register logical " Chinmay Rath
2026-08-26 14:43 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 22/37] target/ppc: make do_ea_calc_ra available for 32 bit builds Chinmay Rath
2026-08-26 14:48 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 23/37] target/ppc: Move Fixed-Point Load/Store String instructions to decodetree Chinmay Rath
2026-08-26 15:19 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 24/37] target/ppc: Move VMX integer arithmetic and BCD " Chinmay Rath
2026-08-26 15:30 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 25/37] target/ppc: Move rlwimi, rlwinm " Chinmay Rath
2026-08-26 15:41 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 26/37] target/ppc: Move lmw, stmw " Chinmay Rath
2026-08-26 15:44 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 27/37] target/ppc: Move mfmsr, mtmsr[d] " Chinmay Rath
2026-08-26 15:49 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 28/37] target/ppc: Move byte-reverse " Chinmay Rath
2026-08-26 15:54 ` Amit Machhiwal
2026-08-27 10:52 ` Chinmay Rath
2026-08-26 5:08 ` [PATCH v2 29/37] target/ppc: Move system call and rfi " Chinmay Rath
2026-08-26 16:54 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 30/37] target/ppc: Replace PPC2_VSX207 flag with PPC2_ISA207 Chinmay Rath
2026-08-26 16:56 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 31/37] target/ppc: Use PPC2_ISA207 instead of PPC2_BCTAR_ISA207 Chinmay Rath
2026-08-26 16:58 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 32/37] target/ppc: Use PPC2_ISA207 instead of PPC2_LSQ_ISA207 Chinmay Rath
2026-08-26 17:01 ` Amit Machhiwal
2026-08-26 5:08 ` [PATCH v2 33/37] target/ppc: Use PPC2_ISA207 instead of PPC2_ALTIVEC_207 Chinmay Rath
2026-08-26 17:23 ` Amit Machhiwal
2026-08-26 5:09 ` [PATCH v2 34/37] target/ppc: Use PPC2_ISA207 instead of PPC2_ISA207S Chinmay Rath
2026-08-26 5:09 ` [PATCH v2 35/37] target/ppc: Reorder PPC2 flags Chinmay Rath
2026-08-26 5:09 ` [PATCH v2 36/37] target/ppc: Add ICBT support for ISA version 2.07 Chinmay Rath
2026-08-26 5:09 ` [PATCH v2 37/37] target/ppc: Add self as maintainer for PowerPC TCG CPUs Chinmay Rath
2026-08-26 5:41 ` Amit Machhiwal
2026-08-26 6:25 ` Gautam Menghani
2026-08-26 9:37 ` Aditya Gupta
2026-08-27 9:50 ` [PATCH v2 00/37] target/ppc: PPC TCG Improvements (decodetree migrations + ISA 2.07 flag updates) Aniket Sahu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260826163344.8da7f783-8b-amachhiw@linux.ibm.com \
--to=amachhiw@linux.ibm.com \
--cc=aboorvad@linux.ibm.com \
--cc=harshpb@linux.ibm.com \
--cc=milesg@linux.ibm.com \
--cc=mkchauras@gmail.com \
--cc=nikhilks@linux.ibm.com \
--cc=npiggin@gmail.com \
--cc=ojaswin@linux.ibm.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=rathc@linux.ibm.com \
--cc=richard.henderson@linaro.org \
--cc=shivangu@linux.ibm.com \
--cc=shivani@linux.ibm.com \
--cc=tshah@linux.ibm.com \
--cc=uverma@linux.ibm.com \
--cc=vishalc@linux.ibm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.