Re: [PATCH v2 00/37] target/ppc: PPC TCG Improvements (decodetree migrations + ISA 2.07 flag updates)

[Aniket Sahu <asahu1x@linux.ibm.com>]

On 26/08/26 10:38 AM, Chinmay Rath wrote:
> This series primarily contains 3 changes :
>
> 1. PPC instructions movement to decodetree specification (Only patch 19 needs Rb)
> Link to the original v1 : https://lore.kernel.org/qemu-devel/20260820140114.327023-1-rathc@linux.ibm.com/
> Changes from v1 :
> - Patch 19 commit log updated as suggested by Glenn.
> - Retained Rbs received.
>
> 2. PPC ISA 2.07 flag cleanup and updates (Already reviewed)
> Link to the original v2 : https://lore.kernel.org/qemu-devel/20260820142717.337686-1-rathc@linux.ibm.com/
> This series is based on top the above decodetree series.
> - No changes. Only Rbs added.

Please feel free to add:

Tested-by: Aniket Sahu <asahu1x@linux.ibm.com>

Tested on a POWER10 LPAR (Ubuntu 26.10 host):
- Built QEMU successfully with all 37 patches applied
- Verified qemu-system-ppc64 functionality with SLES 16.1 RC2 guest in 
TCG mode
- Guest boots and runs without issues
- Tested basic functionality tests in guest, no issues or regressions 
observed

>
> 3. Stepping up as an active maintainer for PowerPC TCG CPUs module.
>
>
> Aboorva Devarajan (3):
>    target/ppc: Move vector merge instructions to decodetree
>    target/ppc: Move vector pack instructions to decodetree
>    target/ppc: Move GPR atomic load/store instructions to decodetree
>
> Amit Machhiwal (2):
>    target/ppc: Move fixed-point Shift insns to decodetree
>    target/ppc: Move fixed-point byte-reversal store insns to decodetree
>
> Chinmay Rath (9):
>    target/ppc: make do_ea_calc_ra available for 32 bit builds
>    target/ppc: Replace PPC2_VSX207 flag with PPC2_ISA207
>    target/ppc: Use PPC2_ISA207 instead of PPC2_BCTAR_ISA207
>    target/ppc: Use PPC2_ISA207 instead of PPC2_LSQ_ISA207
>    target/ppc: Use PPC2_ISA207 instead of PPC2_ALTIVEC_207
>    target/ppc: Use PPC2_ISA207 instead of PPC2_ISA207S
>    target/ppc: Reorder PPC2 flags
>    target/ppc: Add ICBT support for ISA version 2.07
>    target/ppc: Add self as maintainer for PowerPC TCG CPUs
>
> Mukesh Kumar Chaurasiya (IBM) (2):
>    target/ppc: convert slw, srw instruction via decode spec
>    target/ppc: convert sraw[i] instruction via decode spec
>
> Nikhil Kumar Singh (3):
>    target/ppc: Migrate extswsli to decodetree
>    target/ppc: Migrate atomic loads to decodetree
>    target/ppc: Convert cache instructions to decodetree
>
> Ojaswin Mujoo (7):
>    target/ppc: Move isync instruction to decodetree.
>    target/ppc: Convert b{a, l, la} to decode tree
>    target/ppc: move various conditional branch insns to decodetree
>    target/ppc: Fix TRANS* macro variadic arguments handling
>    target/ppc: Move wait instruction to decodetree
>    target/ppc: Move sleep & friends to decodetree
>    target/ppc: Refactor sleep and its variants to use a common helper
>
> Shivang Upadhyay (4):
>    target/ppc: Move Condition Register access instructions to decodetree.
>    target/ppc: Move Condition Register logical instructions to
>      decodetree.
>    target/ppc: Move Fixed-Point Load/Store String instructions to
>      decodetree.
>    target/ppc: Move VMX integer arithmetic and BCD instructions to
>      decodetree.
>
> Shivani Nittor (1):
>    target/ppc: Convert mcrf to decode tree
>
> Tanushree Shah (2):
>    target/ppc: Move rlwimi, rlwinm instructions to decodetree
>    target/ppc: Move lmw, stmw instructions to decodetree
>
> Utkarsh Verma (1):
>    target/ppc: Move st{b, h, w, d, q}cx instructions to decodetree
>
> Vishal Chourasia (3):
>    target/ppc: Move mfmsr, mtmsr[d] instructions to decodetree
>    target/ppc: Move byte-reverse instructions to decodetree
>    target/ppc: Move system call and rfi instructions to decodetree
>
>   MAINTAINERS                                   |    2 +-
>   hw/ppc/spapr_caps.c                           |    2 +-
>   linux-user/ppc/elfload.c                      |    6 +-
>   target/ppc/cpu.h                              |   38 +-
>   target/ppc/cpu_init.c                         |    6 +-
>   target/ppc/cpu_init.h                         |    7 +-
>   target/ppc/helper.h                           |  100 +-
>   target/ppc/insn32.decode                      |  254 ++
>   target/ppc/int_helper.c                       |   76 +-
>   target/ppc/internal.h                         |    7 -
>   target/ppc/mem_helper.c                       |   18 +-
>   target/ppc/tcg-excp_helper.c                  |   18 +-
>   target/ppc/translate.c                        | 2297 +++--------------
>   target/ppc/translate/bhrb-impl.c.inc          |    4 +-
>   target/ppc/translate/branch-impl.c.inc        |  183 +-
>   target/ppc/translate/fixedpoint-impl.c.inc    |  938 ++++++-
>   target/ppc/translate/fp-impl.c.inc            |    4 +-
>   target/ppc/translate/misc-impl.c.inc          |  170 ++
>   .../ppc/translate/processor-ctrl-impl.c.inc   |   38 +-
>   target/ppc/translate/storage-ctrl-impl.c.inc  |  117 +
>   target/ppc/translate/vmx-impl.c.inc           |  457 ++--
>   target/ppc/translate/vmx-ops.c.inc            |   59 +-
>   target/ppc/translate/vsx-impl.c.inc           |   56 +-
>   target/ppc/translate/vsx-ops.c.inc            |   24 +-
>   24 files changed, 2494 insertions(+), 2387 deletions(-)
>