Re: [PATCH v2 31/37] target/ppc: Use PPC2_ISA207 instead of PPC2_BCTAR_ISA207

[Amit Machhiwal <amachhiw@linux.ibm.com>]

On 2026/08/26 10:38 AM, Chinmay Rath wrote:
> PPC2_BCTAR_ISA207 is only ever set in the CPUPPCState's insns_flags2
> alongside PPC2_ISA207. Checks made by PPC2_BCTAR_ISA207 could be
> replaced with PPC2_ISA207, hence rendering it useless and apt for
> removal. This patch does the same.
> 
> Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Chinmay Rath <rathc@linux.ibm.com>
> ---
>  linux-user/ppc/elfload.c               | 7 +++----
>  target/ppc/cpu.h                       | 4 +---
>  target/ppc/cpu_init.c                  | 2 +-
>  target/ppc/cpu_init.h                  | 2 +-
>  target/ppc/translate/branch-impl.c.inc | 2 +-
>  5 files changed, 7 insertions(+), 10 deletions(-)

Reviewed-by: Amit Machhiwal <amachhiw@linux.ibm.com>

> 
> diff --git a/linux-user/ppc/elfload.c b/linux-user/ppc/elfload.c
> index 0d54da9803..5c6065e08a 100644
> --- a/linux-user/ppc/elfload.c
> +++ b/linux-user/ppc/elfload.c
> @@ -116,10 +116,9 @@ abi_ulong get_elf_hwcap2(CPUState *cs)
>      do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0)
>  
>      GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL);
> -    GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR);
> -    GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
> -                  PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 |
> -                  QEMU_PPC_FEATURE2_VEC_CRYPTO);
> +    GET_FEATURE2((PPC2_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
> +                  PPC2_ISA207S), (QEMU_PPC_FEATURE2_ARCH_2_07 |
> +                  QEMU_PPC_FEATURE2_VEC_CRYPTO | QEMU_PPC_FEATURE2_HAS_TAR));
>      GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 |
>                   QEMU_PPC_FEATURE2_DARN | QEMU_PPC_FEATURE2_HAS_IEEE128);
>      GET_FEATURE2(PPC2_ISA310, QEMU_PPC_FEATURE2_ARCH_3_1 |
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 91ef34cb21..df1e943d8d 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -2577,8 +2577,6 @@ enum {
>      PPC2_FP_CVT_ISA206 = 0x0000000000000400ULL,
>      /* ISA 2.06B floating point test instructions                            */
>      PPC2_FP_TST_ISA206 = 0x0000000000000800ULL,
> -    /* ISA 2.07 bctar instruction                                            */
> -    PPC2_BCTAR_ISA207  = 0x0000000000001000ULL,
>      /* ISA 2.07 load/store quadword                                          */
>      PPC2_LSQ_ISA207    = 0x0000000000002000ULL,
>      /* ISA 2.07 Altivec                                                      */
> @@ -2610,7 +2608,7 @@ enum {
>                          PPC2_ISA205 | PPC2_ISA207 | PPC2_PERM_ISA206 | \
>                          PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \
>                          PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \
> -                        PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \
> +                        PPC2_LSQ_ISA207 | \
>                          PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \
>                          PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206 | \
>                          PPC2_ISA300 | PPC2_ISA310 | PPC2_MEM_LWSYNC | \
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index b913edd243..c250f805a7 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -6349,7 +6349,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, const void *data)
>      pcc->insns_flags2 = PPC2_VSX | PPC2_ISA207 | PPC2_DFP | PPC2_DBRX |
>                          PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
>                          PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
> -                        PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
> +                        PPC2_FP_TST_ISA206 |
>                          PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
>                          PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 |
>                          PPC2_TM | PPC2_PM_ISA206 | PPC2_MEM_LWSYNC |
> diff --git a/target/ppc/cpu_init.h b/target/ppc/cpu_init.h
> index 1c41c0d349..7dd587908e 100644
> --- a/target/ppc/cpu_init.h
> +++ b/target/ppc/cpu_init.h
> @@ -17,7 +17,7 @@
>  #define PPC_INSNS_FLAGS2_POWER_COMMON                                \
>      (PPC2_VSX | PPC2_ISA207 | PPC2_DFP | PPC2_DBRX |                 \
>       PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 |      \
> -     PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |   \
> +     PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 |                       \
>       PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | PPC2_ISA205 |              \
>       PPC2_ISA207S | PPC2_FP_CVT_S64 | PPC2_ISA300 | PPC2_PRCNTL |    \
>       PPC2_MEM_LWSYNC | PPC2_BCDA_ISA206)
> diff --git a/target/ppc/translate/branch-impl.c.inc b/target/ppc/translate/branch-impl.c.inc
> index c2889c1d12..77eac0a239 100644
> --- a/target/ppc/translate/branch-impl.c.inc
> +++ b/target/ppc/translate/branch-impl.c.inc
> @@ -210,5 +210,5 @@ static bool bclr_helper(DisasContext *ctx, arg_bclr *a, int type)
>  
>  TRANS(BCLR, bclr_helper, BCOND_LR)
>  TRANS(BCCTR, bclr_helper, BCOND_CTR)
> -TRANS_FLAGS2(BCTAR_ISA207, BCTAR, bclr_helper, BCOND_TAR)
> +TRANS_FLAGS2(ISA207, BCTAR, bclr_helper, BCOND_TAR)
>  
> -- 
> 2.55.0
>