From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: Shivani Nittor <shivani@linux.ibm.com>,
Glenn Miles <milesg@linux.ibm.com>,
Amit Machhiwal <amachhiw@linux.ibm.com>,
Chinmay Rath <rathc@linux.ibm.com>,
Aniket Sahu <asahu1x@linux.ibm.com>
Subject: [PULL 13/41] target/ppc: Convert mcrf to decode tree
Date: Fri, 28 Aug 2026 11:36:48 +0530 [thread overview]
Message-ID: <20260828060716.91672-14-harshpb@linux.ibm.com> (raw)
In-Reply-To: <20260828060716.91672-1-harshpb@linux.ibm.com>
From: Shivani Nittor <shivani@linux.ibm.com>
Convert mcrf to decode tree specification. The functionality
was tested by comparing the qemu -D log -d op,in_asm output
as well as single stepping gdb.
Signed-off-by: Shivani Nittor <shivani@linux.ibm.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Amit Machhiwal <amachhiw@linux.ibm.com>
Signed-off-by: Chinmay Rath <rathc@linux.ibm.com>
Tested-by: Aniket Sahu <asahu1x@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260827133010.278889-10-rathc@linux.ibm.com
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
---
target/ppc/insn32.decode | 6 ++++++
target/ppc/translate.c | 7 -------
target/ppc/translate/misc-impl.c.inc | 6 ++++++
3 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index ef0fe12959..f928cd6602 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -1452,6 +1452,12 @@ MSGSYNC 011111 ----- ----- ----- 1101110110 -
SYNC 011111 -- ... --- .. ----- 1001010110 - @X_sync
EIEIO 011111 ----- ----- ----- 1101010110 -
+# Condition Register Field Instruction
+
+&XL_bfa bf bfa
+@XL_bfa ...... bf:3 .. bfa:3 .. ..... ..... ..... .
+MCRF 010011 ... -- ... -- ----- 00000 00000 - @XL_bfa
+
# Branch History Rolling Buffer (BHRB) Instructions
&XFX_bhrbe rt bhrbe
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 53acd54ad4..7e7ef4e32d 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -3642,12 +3642,6 @@ GEN_CRLOGIC(crorc, tcg_gen_orc_i32, 0x0D);
/* crxor */
GEN_CRLOGIC(crxor, tcg_gen_xor_i32, 0x06);
-/* mcrf */
-static void gen_mcrf(DisasContext *ctx)
-{
- tcg_gen_mov_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfS(ctx->opcode)]);
-}
-
/*** System linkage ***/
/* rfi (supervisor only) */
@@ -5709,7 +5703,6 @@ GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW),
GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW),
GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW),
GEN_HANDLER_E(bctar, 0x13, 0x10, 0x11, 0x0000E000, PPC_NONE, PPC2_BCTAR_ISA207),
-GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001, PPC_INTEGER),
GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW),
#if defined(TARGET_PPC64)
GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B),
diff --git a/target/ppc/translate/misc-impl.c.inc b/target/ppc/translate/misc-impl.c.inc
index cbf82b1ea0..890fbb209e 100644
--- a/target/ppc/translate/misc-impl.c.inc
+++ b/target/ppc/translate/misc-impl.c.inc
@@ -155,3 +155,9 @@ static bool trans_ATTN(DisasContext *ctx, arg_ATTN *a)
return false;
#endif
}
+
+static bool trans_MCRF(DisasContext *ctx, arg_MCRF *a)
+{
+ tcg_gen_mov_i32(cpu_crf[a->bf], cpu_crf[a->bfa]);
+ return true;
+}
--
2.52.0
next prev parent reply other threads:[~2026-08-28 6:08 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-28 6:06 [PULL 00/41] ppc-for-11.2 queue Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 01/41] linux-headers: Update to include KVM_CAP_PPC_COMPAT_CAPS Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 02/41] target/ppc/kvm: Add support for querying host compatibility mode Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 03/41] target/ppc/kvm: Use host compatibility mode for nested guests Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 04/41] ppc/xive: Trigger the pending interrupt for a guest after migration Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 05/41] target/ppc: Migrate extswsli to decodetree Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 06/41] target/ppc: Migrate atomic loads " Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 07/41] target/ppc: Convert cache instructions " Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 08/41] target/ppc: Move vector merge " Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 09/41] target/ppc: Move vector pack " Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 10/41] target/ppc: Move st{b, h, w, d, q}cx " Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 11/41] target/ppc: convert slw, srw instruction via decode spec Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 12/41] target/ppc: convert sraw[i] " Harsh Prateek Bora
2026-08-28 6:06 ` Harsh Prateek Bora [this message]
2026-08-28 6:06 ` [PULL 14/41] target/ppc: Move fixed-point Shift insns to decodetree Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 15/41] target/ppc: Move fixed-point byte-reversal store " Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 16/41] target/ppc: Move GPR atomic load/store instructions " Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 17/41] target/ppc: Move isync instruction " Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 18/41] target/ppc: Convert b{a, l, la} to decode tree Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 19/41] target/ppc: move various conditional branch insns to decodetree Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 20/41] target/ppc: Fix TRANS* macro variadic arguments handling Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 21/41] target/ppc: Move wait instruction to decodetree Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 22/41] target/ppc: Move sleep & friends " Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 23/41] target/ppc: Refactor sleep and its variants to use a common helper Harsh Prateek Bora
2026-08-28 6:06 ` [PULL 24/41] target/ppc: Move Condition Register access instructions to decodetree Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 25/41] target/ppc: Move Condition Register logical " Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 26/41] target/ppc: make do_ea_calc_ra available for 32 bit builds Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 27/41] target/ppc: Move Fixed-Point Load/Store String instructions to decodetree Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 28/41] target/ppc: Move VMX integer arithmetic and BCD " Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 29/41] target/ppc: Move rlwimi, rlwinm " Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 30/41] target/ppc: Move lmw, stmw " Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 31/41] target/ppc: Move mfmsr, mtmsr[d] " Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 32/41] target/ppc: Move byte-reverse " Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 33/41] target/ppc: Move system call and rfi " Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 34/41] target/ppc: Replace PPC2_VSX207 flag with PPC2_ISA207 Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 35/41] target/ppc: Use PPC2_ISA207 instead of PPC2_BCTAR_ISA207 Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 36/41] target/ppc: Use PPC2_ISA207 instead of PPC2_LSQ_ISA207 Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 37/41] target/ppc: Use PPC2_ISA207 instead of PPC2_ALTIVEC_207 Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 38/41] target/ppc: Use PPC2_ISA207 instead of PPC2_ISA207S Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 39/41] target/ppc: Reorder PPC2 flags Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 40/41] target/ppc: Add ICBT support for ISA version 2.07 Harsh Prateek Bora
2026-08-28 6:07 ` [PULL 41/41] target/ppc: Add self as maintainer for PowerPC TCG CPUs Harsh Prateek Bora
2026-08-28 23:34 ` [PULL 00/41] ppc-for-11.2 queue Richard Henderson
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