From: sashiko-bot@kernel.org
To: "Jisheng Zhang" <jszhang@kernel.org>
Cc: Frank.Li@kernel.org,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
linux-serial@vger.kernel.org, linux-clk@vger.kernel.org,
lee@kernel.org, robh@kernel.org, mfd@lists.linux.dev,
devicetree@vger.kernel.org, linux-i3c@lists.infradead.org,
conor+dt@kernel.org
Subject: Re: [PATCH 15/20] dt-bindings: clock: add Synaptics SL261X clock
Date: Tue, 29 Sep 2026 06:44:34 +0000 [thread overview]
Message-ID: <20260929064435.10DAE1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260929061417.20733-16-jszhang@kernel.org>
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [Medium] dt-bindings: clock: schema erroneously matches generic syscon globally
- [Medium] dt-bindings: clock: missing clock-cells in required properties
- [Medium] dt-bindings: clock: missing clock IDs for AIO clock controller
- [Low] dt-bindings: clock: missing include guard in header file
--
commit e7f8a3b9148879b63e354fd7d1d51ae0ec2df9d0
Author: Jisheng Zhang <jszhang@kernel.org>
dt-bindings: clock: add Synaptics SL261X clock
Add support for clocks, plls in Synaptics SL261X SoCs.
> diff --git a/Documentation/devicetree/bindings/clock/syna,sl261x-clk.yaml b/Documentation/devicetree/bindings/clock/syna,sl261x-clk.yaml
> new file mode 100755
> index 0000000000000..3fd380c1dd39d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/syna,sl261x-clk.yaml
> @@ -0,0 +1,92 @@
[ ... ]
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - syna,sl261x-soc-clk
> + - syna,sl261x-cpu-clk
> + - syna,sl261x-aio-clk
> + - syna,sl261x-system-clk
> + - items:
> + - const: simple-mfd
> + - const: syscon
[Severity: Medium]
Will defining these generic strings as valid matches cause the schema
toolchain to improperly select and apply this highly restrictive clock
schema to all syscon nodes system-wide?
> +
> + reg:
> + maxItems: 1
[ ... ]
> + '#clock-cells':
> + const: 1
> +
> + clocks:
> + maxItems: 1
> + description: Reference clock used as the input to the PLLs.
> +
> +required:
> + - compatible
[Severity: Medium]
Should '#clock-cells' be explicitly included in this required list to
enforce that these nodes act as valid clock providers?
> +
> +allOf:
[ ... ]
> + else:
> + properties:
> + syna,gbl-syscon: false
> +
> +additionalProperties: false
[Severity: Medium]
When applied to a generic simple-mfd or syscon node system-wide, will this
strict constraint incorrectly reject valid properties and child nodes?
[ ... ]
> diff --git a/include/dt-bindings/clock/syna,sl261x.h b/include/dt-bindings/clock/syna,sl261x.h
> new file mode 100644
> index 0000000000000..4649b233f08a5
> --- /dev/null
> +++ b/include/dt-bindings/clock/syna,sl261x.h
> @@ -0,0 +1,131 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +/*
> + * Synaptics SL261X clock tree IDs
> + *
> + * Copyright (C) 2025 Synaptics Incorporated
> + *
> + * Author: Jisheng Zhang <jszhang@kernel.org>
> + */
[Severity: Low]
Does this file need a standard include guard (e.g.,
#ifndef _DT_BINDINGS_CLOCK_SYNA_SL261X_H) to prevent macro redefinition
warnings and compilation errors if included multiple times?
> +
> +/* SoC domain */
> +
> +/* GBL common clks */
> +#define CLK_CPUFASTREF 0
[Severity: Medium]
The header explicitly maps domains like SoC, CPU, and sysmgr, but lacks a
macro section defining IDs for the AIO clock controller.
Since the schema declares the AIO clock controller (compatible =
"syna,sl261x-aio-clk") and requires '#clock-cells = <1>', device tree
authors need valid IDs to consume its clocks.
Are there missing clock IDs for the AIO clock controller?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260929061417.20733-1-jszhang@kernel.org?part=15
WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Jisheng Zhang" <jszhang@kernel.org>
Cc: Frank.Li@kernel.org,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
linux-serial@vger.kernel.org, linux-clk@vger.kernel.org,
lee@kernel.org, robh@kernel.org, mfd@lists.linux.dev,
devicetree@vger.kernel.org, linux-i3c@lists.infradead.org,
conor+dt@kernel.org
Subject: Re: [PATCH 15/20] dt-bindings: clock: add Synaptics SL261X clock
Date: Tue, 29 Sep 2026 06:44:34 +0000 [thread overview]
Message-ID: <20260929064435.10DAE1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260929061417.20733-16-jszhang@kernel.org>
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [Medium] dt-bindings: clock: schema erroneously matches generic syscon globally
- [Medium] dt-bindings: clock: missing clock-cells in required properties
- [Medium] dt-bindings: clock: missing clock IDs for AIO clock controller
- [Low] dt-bindings: clock: missing include guard in header file
--
commit e7f8a3b9148879b63e354fd7d1d51ae0ec2df9d0
Author: Jisheng Zhang <jszhang@kernel.org>
dt-bindings: clock: add Synaptics SL261X clock
Add support for clocks, plls in Synaptics SL261X SoCs.
> diff --git a/Documentation/devicetree/bindings/clock/syna,sl261x-clk.yaml b/Documentation/devicetree/bindings/clock/syna,sl261x-clk.yaml
> new file mode 100755
> index 0000000000000..3fd380c1dd39d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/syna,sl261x-clk.yaml
> @@ -0,0 +1,92 @@
[ ... ]
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - syna,sl261x-soc-clk
> + - syna,sl261x-cpu-clk
> + - syna,sl261x-aio-clk
> + - syna,sl261x-system-clk
> + - items:
> + - const: simple-mfd
> + - const: syscon
[Severity: Medium]
Will defining these generic strings as valid matches cause the schema
toolchain to improperly select and apply this highly restrictive clock
schema to all syscon nodes system-wide?
> +
> + reg:
> + maxItems: 1
[ ... ]
> + '#clock-cells':
> + const: 1
> +
> + clocks:
> + maxItems: 1
> + description: Reference clock used as the input to the PLLs.
> +
> +required:
> + - compatible
[Severity: Medium]
Should '#clock-cells' be explicitly included in this required list to
enforce that these nodes act as valid clock providers?
> +
> +allOf:
[ ... ]
> + else:
> + properties:
> + syna,gbl-syscon: false
> +
> +additionalProperties: false
[Severity: Medium]
When applied to a generic simple-mfd or syscon node system-wide, will this
strict constraint incorrectly reject valid properties and child nodes?
[ ... ]
> diff --git a/include/dt-bindings/clock/syna,sl261x.h b/include/dt-bindings/clock/syna,sl261x.h
> new file mode 100644
> index 0000000000000..4649b233f08a5
> --- /dev/null
> +++ b/include/dt-bindings/clock/syna,sl261x.h
> @@ -0,0 +1,131 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +/*
> + * Synaptics SL261X clock tree IDs
> + *
> + * Copyright (C) 2025 Synaptics Incorporated
> + *
> + * Author: Jisheng Zhang <jszhang@kernel.org>
> + */
[Severity: Low]
Does this file need a standard include guard (e.g.,
#ifndef _DT_BINDINGS_CLOCK_SYNA_SL261X_H) to prevent macro redefinition
warnings and compilation errors if included multiple times?
> +
> +/* SoC domain */
> +
> +/* GBL common clks */
> +#define CLK_CPUFASTREF 0
[Severity: Medium]
The header explicitly maps domains like SoC, CPU, and sysmgr, but lacks a
macro section defining IDs for the AIO clock controller.
Since the schema declares the AIO clock controller (compatible =
"syna,sl261x-aio-clk") and requires '#clock-cells = <1>', device tree
authors need valid IDs to consume its clocks.
Are there missing clock IDs for the AIO clock controller?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260929061417.20733-1-jszhang@kernel.org?part=15
--
linux-i3c mailing list
linux-i3c@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-i3c
next prev parent reply other threads:[~2026-09-29 6:44 UTC|newest]
Thread overview: 108+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-29 6:13 [PATCH 00/20] arm64: add Synaptics SL261X SoCs and RDK boards Jisheng Zhang
2026-09-29 6:13 ` Jisheng Zhang
2026-09-29 6:13 ` [PATCH 01/20] dt-bindings: serial: snps-dw-apb-uart: Add Synaptics sl261x uart Jisheng Zhang
2026-09-29 6:13 ` Jisheng Zhang
2026-09-29 6:44 ` sashiko-bot
2026-09-29 6:44 ` sashiko-bot
2026-09-29 6:13 ` [PATCH 02/20] dt-bindings: i2c: dw: Add Synaptics sl261x i2c Jisheng Zhang
2026-09-29 6:13 ` Jisheng Zhang
2026-09-29 6:39 ` sashiko-bot
2026-09-29 6:39 ` sashiko-bot
2026-09-29 20:57 ` Andi Shyti
2026-09-29 20:57 ` Andi Shyti
2026-09-29 6:14 ` [PATCH 03/20] spi: dt-bindings: snps,dw-apb-ssi: Add Synaptics sl261x spi Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:39 ` sashiko-bot
2026-09-29 6:39 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 04/20] dt-bindings: i3c: dw: support up to two reset lines Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:43 ` sashiko-bot
2026-09-29 6:43 ` sashiko-bot
2026-09-29 19:40 ` Conor Dooley
2026-09-29 6:14 ` [PATCH 05/20] i3c: dw: switch to array-based exclusive reset control Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:45 ` sashiko-bot
2026-09-29 15:01 ` Frank Li
2026-09-29 15:01 ` Frank Li
2026-09-29 6:14 ` [PATCH 06/20] dt-bindings: i3c: Add Synaptics sl261x i3c Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:41 ` sashiko-bot
2026-09-29 6:41 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 07/20] arm64: kconfig: let ARCH_BERLIN cover Synaptics arm64 SoCs Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:40 ` sashiko-bot
2026-09-29 6:40 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 08/20] dt-bindings: reset: add Synaptics SL261X SoCs Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:42 ` sashiko-bot
2026-09-29 6:42 ` sashiko-bot
2026-09-29 19:44 ` Conor Dooley
2026-09-30 15:15 ` Jisheng Zhang
2026-09-30 15:15 ` Jisheng Zhang
2026-09-30 16:49 ` Conor Dooley
2026-10-02 15:35 ` Jisheng Zhang
2026-10-02 15:35 ` Jisheng Zhang
2026-10-05 10:50 ` Conor Dooley
2026-09-29 6:14 ` [PATCH 09/20] reset: add Synaptics SL261x reset support Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:47 ` sashiko-bot
2026-09-29 6:47 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 10/20] pinctrl: berlin: use u16 instead of u8 for the offset Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:42 ` sashiko-bot
2026-09-29 6:42 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 11/20] pinctrl: berlin: enable module build support Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 12/20] pinctrl: berlin: add optional pinconf support Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 13/20] dt-bindings: pinctrl: berlin: Support Synaptics SL261X SoCs Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 14/20] pinctrl: berlin: support " Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:47 ` sashiko-bot
2026-09-29 6:47 ` sashiko-bot
2026-09-29 15:34 ` Uwe Kleine-König
2026-09-29 6:14 ` [PATCH 15/20] dt-bindings: clock: add Synaptics SL261X clock Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:44 ` sashiko-bot [this message]
2026-09-29 6:44 ` sashiko-bot
2026-09-29 19:46 ` Conor Dooley
2026-09-29 20:49 ` Rob Herring (Arm)
2026-09-29 20:49 ` Rob Herring (Arm)
2026-09-30 14:18 ` Jisheng Zhang
2026-09-30 14:18 ` Jisheng Zhang
2026-09-29 6:14 ` [PATCH 16/20] clk: berlin: add Synaptics SL261X SoC clocks and plls Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:50 ` sashiko-bot
2026-09-29 6:50 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 17/20] dt-bindings: mfd: Add Synaptics SL261x global block binding Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:45 ` sashiko-bot
2026-09-29 19:55 ` Conor Dooley
2026-09-29 6:14 ` [PATCH 18/20] regulator: dt-bindings: sy8827n: support standard properties Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:40 ` sashiko-bot
2026-09-29 6:40 ` sashiko-bot
2026-09-29 19:40 ` Conor Dooley
2026-09-29 6:14 ` [PATCH 19/20] dt-bindings: arm: berlin: Add Synaptics SL261X SoC and RDK board Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:53 ` sashiko-bot
2026-09-29 6:53 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 20/20] arm64: dts: synaptics: " Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:52 ` sashiko-bot
2026-09-29 6:52 ` sashiko-bot
2026-09-29 19:38 ` [PATCH 00/20] arm64: add Synaptics SL261X SoCs and RDK boards Conor Dooley
2026-09-30 14:15 ` Jisheng Zhang
2026-09-30 14:15 ` Jisheng Zhang
2026-09-30 14:32 ` Jisheng Zhang
2026-09-30 14:32 ` Jisheng Zhang
2026-09-30 16:35 ` Conor Dooley
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