From: sashiko-bot@kernel.org
To: "Jisheng Zhang" <jszhang@kernel.org>
Cc: robh@kernel.org, lee@kernel.org,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
mfd@lists.linux.dev, Frank.Li@kernel.org, conor+dt@kernel.org,
linux-i3c@lists.infradead.org, linux-serial@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 09/20] reset: add Synaptics SL261x reset support
Date: Tue, 29 Sep 2026 06:47:06 +0000 [thread overview]
Message-ID: <20260929064706.750881F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260929061417.20733-10-jszhang@kernel.org>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Medium] reset: sl261x: potential NULL pointer dereference in probe
- [Medium] reset: sl261x: unsafe read-modify-write on non-sticky pulse triggers
- [Low] reset: sl261x: typo 'sl261x2' in driver name and probe function
--
commit 78616d8a7b66b0ac665b311775dd566f2469412a
Author: Jisheng Zhang <jszhang@kernel.org>
reset: add Synaptics SL261x reset support
This commit adds support for the reset controller in Synaptics SL261X SoCs.
> diff --git a/drivers/reset/reset-sl261x.c b/drivers/reset/reset-sl261x.c
> new file mode 100644
> --- /dev/null
> +++ b/drivers/reset/reset-sl261x.c
[ ... ]
> +static int sl261x_reset_reset(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct sl261x_reset_priv *priv = to_sl261x_reset_priv(rcdev);
> + const struct sl261x_reset_cfg *cfg = &priv->cfgs[id];
> +
> + if (cfg->sticky) {
> + regmap_clear_bits(priv->regmap, cfg->reg, cfg->bit);
> + usleep_range(10, 15);
> + return regmap_set_bits(priv->regmap, cfg->reg, cfg->bit);
> + }
> +
> + return regmap_set_bits(priv->regmap, cfg->reg, cfg->bit);
[Severity: Medium]
Could this read-modify-write operation disrupt concurrent resets?
If the non-sticky hardware registers are active-high self-clearing pulse
triggers that read as 1 while active, the regmap_set_bits() operation
might read 1s for concurrently active resets and write them back,
unintentionally extending or re-triggering them.
[ ... ]
> +static const struct reset_control_ops sl261x_reset_ops = {
> + .reset = sl261x_reset_reset,
> + .assert = sl261x_reset_assert,
> + .deassert = sl261x_reset_deassert,
> +};
> +
> +static int sl261x2_reset_probe(struct platform_device *pdev)
[Severity: Low]
Is the "sl261x2" in the probe function name intentional? It looks like a
typo.
> +{
> + struct device_node *parent_np;
> + struct sl261x_reset_priv *priv;
> + const struct sl261x_reset_data *data = device_get_match_data(&pdev->dev);
> +
> + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + parent_np = of_get_parent(pdev->dev.of_node);
> + priv->regmap = syscon_node_to_regmap(parent_np);
> + of_node_put(parent_np);
> + if (IS_ERR(priv->regmap))
> + return PTR_ERR(priv->regmap);
> +
> + priv->rcdev.owner = THIS_MODULE;
> + priv->rcdev.ops = &sl261x_reset_ops;
> + priv->rcdev.of_node = pdev->dev.of_node;
> + priv->rcdev.of_reset_n_cells = 1;
> + priv->rcdev.nr_resets = data->num;
[Severity: Medium]
Can data be NULL here?
If the driver is bound via sysfs to a device that has a valid syscon parent
but does not match the OF compatible strings, device_get_match_data() will
return NULL. Unconditionally dereferencing data->num in this case would
cause a NULL pointer dereference.
> + priv->cfgs = data->cfgs;
> +
> + return devm_reset_controller_register(&pdev->dev, &priv->rcdev);
> +}
> +
> +static const struct of_device_id sl261x_reset_dt_match[] = {
> + { .compatible = "syna,sl261x-reset", .data = &sl261x_reset_data },
> + { .compatible = "syna,sl261x-system-reset", .data = &sl261x_system_reset_data },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, sl261x_reset_dt_match);
> +
> +static struct platform_driver sl261x_reset_driver = {
> + .probe = sl261x2_reset_probe,
> + .driver = {
> + .name = "sl261x2-reset",
[Severity: Low]
Does this driver name intentionally use "sl261x2-reset"? Exposing a confusing
name to the platform bus and sysfs might break userspace scripts expecting a
consistent "sl261x-reset" name.
> + .of_match_table = sl261x_reset_dt_match,
> + },
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260929061417.20733-1-jszhang@kernel.org?part=9
--
linux-i3c mailing list
linux-i3c@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-i3c
WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Jisheng Zhang" <jszhang@kernel.org>
Cc: robh@kernel.org, lee@kernel.org,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
mfd@lists.linux.dev, Frank.Li@kernel.org, conor+dt@kernel.org,
linux-i3c@lists.infradead.org, linux-serial@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 09/20] reset: add Synaptics SL261x reset support
Date: Tue, 29 Sep 2026 06:47:06 +0000 [thread overview]
Message-ID: <20260929064706.750881F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260929061417.20733-10-jszhang@kernel.org>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Medium] reset: sl261x: potential NULL pointer dereference in probe
- [Medium] reset: sl261x: unsafe read-modify-write on non-sticky pulse triggers
- [Low] reset: sl261x: typo 'sl261x2' in driver name and probe function
--
commit 78616d8a7b66b0ac665b311775dd566f2469412a
Author: Jisheng Zhang <jszhang@kernel.org>
reset: add Synaptics SL261x reset support
This commit adds support for the reset controller in Synaptics SL261X SoCs.
> diff --git a/drivers/reset/reset-sl261x.c b/drivers/reset/reset-sl261x.c
> new file mode 100644
> --- /dev/null
> +++ b/drivers/reset/reset-sl261x.c
[ ... ]
> +static int sl261x_reset_reset(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct sl261x_reset_priv *priv = to_sl261x_reset_priv(rcdev);
> + const struct sl261x_reset_cfg *cfg = &priv->cfgs[id];
> +
> + if (cfg->sticky) {
> + regmap_clear_bits(priv->regmap, cfg->reg, cfg->bit);
> + usleep_range(10, 15);
> + return regmap_set_bits(priv->regmap, cfg->reg, cfg->bit);
> + }
> +
> + return regmap_set_bits(priv->regmap, cfg->reg, cfg->bit);
[Severity: Medium]
Could this read-modify-write operation disrupt concurrent resets?
If the non-sticky hardware registers are active-high self-clearing pulse
triggers that read as 1 while active, the regmap_set_bits() operation
might read 1s for concurrently active resets and write them back,
unintentionally extending or re-triggering them.
[ ... ]
> +static const struct reset_control_ops sl261x_reset_ops = {
> + .reset = sl261x_reset_reset,
> + .assert = sl261x_reset_assert,
> + .deassert = sl261x_reset_deassert,
> +};
> +
> +static int sl261x2_reset_probe(struct platform_device *pdev)
[Severity: Low]
Is the "sl261x2" in the probe function name intentional? It looks like a
typo.
> +{
> + struct device_node *parent_np;
> + struct sl261x_reset_priv *priv;
> + const struct sl261x_reset_data *data = device_get_match_data(&pdev->dev);
> +
> + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + parent_np = of_get_parent(pdev->dev.of_node);
> + priv->regmap = syscon_node_to_regmap(parent_np);
> + of_node_put(parent_np);
> + if (IS_ERR(priv->regmap))
> + return PTR_ERR(priv->regmap);
> +
> + priv->rcdev.owner = THIS_MODULE;
> + priv->rcdev.ops = &sl261x_reset_ops;
> + priv->rcdev.of_node = pdev->dev.of_node;
> + priv->rcdev.of_reset_n_cells = 1;
> + priv->rcdev.nr_resets = data->num;
[Severity: Medium]
Can data be NULL here?
If the driver is bound via sysfs to a device that has a valid syscon parent
but does not match the OF compatible strings, device_get_match_data() will
return NULL. Unconditionally dereferencing data->num in this case would
cause a NULL pointer dereference.
> + priv->cfgs = data->cfgs;
> +
> + return devm_reset_controller_register(&pdev->dev, &priv->rcdev);
> +}
> +
> +static const struct of_device_id sl261x_reset_dt_match[] = {
> + { .compatible = "syna,sl261x-reset", .data = &sl261x_reset_data },
> + { .compatible = "syna,sl261x-system-reset", .data = &sl261x_system_reset_data },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, sl261x_reset_dt_match);
> +
> +static struct platform_driver sl261x_reset_driver = {
> + .probe = sl261x2_reset_probe,
> + .driver = {
> + .name = "sl261x2-reset",
[Severity: Low]
Does this driver name intentionally use "sl261x2-reset"? Exposing a confusing
name to the platform bus and sysfs might break userspace scripts expecting a
consistent "sl261x-reset" name.
> + .of_match_table = sl261x_reset_dt_match,
> + },
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260929061417.20733-1-jszhang@kernel.org?part=9
next prev parent reply other threads:[~2026-09-29 6:47 UTC|newest]
Thread overview: 108+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-29 6:13 [PATCH 00/20] arm64: add Synaptics SL261X SoCs and RDK boards Jisheng Zhang
2026-09-29 6:13 ` Jisheng Zhang
2026-09-29 6:13 ` [PATCH 01/20] dt-bindings: serial: snps-dw-apb-uart: Add Synaptics sl261x uart Jisheng Zhang
2026-09-29 6:13 ` Jisheng Zhang
2026-09-29 6:44 ` sashiko-bot
2026-09-29 6:44 ` sashiko-bot
2026-09-29 6:13 ` [PATCH 02/20] dt-bindings: i2c: dw: Add Synaptics sl261x i2c Jisheng Zhang
2026-09-29 6:13 ` Jisheng Zhang
2026-09-29 6:39 ` sashiko-bot
2026-09-29 6:39 ` sashiko-bot
2026-09-29 20:57 ` Andi Shyti
2026-09-29 20:57 ` Andi Shyti
2026-09-29 6:14 ` [PATCH 03/20] spi: dt-bindings: snps,dw-apb-ssi: Add Synaptics sl261x spi Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:39 ` sashiko-bot
2026-09-29 6:39 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 04/20] dt-bindings: i3c: dw: support up to two reset lines Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:43 ` sashiko-bot
2026-09-29 6:43 ` sashiko-bot
2026-09-29 19:40 ` Conor Dooley
2026-09-29 6:14 ` [PATCH 05/20] i3c: dw: switch to array-based exclusive reset control Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:45 ` sashiko-bot
2026-09-29 15:01 ` Frank Li
2026-09-29 15:01 ` Frank Li
2026-09-29 6:14 ` [PATCH 06/20] dt-bindings: i3c: Add Synaptics sl261x i3c Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:41 ` sashiko-bot
2026-09-29 6:41 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 07/20] arm64: kconfig: let ARCH_BERLIN cover Synaptics arm64 SoCs Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:40 ` sashiko-bot
2026-09-29 6:40 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 08/20] dt-bindings: reset: add Synaptics SL261X SoCs Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:42 ` sashiko-bot
2026-09-29 6:42 ` sashiko-bot
2026-09-29 19:44 ` Conor Dooley
2026-09-30 15:15 ` Jisheng Zhang
2026-09-30 15:15 ` Jisheng Zhang
2026-09-30 16:49 ` Conor Dooley
2026-10-02 15:35 ` Jisheng Zhang
2026-10-02 15:35 ` Jisheng Zhang
2026-10-05 10:50 ` Conor Dooley
2026-09-29 6:14 ` [PATCH 09/20] reset: add Synaptics SL261x reset support Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:47 ` sashiko-bot [this message]
2026-09-29 6:47 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 10/20] pinctrl: berlin: use u16 instead of u8 for the offset Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:42 ` sashiko-bot
2026-09-29 6:42 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 11/20] pinctrl: berlin: enable module build support Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 12/20] pinctrl: berlin: add optional pinconf support Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 13/20] dt-bindings: pinctrl: berlin: Support Synaptics SL261X SoCs Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 14/20] pinctrl: berlin: support " Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:47 ` sashiko-bot
2026-09-29 6:47 ` sashiko-bot
2026-09-29 15:34 ` Uwe Kleine-König
2026-09-29 6:14 ` [PATCH 15/20] dt-bindings: clock: add Synaptics SL261X clock Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:44 ` sashiko-bot
2026-09-29 6:44 ` sashiko-bot
2026-09-29 19:46 ` Conor Dooley
2026-09-29 20:49 ` Rob Herring (Arm)
2026-09-29 20:49 ` Rob Herring (Arm)
2026-09-30 14:18 ` Jisheng Zhang
2026-09-30 14:18 ` Jisheng Zhang
2026-09-29 6:14 ` [PATCH 16/20] clk: berlin: add Synaptics SL261X SoC clocks and plls Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:50 ` sashiko-bot
2026-09-29 6:50 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 17/20] dt-bindings: mfd: Add Synaptics SL261x global block binding Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:45 ` sashiko-bot
2026-09-29 6:45 ` sashiko-bot
2026-09-29 19:55 ` Conor Dooley
2026-09-29 6:14 ` [PATCH 18/20] regulator: dt-bindings: sy8827n: support standard properties Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:40 ` sashiko-bot
2026-09-29 6:40 ` sashiko-bot
2026-09-29 19:40 ` Conor Dooley
2026-09-29 6:14 ` [PATCH 19/20] dt-bindings: arm: berlin: Add Synaptics SL261X SoC and RDK board Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:53 ` sashiko-bot
2026-09-29 6:53 ` sashiko-bot
2026-09-29 6:14 ` [PATCH 20/20] arm64: dts: synaptics: " Jisheng Zhang
2026-09-29 6:14 ` Jisheng Zhang
2026-09-29 6:52 ` sashiko-bot
2026-09-29 6:52 ` sashiko-bot
2026-09-29 19:38 ` [PATCH 00/20] arm64: add Synaptics SL261X SoCs and RDK boards Conor Dooley
2026-09-30 14:15 ` Jisheng Zhang
2026-09-30 14:15 ` Jisheng Zhang
2026-09-30 14:32 ` Jisheng Zhang
2026-09-30 14:32 ` Jisheng Zhang
2026-09-30 16:35 ` Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260929064706.750881F000FF@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=Frank.Li@kernel.org \
--cc=alexandre.belloni@bootlin.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jszhang@kernel.org \
--cc=lee@kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-i3c@lists.infradead.org \
--cc=linux-serial@vger.kernel.org \
--cc=mfd@lists.linux.dev \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.