All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Jisheng Zhang" <jszhang@kernel.org>
Cc: lee@kernel.org, linux-serial@vger.kernel.org,
	conor+dt@kernel.org, linux-i3c@lists.infradead.org,
	"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
	devicetree@vger.kernel.org, mfd@lists.linux.dev, robh@kernel.org,
	linux-clk@vger.kernel.org, Frank.Li@kernel.org
Subject: Re: [PATCH 12/20] pinctrl: berlin: add optional pinconf support
Date: Tue, 29 Sep 2026 06:45:59 +0000	[thread overview]
Message-ID: <20260929064600.6CAF01F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260929061417.20733-13-jszhang@kernel.org>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] pinctrl: Unmasked DRIVE_STRENGTH argument corrupts adjacent register bits
- [Medium] pinctrl: memory over-allocation due to incorrect map reservation logic
--

commit 9565e1451acca64670b365c5e1dcc3edb4643737
Author: Jisheng Zhang <jszhang@kernel.org>

pinctrl: berlin: add optional pinconf support

Add pinconf support for newer Synaptics SoCs.

> diff --git a/drivers/pinctrl/berlin/berlin.c b/drivers/pinctrl/berlin/berlin.c
> index 0c2179b986295..06c67f00c5276 100644
> --- a/drivers/pinctrl/berlin/berlin.c
> +++ b/drivers/pinctrl/berlin/berlin.c
[ ... ]
> @@ -75,11 +94,19 @@ static int berlin_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrl_dev,
>  		return -EINVAL;
>  	}
>  
> +	ret = pinconf_generic_parse_dt_config(node, pctrl_dev, &configs,
> +					      &num_configs);
> +	if (ret < 0) {
> +		dev_err(pctrl->dev, "%s: could not parse node property\n",
> +			node->name);
> +		return ret;
> +	}
> +
>  	ret = pinctrl_utils_reserve_map(pctrl_dev, map, &reserved_maps,
> -					num_maps, ngroups);
> +					num_maps, ngroups * (num_configs + 1));

[Severity: Medium]
Does this map reservation logic permanently over-allocate kernel memory for the
lifetime of the parsed pin configuration?

The driver reserves map entries using ngroups * (num_configs + 1). However,
pinctrl_utils_add_map_configs() aggregates the entire array of configurations
into a single map entry. Thus, the driver adds at most 2 entries per group
(one for the mux and one for the configs), regardless of num_configs.

When parsing pin configurations from the device tree where num_configs > 1,
this results in (num_configs - 1) * ngroups unused array elements being
allocated.

>  	if (ret) {
>  		dev_err(pctrl->dev, "can't reserve map: %d\n", ret);
> -		return ret;
> +		goto exit;
>  	}
[ ... ]
> +static int berlin_pinconf_group_set(struct pinctrl_dev *pctrl_dev,
> +				    unsigned int group, unsigned long *configs,
> +				    unsigned int nconfigs)
> +{
[ ... ]
> +		switch (param) {
[ ... ]
> +		case PIN_CONFIG_DRIVE_STRENGTH:
> +			if (conf_bits == 10)
> +				mask |= PINCFG_DS_10BIT;
> +			else
> +				mask |= PINCFG_DS_8BIT;
> +			val |= arg;
> +			break;

[Severity: High]
Can this regression cause the unbounded user-provided arg to overflow and
corrupt adjacent register bits?

When the device tree specifies a drive-strength value that exceeds the unmasked
bit width (e.g., > 15), the parsed arg is added directly to val via val |= arg
without applying a bitmask.

Because val and mask are accumulated across all config parameters in a loop,
the overflowing bits from DRIVE_STRENGTH will be written to the register if
they overlap with the composite mask bits requested by other parameters
(e.g., overriding the PINCFG_IE_10BIT state). This could lead to incorrect
hardware pin states and functional failures on key interfaces during device
probe.

> +		case PIN_CONFIG_INPUT_ENABLE:
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260929061417.20733-1-jszhang@kernel.org?part=12

-- 
linux-i3c mailing list
linux-i3c@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-i3c

WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Jisheng Zhang" <jszhang@kernel.org>
Cc: lee@kernel.org, linux-serial@vger.kernel.org,
	conor+dt@kernel.org, linux-i3c@lists.infradead.org,
	"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
	devicetree@vger.kernel.org, mfd@lists.linux.dev, robh@kernel.org,
	linux-clk@vger.kernel.org, Frank.Li@kernel.org
Subject: Re: [PATCH 12/20] pinctrl: berlin: add optional pinconf support
Date: Tue, 29 Sep 2026 06:45:59 +0000	[thread overview]
Message-ID: <20260929064600.6CAF01F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260929061417.20733-13-jszhang@kernel.org>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] pinctrl: Unmasked DRIVE_STRENGTH argument corrupts adjacent register bits
- [Medium] pinctrl: memory over-allocation due to incorrect map reservation logic
--

commit 9565e1451acca64670b365c5e1dcc3edb4643737
Author: Jisheng Zhang <jszhang@kernel.org>

pinctrl: berlin: add optional pinconf support

Add pinconf support for newer Synaptics SoCs.

> diff --git a/drivers/pinctrl/berlin/berlin.c b/drivers/pinctrl/berlin/berlin.c
> index 0c2179b986295..06c67f00c5276 100644
> --- a/drivers/pinctrl/berlin/berlin.c
> +++ b/drivers/pinctrl/berlin/berlin.c
[ ... ]
> @@ -75,11 +94,19 @@ static int berlin_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrl_dev,
>  		return -EINVAL;
>  	}
>  
> +	ret = pinconf_generic_parse_dt_config(node, pctrl_dev, &configs,
> +					      &num_configs);
> +	if (ret < 0) {
> +		dev_err(pctrl->dev, "%s: could not parse node property\n",
> +			node->name);
> +		return ret;
> +	}
> +
>  	ret = pinctrl_utils_reserve_map(pctrl_dev, map, &reserved_maps,
> -					num_maps, ngroups);
> +					num_maps, ngroups * (num_configs + 1));

[Severity: Medium]
Does this map reservation logic permanently over-allocate kernel memory for the
lifetime of the parsed pin configuration?

The driver reserves map entries using ngroups * (num_configs + 1). However,
pinctrl_utils_add_map_configs() aggregates the entire array of configurations
into a single map entry. Thus, the driver adds at most 2 entries per group
(one for the mux and one for the configs), regardless of num_configs.

When parsing pin configurations from the device tree where num_configs > 1,
this results in (num_configs - 1) * ngroups unused array elements being
allocated.

>  	if (ret) {
>  		dev_err(pctrl->dev, "can't reserve map: %d\n", ret);
> -		return ret;
> +		goto exit;
>  	}
[ ... ]
> +static int berlin_pinconf_group_set(struct pinctrl_dev *pctrl_dev,
> +				    unsigned int group, unsigned long *configs,
> +				    unsigned int nconfigs)
> +{
[ ... ]
> +		switch (param) {
[ ... ]
> +		case PIN_CONFIG_DRIVE_STRENGTH:
> +			if (conf_bits == 10)
> +				mask |= PINCFG_DS_10BIT;
> +			else
> +				mask |= PINCFG_DS_8BIT;
> +			val |= arg;
> +			break;

[Severity: High]
Can this regression cause the unbounded user-provided arg to overflow and
corrupt adjacent register bits?

When the device tree specifies a drive-strength value that exceeds the unmasked
bit width (e.g., > 15), the parsed arg is added directly to val via val |= arg
without applying a bitmask.

Because val and mask are accumulated across all config parameters in a loop,
the overflowing bits from DRIVE_STRENGTH will be written to the register if
they overlap with the composite mask bits requested by other parameters
(e.g., overriding the PINCFG_IE_10BIT state). This could lead to incorrect
hardware pin states and functional failures on key interfaces during device
probe.

> +		case PIN_CONFIG_INPUT_ENABLE:
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260929061417.20733-1-jszhang@kernel.org?part=12

  reply	other threads:[~2026-09-29  6:46 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-29  6:13 [PATCH 00/20] arm64: add Synaptics SL261X SoCs and RDK boards Jisheng Zhang
2026-09-29  6:13 ` Jisheng Zhang
2026-09-29  6:13 ` [PATCH 01/20] dt-bindings: serial: snps-dw-apb-uart: Add Synaptics sl261x uart Jisheng Zhang
2026-09-29  6:13   ` Jisheng Zhang
2026-09-29  6:44   ` sashiko-bot
2026-09-29  6:44     ` sashiko-bot
2026-09-29  6:13 ` [PATCH 02/20] dt-bindings: i2c: dw: Add Synaptics sl261x i2c Jisheng Zhang
2026-09-29  6:13   ` Jisheng Zhang
2026-09-29  6:39   ` sashiko-bot
2026-09-29  6:39     ` sashiko-bot
2026-09-29 20:57   ` Andi Shyti
2026-09-29 20:57     ` Andi Shyti
2026-09-29  6:14 ` [PATCH 03/20] spi: dt-bindings: snps,dw-apb-ssi: Add Synaptics sl261x spi Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:39   ` sashiko-bot
2026-09-29  6:39     ` sashiko-bot
2026-09-29  6:14 ` [PATCH 04/20] dt-bindings: i3c: dw: support up to two reset lines Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:43   ` sashiko-bot
2026-09-29  6:43     ` sashiko-bot
2026-09-29 19:40   ` Conor Dooley
2026-09-29  6:14 ` [PATCH 05/20] i3c: dw: switch to array-based exclusive reset control Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:45   ` sashiko-bot
2026-09-29  6:45     ` sashiko-bot
2026-09-29 15:01   ` Frank Li
2026-09-29 15:01     ` Frank Li
2026-09-29  6:14 ` [PATCH 06/20] dt-bindings: i3c: Add Synaptics sl261x i3c Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:41   ` sashiko-bot
2026-09-29  6:41     ` sashiko-bot
2026-09-29  6:14 ` [PATCH 07/20] arm64: kconfig: let ARCH_BERLIN cover Synaptics arm64 SoCs Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:40   ` sashiko-bot
2026-09-29  6:40     ` sashiko-bot
2026-09-29  6:14 ` [PATCH 08/20] dt-bindings: reset: add Synaptics SL261X SoCs Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:42   ` sashiko-bot
2026-09-29  6:42     ` sashiko-bot
2026-09-29 19:44   ` Conor Dooley
2026-09-30 15:15     ` Jisheng Zhang
2026-09-30 15:15       ` Jisheng Zhang
2026-09-30 16:49       ` Conor Dooley
2026-10-02 15:35         ` Jisheng Zhang
2026-10-02 15:35           ` Jisheng Zhang
2026-10-05 10:50           ` Conor Dooley
2026-09-29  6:14 ` [PATCH 09/20] reset: add Synaptics SL261x reset support Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:47   ` sashiko-bot
2026-09-29  6:47     ` sashiko-bot
2026-09-29  6:14 ` [PATCH 10/20] pinctrl: berlin: use u16 instead of u8 for the offset Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:42   ` sashiko-bot
2026-09-29  6:42     ` sashiko-bot
2026-09-29  6:14 ` [PATCH 11/20] pinctrl: berlin: enable module build support Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:45   ` sashiko-bot
2026-09-29  6:45     ` sashiko-bot
2026-09-29  6:14 ` [PATCH 12/20] pinctrl: berlin: add optional pinconf support Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:45   ` sashiko-bot [this message]
2026-09-29  6:45     ` sashiko-bot
2026-09-29  6:14 ` [PATCH 13/20] dt-bindings: pinctrl: berlin: Support Synaptics SL261X SoCs Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:45   ` sashiko-bot
2026-09-29  6:45     ` sashiko-bot
2026-09-29  6:14 ` [PATCH 14/20] pinctrl: berlin: support " Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:47   ` sashiko-bot
2026-09-29  6:47     ` sashiko-bot
2026-09-29 15:34   ` Uwe Kleine-König
2026-09-29  6:14 ` [PATCH 15/20] dt-bindings: clock: add Synaptics SL261X clock Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:44   ` sashiko-bot
2026-09-29  6:44     ` sashiko-bot
2026-09-29 19:46   ` Conor Dooley
2026-09-29 20:49   ` Rob Herring (Arm)
2026-09-29 20:49     ` Rob Herring (Arm)
2026-09-30 14:18     ` Jisheng Zhang
2026-09-30 14:18       ` Jisheng Zhang
2026-09-29  6:14 ` [PATCH 16/20] clk: berlin: add Synaptics SL261X SoC clocks and plls Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:50   ` sashiko-bot
2026-09-29  6:50     ` sashiko-bot
2026-09-29  6:14 ` [PATCH 17/20] dt-bindings: mfd: Add Synaptics SL261x global block binding Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:45   ` sashiko-bot
2026-09-29  6:45     ` sashiko-bot
2026-09-29 19:55   ` Conor Dooley
2026-09-29  6:14 ` [PATCH 18/20] regulator: dt-bindings: sy8827n: support standard properties Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:40   ` sashiko-bot
2026-09-29  6:40     ` sashiko-bot
2026-09-29 19:40   ` Conor Dooley
2026-09-29  6:14 ` [PATCH 19/20] dt-bindings: arm: berlin: Add Synaptics SL261X SoC and RDK board Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:53   ` sashiko-bot
2026-09-29  6:53     ` sashiko-bot
2026-09-29  6:14 ` [PATCH 20/20] arm64: dts: synaptics: " Jisheng Zhang
2026-09-29  6:14   ` Jisheng Zhang
2026-09-29  6:52   ` sashiko-bot
2026-09-29  6:52     ` sashiko-bot
2026-09-29 19:38 ` [PATCH 00/20] arm64: add Synaptics SL261X SoCs and RDK boards Conor Dooley
2026-09-30 14:15   ` Jisheng Zhang
2026-09-30 14:15     ` Jisheng Zhang
2026-09-30 14:32   ` Jisheng Zhang
2026-09-30 14:32     ` Jisheng Zhang
2026-09-30 16:35     ` Conor Dooley

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260929064600.6CAF01F00893@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=Frank.Li@kernel.org \
    --cc=alexandre.belloni@bootlin.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=jszhang@kernel.org \
    --cc=lee@kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-i3c@lists.infradead.org \
    --cc=linux-serial@vger.kernel.org \
    --cc=mfd@lists.linux.dev \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.