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From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: "Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>,
	"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
	"Yoshinori Sato" <yoshinori.sato@nifty.com>
Subject: [PATCH v3 30/33] target/sh4: Use a static table in sh4_exception_name()
Date: Thu, 22 Oct 2026 23:51:10 +0200	[thread overview]
Message-ID: <20261022215115.19680-31-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20261022215115.19680-1-philmd@oss.qualcomm.com>

Replace the switch statement with a static lookup table.

With '-d int', unlisted exception codes are now logged as
"unknown" instead of "???".

Suggested-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
 target/sh4/helper.c | 66 ++++++++++++++-------------------------------
 1 file changed, 20 insertions(+), 46 deletions(-)

diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index 5856bab6983..96465dd94fb 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -18,6 +18,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/cutils.h"
 
 #include "cpu.h"
 #include "exec/cputlb.h"
@@ -49,54 +50,27 @@
 
 const char *sh4_exception_name(int excp)
 {
-    const char *name;
+    /* Exception codes (EXPEVT) are multiples of 0x20 */
+    static const char * const excp_names[] = {
+        [SH4_EXCP_ADDR_ERROR >> 5]               = "addr_error",
+        [SH4_EXCP_TLB_MISS >> 5]                 = "tlb_miss",
+        [SH4_EXCP_TLB_VIOLATION >> 5]            = "tlb_violation",
+        [SH4_EXCP_ILLEGAL_INSTRUCTION >> 5]      = "illegal_instruction",
+        [SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION >> 5] = "slot_illegal_instruction",
+        [SH4_EXCP_FPU_DISABLE >> 5]              = "fpu_disable",
+        [SH4_EXCP_SLOT_FPU_DISABLE >> 5]         = "slot_fpu",
+        [SH4_EXCP_DATA_WRITE >> 5]               = "data_write",
+        [SH4_EXCP_DTLB_MISS_WRITE >> 5]          = "dtlb_miss_write",
+        [SH4_EXCP_DTLB_VIOLATION_WRITE >> 5]     = "dtlb_violation_write",
+        [SH4_EXCP_FPU >> 5]                      = "fpu_exception",
+        [SH4_EXCP_INITIAL_PAGE_WRITE >> 5]       = "initial_page_write",
+        [SH4_EXCP_TRAPA >> 5]                    = "trapa",
+    };
 
-    switch (excp) {
-    case SH4_EXCP_ADDR_ERROR:
-        name = "addr_error";
-        break;
-    case SH4_EXCP_TLB_MISS:
-        name = "tlb_miss";
-        break;
-    case SH4_EXCP_TLB_VIOLATION:
-        name = "tlb_violation";
-        break;
-    case SH4_EXCP_ILLEGAL_INSTRUCTION:
-        name = "illegal_instruction";
-        break;
-    case SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION:
-        name = "slot_illegal_instruction";
-        break;
-    case SH4_EXCP_FPU_DISABLE:
-        name = "fpu_disable";
-        break;
-    case SH4_EXCP_SLOT_FPU_DISABLE:
-        name = "slot_fpu";
-        break;
-    case SH4_EXCP_DATA_WRITE:
-        name = "data_write";
-        break;
-    case SH4_EXCP_DTLB_MISS_WRITE:
-        name = "dtlb_miss_write";
-        break;
-    case SH4_EXCP_DTLB_VIOLATION_WRITE:
-        name = "dtlb_violation_write";
-        break;
-    case SH4_EXCP_FPU:
-        name = "fpu_exception";
-        break;
-    case SH4_EXCP_INITIAL_PAGE_WRITE:
-        name = "initial_page_write";
-        break;
-    case SH4_EXCP_TRAPA:
-        name = "trapa";
-        break;
-    default:
-        name = "???";
-        break;
+    if (excp & 0x1f) {
+        return "unknown";
     }
-
-    return name;
+    return STR_ARRAY_ELEM_OR_NULL(excp_names, excp >> 5) ?: "unknown";
 }
 
 #if defined(CONFIG_USER_ONLY)
-- 
2.55.0



  parent reply	other threads:[~2026-10-22 21:56 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-22 21:50 [PATCH v3 00/33] cpus: Add common CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 01/33] qemu/osdep: Document ARRAY_SIZE() macro rejects pointers Philippe Mathieu-Daudé
2026-10-22 22:02   ` Pierrick Bouvier
2026-10-22 21:50 ` [PATCH v3 02/33] util/cutils: Add STR_ARRAY_ELEM_OR_NULL() for string table lookups Philippe Mathieu-Daudé
2026-10-22 22:02   ` Pierrick Bouvier
2026-10-29 13:19   ` Richard Henderson
2026-10-29 17:04     ` Pierrick Bouvier
2026-10-29 22:12       ` Richard Henderson
2026-10-29 22:19         ` Pierrick Bouvier
2026-10-22 21:50 ` [PATCH v3 03/33] cpus: Add helper to log raised exceptions with '-d int' Philippe Mathieu-Daudé
2026-10-29 13:21   ` Richard Henderson
2026-10-22 21:50 ` [PATCH v3 04/33] cpus: Introduce CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-29 13:29   ` Richard Henderson
2026-10-22 21:50 ` [PATCH v3 05/33] target/alpha: Register " Philippe Mathieu-Daudé
2026-10-29 13:25   ` Richard Henderson
2026-10-22 21:50 ` [PATCH v3 06/33] target/alpha: Use a static table in alpha_exception_name() Philippe Mathieu-Daudé
2026-10-29 13:26   ` Richard Henderson
2026-10-22 21:50 ` [PATCH v3 07/33] target/arm: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-29 13:27   ` Richard Henderson
2026-10-22 21:50 ` [PATCH v3 08/33] target/avr: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 09/33] target/hexagon: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 10/33] target/hppa: " Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 11/33] target/i386: Replace magic value by proper EXCP0E_PAGE definition Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 12/33] target/i386: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 13/33] target/loongarch: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 14/33] target/m68k: " Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 15/33] target/m68k: Use a static table in m68k_exception_name() Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 16/33] target/microblaze: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 17/33] target/mips: Remove EXCP_LAST, use ARRAY_SIZE(excp_names) Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 18/33] target/mips: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-22 21:50 ` [PATCH v3 19/33] target/or1k: " Philippe Mathieu-Daudé
2026-10-22 21:51 ` [PATCH v3 20/33] target/ppc: Name the EBB exceptions Philippe Mathieu-Daudé
2026-10-22 21:51 ` [PATCH v3 21/33] target/ppc: Use a static table in powerpc_excp_name() Philippe Mathieu-Daudé
2026-10-22 21:51 ` [PATCH v3 22/33] target/ppc: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-22 21:51 ` [PATCH v3 23/33] target/riscv: " Philippe Mathieu-Daudé
2026-10-23  1:54   ` Chao Liu via qemu development
2026-10-23  1:54     ` Chao Liu via
2026-10-22 21:51 ` [PATCH v3 24/33] target/rx: Unify BRK and INT trap handling Philippe Mathieu-Daudé
2026-10-22 21:51 ` [PATCH v3 25/33] target/rx: Define exception vector constants Philippe Mathieu-Daudé
2026-10-22 21:51 ` [PATCH v3 26/33] target/rx: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-22 21:51 ` [PATCH v3 27/33] target/s390x: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-26 15:07   ` Cornelia Huck
2026-10-22 21:51 ` [PATCH v3 28/33] target/sh4: Define exception vector constants Philippe Mathieu-Daudé
2026-10-22 21:51 ` [PATCH v3 29/33] target/sh4: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-22 21:51 ` Philippe Mathieu-Daudé [this message]
2026-10-22 21:51 ` [PATCH v3 31/33] target/sparc: Remove always-defined DEBUG_PCALL Philippe Mathieu-Daudé
2026-10-22 21:51 ` [PATCH v3 32/33] target/sparc: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-22 21:51 ` [PATCH v3 33/33] target/xtensa: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé

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