From: Jiayu Du <duge1256@gmail.com>
To: srini@kernel.org
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
dlan@kernel.org, troy.mitchell@linux.spacemit.com,
pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, p.zabel@pengutronix.de,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
Jiayu Du <duge1256@gmail.com>
Subject: [PATCH 1/3] dt-bindings: nvmem: Add SpacemiT K3 eFuse controller
Date: Fri, 6 Nov 2026 14:05:23 +0800 [thread overview]
Message-ID: <20261106060525.346873-2-duge1256@gmail.com> (raw)
In-Reply-To: <20261106060525.346873-1-duge1256@gmail.com>
Describe the SpacemiT K3 eFuse controller and its readable bank 0 and
bank 7 shadow windows, which contain temperature calibration parameters
and other configuration data.
Define the AES_WTM clock and reset, little-endian data and
controller-relative NVMEM offsets. Use fixed-layout cells for the
temperature calibration parameters.
Signed-off-by: Jiayu Du <duge1256@gmail.com>
---
.../bindings/nvmem/spacemit,k3-efuse.yaml | 63 +++++++++++++++++++
MAINTAINERS | 5 ++
2 files changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/spacemit,k3-efuse.yaml
diff --git a/Documentation/devicetree/bindings/nvmem/spacemit,k3-efuse.yaml b/Documentation/devicetree/bindings/nvmem/spacemit,k3-efuse.yaml
new file mode 100644
index 000000000000..93f4301c8289
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/spacemit,k3-efuse.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/spacemit,k3-efuse.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SpacemiT K3 eFuse controller
+
+maintainers:
+ - Jiayu Du <duge1256@gmail.com>
+
+description:
+ The K3 eFuse controller provides configuration and calibration data through
+ shadow registers. NVMEM uses little-endian data and controller-relative
+ offsets. Read access is limited to bank 0 (0x104-0x123) and bank 7 (0x190-0x1af).
+
+allOf:
+ - $ref: nvmem.yaml#
+
+properties:
+ compatible:
+ const: spacemit,k3-efuse
+
+ reg:
+ maxItems: 1
+ description: The 0x400-byte eFuse controller register block.
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - resets
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/spacemit,k3-clocks.h>
+ #include <dt-bindings/reset/spacemit,k3-resets.h>
+
+ efuse@f0702800 {
+ compatible = "spacemit,k3-efuse";
+ reg = <0xf0702800 0x400>;
+ clocks = <&syscon_apmu CLK_APMU_AES_WTM>;
+ resets = <&syscon_apmu RESET_APMU_AES_WTM>;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ temperature-trim@19a {
+ reg = <0x19a 0x2>;
+ bits = <4 8>;
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 46c416cadacd..0a9eb764ffee 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -26525,6 +26525,11 @@ S: Maintained
F: Documentation/devicetree/bindings/sound/spacemit,k1-i2s.yaml
F: sound/soc/spacemit/k1_i2s.c
+SPACEMIT K3 EFUSE DRIVER
+M: Jiayu Du <duge1256@gmail.com>
+S: Maintained
+F: Documentation/devicetree/bindings/nvmem/spacemit,k3-efuse.yaml
+
SPACEMIT RESET CONTROLLER DRIVER
M: Guodong Xu <docular.xu@gmail.com>
L: linux-riscv@lists.infradead.org
--
2.43.0
WARNING: multiple messages have this Message-ID (diff)
From: Jiayu Du <duge1256@gmail.com>
To: srini@kernel.org
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
dlan@kernel.org, troy.mitchell@linux.spacemit.com,
pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, p.zabel@pengutronix.de,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
Jiayu Du <duge1256@gmail.com>
Subject: [PATCH 1/3] dt-bindings: nvmem: Add SpacemiT K3 eFuse controller
Date: Fri, 6 Nov 2026 14:05:23 +0800 [thread overview]
Message-ID: <20261106060525.346873-2-duge1256@gmail.com> (raw)
In-Reply-To: <20261106060525.346873-1-duge1256@gmail.com>
Describe the SpacemiT K3 eFuse controller and its readable bank 0 and
bank 7 shadow windows, which contain temperature calibration parameters
and other configuration data.
Define the AES_WTM clock and reset, little-endian data and
controller-relative NVMEM offsets. Use fixed-layout cells for the
temperature calibration parameters.
Signed-off-by: Jiayu Du <duge1256@gmail.com>
---
.../bindings/nvmem/spacemit,k3-efuse.yaml | 63 +++++++++++++++++++
MAINTAINERS | 5 ++
2 files changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/spacemit,k3-efuse.yaml
diff --git a/Documentation/devicetree/bindings/nvmem/spacemit,k3-efuse.yaml b/Documentation/devicetree/bindings/nvmem/spacemit,k3-efuse.yaml
new file mode 100644
index 000000000000..93f4301c8289
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/spacemit,k3-efuse.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/spacemit,k3-efuse.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SpacemiT K3 eFuse controller
+
+maintainers:
+ - Jiayu Du <duge1256@gmail.com>
+
+description:
+ The K3 eFuse controller provides configuration and calibration data through
+ shadow registers. NVMEM uses little-endian data and controller-relative
+ offsets. Read access is limited to bank 0 (0x104-0x123) and bank 7 (0x190-0x1af).
+
+allOf:
+ - $ref: nvmem.yaml#
+
+properties:
+ compatible:
+ const: spacemit,k3-efuse
+
+ reg:
+ maxItems: 1
+ description: The 0x400-byte eFuse controller register block.
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - resets
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/spacemit,k3-clocks.h>
+ #include <dt-bindings/reset/spacemit,k3-resets.h>
+
+ efuse@f0702800 {
+ compatible = "spacemit,k3-efuse";
+ reg = <0xf0702800 0x400>;
+ clocks = <&syscon_apmu CLK_APMU_AES_WTM>;
+ resets = <&syscon_apmu RESET_APMU_AES_WTM>;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ temperature-trim@19a {
+ reg = <0x19a 0x2>;
+ bits = <4 8>;
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 46c416cadacd..0a9eb764ffee 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -26525,6 +26525,11 @@ S: Maintained
F: Documentation/devicetree/bindings/sound/spacemit,k1-i2s.yaml
F: sound/soc/spacemit/k1_i2s.c
+SPACEMIT K3 EFUSE DRIVER
+M: Jiayu Du <duge1256@gmail.com>
+S: Maintained
+F: Documentation/devicetree/bindings/nvmem/spacemit,k3-efuse.yaml
+
SPACEMIT RESET CONTROLLER DRIVER
M: Guodong Xu <docular.xu@gmail.com>
L: linux-riscv@lists.infradead.org
--
2.43.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2026-11-06 6:07 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 6:05 [PATCH 0/3] Add read-only SpacemiT K3 eFuse support Jiayu Du
2026-11-06 6:05 ` Jiayu Du
2026-11-06 6:05 ` Jiayu Du [this message]
2026-11-06 6:05 ` [PATCH 1/3] dt-bindings: nvmem: Add SpacemiT K3 eFuse controller Jiayu Du
2026-11-06 17:37 ` Conor Dooley
2026-11-06 17:37 ` Conor Dooley
2026-11-06 6:05 ` [PATCH 2/3] nvmem: Add read-only SpacemiT K3 eFuse support Jiayu Du
2026-11-06 6:05 ` Jiayu Du
2026-11-06 12:15 ` Troy Mitchell
2026-11-06 12:15 ` Troy Mitchell
2026-11-07 4:22 ` Yao Zi
2026-11-07 4:22 ` Yao Zi
2026-11-09 15:19 ` Troy Mitchell
2026-11-09 15:19 ` Troy Mitchell
2026-11-06 6:05 ` [PATCH 3/3] riscv: dts: spacemit: Add K3 eFuse and temperature trim cells Jiayu Du
2026-11-06 6:05 ` Jiayu Du
2026-11-06 22:13 ` Aurelien Jarno
2026-11-06 22:13 ` Aurelien Jarno
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