From: Yao Zi <me@ziyao.cc>
To: Jiayu Du <duge1256@gmail.com>, srini@kernel.org
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
dlan@kernel.org, troy.mitchell@linux.spacemit.com,
pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, p.zabel@pengutronix.de,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
Yao Zi <me@ziyao.cc>
Subject: Re: [PATCH 2/3] nvmem: Add read-only SpacemiT K3 eFuse support
Date: Sat, 7 Nov 2026 04:22:32 +0000 [thread overview]
Message-ID: <au6niF5xiqj7cqJ4@pie> (raw)
In-Reply-To: <20261106060525.346873-3-duge1256@gmail.com>
On Fri, Nov 06, 2026 at 02:05:24PM +0800, Jiayu Du wrote:
> Add read-only NVMEM access to bank 0 and bank 7 of the SpacemiT K3 eFuse
> controller. These banks contain temperature calibration parameters and
> other configuration data.
>
> Snapshot the shadow registers with aligned 32-bit reads and expose the
> data in little-endian order at controller-relative offsets. Serve reads
> from the snapshot and use keepouts for the remaining register ranges.
> Keep the AES_WTM clock enabled and its shared reset deasserted while the
> provider is registered.
>
> Signed-off-by: Jiayu Du <duge1256@gmail.com>
> ---
> MAINTAINERS | 1 +
> drivers/nvmem/Kconfig | 14 +++
> drivers/nvmem/Makefile | 1 +
> drivers/nvmem/spacemit-k3-efuse.c | 151 ++++++++++++++++++++++++++++++
> 4 files changed, 167 insertions(+)
> create mode 100644 drivers/nvmem/spacemit-k3-efuse.c
...
> diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
> index d2f5bb236663..28d6c59fbd74 100644
> --- a/drivers/nvmem/Kconfig
> +++ b/drivers/nvmem/Kconfig
> @@ -476,6 +476,20 @@ config NVMEM_SNVS_LPGPR
> This driver can also be built as a module. If so, the module
> will be called nvmem-snvs-lpgpr.
>
> +config NVMEM_SPACEMIT_K3_EFUSE
> + tristate "SpacemiT K3 eFuse support"
> + depends on ARCH_SPACEMIT || COMPILE_TEST
> + depends on OF && HAS_IOMEM
> + depends on COMMON_CLK && RESET_CONTROLLER
> + help
> + Say Y here to read configuration and calibration data from the
> + SpacemiT K3 eFuse shadow banks. The boot firmware must have loaded
> + the shadow registers before Linux starts. Programming and reloading
> + the fuses are not supported.
I didn't read K3's TRM, but is there a reason to depend on the
bootloader to do so? We should depend on the state set up by bootloaders
as less as possible, I think.
> + This driver can also be built as a module. If so, the module will
> + be called spacemit-k3-efuse.
> +
...
> diff --git a/drivers/nvmem/spacemit-k3-efuse.c b/drivers/nvmem/spacemit-k3-efuse.c
> new file mode 100644
> index 000000000000..d106053beae8
> --- /dev/null
> +++ b/drivers/nvmem/spacemit-k3-efuse.c
...
> +static int k3_efuse_probe(struct platform_device *pdev)
> +{
...
> + for (bank = 0; bank < ARRAY_SIZE(k3_efuse_bank_offsets); bank++) {
> + for (i = 0; i < K3_EFUSE_BANK_SIZE; i += sizeof(u32)) {
> + u32 val = readl(base + k3_efuse_bank_offsets[bank] + i);
> +
> + put_unaligned_le32(val, efuse->data[bank] + i);
Does memcpy_fromio() works for the device? Otherwise, you could define
efuse->data as an array of u32 instead of u8, so it keeps aligned and
you could do a simple assignment here. Reading from efuse->data is
always ok since memcpy() is used.
> + }
> + }
Regards,
Yao Zi
WARNING: multiple messages have this Message-ID (diff)
From: Yao Zi <me@ziyao.cc>
To: Jiayu Du <duge1256@gmail.com>, srini@kernel.org
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
dlan@kernel.org, troy.mitchell@linux.spacemit.com,
pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, p.zabel@pengutronix.de,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
Yao Zi <me@ziyao.cc>
Subject: Re: [PATCH 2/3] nvmem: Add read-only SpacemiT K3 eFuse support
Date: Sat, 7 Nov 2026 04:22:32 +0000 [thread overview]
Message-ID: <au6niF5xiqj7cqJ4@pie> (raw)
In-Reply-To: <20261106060525.346873-3-duge1256@gmail.com>
On Fri, Nov 06, 2026 at 02:05:24PM +0800, Jiayu Du wrote:
> Add read-only NVMEM access to bank 0 and bank 7 of the SpacemiT K3 eFuse
> controller. These banks contain temperature calibration parameters and
> other configuration data.
>
> Snapshot the shadow registers with aligned 32-bit reads and expose the
> data in little-endian order at controller-relative offsets. Serve reads
> from the snapshot and use keepouts for the remaining register ranges.
> Keep the AES_WTM clock enabled and its shared reset deasserted while the
> provider is registered.
>
> Signed-off-by: Jiayu Du <duge1256@gmail.com>
> ---
> MAINTAINERS | 1 +
> drivers/nvmem/Kconfig | 14 +++
> drivers/nvmem/Makefile | 1 +
> drivers/nvmem/spacemit-k3-efuse.c | 151 ++++++++++++++++++++++++++++++
> 4 files changed, 167 insertions(+)
> create mode 100644 drivers/nvmem/spacemit-k3-efuse.c
...
> diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
> index d2f5bb236663..28d6c59fbd74 100644
> --- a/drivers/nvmem/Kconfig
> +++ b/drivers/nvmem/Kconfig
> @@ -476,6 +476,20 @@ config NVMEM_SNVS_LPGPR
> This driver can also be built as a module. If so, the module
> will be called nvmem-snvs-lpgpr.
>
> +config NVMEM_SPACEMIT_K3_EFUSE
> + tristate "SpacemiT K3 eFuse support"
> + depends on ARCH_SPACEMIT || COMPILE_TEST
> + depends on OF && HAS_IOMEM
> + depends on COMMON_CLK && RESET_CONTROLLER
> + help
> + Say Y here to read configuration and calibration data from the
> + SpacemiT K3 eFuse shadow banks. The boot firmware must have loaded
> + the shadow registers before Linux starts. Programming and reloading
> + the fuses are not supported.
I didn't read K3's TRM, but is there a reason to depend on the
bootloader to do so? We should depend on the state set up by bootloaders
as less as possible, I think.
> + This driver can also be built as a module. If so, the module will
> + be called spacemit-k3-efuse.
> +
...
> diff --git a/drivers/nvmem/spacemit-k3-efuse.c b/drivers/nvmem/spacemit-k3-efuse.c
> new file mode 100644
> index 000000000000..d106053beae8
> --- /dev/null
> +++ b/drivers/nvmem/spacemit-k3-efuse.c
...
> +static int k3_efuse_probe(struct platform_device *pdev)
> +{
...
> + for (bank = 0; bank < ARRAY_SIZE(k3_efuse_bank_offsets); bank++) {
> + for (i = 0; i < K3_EFUSE_BANK_SIZE; i += sizeof(u32)) {
> + u32 val = readl(base + k3_efuse_bank_offsets[bank] + i);
> +
> + put_unaligned_le32(val, efuse->data[bank] + i);
Does memcpy_fromio() works for the device? Otherwise, you could define
efuse->data as an array of u32 instead of u8, so it keeps aligned and
you could do a simple assignment here. Reading from efuse->data is
always ok since memcpy() is used.
> + }
> + }
Regards,
Yao Zi
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next prev parent reply other threads:[~2026-11-07 4:22 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 6:05 [PATCH 0/3] Add read-only SpacemiT K3 eFuse support Jiayu Du
2026-11-06 6:05 ` Jiayu Du
2026-11-06 6:05 ` [PATCH 1/3] dt-bindings: nvmem: Add SpacemiT K3 eFuse controller Jiayu Du
2026-11-06 6:05 ` Jiayu Du
2026-11-06 17:37 ` Conor Dooley
2026-11-06 17:37 ` Conor Dooley
2026-11-06 6:05 ` [PATCH 2/3] nvmem: Add read-only SpacemiT K3 eFuse support Jiayu Du
2026-11-06 6:05 ` Jiayu Du
2026-11-06 12:15 ` Troy Mitchell
2026-11-06 12:15 ` Troy Mitchell
2026-11-07 4:22 ` Yao Zi [this message]
2026-11-07 4:22 ` Yao Zi
2026-11-09 15:19 ` Troy Mitchell
2026-11-09 15:19 ` Troy Mitchell
2026-11-06 6:05 ` [PATCH 3/3] riscv: dts: spacemit: Add K3 eFuse and temperature trim cells Jiayu Du
2026-11-06 6:05 ` Jiayu Du
2026-11-06 22:13 ` Aurelien Jarno
2026-11-06 22:13 ` Aurelien Jarno
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