From: Nick Piggin <nickpiggin@yahoo.com.au>
To: Andi Kleen <ak@suse.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>,
Linux Memory Management <linux-mm@kvack.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2.6.13] lockless pagecache 2/7
Date: Sat, 03 Sep 2005 07:22:18 +1000 [thread overview]
Message-ID: <4318C28A.5010000@yahoo.com.au> (raw)
In-Reply-To: <p73k6hzqk1w.fsf@verdi.suse.de>
Andi Kleen wrote:
> Alan Cox <alan@lxorguk.ukuu.org.uk> writes:
>
>
>>On Gwe, 2005-09-02 at 16:29 +1000, Nick Piggin wrote:
>>
>>>2/7
>>>Implement atomic_cmpxchg for i386 and ppc64. Is there any
>>>architecture that won't be able to implement such an operation?
>>
>>i386, sun4c, ....
>
>
> Actually we have cmpxchg on i386 these days - we don't support
> any SMP i386s so it's just done non atomically.
>
Yes, I guess that's what Alan must have meant.
This atomic_cmpxchg, unlike a "regular" cmpxchg, has the advantage
that the memory altered should always be going through the atomic_
accessors, and thus should be implementable with spinlocks.
See for example, arch/sparc/lib/atomic32.c
At least, that's what I'm hoping for.
>
>>Yeah quite a few. I suspect most MIPS also would have a problem in this
>>area.
>
>
> cmpxchg can be done with LL/SC can't it? Any MIPS should have that.
>
Yes, and indeed it does. However it also tests for "cpu_has_llsc",
but I suspect that SMP isn't supported on those CPUs without ll/sc,
and thus an atomic_cmpxchg could be emulated by disabling interrupts.
Nick
--
SUSE Labs, Novell Inc.
Send instant messages to your online friends http://au.messenger.yahoo.com
WARNING: multiple messages have this Message-ID (diff)
From: Nick Piggin <nickpiggin@yahoo.com.au>
To: Andi Kleen <ak@suse.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>,
Linux Memory Management <linux-mm@kvack.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2.6.13] lockless pagecache 2/7
Date: Sat, 03 Sep 2005 07:22:18 +1000 [thread overview]
Message-ID: <4318C28A.5010000@yahoo.com.au> (raw)
In-Reply-To: <p73k6hzqk1w.fsf@verdi.suse.de>
Andi Kleen wrote:
> Alan Cox <alan@lxorguk.ukuu.org.uk> writes:
>
>
>>On Gwe, 2005-09-02 at 16:29 +1000, Nick Piggin wrote:
>>
>>>2/7
>>>Implement atomic_cmpxchg for i386 and ppc64. Is there any
>>>architecture that won't be able to implement such an operation?
>>
>>i386, sun4c, ....
>
>
> Actually we have cmpxchg on i386 these days - we don't support
> any SMP i386s so it's just done non atomically.
>
Yes, I guess that's what Alan must have meant.
This atomic_cmpxchg, unlike a "regular" cmpxchg, has the advantage
that the memory altered should always be going through the atomic_
accessors, and thus should be implementable with spinlocks.
See for example, arch/sparc/lib/atomic32.c
At least, that's what I'm hoping for.
>
>>Yeah quite a few. I suspect most MIPS also would have a problem in this
>>area.
>
>
> cmpxchg can be done with LL/SC can't it? Any MIPS should have that.
>
Yes, and indeed it does. However it also tests for "cpu_has_llsc",
but I suspect that SMP isn't supported on those CPUs without ll/sc,
and thus an atomic_cmpxchg could be emulated by disabling interrupts.
Nick
--
SUSE Labs, Novell Inc.
Send instant messages to your online friends http://au.messenger.yahoo.com
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next prev parent reply other threads:[~2005-09-02 21:22 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-09-02 6:25 New lockless pagecache Nick Piggin
2005-09-02 6:25 ` Nick Piggin
2005-09-02 6:28 ` [PATCH 2.6.13] lockless pagecache 1/7 Nick Piggin
2005-09-02 6:29 ` [PATCH 2.6.13] lockless pagecache 2/7 Nick Piggin
2005-09-02 6:30 ` [PATCH 2.6.13] lockless pagecache 3/7 Nick Piggin
2005-09-02 6:30 ` [PATCH 2.6.13] lockless pagecache 4/7 Nick Piggin
2005-09-02 6:31 ` [PATCH 2.6.13] lockless pagecache 5/7 Nick Piggin
2005-09-02 6:32 ` [PATCH 2.6.13] lockless pagecache 6/7 Nick Piggin
2005-09-02 6:32 ` [PATCH 2.6.13] lockless pagecache 7/7 Nick Piggin
2005-09-09 13:00 ` Christoph Lameter
2005-09-09 13:00 ` Christoph Lameter
2005-09-09 15:23 ` Nick Piggin
2005-09-09 15:23 ` Nick Piggin
2005-09-09 5:36 ` [PATCH 2.6.13] lockless pagecache 5/7 Christoph Lameter
2005-09-09 5:36 ` Christoph Lameter
2005-09-09 6:22 ` Nick Piggin
2005-09-09 6:22 ` Nick Piggin
2005-09-02 13:08 ` [PATCH 2.6.13] lockless pagecache 2/7 Alan Cox
2005-09-02 13:08 ` Alan Cox
2005-09-02 20:41 ` Andi Kleen
2005-09-02 20:41 ` Andi Kleen
2005-09-02 21:12 ` David S. Miller
2005-09-02 21:12 ` David S. Miller, Andi Kleen
2005-09-02 21:43 ` Nick Piggin
2005-09-02 21:43 ` Nick Piggin
2005-09-02 21:22 ` Nick Piggin [this message]
2005-09-02 21:22 ` Nick Piggin
2005-09-02 21:31 ` David S. Miller
2005-09-02 21:31 ` David S. Miller, Nick Piggin
2005-09-02 21:47 ` Nick Piggin
2005-09-02 21:47 ` Nick Piggin
2005-09-02 21:57 ` David S. Miller
2005-09-02 21:57 ` David S. Miller, Nick Piggin
2005-09-02 23:57 ` Alan Cox
2005-09-02 23:57 ` Alan Cox
2005-09-03 1:40 ` Nick Piggin
2005-09-03 1:40 ` Nick Piggin
2005-09-03 17:31 ` Alan Cox
2005-09-03 17:31 ` Alan Cox
2005-09-04 1:01 ` Nick Piggin
2005-09-04 1:01 ` Nick Piggin
2005-09-04 8:20 ` Alan Cox
2005-09-04 8:20 ` Alan Cox
2005-09-06 1:03 ` Nick Piggin
2005-09-06 1:03 ` Nick Piggin
2005-09-02 18:26 ` Christoph Lameter
2005-09-02 18:26 ` Christoph Lameter
2005-09-02 21:26 ` Nick Piggin
2005-09-02 21:26 ` Nick Piggin
2005-09-03 1:33 ` Christoph Lameter
2005-09-03 1:33 ` Christoph Lameter
2005-09-02 6:45 ` New lockless pagecache Nick Piggin
2005-09-02 6:45 ` Nick Piggin
2005-09-15 19:50 ` Alok kataria
2005-09-16 3:12 ` Nick Piggin
2005-09-16 3:12 ` Nick Piggin
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