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From: Andre Przywara <andre.przywara@arm.com>
To: Jun Nie <jun.nie@linaro.org>
Cc: "linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
	"peter@hurleysoftware.com" <peter@hurleysoftware.com>,
	"jason.liu@linaro.org" <jason.liu@linaro.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	Andrew Jackson <Andrew.Jackson@arm.com>,
	"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	"shawn.guo@linaro.org" <shawn.guo@linaro.org>,
	"wan.zhijun@zte.com.cn" <wan.zhijun@zte.com.cn>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v13 2/5] uart: pl011: Introduce register accessor
Date: Sat, 19 Sep 2015 22:45:11 +0100	[thread overview]
Message-ID: <55FDD767.7070109@arm.com> (raw)
In-Reply-To: <CABymUCPKqevt9tBEqLnxT-fen2PLy48QMkCfO+nm7-16wHQ8Og@mail.gmail.com>

Hi Jun,

thanks for your reply. Just a quick one below...

...
>>> @@ -203,6 +206,24 @@ struct uart_amba_port {
>>>  #endif
>>>  };
>>>
>>> +static unsigned int pl011_readw(struct uart_amba_port *uap, int index)
>>> +{
>>> +       WARN_ON(index > REG_NR);
>>> +       return readw_relaxed(uap->port.membase + (index << 2));
>>> +}
>>> +
>>> +static void pl011_writew(struct uart_amba_port *uap, int val, int index)
>>> +{
>>> +       WARN_ON(index > REG_NR);
>>> +       writew_relaxed(val, uap->port.membase + (index << 2));
>>> +}
>>
>> I wonder if you could rename those to pl011_{read,write}, respectively
>> (loosing the "w" suffix).
>> The SBSA UART spec reads as the registers are actually accessible via
>> 32-bit accesses and rumour has it that there are implementations which
>> rely on that and don't work with ldrh/strh.
>> I am still waiting for reports about actual hardware to fail, but we
>> might be forced to change the access width to 32-bit for the SBSA subset
>> in the future. So having wrapper functions would make that change much
>> easier, but having them without a suffix from the beginning would even
>> be better, as I wouldn't be bothered to rename them later on.
> 
> OK, will change to 32-bit access in future version.

Sorry, there seems to be a misunderstanding here. 16-bit accesses are
totally fine for every _PL011_ part, it is just the SBSA-UART (which
uses this very same driver) which _may_ require 32-bit accesses.

So I was asking just to name the functions pl011_write and pl011_read,
so that their "w" suffix does not delude people into them being forever
16-bit wide. If needed (as said I am still waiting for failure reports),
we can then change the access width inside these functions to the
appropriate size later without requiring a name change again.

So please keep the {write,read}w_relaxed calls in there, just change the
function name.

Thanks!
Andre.

WARNING: multiple messages have this Message-ID (diff)
From: andre.przywara@arm.com (Andre Przywara)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v13 2/5] uart: pl011: Introduce register accessor
Date: Sat, 19 Sep 2015 22:45:11 +0100	[thread overview]
Message-ID: <55FDD767.7070109@arm.com> (raw)
In-Reply-To: <CABymUCPKqevt9tBEqLnxT-fen2PLy48QMkCfO+nm7-16wHQ8Og@mail.gmail.com>

Hi Jun,

thanks for your reply. Just a quick one below...

...
>>> @@ -203,6 +206,24 @@ struct uart_amba_port {
>>>  #endif
>>>  };
>>>
>>> +static unsigned int pl011_readw(struct uart_amba_port *uap, int index)
>>> +{
>>> +       WARN_ON(index > REG_NR);
>>> +       return readw_relaxed(uap->port.membase + (index << 2));
>>> +}
>>> +
>>> +static void pl011_writew(struct uart_amba_port *uap, int val, int index)
>>> +{
>>> +       WARN_ON(index > REG_NR);
>>> +       writew_relaxed(val, uap->port.membase + (index << 2));
>>> +}
>>
>> I wonder if you could rename those to pl011_{read,write}, respectively
>> (loosing the "w" suffix).
>> The SBSA UART spec reads as the registers are actually accessible via
>> 32-bit accesses and rumour has it that there are implementations which
>> rely on that and don't work with ldrh/strh.
>> I am still waiting for reports about actual hardware to fail, but we
>> might be forced to change the access width to 32-bit for the SBSA subset
>> in the future. So having wrapper functions would make that change much
>> easier, but having them without a suffix from the beginning would even
>> be better, as I wouldn't be bothered to rename them later on.
> 
> OK, will change to 32-bit access in future version.

Sorry, there seems to be a misunderstanding here. 16-bit accesses are
totally fine for every _PL011_ part, it is just the SBSA-UART (which
uses this very same driver) which _may_ require 32-bit accesses.

So I was asking just to name the functions pl011_write and pl011_read,
so that their "w" suffix does not delude people into them being forever
16-bit wide. If needed (as said I am still waiting for failure reports),
we can then change the access width inside these functions to the
appropriate size later without requiring a name change again.

So please keep the {write,read}w_relaxed calls in there, just change the
function name.

Thanks!
Andre.

  reply	other threads:[~2015-09-19 21:45 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1438328959-16177-1-git-send-email-jun.nie@linaro.org>
     [not found] ` <1438328959-16177-3-git-send-email-jun.nie@linaro.org>
2015-09-18 10:51   ` [PATCH v13 2/5] uart: pl011: Introduce register accessor Andre Przywara
2015-09-18 10:51     ` Andre Przywara
2015-09-19  6:46     ` Jun Nie
2015-09-19  6:46       ` Jun Nie
2015-09-19 21:45       ` Andre Przywara [this message]
2015-09-19 21:45         ` Andre Przywara
2015-10-22 23:36     ` Timur Tabi
2015-10-22 23:36       ` Timur Tabi
2015-10-28 14:22       ` Peter Hurley
2015-10-28 14:22         ` Peter Hurley
2015-10-28 14:51         ` Timur Tabi
2015-10-28 14:51           ` Timur Tabi
2015-10-28 15:08           ` Peter Hurley
2015-10-28 15:08             ` Peter Hurley
     [not found] ` <1438328959-16177-5-git-send-email-jun.nie@linaro.org>
2015-09-18 10:58   ` [PATCH v13 4/5] uart: pl011: Improve LCRH register access decision Andre Przywara
2015-09-18 10:58     ` Andre Przywara
     [not found] ` <1438328959-16177-6-git-send-email-jun.nie@linaro.org>
2015-09-18 13:50   ` [PATCH v13 5/5] uart: pl011: Add support to ZTE ZX296702 uart Andre Przywara
2015-09-18 13:50     ` Andre Przywara
2015-09-18 13:59     ` Russell King - ARM Linux
2015-09-18 13:59       ` Russell King - ARM Linux
2015-09-19  6:47       ` Jun Nie
2015-09-19  6:47         ` Jun Nie
2015-09-19  6:54     ` Jun Nie
2015-09-19  6:54       ` Jun Nie
2015-10-23 21:54       ` Timur Tabi
2015-10-23 21:54         ` Timur Tabi
2015-10-24  3:23         ` Jun Nie
2015-10-24  3:23           ` Jun Nie
2015-10-24  3:32           ` Timur Tabi
2015-10-24  3:32             ` Timur Tabi
2015-10-26  1:27             ` Jun Nie
2015-10-26  1:27               ` Jun Nie
2015-10-27 13:31               ` Peter Hurley
2015-10-27 13:31                 ` Peter Hurley
2015-10-26  9:59             ` Andre Przywara
2015-10-26  9:59               ` Andre Przywara
2015-10-26 12:46               ` Timur Tabi
2015-10-26 12:46                 ` Timur Tabi
2015-10-26 14:00                 ` Andre Przywara
2015-10-26 14:00                   ` Andre Przywara
2015-10-26 14:07                   ` Timur Tabi
2015-10-26 14:07                     ` Timur Tabi
2015-10-26 14:42                     ` Andre Przywara
2015-10-26 14:42                       ` Andre Przywara
2015-10-26 14:47                       ` Timur Tabi
2015-10-26 14:47                         ` Timur Tabi
2015-10-26 15:19                         ` Andre Przywara
2015-10-26 15:19                           ` Andre Przywara
2015-10-26 15:31                           ` Timur Tabi
2015-10-26 15:31                             ` Timur Tabi
2015-10-27 22:54                           ` Timur Tabi
2015-10-27 22:54                             ` Timur Tabi

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