From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org,
Liviu Ionescu <ilg@livius.net>
Subject: Re: [PATCH 01/10] target/arm: Drop IS_M() macro
Date: Fri, 27 Jan 2017 12:33:39 +0000 [thread overview]
Message-ID: <87a8acadi4.fsf@linaro.org> (raw)
In-Reply-To: <1485285380-10565-2-git-send-email-peter.maydell@linaro.org>
Peter Maydell <peter.maydell@linaro.org> writes:
> We only use the IS_M() macro in two places, and it's a bit of a
> namespace grab to put in cpu.h. Drop it in favour of just explicitly
> calling arm_feature() in the places where it was used.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> target/arm/cpu.h | 6 ------
> target/arm/cpu.c | 2 +-
> target/arm/helper.c | 2 +-
> 3 files changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 521c11b..b2cc329 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -1762,12 +1762,6 @@ bool write_list_to_cpustate(ARMCPU *cpu);
> */
> bool write_cpustate_to_list(ARMCPU *cpu);
>
> -/* Does the core conform to the "MicroController" profile. e.g. Cortex-M3.
> - Note the M in older cores (eg. ARM7TDMI) stands for Multiply. These are
> - conventional cores (ie. Application or Realtime profile). */
> -
> -#define IS_M(env) arm_feature(env, ARM_FEATURE_M)
> -
> #define ARM_CPUID_TI915T 0x54029152
> #define ARM_CPUID_TI925T 0x54029252
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 9075989..6395d5a 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -182,7 +182,7 @@ static void arm_cpu_reset(CPUState *s)
> /* On ARMv7-M the CPSR_I is the value of the PRIMASK register, and is
> * clear at reset. Initial SP and PC are loaded from ROM.
> */
> - if (IS_M(env)) {
> + if (arm_feature(env, ARM_FEATURE_M)) {
> uint32_t initial_msp; /* Loaded from 0x0 */
> uint32_t initial_pc; /* Loaded from 0x4 */
> uint8_t *rom;
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index cfbc622..ce7e43b 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -6695,7 +6695,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
> CPUARMState *env = &cpu->env;
> unsigned int new_el = env->exception.target_el;
>
> - assert(!IS_M(env));
> + assert(!arm_feature(env, ARM_FEATURE_M));
>
> arm_log_exception(cs->exception_index);
> qemu_log_mask(CPU_LOG_INT, "...from EL%d to EL%d\n", arm_current_el(env),
--
Alex Bennée
WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org,
Liviu Ionescu <ilg@livius.net>
Subject: Re: [Qemu-devel] [PATCH 01/10] target/arm: Drop IS_M() macro
Date: Fri, 27 Jan 2017 12:33:39 +0000 [thread overview]
Message-ID: <87a8acadi4.fsf@linaro.org> (raw)
In-Reply-To: <1485285380-10565-2-git-send-email-peter.maydell@linaro.org>
Peter Maydell <peter.maydell@linaro.org> writes:
> We only use the IS_M() macro in two places, and it's a bit of a
> namespace grab to put in cpu.h. Drop it in favour of just explicitly
> calling arm_feature() in the places where it was used.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> target/arm/cpu.h | 6 ------
> target/arm/cpu.c | 2 +-
> target/arm/helper.c | 2 +-
> 3 files changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 521c11b..b2cc329 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -1762,12 +1762,6 @@ bool write_list_to_cpustate(ARMCPU *cpu);
> */
> bool write_cpustate_to_list(ARMCPU *cpu);
>
> -/* Does the core conform to the "MicroController" profile. e.g. Cortex-M3.
> - Note the M in older cores (eg. ARM7TDMI) stands for Multiply. These are
> - conventional cores (ie. Application or Realtime profile). */
> -
> -#define IS_M(env) arm_feature(env, ARM_FEATURE_M)
> -
> #define ARM_CPUID_TI915T 0x54029152
> #define ARM_CPUID_TI925T 0x54029252
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 9075989..6395d5a 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -182,7 +182,7 @@ static void arm_cpu_reset(CPUState *s)
> /* On ARMv7-M the CPSR_I is the value of the PRIMASK register, and is
> * clear at reset. Initial SP and PC are loaded from ROM.
> */
> - if (IS_M(env)) {
> + if (arm_feature(env, ARM_FEATURE_M)) {
> uint32_t initial_msp; /* Loaded from 0x0 */
> uint32_t initial_pc; /* Loaded from 0x4 */
> uint8_t *rom;
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index cfbc622..ce7e43b 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -6695,7 +6695,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
> CPUARMState *env = &cpu->env;
> unsigned int new_el = env->exception.target_el;
>
> - assert(!IS_M(env));
> + assert(!arm_feature(env, ARM_FEATURE_M));
>
> arm_log_exception(cs->exception_index);
> qemu_log_mask(CPU_LOG_INT, "...from EL%d to EL%d\n", arm_current_el(env),
--
Alex Bennée
next prev parent reply other threads:[~2017-01-27 12:33 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-24 19:16 [PATCH 00/10] More M profile bugfixes Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-24 19:16 ` [PATCH 01/10] target/arm: Drop IS_M() macro Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-27 12:33 ` Alex Bennée [this message]
2017-01-27 12:33 ` Alex Bennée
2017-01-24 19:16 ` [PATCH 02/10] armv7m_nvic: keep a pointer to the CPU Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-27 12:41 ` Alex Bennée
2017-01-27 12:41 ` [Qemu-devel] " Alex Bennée
2017-01-27 13:16 ` Peter Maydell
2017-01-27 13:16 ` [Qemu-devel] " Peter Maydell
2017-01-24 19:16 ` [PATCH 03/10] armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-27 12:28 ` Alex Bennée
2017-01-27 12:28 ` [Qemu-devel] " Alex Bennée
2017-01-27 13:14 ` Peter Maydell
2017-01-27 13:14 ` [Qemu-devel] " Peter Maydell
2017-01-24 19:16 ` [PATCH 04/10] armv7m: implement CCR, CFSR, HFSR, DFSR, BFAR, and MMFAR Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-27 13:43 ` Alex Bennée
2017-01-27 13:43 ` [Qemu-devel] " Alex Bennée
2017-01-24 19:16 ` [PATCH 05/10] armv7m: honour CCR.STACKALIGN on exception entry Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-24 19:33 ` Richard Henderson
2017-01-24 19:45 ` Peter Maydell
2017-01-24 19:16 ` [PATCH 06/10] armv7m: set CFSR.UNDEFINSTR on undefined instructions Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-27 13:44 ` Alex Bennée
2017-01-27 13:44 ` [Qemu-devel] " Alex Bennée
2017-01-24 19:16 ` [PATCH 07/10] armv7m: Report no-coprocessor faults correctly Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-27 13:53 ` Alex Bennée
2017-01-27 13:53 ` [Qemu-devel] " Alex Bennée
2017-01-24 19:16 ` [PATCH 08/10] armv7m: Honour CCR.USERSETMPEND Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-27 13:55 ` Alex Bennée
2017-01-27 13:55 ` [Qemu-devel] " Alex Bennée
2017-01-24 19:16 ` [PATCH 09/10] armv7m: FAULTMASK should be 0 on reset Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-27 13:56 ` Alex Bennée
2017-01-27 13:56 ` [Qemu-devel] " Alex Bennée
2017-01-24 19:16 ` [PATCH 10/10] armv7m: R14 should reset to 0xffffffff Peter Maydell
2017-01-24 19:16 ` [Qemu-devel] " Peter Maydell
2017-01-27 13:58 ` Alex Bennée
2017-01-27 13:58 ` [Qemu-devel] " Alex Bennée
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