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From: Jan Beulich <jbeulich@suse.com>
To: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Cc: "Romain Caritey" <Romain.Caritey@microchip.com>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Connor Davis" <connojdavis@gmail.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Anthony PERARD" <anthony.perard@vates.tech>,
	"Michal Orzel" <michal.orzel@amd.com>,
	"Julien Grall" <julien@xen.org>,
	"Roger Pau Monné" <roger.pau@citrix.com>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 19/27] xen/riscv: emulate guest writes to virtual APLIC MMIO
Date: Thu, 16 Apr 2026 15:19:24 +0200	[thread overview]
Message-ID: <910f0720-1e83-4b0d-a1bd-09799d6f8264@suse.com> (raw)
In-Reply-To: <76ea5954-89cd-47a4-872a-239bbc08b785@gmail.com>

On 14.04.2026 18:04, Oleksii Kurochko wrote:
> On 4/2/26 4:18 PM, Jan Beulich wrote:
>> On 10.03.2026 18:08, Oleksii Kurochko wrote:
>>> @@ -127,6 +137,164 @@ int vaplic_map_device_irqs_to_domain(struct domain *d,
>>>       return 0;
>>>   }
>>>   
>>> +static void vaplic_dm_update_target(const unsigned long hart_id, uint32_t *iprio)
>>> +{
>>> +    *iprio &= APLIC_TARGET_IPRIO_MASK;
>>> +    *iprio |= (hart_id << APLIC_TARGET_HART_IDX_SHIFT);
>>> +}
>>> +
>>> +static void vaplic_update_target(const struct imsic_config *imsic,
>>> +                                 const int guest_id,
>>> +                                 const unsigned long hart_id, uint32_t *value)
>>> +{
>>> +    unsigned long group_index;
>>> +    unsigned int hhxw = imsic->group_index_bits;
>>> +    unsigned int lhxw = imsic->hart_index_bits;
>>> +    unsigned int hhxs = imsic->group_index_shift - IMSIC_MMIO_PAGE_SHIFT * 2;
>>> +    unsigned long base_ppn = imsic->msi[hart_id].base_addr >> IMSIC_MMIO_PAGE_SHIFT;
>>> +
>>> +    group_index = (base_ppn >> (hhxs + 12)) & (BIT(hhxw, UL) - 1);
>>
>> And there's no constant available to make this literal 12 more descriptive?
> 
> As it was used in aplic_set_irq_affinity() - IMSIC_MMIO_PAGE_SHIFT could 
> be used here.
> 
>>
>>> +    *value &= APLIC_TARGET_EIID_MASK;
>>> +    *value |= guest_id << APLIC_TARGET_GUEST_IDX_SHIFT;
>>> +    *value |= hart_id << APLIC_TARGET_HART_IDX_SHIFT;
>>> +    *value |= group_index << (lhxw + APLIC_TARGET_HART_IDX_SHIFT) ;
>>> +}
>>
>> Both functions returning void right now, why would they need to return their
>> result via indirection?
> 
> No specific reason. Do you think it would be better just to return value 
> instead? I am okay to rework that.

Rule of thumb is: Use return value in preference to indirection when the
returned value isn't needed for some other purpose.

>>> +#define CALC_REG_VALUE(base) \
>>> +{ \
>>> +    uint32_t index; \
>>> +    uint32_t tmp_val; \
>>
>> Combine these two, or have the variables have initializers?
>>
>>> +    index = regval_to_irqn(offset - base); \
>>
>> There's no "offset" declared or passed into here, nor ...
>>
>>> +    tmp_val = APLIC_REG_GET(priv->regs, aplic_addr) & ~auth_irq_bmp[index]; \
>>
>> ... "priv", nor ...
>>
>>> +    value &= auth_irq_bmp[index]; \
>>> +    value |= tmp_val; \
>>
>> ... "value". It may remain like this, but then it wants putting inside the
>> sole function that uses it, and be #undef-ed at the end of the function.
>>
>>> +}
>>
>> Please wrap in do/while(0), for use sites to be required to have semicolons
>> (and hence look like normal statements). Or make it a statement expression
>> properly returning the calculated value.
> 
> I will put the following inside the function + undef at the end:
> 
> #define CALC_REG_VALUE(base) do {                               \ 
>                                    \

Nit: Why this extra line?

>>> +static int cf_check vaplic_emulate_store(const struct vcpu *vcpu,
>>> +                                         unsigned long addr, uint32_t value)
>>> +{
>>> +    struct vaplic *vaplic = to_vaplic(vcpu->domain->arch.vintc);
>>> +    struct aplic_priv *priv = vaplic->base.info->private;
>>> +    uint32_t offset = addr & APLIC_REG_OFFSET_MASK;
>>
>> See ./CODING_STYLE as to uses of fixed-width types.
>>
>>> +    unsigned long aplic_addr = addr - priv->paddr_start;
>>> +    const uint32_t *auth_irq_bmp = vcpu->domain->arch.vintc->private;
>>> +
>>> +    switch ( offset )
>>> +    {
>>> +    case APLIC_SETIP_BASE ... APLIC_SETIP_LAST:
>>
>> And (taking this just as example) any misaligned accesses falling in this range
>> are fine?
> 
> Do you mean something like 0x1C02 instead of 0x1C00 or 0x1C04?

Yes.

>>> +        /*
>>> +         * As sourcecfg register starts from 1:
>>> +         *   0x0000 domaincfg
>>> +         *   0x0004 sourcecfg[1]
>>> +         *   0x0008 sourcecfg[2]
>>> +         *    ...
>>> +         *   0x0FFC sourcecfg[1023]
>>> +         * It is necessary to calculate an interrupt number by substracting
>>
>> Nit: subtracting
>>
>>> +         * of APLIC_DOMAINCFG instead of APLIC_SOURCECFG_BASE.
>>> +         */
>>> +        if ( !AUTH_IRQ_BIT(regval_to_irqn(offset - APLIC_DOMAINCFG)) )
>>> +            /* interrupt not enabled, ignore it */
>>
>> Throughout the series: Please adhere to ./CODING_STYLE.
>>
>>> +            return 0;
>>> +
>>> +        break;
>>
>> And any value is okay to write?
> 
> No, it should be in a range 
> [APLIC_SOURCECFG_SM_INACTIVE,APLIC_SOURCECFG_SM_LEVEL_LOW].
> 
> I will add the check before break:
>          if ( value > APLIC_SOURCECFG_SM_LEVEL_LOW )
>          {
>              gdprintk(XENLOG_WARNING,
>                       "value(%u) is incorrect for sourcecfg register\n", 
> value);
>              value = APLIC_SOURCECFG_SM_INACTIVE;
>          }

And why would writing APLIC_SOURCECFG_SM_INACTIVE be any better, when
that's not what the guest wanted? Simply ignore such writes, unless the
spec mandates specific behavior for out-of-range avlues?

>>> +    case APLIC_TARGET_BASE ... APLIC_TARGET_LAST:
>>> +        struct vcpu *target_vcpu = NULL;
>>> +
>>> +        /*
>>> +         * Look at vaplic_emulate_load() for explanation why
>>> +         * APLIC_GENMSI is substracted.
>>> +         */
>>
>> There's no vaplic_emulate_load() - how can I go look there?
> 
> It is introduced in the next patch.

As before - it should be possible to review patch series strictly
sequentially. Further, what if this patch gets committed, and the other
gets delayed by several months?

>>> +        if ( !AUTH_IRQ_BIT(regval_to_irqn(offset - APLIC_GENMSI)) )
>>> +            /* interrupt not enabled, ignore it */
>>> +            return 0;
>>> +
>>> +        for ( int i = 0; i < vcpu->domain->max_vcpus; i++ )
>>
>> unsigned int
>>
>>> +        {
>>> +            struct vcpu *v = vcpu->domain->vcpu[i];
>>> +
>>> +            if ( v->vcpu_id == (value >> APLIC_TARGET_HART_IDX_SHIFT) )
>>> +            {
>>> +                target_vcpu = v;
>>> +                break;
>>> +            }
>>> +        }
>>> +
>>> +        ASSERT(target_vcpu);
>>
>> What guarantees the pointer to be non-NULL? The incoming value can be
>> arbitrary, afaict.
> 
> I didn't understand your point. It is just checking that target_vcpu has 
> been found. If after for() loop the value of target_vcpu is still NULL 
> then something wrong in Xen.

If that's true, then the assertion is fine to have. I can't help the
impression though that a guest could pick a value such that you can't
possibly find the target vCPU. Asserting on guest controlled input is
not okay, as was said several times before.

>>> +        if ( !(vaplic->regs.domaincfg & APLIC_DOMAINCFG_DM) )
>>> +        {
>>> +            vaplic_dm_update_target(cpuid_to_hartid(target_vcpu->processor),
>>> +                                    &value);
>>> +        }
>>> +        else
>>> +            vaplic_update_target(priv->imsic_cfg,
>>> +                                 vcpu_guest_file_id(target_vcpu),
>>> +                                 cpuid_to_hartid(target_vcpu->processor),
>>> +                                 &value);
>>
>> I'm struggling with the naming here: When DM is clear, a function with "dm"
>> in the name is called.
> 
> it means direct (delivery) mode. Maybe it is better to put dm at the end 
> of the function name? Or it is just better to change it to something else?

Without a better understanding of what is wanted, all I can say is that
calling something with "dm" in its name when the condition says it's not
"dm" is confusing.

>>> +    default:
>>> +        panic("%s: unsupported register offset: %#x\n", __func__, offset);
>>
>> Crashing the host for the guest doing something odd? It's odd that the function
>> only ever returns 0 anyway - it could simply return an error here (if the
>> itention is to not ignore such writes).
> 
> But maybe it is a legal offset and we really want to support it?

Still not a reason to crash the entire host?

> Even if I will return just error then a caller site will want to do 
> something with this error -> for example, kill domain or panic() again. 
> Maybe panic is to much and just domain should be crashed here:
> 
> default:
>      gdprintk(XENLOG_WARNING,
>               "Unhandled APLIC write at offset %#x (value %#x)\n",
>               offset, value);
>      domain_crash(vcpu->domain);
>      return 0;
> ?

This would already be better. You shouldn't use gdprintk() with
domain_crash() though. Please take a look at domain_crash()'s
definition - you'll then see what to do, I suppose.

Jan


  reply	other threads:[~2026-04-16 13:19 UTC|newest]

Thread overview: 123+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-10 17:08 [PATCH v1 00/27] [RISC-V] Introduce enablemenant of dom0less Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 01/27] xen/riscv: Implement ARCH_PAGING_MEMPOOL Oleksii Kurochko
2026-03-11  8:18   ` Jan Beulich
2026-04-09 10:31     ` Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 02/27] xen/riscv: Implement construct_domain() Oleksii Kurochko
2026-03-24  9:37   ` Jan Beulich
2026-04-09 11:26     ` Oleksii Kurochko
2026-04-09 12:58       ` Jan Beulich
2026-04-09 13:39         ` Oleksii Kurochko
2026-04-09 14:01           ` Oleksii Kurochko
2026-04-14  6:26           ` Julien Grall
2026-03-10 17:08 ` [PATCH v1 03/27] xen/riscv: implement prerequisites for domain_create() Oleksii Kurochko
2026-04-01 12:57   ` Jan Beulich
2026-04-09 11:55     ` Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 04/27] xen/riscv: rework G-stage mode handling Oleksii Kurochko
2026-04-01 13:19   ` Jan Beulich
2026-04-07 10:47     ` Oleksii Kurochko
2026-04-07 13:43       ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 05/27] xen/riscv: introduce guest riscv,isa string Oleksii Kurochko
2026-04-01 13:49   ` Jan Beulich
2026-04-10 10:24     ` Oleksii Kurochko
2026-04-10 10:50       ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 06/27] xen/riscv: implement make_cpus_node() Oleksii Kurochko
2026-04-01 14:11   ` Jan Beulich
2026-04-10 11:19     ` Oleksii Kurochko
2026-04-10 12:02       ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 07/27] xen/riscv: implement make_timer_node() Oleksii Kurochko
2026-04-01 14:24   ` Jan Beulich
2026-04-10 11:54     ` Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 08/27] xen/riscv: implement make_arch_nodes() Oleksii Kurochko
2026-04-01 14:29   ` Jan Beulich
2026-04-10 13:32     ` Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 09/27] xen/riscv: implement make_intc_domU_node() Oleksii Kurochko
2026-04-01 14:38   ` Jan Beulich
2026-04-10 14:00     ` Oleksii Kurochko
2026-04-10 14:23       ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 10/27] xen/riscv: generate IMSIC DT node for guest domains Oleksii Kurochko
2026-04-01 15:05   ` Jan Beulich
2026-04-10 15:40     ` Oleksii Kurochko
2026-04-16 11:42       ` Jan Beulich
2026-04-17  8:10         ` Oleksii Kurochko
2026-04-17 13:50           ` Jan Beulich
2026-04-17 14:01             ` Oleksii Kurochko
2026-04-17 14:10               ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 11/27] xen/riscv: create APLIC " Oleksii Kurochko
2026-04-01 15:16   ` Jan Beulich
2026-04-13  8:43     ` Oleksii Kurochko
2026-04-13  8:48       ` Oleksii Kurochko
2026-04-16 11:49       ` Jan Beulich
2026-04-17  9:01         ` Oleksii Kurochko
2026-04-17 13:53           ` Jan Beulich
2026-04-17 14:27             ` Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 12/27] xen/riscv: introduce aia_init() and aia_available() Oleksii Kurochko
2026-04-02  9:00   ` Jan Beulich
2026-04-13  9:32     ` Oleksii Kurochko
2026-04-16 12:06       ` Jan Beulich
2026-04-17  9:37         ` Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 13/27] xen/riscv: add basic VGEIN management for AIA guests Oleksii Kurochko
2026-04-02 10:03   ` Jan Beulich
2026-04-13 14:42     ` Oleksii Kurochko
2026-04-16 12:21       ` Jan Beulich
2026-04-17 11:34         ` Oleksii Kurochko
2026-04-17 14:07           ` Jan Beulich
2026-04-20  7:52             ` Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 14/27] xen/riscv: introduce per-vCPU IMSIC state Oleksii Kurochko
2026-04-02 11:31   ` Jan Beulich
2026-04-14  9:22     ` Oleksii Kurochko
2026-04-16 12:31       ` Jan Beulich
2026-04-16 12:31       ` Jan Beulich
2026-04-17 13:47         ` Oleksii Kurochko
2026-04-20  8:29           ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 15/27] xen/riscv: add very early virtual APLIC (vAPLIC) initialization support Oleksii Kurochko
2026-04-02 11:58   ` Jan Beulich
2026-04-14 10:27     ` Oleksii Kurochko
2026-04-16 12:42       ` Jan Beulich
2026-04-20 10:25         ` Oleksii Kurochko
2026-04-20 10:47           ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 16/27] xen/riscv: implement IRQ mapping for device passthrough Oleksii Kurochko
2026-04-02 12:22   ` Jan Beulich
2026-04-14 11:29     ` Oleksii Kurochko
2026-04-16 12:51       ` Jan Beulich
2026-04-20 11:39         ` Oleksii Kurochko
2026-04-20 13:45           ` Jan Beulich
2026-04-20 14:34             ` Oleksii Kurochko
2026-04-20 15:21               ` Jan Beulich
2026-04-20 15:31                 ` Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 17/27] xen/riscv: add missing APLIC register offsets, masks to asm/aplic.h Oleksii Kurochko
2026-04-02 12:51   ` Jan Beulich
2026-04-14 11:42     ` Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 18/27] xen/riscv: add vaplic access check Oleksii Kurochko
2026-04-02 13:10   ` Jan Beulich
2026-04-14 11:45     ` Oleksii Kurochko
2026-04-15  7:35       ` Oleksii Kurochko
2026-04-16 13:01       ` Jan Beulich
2026-04-20 11:53         ` Oleksii Kurochko
2026-04-20 12:03           ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 19/27] xen/riscv: emulate guest writes to virtual APLIC MMIO Oleksii Kurochko
2026-04-02 14:18   ` Jan Beulich
2026-04-14 16:04     ` Oleksii Kurochko
2026-04-16 13:19       ` Jan Beulich [this message]
2026-04-20 15:02         ` Oleksii Kurochko
2026-04-20 15:27           ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 20/27] xen/riscv: emulate guest reads from " Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 21/27] xen/riscv: introduce (de)initialization helpers for vINTC Oleksii Kurochko
2026-04-02 14:58   ` Jan Beulich
2026-04-15  7:50     ` Oleksii Kurochko
2026-04-16 13:23       ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 22/27] xen/riscv: implement init_intc_phandle() Oleksii Kurochko
2026-04-02 15:00   ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 23/27] xen/riscv: call do_initcalls() in start_xen() Oleksii Kurochko
2026-04-02 15:01   ` Jan Beulich
2026-03-10 17:08 ` [PATCH v1 24/27] xen/riscv: init rcu Oleksii Kurochko
2026-04-02 15:03   ` Jan Beulich
2026-04-14 11:50     ` Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 25/27] xen/riscv: setup system domains Oleksii Kurochko
2026-03-10 17:08 ` [PATCH v1 26/27] xen/riscv: provide init_vuart() Oleksii Kurochko
2026-04-07 13:52   ` Jan Beulich
2026-03-10 17:09 ` [PATCH v1 27/27] xen/riscv: add initial dom0less infrastructure support Oleksii Kurochko
2026-04-07 14:11   ` Jan Beulich
2026-04-15 10:00     ` Oleksii Kurochko
2026-04-16 14:13       ` Jan Beulich
2026-04-15 10:28     ` Oleksii Kurochko
2026-04-16 14:15       ` Jan Beulich

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