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From: Deepak Gupta <debug@rivosinc.com>
To: Alexandre Ghiti <alex@ghiti.fr>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	"Liam R. Howlett" <Liam.Howlett@oracle.com>,
	Vlastimil Babka <vbabka@suse.cz>,
	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Arnd Bergmann <arnd@arndb.de>,
	Christian Brauner <brauner@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Oleg Nesterov <oleg@redhat.com>,
	Eric Biederman <ebiederm@xmission.com>,
	Kees Cook <kees@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	Shuah Khan <shuah@kernel.org>, Jann Horn <jannh@google.com>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org,
	linux-mm@kvack.org, linux-riscv@lists.infradead.org,
	devicetree@vger.kernel.org, linux-arch@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org,
	alistair.francis@wdc.com, richard.henderson@linaro.org,
	jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com,
	charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com,
	cleger@rivosinc.com, alexghiti@rivosinc.com,
	samitolvanen@google.com, broonie@kernel.org,
	rick.p.edgecombe@intel.com, Zong Li <zong.li@sifive.com>
Subject: Re: [PATCH v12 27/28] riscv: Documentation for shadow stack on riscv
Date: Wed, 9 Apr 2025 22:24:02 -0700	[thread overview]
Message-ID: <Z_dV8v54vfD9zHLV@debug.ba.rivosinc.com> (raw)
In-Reply-To: <2a24cc43-4150-4a56-ba09-0d136dde893f@ghiti.fr>

On Tue, Apr 08, 2025 at 10:48:08AM +0200, Alexandre Ghiti wrote:
>
>On 14/03/2025 22:39, Deepak Gupta wrote:
>>Adding documentation on shadow stack for user mode on riscv and kernel
>>interfaces exposed so that user tasks can enable it.
>>
>>Reviewed-by: Zong Li <zong.li@sifive.com>
>>Signed-off-by: Deepak Gupta <debug@rivosinc.com>
>>---
>>  Documentation/arch/riscv/index.rst   |   1 +
>>  Documentation/arch/riscv/zicfiss.rst | 176 +++++++++++++++++++++++++++++++++++
>>  2 files changed, 177 insertions(+)
>>
>>diff --git a/Documentation/arch/riscv/index.rst b/Documentation/arch/riscv/index.rst
>>index be7237b69682..e240eb0ceb70 100644
>>--- a/Documentation/arch/riscv/index.rst
>>+++ b/Documentation/arch/riscv/index.rst
>>@@ -15,6 +15,7 @@ RISC-V architecture
>>      vector
>>      cmodx
>>      zicfilp
>>+    zicfiss
>>      features
>>diff --git a/Documentation/arch/riscv/zicfiss.rst b/Documentation/arch/riscv/zicfiss.rst
>>new file mode 100644
>>index 000000000000..5ba389f15b3f
>>--- /dev/null
>>+++ b/Documentation/arch/riscv/zicfiss.rst
>>@@ -0,0 +1,176 @@
>>+.. SPDX-License-Identifier: GPL-2.0
>>+
>>+:Author: Deepak Gupta <debug@rivosinc.com>
>>+:Date:   12 January 2024
>>+
>>+=========================================================
>>+Shadow stack to protect function returns on RISC-V Linux
>>+=========================================================

<... snipped ..>

>>+
>>+5. violations related to returns with shadow stack enabled
>>+-----------------------------------------------------------
>>+
>>+Pertaining to shadow stack, CPU raises software check exception in following
>>+condition:
>>+
>>+- On execution of ``sspopchk x1/x5``, ``x1/x5`` didn't match top of shadow
>>+  stack. If mismatch happens then cpu does ``*tval = 3`` and raise software
>>+  check exception.
>>+
>>+Linux kernel will treat this as :c:macro:`SIGSEV`` with code =
>>+:c:macro:`SEGV_CPERR` and follow normal course of signal delivery.
>>+
>>+6. Shadow stack tokens
>>+-----------------------
>>+Regular stores on shadow stacks are not allowed and thus can't be tampered
>>+with via arbitrary stray writes due to bugs. Method of pivoting / switching to
>>+shadow stack is simply writing to csr ``CSR_SSP`` changes active shadow stack.
>
>
>I don't understand the end of this sentence.

I'll rephrase it to make it readable and understandable.

>
>
>>+This can be problematic because usually value to be written to ``CSR_SSP`` will
>>+be loaded somewhere in writeable memory and thus allows an adversary to
>>+corruption bug in software to pivot to an any address in shadow stack range.
>
>
>Remove "an"
>
>
>>+Shadow stack tokens can help mitigate this problem by making sure that:
>>+
>>+- When software is switching away from a shadow stack, shadow stack pointer
>>+  should be saved on shadow stack itself and call it ``shadow stack token``
>>+
>>+- When software is switching to a shadow stack, it should read the
>>+  ``shadow stack token`` from shadow stack pointer and verify that
>>+  ``shadow stack token`` itself is pointer to shadow stack itself.
>>+
>>+- Once the token verification is done, software can perform the write to
>>+  ``CSR_SSP`` to switch shadow stack.
>>+
>>+Here software can be user mode task runtime itself which is managing various
>>+contexts as part of single thread. Software can be kernel as well when kernel
>>+has to deliver a signal to user task and must save shadow stack pointer. Kernel
>>+can perform similar procedure by saving a token on user shadow stack itself.
>>+This way whenever :c:macro:`sigreturn` happens, kernel can read the token and
>>+verify the token and then switch to shadow stack. Using this mechanism, kernel
>>+helps user task so that any corruption issue in user task is not exploited by
>>+adversary by arbitrarily using :c:macro:`sigreturn`. Adversary will have to
>>+make sure that there is a ``shadow stack token`` in addition to invoking
>>+:c:macro:`sigreturn`
>>+
>>+7. Signal shadow stack
>>+-----------------------
>>+Following structure has been added to sigcontext for RISC-V::
>>+
>>+    struct __sc_riscv_cfi_state {
>>+        unsigned long ss_ptr;
>>+    };
>>+
>>+As part of signal delivery, shadow stack token is saved on current shadow stack
>>+itself and updated pointer is saved away in :c:macro:`ss_ptr` field in
>>+:c:macro:`__sc_riscv_cfi_state` under :c:macro:`sigcontext`. Existing shadow
>>+stack allocation is used for signal delivery. During :c:macro:`sigreturn`,
>>+kernel will obtain :c:macro:`ss_ptr` from :c:macro:`sigcontext` and verify the
>>+saved token on shadow stack itself and switch shadow stack.
>>

WARNING: multiple messages have this Message-ID (diff)
From: Deepak Gupta <debug@rivosinc.com>
To: Alexandre Ghiti <alex@ghiti.fr>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	"Liam R. Howlett" <Liam.Howlett@oracle.com>,
	Vlastimil Babka <vbabka@suse.cz>,
	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Arnd Bergmann <arnd@arndb.de>,
	Christian Brauner <brauner@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Oleg Nesterov <oleg@redhat.com>,
	Eric Biederman <ebiederm@xmission.com>,
	Kees Cook <kees@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	Shuah Khan <shuah@kernel.org>, Jann Horn <jannh@google.com>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org,
	linux-mm@kvack.org, linux-riscv@lists.infradead.org,
	devicetree@vger.kernel.org, linux-arch@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org,
	alistair.francis@wdc.com, richard.henderson@linaro.org,
	jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com,
	charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com,
	cleger@rivosinc.com, alexghiti@rivosinc.com,
	samitolvanen@google.com, broonie@kernel.org,
	rick.p.edgecombe@intel.com, Zong Li <zong.li@sifive.com>
Subject: Re: [PATCH v12 27/28] riscv: Documentation for shadow stack on riscv
Date: Wed, 9 Apr 2025 22:24:02 -0700	[thread overview]
Message-ID: <Z_dV8v54vfD9zHLV@debug.ba.rivosinc.com> (raw)
In-Reply-To: <2a24cc43-4150-4a56-ba09-0d136dde893f@ghiti.fr>

On Tue, Apr 08, 2025 at 10:48:08AM +0200, Alexandre Ghiti wrote:
>
>On 14/03/2025 22:39, Deepak Gupta wrote:
>>Adding documentation on shadow stack for user mode on riscv and kernel
>>interfaces exposed so that user tasks can enable it.
>>
>>Reviewed-by: Zong Li <zong.li@sifive.com>
>>Signed-off-by: Deepak Gupta <debug@rivosinc.com>
>>---
>>  Documentation/arch/riscv/index.rst   |   1 +
>>  Documentation/arch/riscv/zicfiss.rst | 176 +++++++++++++++++++++++++++++++++++
>>  2 files changed, 177 insertions(+)
>>
>>diff --git a/Documentation/arch/riscv/index.rst b/Documentation/arch/riscv/index.rst
>>index be7237b69682..e240eb0ceb70 100644
>>--- a/Documentation/arch/riscv/index.rst
>>+++ b/Documentation/arch/riscv/index.rst
>>@@ -15,6 +15,7 @@ RISC-V architecture
>>      vector
>>      cmodx
>>      zicfilp
>>+    zicfiss
>>      features
>>diff --git a/Documentation/arch/riscv/zicfiss.rst b/Documentation/arch/riscv/zicfiss.rst
>>new file mode 100644
>>index 000000000000..5ba389f15b3f
>>--- /dev/null
>>+++ b/Documentation/arch/riscv/zicfiss.rst
>>@@ -0,0 +1,176 @@
>>+.. SPDX-License-Identifier: GPL-2.0
>>+
>>+:Author: Deepak Gupta <debug@rivosinc.com>
>>+:Date:   12 January 2024
>>+
>>+=========================================================
>>+Shadow stack to protect function returns on RISC-V Linux
>>+=========================================================

<... snipped ..>

>>+
>>+5. violations related to returns with shadow stack enabled
>>+-----------------------------------------------------------
>>+
>>+Pertaining to shadow stack, CPU raises software check exception in following
>>+condition:
>>+
>>+- On execution of ``sspopchk x1/x5``, ``x1/x5`` didn't match top of shadow
>>+  stack. If mismatch happens then cpu does ``*tval = 3`` and raise software
>>+  check exception.
>>+
>>+Linux kernel will treat this as :c:macro:`SIGSEV`` with code =
>>+:c:macro:`SEGV_CPERR` and follow normal course of signal delivery.
>>+
>>+6. Shadow stack tokens
>>+-----------------------
>>+Regular stores on shadow stacks are not allowed and thus can't be tampered
>>+with via arbitrary stray writes due to bugs. Method of pivoting / switching to
>>+shadow stack is simply writing to csr ``CSR_SSP`` changes active shadow stack.
>
>
>I don't understand the end of this sentence.

I'll rephrase it to make it readable and understandable.

>
>
>>+This can be problematic because usually value to be written to ``CSR_SSP`` will
>>+be loaded somewhere in writeable memory and thus allows an adversary to
>>+corruption bug in software to pivot to an any address in shadow stack range.
>
>
>Remove "an"
>
>
>>+Shadow stack tokens can help mitigate this problem by making sure that:
>>+
>>+- When software is switching away from a shadow stack, shadow stack pointer
>>+  should be saved on shadow stack itself and call it ``shadow stack token``
>>+
>>+- When software is switching to a shadow stack, it should read the
>>+  ``shadow stack token`` from shadow stack pointer and verify that
>>+  ``shadow stack token`` itself is pointer to shadow stack itself.
>>+
>>+- Once the token verification is done, software can perform the write to
>>+  ``CSR_SSP`` to switch shadow stack.
>>+
>>+Here software can be user mode task runtime itself which is managing various
>>+contexts as part of single thread. Software can be kernel as well when kernel
>>+has to deliver a signal to user task and must save shadow stack pointer. Kernel
>>+can perform similar procedure by saving a token on user shadow stack itself.
>>+This way whenever :c:macro:`sigreturn` happens, kernel can read the token and
>>+verify the token and then switch to shadow stack. Using this mechanism, kernel
>>+helps user task so that any corruption issue in user task is not exploited by
>>+adversary by arbitrarily using :c:macro:`sigreturn`. Adversary will have to
>>+make sure that there is a ``shadow stack token`` in addition to invoking
>>+:c:macro:`sigreturn`
>>+
>>+7. Signal shadow stack
>>+-----------------------
>>+Following structure has been added to sigcontext for RISC-V::
>>+
>>+    struct __sc_riscv_cfi_state {
>>+        unsigned long ss_ptr;
>>+    };
>>+
>>+As part of signal delivery, shadow stack token is saved on current shadow stack
>>+itself and updated pointer is saved away in :c:macro:`ss_ptr` field in
>>+:c:macro:`__sc_riscv_cfi_state` under :c:macro:`sigcontext`. Existing shadow
>>+stack allocation is used for signal delivery. During :c:macro:`sigreturn`,
>>+kernel will obtain :c:macro:`ss_ptr` from :c:macro:`sigcontext` and verify the
>>+saved token on shadow stack itself and switch shadow stack.
>>

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2025-04-10  5:24 UTC|newest]

Thread overview: 166+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-14 21:39 [PATCH v12 00/28] riscv control-flow integrity for usermode Deepak Gupta
2025-03-14 21:39 ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 01/28] mm: VM_SHADOW_STACK definition for riscv Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-04-07 15:45   ` Alexandre Ghiti
2025-04-07 15:45     ` Alexandre Ghiti
2025-03-14 21:39 ` [PATCH v12 02/28] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 03/28] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-04-07 15:48   ` Alexandre Ghiti
2025-04-07 15:48     ` Alexandre Ghiti
2025-04-09 14:43     ` Deepak Gupta
2025-04-09 14:43       ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 04/28] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 05/28] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-04-08  8:05   ` Alexandre Ghiti
2025-04-08  8:05     ` Alexandre Ghiti
2025-04-10 11:04   ` Radim Krčmář
2025-04-10 11:04     ` Radim Krčmář
2025-04-24  0:00     ` Deepak Gupta
2025-04-24  0:00       ` Deepak Gupta
2025-04-24 11:52       ` Radim Krčmář
2025-04-24 11:52         ` Radim Krčmář
2025-04-24 17:56         ` Deepak Gupta
2025-04-24 17:56           ` Deepak Gupta
2025-04-25 11:27           ` Radim Krčmář
2025-04-25 11:27             ` Radim Krčmář
2025-04-24  0:23     ` Deepak Gupta
2025-04-24  0:23       ` Deepak Gupta
2025-04-24 12:16       ` Radim Krčmář
2025-04-24 12:16         ` Radim Krčmář
2025-04-24 18:03         ` Deepak Gupta
2025-04-24 18:03           ` Deepak Gupta
2025-04-25 11:32           ` Radim Krčmář
2025-04-25 11:32             ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 06/28] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-04-08 10:39   ` Alexandre Ghiti
2025-04-08 10:39     ` Alexandre Ghiti
2025-04-10 10:03   ` Radim Krčmář
2025-04-10 10:03     ` Radim Krčmář
2025-04-24  0:45     ` Deepak Gupta
2025-04-24  0:45       ` Deepak Gupta
2025-04-24 12:23       ` Radim Krčmář
2025-04-24 12:23         ` Radim Krčmář
2025-04-24 12:43         ` Arnd Bergmann
2025-04-24 12:43           ` Arnd Bergmann
2025-03-14 21:39 ` [PATCH v12 07/28] riscv mm: manufacture shadow stack pte Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 08/28] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 09/28] riscv mmu: write protect and shadow stack Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 10/28] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-04-07  4:50   ` Zong Li
2025-04-07  4:50     ` Zong Li
2025-04-09 14:19     ` Deepak Gupta
2025-04-09 14:19       ` Deepak Gupta
2025-04-10  9:56   ` Radim Krčmář
2025-04-10  9:56     ` Radim Krčmář
2025-04-24  3:16     ` Deepak Gupta
2025-04-24  3:16       ` Deepak Gupta
2025-04-24 12:51       ` Radim Krčmář
2025-04-24 12:51         ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 11/28] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-04-08 10:51   ` Alexandre Ghiti
2025-04-08 10:51     ` Alexandre Ghiti
2025-04-09 14:31     ` Deepak Gupta
2025-04-09 14:31       ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 12/28] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-17  1:29   ` Zong Li
2025-03-17  1:29     ` Zong Li
2025-04-10  9:45   ` Radim Krčmář
2025-04-10  9:45     ` Radim Krčmář
2025-04-24  4:44     ` Deepak Gupta
2025-04-24  4:44       ` Deepak Gupta
2025-04-24 13:36       ` Radim Krčmář
2025-04-24 13:36         ` Radim Krčmář
2025-04-24 18:16         ` Deepak Gupta
2025-04-24 18:16           ` Deepak Gupta
2025-04-25 11:42           ` Radim Krčmář
2025-04-25 11:42             ` Radim Krčmář
2025-04-25 16:39             ` Deepak Gupta
2025-04-25 16:39               ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 13/28] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-17  1:29   ` Zong Li
2025-03-17  1:29     ` Zong Li
2025-04-09  8:03   ` Alexandre Ghiti
2025-04-09  8:03     ` Alexandre Ghiti
2025-04-09 14:26     ` Deepak Gupta
2025-04-09 14:26       ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 14/28] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-17  1:29   ` Zong Li
2025-03-17  1:29     ` Zong Li
2025-03-14 21:39 ` [PATCH v12 15/28] riscv/traps: Introduce software check exception Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 16/28] riscv: signal: abstract header saving for setup_sigcontext Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 17/28] riscv/signal: save and restore of shadow stack for signal Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-04-10  8:49   ` Radim Krčmář
2025-04-10  8:49     ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 18/28] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 19/28] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-20 22:24   ` Radim Krčmář
2025-03-20 22:24     ` Radim Krčmář
2025-03-20 23:09     ` Deepak Gupta
2025-03-20 23:09       ` Deepak Gupta
2025-03-21  7:22       ` Radim Krčmář
2025-03-21  7:22         ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 20/28] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 21/28] riscv: Add Firmware Feature SBI extensions definitions Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 22/28] riscv: enable kernel access to shadow stack memory via FWFT sbi call Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-20 22:10   ` Radim Krčmář
2025-03-20 22:10     ` Radim Krčmář
2025-03-20 22:42     ` Deepak Gupta
2025-03-20 22:42       ` Deepak Gupta
2025-03-21  7:35       ` Radim Krčmář
2025-03-21  7:35         ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 23/28] riscv: kernel command line option to opt out of user cfi Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-20 21:35   ` Radim Krčmář
2025-03-20 21:35     ` Radim Krčmář
2025-03-20 22:31     ` Deepak Gupta
2025-03-20 22:31       ` Deepak Gupta
2025-03-21  7:31       ` Radim Krčmář
2025-03-21  7:31         ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 24/28] arch/riscv: compile vdso with landing pad Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-04-08 12:45   ` Alexandre Ghiti
2025-04-08 12:45     ` Alexandre Ghiti
2025-04-09 14:28     ` Deepak Gupta
2025-04-09 14:28       ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 25/28] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-03-20 21:25   ` Radim Krčmář
2025-03-20 21:25     ` Radim Krčmář
2025-03-20 22:29     ` Deepak Gupta
2025-03-20 22:29       ` Deepak Gupta
2025-03-21  7:51       ` Radim Krčmář
2025-03-21  7:51         ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 26/28] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-04-08  8:36   ` Alexandre Ghiti
2025-04-08  8:36     ` Alexandre Ghiti
2025-03-14 21:39 ` [PATCH v12 27/28] riscv: Documentation for shadow stack on riscv Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta
2025-04-08  8:48   ` Alexandre Ghiti
2025-04-08  8:48     ` Alexandre Ghiti
2025-04-10  5:24     ` Deepak Gupta [this message]
2025-04-10  5:24       ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 28/28] kselftest/riscv: kselftest for user mode cfi Deepak Gupta
2025-03-14 21:39   ` Deepak Gupta

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