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From: Deepak Gupta <debug@rivosinc.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	pbonzini@redhat.com, palmer@dabbelt.com,
	Alistair.Francis@wdc.com, laurent@vivier.eu, bmeng.cn@gmail.com,
	liwei1518@gmail.com, dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com, Jim Shu <jim.shu@sifive.com>
Subject: Re: [PATCH v3 19/20] linux-user: permit RISC-V CFI dynamic entry in VDSO
Date: Wed, 7 Aug 2024 13:53:18 -0700	[thread overview]
Message-ID: <ZrPevkJmO3OUouin@debug.ba.rivosinc.com> (raw)
In-Reply-To: <7bf932f1-661b-4854-b26a-954dff70ba48@linaro.org>

On Wed, Aug 07, 2024 at 01:36:34PM +1000, Richard Henderson wrote:
>On 8/7/24 10:06, Deepak Gupta wrote:
>>RISC-V CFI use new processor-specific dynamic entry in ELF. Permit it in
>>VDSO post-processing script.
>>
>>Signed-off-by: Jim Shu <jim.shu@sifive.com>
>>Signed-off-by: Deepak Gupta <debug@rivosinc.com>
>>---
>>  linux-user/gen-vdso-elfn.c.inc | 7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>>diff --git a/linux-user/gen-vdso-elfn.c.inc b/linux-user/gen-vdso-elfn.c.inc
>>index 95856eb839..59c818eb11 100644
>>--- a/linux-user/gen-vdso-elfn.c.inc
>>+++ b/linux-user/gen-vdso-elfn.c.inc
>>@@ -273,6 +273,13 @@ static void elfN(process)(FILE *outf, void *buf, bool need_bswap)
>>                  errors++;
>>                  break;
>>+            case PT_LOPROC + 2:
>>+                /* RISCV_ZICFILP_PLT: for RISC-V zicfilp extension */
>>+                if (ehdr->e_machine == EM_RISCV) {
>>+                    break;
>>+                }
>>+                goto do_default;
>
>Documentation?  This symbol does not appear in either llvm or binutils 
>sources.  I presume this is on a development branch somewhere.
>
>The comment is poor.  Notice:

Noted. will do better.
>
>>              case PT_LOPROC + 3:
>>                  if (ehdr->e_machine == EM_PPC64) {
>>                      break;  /* DT_PPC64_OPT: integer bitmask */
>
>the ppc64 comment describes the data payload.
>As do the other comments beforehand.
>
>
>r~


  reply	other threads:[~2024-08-07 20:53 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-07  0:06 [PATCH v3 00/20] riscv support for control flow integrity extensions Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 01/20] accel/tcg: restrict assert on icount_enabled to qemu-system Deepak Gupta
2024-08-07  0:48   ` Richard Henderson
2024-08-07 18:45     ` Deepak Gupta
2024-08-12 17:41     ` Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 02/20] target/riscv: Add zicfilp extension Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 03/20] target/riscv: Introduce elp state and enabling controls for zicfilp Deepak Gupta
2024-08-07  0:56   ` Richard Henderson
2024-08-07 18:46     ` Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 04/20] target/riscv: save and restore elp state on priv transitions Deepak Gupta
2024-08-07  1:06   ` Richard Henderson
2024-08-07 20:11     ` Deepak Gupta
2024-08-07 22:40       ` Richard Henderson
2024-08-07 22:58         ` Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 05/20] target/riscv: additional code information for sw check Deepak Gupta
2024-08-07  1:11   ` Richard Henderson
2024-08-07  0:06 ` [PATCH v3 06/20] target/riscv: tracking indirect branches (fcfi) for zicfilp Deepak Gupta
2024-08-07  1:23   ` Richard Henderson
2024-08-07 20:15     ` Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 07/20] target/riscv: zicfilp `lpad` impl and branch tracking Deepak Gupta
2024-08-07  2:01   ` Richard Henderson
2024-08-07  2:04   ` Richard Henderson
2024-08-07  0:06 ` [PATCH v3 08/20] disas/riscv: enabled `lpad` disassembly Deepak Gupta
2024-08-07  2:06   ` Richard Henderson
2024-08-07  0:06 ` [PATCH v3 09/20] target/riscv: Add zicfiss extension Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 10/20] target/riscv: introduce ssp and enabling controls for zicfiss Deepak Gupta
2024-08-07  2:11   ` Richard Henderson
2024-08-07  2:12     ` Richard Henderson
2024-08-07 20:21       ` Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 11/20] target/riscv: tb flag for shadow stack instructions Deepak Gupta
2024-08-07  2:13   ` Richard Henderson
2024-08-07  0:06 ` [PATCH v3 12/20] target/riscv: implement zicfiss instructions Deepak Gupta
2024-08-07  2:39   ` Richard Henderson
2024-08-07  2:56     ` Richard Henderson
2024-08-07 21:25       ` Deepak Gupta
2024-08-07 20:35     ` Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 13/20] target/riscv: compressed encodings for sspush and sspopchk Deepak Gupta
2024-08-07  2:40   ` Richard Henderson
2024-08-07  0:06 ` [PATCH v3 14/20] target/riscv: mmu changes for zicfiss shadow stack protection Deepak Gupta
2024-08-07  3:19   ` Richard Henderson
2024-08-09 18:55     ` Deepak Gupta
2024-08-11 22:23       ` Richard Henderson
2024-08-07  0:06 ` [PATCH v3 15/20] target/riscv: shadow stack mmu index for shadow stack instructions Deepak Gupta
2024-08-07  2:43   ` Richard Henderson
2024-08-07 21:23     ` Deepak Gupta
2024-08-07 22:57       ` Richard Henderson
2024-08-07 23:13         ` Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 16/20] disas/riscv: enable disassembly for zicfiss instructions Deepak Gupta
2024-08-07  3:24   ` Richard Henderson
2024-08-07  0:06 ` [PATCH v3 17/20] disas/riscv: enable disassembly for compressed sspush/sspopchk Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 18/20] target/riscv: add trace-hooks for each case of sw-check exception Deepak Gupta
2024-08-07  3:27   ` Richard Henderson
2024-08-07 20:52     ` Deepak Gupta
2024-08-07  0:06 ` [PATCH v3 19/20] linux-user: permit RISC-V CFI dynamic entry in VDSO Deepak Gupta
2024-08-07  3:36   ` Richard Henderson
2024-08-07 20:53     ` Deepak Gupta [this message]
2024-08-07  0:06 ` [PATCH v3 20/20] linux-user: Add RISC-V zicfilp support " Deepak Gupta
2024-08-07  3:41   ` Richard Henderson
2024-08-07 21:00     ` Deepak Gupta

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