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From: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
To: Nicola Vetrini <nicola.vetrini@bugseng.com>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
	xen-devel@lists.xenproject.org, "Jan Beulich" <jbeulich@suse.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>,
	"Lukasz Hawrylko" <lukasz@hawrylko.pl>,
	"Daniel P. Smith" <dpsmith@apertussolutions.com>,
	"Mateusz Mówka" <mateusz.mowka@intel.com>,
	"Anthony PERARD" <anthony.perard@vates.tech>,
	"Michal Orzel" <michal.orzel@amd.com>,
	"Julien Grall" <julien@xen.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>,
	trenchboot-devel@googlegroups.com
Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
Date: Thu, 24 Apr 2025 21:14:11 +0300	[thread overview]
Message-ID: <aAp_c7m7DBLwqjwP@MjU3Nj> (raw)
In-Reply-To: <c79a4654-50d7-44f6-94b1-5a8f3fbe9b84@bugseng.com>

On Thu, Apr 24, 2025 at 12:54:41PM +0200, Nicola Vetrini wrote:
>
> On 4/23/25 23:53, Sergii Dmytruk wrote:
> > On Wed, Apr 23, 2025 at 10:11:35PM +0200, Nicola Vetrini wrote:
> > > On 2025-04-23 20:45, Sergii Dmytruk wrote:
> > > > On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
> > > > > On 22/04/2025 6:14 pm, Andrew Cooper wrote:
> > > > > > I've stripped out the sha2 patch and fixed up to use the existing sha2,
> > > > > > then kicked off some CI testing:
> > > > > >
> > > > > > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
> > > > > > https://cirrus-ci.com/build/5452335868018688
> > > > > >
> > > > > > When the dust has settled, I'll talk you through the failures.
> > > > > And here we go.  Interestingly, the FreeBSD testing was entirely
> > > > > happy,
> > > > > and that is the rare way around.
> > > > >
> > > > > For Gitlab, there are several areas.
> > > > >
> > > > > First, for MISRA.  In the job logs, you want the "Browse current
> > > > > reports:" link which will give you full details, but it's all pretty
> > > > > simple stuff.
> > > > Thanks, but that link gives me a list of 5096 failures all over the code
> > > > base.  Is there any way to see a diff against master?
> > > >
> > > Hi,
> > >
> > > yes, you can define selections of violations introduced on previously clean
> > > guidelines by clicking on the "ECLAIR" button on the upper right. See [1]
> > > which is the result of defining the "clean_added" selection shown in the
> > > attached screenshot. If you have other questions please let me know.
> > Hi,
> >
> > not sure why, but using "added" left 4861 violations.  Picking `_NO_TAG`
> > instead seemingly left only new violations.  Maybe that's something
> > specific to this particular run.  Either way, I can go through the list
> > now and know how to adjust it.  Thank you for the instructions.
> >
> I'm not sure I fully understand this. This is what I see on x86: the ones
> still shown are those rules where the CI is blocking and new issues have
> been introduced by that pipeline run (of course a different pipeline may
> yield different results). Only new violations are blocking, so that is why I
> filtered out the rest in this case.

My bad, I still had "Hide" instead of "Show" in the selection.  Other
comboboxes are also hard to see but I wasn't even looking for one in
the title.  Thanks again.

> > > Thanks,
> > >   Nicola
> > >
> > > [1] https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/hardware/xen-staging/ECLAIR_normal/andrew/tb-v1.1/ARM64/9791028027/PROJECT.ecd;/by_service.html#service&kind{"select":true,"selection":{"hiddenAreaKinds":[],"hiddenSubareaKinds":[],"show":true,"selector":{"enabled":true,"negated":false,"kind":1,"children":[{"enabled":true,"negated":false,"kind":0,"domain":"clean","inputs":[{"enabled":true,"text":"added"}]}]}}}



  reply	other threads:[~2025-04-24 18:14 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-22 15:06 [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen) Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 01/21] x86/include/asm/intel_txt.h: constants and accessors for TXT registers and heap Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 02/21] include/xen/slr_table.h: Secure Launch Resource Table definitions Sergii Dmytruk
2025-04-22 20:23   ` Andrew Cooper
2025-04-23 14:40     ` Sergii Dmytruk
2025-04-22 20:46   ` ross.philipson
2025-04-23 14:47     ` Sergii Dmytruk
2025-04-23 17:33       ` ross.philipson
2025-04-22 15:06 ` [PATCH 03/21] x86/boot: add MLE header and new entry point Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 04/21] x86/boot/slaunch_early: implement early initialization Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 05/21] x86/boot/slaunch_early: early TXT checks and boot data retrieval Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 06/21] xen/arch/x86: reserve TXT memory Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 07/21] x86/mtrr: expose functions for pausing caching Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 08/21] x86/intel_txt.c: restore boot MTRRs Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 09/21] lib/sha1.c: add file Sergii Dmytruk
2025-04-22 15:36   ` Jan Beulich
2025-04-22 22:15     ` Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 10/21] lib/sha256.c: " Sergii Dmytruk
2025-04-22 15:37   ` Andrew Cooper
2025-04-22 22:20     ` Sergii Dmytruk
2025-04-22 15:39   ` Jan Beulich
2025-04-22 15:06 ` [PATCH 11/21] x86/tpm.c: code for early hashing and extending PCRs (for TPM1.2) Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 12/21] x86/tpm.c: support extending PCRs of TPM2.0 Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 13/21] x86/hvm: Check for VMX in SMX when slaunch active Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 14/21] x86/tpm.c: implement event log for TPM2.0 Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 15/21] x86/boot: choose AP stack based on APIC ID Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 16/21] x86/smpboot.c: TXT AP bringup Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 17/21] arch/x86: process DRTM policy Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 18/21] x86/boot: find MBI and SLRT on AMD Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 19/21] arch/x86: support slaunch with AMD SKINIT Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 20/21] x86/slaunch: support EFI boot Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 21/21] x86/cpu: report SMX, TXT and SKINIT capabilities Sergii Dmytruk
2025-04-22 15:23 ` [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen) Jan Beulich
2025-04-22 18:33   ` Sergii Dmytruk
2025-04-22 17:14 ` Andrew Cooper
2025-04-22 19:01   ` Nicola Vetrini
2025-04-23 13:38   ` Andrew Cooper
2025-04-23 18:45     ` Sergii Dmytruk
2025-04-23 20:11       ` Nicola Vetrini
2025-04-23 21:53         ` Sergii Dmytruk
2025-04-24 10:54           ` Nicola Vetrini
2025-04-24 18:14             ` Sergii Dmytruk [this message]
2025-04-23 22:43       ` Andrew Cooper
2025-04-24 18:47         ` Sergii Dmytruk
2025-04-24 18:51           ` Andrew Cooper
2025-04-25 13:33             ` Sergii Dmytruk
2025-04-23 18:59 ` Daniel P. Smith

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