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From: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
To: xen-devel@lists.xenproject.org
Cc: "Jan Beulich" <jbeulich@suse.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>,
	"Lukasz Hawrylko" <lukasz@hawrylko.pl>,
	"Daniel P. Smith" <dpsmith@apertussolutions.com>,
	"Mateusz Mówka" <mateusz.mowka@intel.com>,
	"Anthony PERARD" <anthony.perard@vates.tech>,
	"Michal Orzel" <michal.orzel@amd.com>,
	"Julien Grall" <julien@xen.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
Date: Tue, 22 Apr 2025 18:06:34 +0300	[thread overview]
Message-ID: <cover.1745172094.git.sergii.dmytruk@3mdeb.com> (raw)

The aim of the [TrenchBoot] project is to provide an implementation of
DRTM that is generic enough to cover various use cases:
 - Intel TXT and AMD SKINIT on x86 CPUs
 - legacy and UEFI boot
 - TPM1.2 and TPM2.0
 - (in the future) DRTM on Arm CPUs

DRTM is a version of a measured launch that starts on request rather
than at the start of a boot cycle.  One of its advantages is in not
including the firmware in the chain of trust.

Xen already supports DRTM via [tboot] which targets Intel TXT only.
tboot employs encapsulates some of the DRTM details within itself while
with TrenchBoot Xen (or Linux) is meant to be a self-contained payload
for a TrenchBoot-enabled bootloader (think GRUB).  The one exception is
that UEFI case requires calling back into bootloader to initiate DRTM,
which is necessary to give Xen a chance of querying all the information
it needs from the firmware before performing DRTM start.

From reading the above tboot might seem like a more abstracted, but the
reality is that the payload needs to have DRTM-specific knowledge either
way.  TrenchBoot in principle allows coming up with independent
implementations of bootloaders and payloads that are compatible with
each other.

The "x86/boot: choose AP stack based on APIC ID" patch is shared with
[Parallelize AP bring-up] series which is required here because Intel
TXT always releases all APs simultaneously.  The rest of the patches are
unique.

-----

[TrenchBoot]: https://trenchboot.org/
[tboot]: https://sourceforge.net/p/tboot/wiki/Home/
[Parallelize AP bring-up]: https://lore.kernel.org/xen-devel/cover.1699982111.git.krystian.hebel@3mdeb.com/

-----

Kacper Stojek (2):
  x86/boot: add MLE header and new entry point
  xen/arch/x86: reserve TXT memory

Krystian Hebel (7):
  x86/include/asm/intel_txt.h: constants and accessors for TXT registers
    and heap
  x86/boot/slaunch_early: early TXT checks and boot data retrieval
  x86/intel_txt.c: restore boot MTRRs
  lib/sha1.c: add file
  x86/tpm.c: code for early hashing and extending PCRs (for TPM1.2)
  x86/boot: choose AP stack based on APIC ID
  x86/smpboot.c: TXT AP bringup

Michał Żygowski (2):
  x86/hvm: Check for VMX in SMX when slaunch active
  x86/cpu: report SMX, TXT and SKINIT capabilities

Sergii Dmytruk (10):
  include/xen/slr_table.h: Secure Launch Resource Table definitions
  x86/boot/slaunch_early: implement early initialization
  x86/mtrr: expose functions for pausing caching
  lib/sha256.c: add file
  x86/tpm.c: support extending PCRs of TPM2.0
  x86/tpm.c: implement event log for TPM2.0
  arch/x86: process DRTM policy
  x86/boot: find MBI and SLRT on AMD
  arch/x86: support slaunch with AMD SKINIT
  x86/slaunch: support EFI boot

 .gitignore                                  |    1 +
 docs/hypervisor-guide/x86/how-xen-boots.rst |    7 +
 xen/arch/x86/Makefile                       |   12 +-
 xen/arch/x86/boot/Makefile                  |   10 +-
 xen/arch/x86/boot/head.S                    |  250 +++++
 xen/arch/x86/boot/slaunch_early.c           |  105 ++
 xen/arch/x86/boot/trampoline.S              |   40 +-
 xen/arch/x86/boot/x86_64.S                  |   42 +-
 xen/arch/x86/cpu/amd.c                      |   14 +
 xen/arch/x86/cpu/cpu.h                      |    1 +
 xen/arch/x86/cpu/hygon.c                    |    1 +
 xen/arch/x86/cpu/intel.c                    |   44 +
 xen/arch/x86/cpu/mtrr/generic.c             |   51 +-
 xen/arch/x86/e820.c                         |    5 +
 xen/arch/x86/efi/efi-boot.h                 |   90 +-
 xen/arch/x86/efi/fixmlehdr.c                |  122 +++
 xen/arch/x86/hvm/vmx/vmcs.c                 |    3 +-
 xen/arch/x86/include/asm/apicdef.h          |    4 +
 xen/arch/x86/include/asm/intel_txt.h        |  452 ++++++++
 xen/arch/x86/include/asm/mm.h               |    3 +
 xen/arch/x86/include/asm/msr-index.h        |    3 +
 xen/arch/x86/include/asm/mtrr.h             |    8 +
 xen/arch/x86/include/asm/processor.h        |    1 +
 xen/arch/x86/include/asm/slaunch.h          |   91 ++
 xen/arch/x86/include/asm/tpm.h              |   19 +
 xen/arch/x86/intel_txt.c                    |  177 ++++
 xen/arch/x86/setup.c                        |   32 +-
 xen/arch/x86/slaunch.c                      |  464 ++++++++
 xen/arch/x86/smpboot.c                      |   57 +
 xen/arch/x86/tboot.c                        |   20 +-
 xen/arch/x86/tpm.c                          | 1057 +++++++++++++++++++
 xen/common/efi/boot.c                       |    4 +
 xen/common/efi/runtime.c                    |    1 +
 xen/include/xen/efi.h                       |    1 +
 xen/include/xen/sha1.h                      |   12 +
 xen/include/xen/sha256.h                    |   12 +
 xen/include/xen/slr_table.h                 |  274 +++++
 xen/lib/Makefile                            |    2 +
 xen/lib/sha1.c                              |  240 +++++
 xen/lib/sha256.c                            |  238 +++++
 40 files changed, 3914 insertions(+), 56 deletions(-)
 create mode 100644 xen/arch/x86/boot/slaunch_early.c
 create mode 100644 xen/arch/x86/efi/fixmlehdr.c
 create mode 100644 xen/arch/x86/include/asm/intel_txt.h
 create mode 100644 xen/arch/x86/include/asm/slaunch.h
 create mode 100644 xen/arch/x86/include/asm/tpm.h
 create mode 100644 xen/arch/x86/intel_txt.c
 create mode 100644 xen/arch/x86/slaunch.c
 create mode 100644 xen/arch/x86/tpm.c
 create mode 100644 xen/include/xen/sha1.h
 create mode 100644 xen/include/xen/sha256.h
 create mode 100644 xen/include/xen/slr_table.h
 create mode 100644 xen/lib/sha1.c
 create mode 100644 xen/lib/sha256.c


base-commit: df68a4cb7ed9418f0c5af56a717714b5280737e4
prerequisite-patch-id: 1c3014908bc6e1a5cab8de609270efdb1c412335
prerequisite-patch-id: 850544a1f9639283f2269ea75b630400dd1976aa
prerequisite-patch-id: 69e042a46f8ac0e3f85853e77082caf250719a8d
prerequisite-patch-id: d6c6d27bbe8ff2f5d96852a6eed72a4c99b61356
-- 
2.49.0



             reply	other threads:[~2025-04-22 15:07 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-22 15:06 Sergii Dmytruk [this message]
2025-04-22 15:06 ` [PATCH 01/21] x86/include/asm/intel_txt.h: constants and accessors for TXT registers and heap Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 02/21] include/xen/slr_table.h: Secure Launch Resource Table definitions Sergii Dmytruk
2025-04-22 20:23   ` Andrew Cooper
2025-04-23 14:40     ` Sergii Dmytruk
2025-04-22 20:46   ` ross.philipson
2025-04-23 14:47     ` Sergii Dmytruk
2025-04-23 17:33       ` ross.philipson
2025-04-22 15:06 ` [PATCH 03/21] x86/boot: add MLE header and new entry point Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 04/21] x86/boot/slaunch_early: implement early initialization Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 05/21] x86/boot/slaunch_early: early TXT checks and boot data retrieval Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 06/21] xen/arch/x86: reserve TXT memory Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 07/21] x86/mtrr: expose functions for pausing caching Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 08/21] x86/intel_txt.c: restore boot MTRRs Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 09/21] lib/sha1.c: add file Sergii Dmytruk
2025-04-22 15:36   ` Jan Beulich
2025-04-22 22:15     ` Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 10/21] lib/sha256.c: " Sergii Dmytruk
2025-04-22 15:37   ` Andrew Cooper
2025-04-22 22:20     ` Sergii Dmytruk
2025-04-22 15:39   ` Jan Beulich
2025-04-22 15:06 ` [PATCH 11/21] x86/tpm.c: code for early hashing and extending PCRs (for TPM1.2) Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 12/21] x86/tpm.c: support extending PCRs of TPM2.0 Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 13/21] x86/hvm: Check for VMX in SMX when slaunch active Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 14/21] x86/tpm.c: implement event log for TPM2.0 Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 15/21] x86/boot: choose AP stack based on APIC ID Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 16/21] x86/smpboot.c: TXT AP bringup Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 17/21] arch/x86: process DRTM policy Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 18/21] x86/boot: find MBI and SLRT on AMD Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 19/21] arch/x86: support slaunch with AMD SKINIT Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 20/21] x86/slaunch: support EFI boot Sergii Dmytruk
2025-04-22 15:06 ` [PATCH 21/21] x86/cpu: report SMX, TXT and SKINIT capabilities Sergii Dmytruk
2025-04-22 15:23 ` [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen) Jan Beulich
2025-04-22 18:33   ` Sergii Dmytruk
2025-04-22 17:14 ` Andrew Cooper
2025-04-22 19:01   ` Nicola Vetrini
2025-04-23 13:38   ` Andrew Cooper
2025-04-23 18:45     ` Sergii Dmytruk
2025-04-23 20:11       ` Nicola Vetrini
2025-04-23 21:53         ` Sergii Dmytruk
2025-04-24 10:54           ` Nicola Vetrini
2025-04-24 18:14             ` Sergii Dmytruk
2025-04-23 22:43       ` Andrew Cooper
2025-04-24 18:47         ` Sergii Dmytruk
2025-04-24 18:51           ` Andrew Cooper
2025-04-25 13:33             ` Sergii Dmytruk
2025-04-23 18:59 ` Daniel P. Smith

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