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From: Niklas Cassel <cassel@kernel.org>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Heiko Stuebner" <heiko@sntech.de>
Cc: "Wilfred Mallawa" <wilfred.mallawa@wdc.com>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	"Hans Zhang" <18255117159@163.com>,
	"Laszlo Fiat" <laszlo.fiat@proton.me>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH 1/4] PCI: dw-rockchip: Do not enumerate bus before endpoint devices are ready
Date: Mon, 5 May 2025 16:09:03 +0200	[thread overview]
Message-ID: <aBjGf8-mDrqOrm5-@ryzen> (raw)
In-Reply-To: <20250505092603.286623-7-cassel@kernel.org>

On Mon, May 05, 2025 at 11:26:05AM +0200, Niklas Cassel wrote:
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index 7a6a95dc877a..ed8e3dfe80e0 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -471,6 +471,7 @@ static irqreturn_t rockchip_pcie_rc_sys_irq_thread(int irq, void *arg)
>  	if (reg & PCIE_RDLH_LINK_UP_CHGED) {
>  		if (rockchip_pcie_link_up(pci)) {
>  			dev_dbg(dev, "Received Link up event. Starting enumeration!\n");
> +			msleep(PCIE_T_RRS_READY_MS);
>  			/* Rescan the bus to enumerate endpoint devices */
>  			pci_lock_rescan_remove();
>  			pci_rescan_bus(pp->bridge->bus);
> -- 
> 2.49.0
> 

Bah.. this patch is missing
+#include "../../pci.h"

missed during rebase.

(pcie-qcom.c already includes this.)

Will send a V2.


Kind regards,
Niklas


WARNING: multiple messages have this Message-ID (diff)
From: Niklas Cassel <cassel@kernel.org>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Heiko Stuebner" <heiko@sntech.de>
Cc: "Wilfred Mallawa" <wilfred.mallawa@wdc.com>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	"Hans Zhang" <18255117159@163.com>,
	"Laszlo Fiat" <laszlo.fiat@proton.me>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH 1/4] PCI: dw-rockchip: Do not enumerate bus before endpoint devices are ready
Date: Mon, 5 May 2025 16:09:03 +0200	[thread overview]
Message-ID: <aBjGf8-mDrqOrm5-@ryzen> (raw)
In-Reply-To: <20250505092603.286623-7-cassel@kernel.org>

On Mon, May 05, 2025 at 11:26:05AM +0200, Niklas Cassel wrote:
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index 7a6a95dc877a..ed8e3dfe80e0 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -471,6 +471,7 @@ static irqreturn_t rockchip_pcie_rc_sys_irq_thread(int irq, void *arg)
>  	if (reg & PCIE_RDLH_LINK_UP_CHGED) {
>  		if (rockchip_pcie_link_up(pci)) {
>  			dev_dbg(dev, "Received Link up event. Starting enumeration!\n");
> +			msleep(PCIE_T_RRS_READY_MS);
>  			/* Rescan the bus to enumerate endpoint devices */
>  			pci_lock_rescan_remove();
>  			pci_rescan_bus(pp->bridge->bus);
> -- 
> 2.49.0
> 

Bah.. this patch is missing
+#include "../../pci.h"

missed during rebase.

(pcie-qcom.c already includes this.)

Will send a V2.


Kind regards,
Niklas

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

  reply	other threads:[~2025-05-05 14:11 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-05  9:26 [PATCH 0/4] PCI: dwc: Link Up IRQ fixes Niklas Cassel
2025-05-05  9:26 ` Niklas Cassel
2025-05-05  9:26 ` [PATCH 1/4] PCI: dw-rockchip: Do not enumerate bus before endpoint devices are ready Niklas Cassel
2025-05-05  9:26   ` Niklas Cassel
2025-05-05 14:09   ` Niklas Cassel [this message]
2025-05-05 14:09     ` Niklas Cassel
2025-05-05  9:26 ` [PATCH 2/4] PCI: qcom: " Niklas Cassel
2025-05-05  9:26 ` [PATCH 3/4] PCI: dw-rockchip: Replace PERST sleep time with proper macro Niklas Cassel
2025-05-05  9:26   ` Niklas Cassel
2025-05-05  9:26 ` [PATCH 4/4] PCI: qcom: " Niklas Cassel
  -- strict thread matches above, loose matches on Subject: below --
2025-06-11 10:51 [PATCH 0/4] PCI: dwc: Do not enumerate bus before endpoint devices are ready Niklas Cassel
2025-06-11 10:51 ` [PATCH 1/4] PCI: dw-rockchip: " Niklas Cassel
2025-06-11 10:51   ` Niklas Cassel
2025-06-11 12:33   ` Damien Le Moal
2025-06-11 12:33     ` Damien Le Moal
2025-06-11 21:14   ` Bjorn Helgaas
2025-06-11 21:14     ` Bjorn Helgaas
2025-06-12 11:19     ` Niklas Cassel
2025-06-12 11:19       ` Niklas Cassel
2025-06-12 11:38       ` Bjorn Helgaas
2025-06-12 11:38         ` Bjorn Helgaas
2025-06-12 11:40         ` Niklas Cassel
2025-06-12 11:40           ` Niklas Cassel
2025-06-12 12:21           ` Bjorn Helgaas
2025-06-12 12:21             ` Bjorn Helgaas
2025-06-12 13:00             ` Manivannan Sadhasivam
2025-06-12 13:00               ` Manivannan Sadhasivam
2025-06-12 14:44               ` Bjorn Helgaas
2025-06-12 14:44                 ` Bjorn Helgaas
2025-06-12 15:03                 ` Manivannan Sadhasivam
2025-06-12 15:03                   ` Manivannan Sadhasivam
2025-06-12 15:24                   ` Bjorn Helgaas
2025-06-12 15:24                     ` Bjorn Helgaas
2025-06-12 16:51                     ` Manivannan Sadhasivam
2025-06-12 16:51                       ` Manivannan Sadhasivam

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