From: Nicolin Chen <nicolinc@nvidia.com>
To: Shameer Kolothum <skolothumtho@nvidia.com>
Cc: <qemu-arm@nongnu.org>, <qemu-devel@nongnu.org>,
<eric.auger@redhat.com>, <peter.maydell@linaro.org>,
<nathanc@nvidia.com>, <mochs@nvidia.com>, <jgg@nvidia.com>,
<jonathan.cameron@huawei.com>, <zhangfei.gao@linaro.org>,
<zhenzhong.duan@intel.com>, <kjaju@nvidia.com>
Subject: Re: [RFC PATCH 05/16] hw/arm/tegra241-cmdqv: Add initial Tegra241 CMDQ-Virtualisation support
Date: Mon, 29 Dec 2025 11:07:24 -0800 [thread overview]
Message-ID: <aVLRbI2dYkvIwEBv@Asurada-Nvidia> (raw)
In-Reply-To: <20251210133737.78257-6-skolothumtho@nvidia.com>
On Wed, Dec 10, 2025 at 01:37:26PM +0000, Shameer Kolothum wrote:
> +void tegra241_cmdqv_init(SMMUv3State *s)
> +{
> + SysBusDevice *sbd = SYS_BUS_DEVICE(OBJECT(s));
> + Tegra241CMDQV *cmdqv;
> +
> + if (!s->tegra241_cmdqv) {
> + return;
> + }
Maybe g_assert?
> +typedef struct Tegra241CMDQV {
> + struct iommu_viommu_tegra241_cmdqv cmdqv_data;
> + SMMUv3State *smmu;
I see all the cmdqv functions want "smmu->s_accel", so maybe store
"s_accel" instead?
> +#ifdef CONFIG_TEGRA241_CMDQV
> +bool tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev,
> + uint32_t *out_viommu_id, Error **errp);
> +void tegra241_cmdqv_init(SMMUv3State *s);
> +#else
> +static inline void tegra241_cmdqv_init(SMMUv3State *s)
> +{
> +}
> +static inline bool
> +tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev,
> + uint32_t *out_viommu_id, Error **errp)
> +{
> + return true;
Should it return false?
> index 2d4970fe19..8e56e480a0 100644
> --- a/include/hw/arm/smmuv3.h
> +++ b/include/hw/arm/smmuv3.h
> @@ -73,6 +73,9 @@ struct SMMUv3State {
> bool ats;
> uint8_t oas;
> bool pasid;
> + /* Support for NVIDIA Tegra241 SMMU CMDQV extension */
> + struct Tegra241CMDQV *cmdqv;
> + bool tegra241_cmdqv;
tegra241_cmdqv is a Property, so it has to stay with SMMUv3State.
But "struct Tegra241CMDQV *cmdqv" might be in the SMMUv3AccelState?
Nicolin
next prev parent reply other threads:[~2025-12-29 19:07 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-10 13:37 [RFC PATCH 00/16] hw/arm: Introduce Tegra241 CMDQV support for accelerated SMMUv3 Shameer Kolothum
2025-12-10 13:37 ` [RFC PATCH 01/16] backends/iommufd: Update iommufd_backend_get_device_info Shameer Kolothum
2025-12-29 18:39 ` Nicolin Chen
2025-12-30 8:41 ` Shameer Kolothum
2026-01-12 13:27 ` Eric Auger
2025-12-10 13:37 ` [RFC PATCH 02/16] backends/iommufd: Update iommufd_backend_alloc_viommu to allow user ptr Shameer Kolothum
2025-12-29 18:44 ` Nicolin Chen
2026-01-12 13:34 ` Eric Auger
2025-12-10 13:37 ` [RFC PATCH 03/16] backends/iommufd: Introduce iommufd_backend_alloc_hw_queue Shameer Kolothum
2026-01-12 13:41 ` Eric Auger
2025-12-10 13:37 ` [RFC PATCH 04/16] backends/iommufd: Introduce iommufd_backend_viommu_mmap Shameer Kolothum
2025-12-29 18:52 ` Nicolin Chen
2026-01-12 14:57 ` Eric Auger
2025-12-10 13:37 ` [RFC PATCH 05/16] hw/arm/tegra241-cmdqv: Add initial Tegra241 CMDQ-Virtualisation support Shameer Kolothum
2025-12-29 19:07 ` Nicolin Chen [this message]
2025-12-30 9:00 ` Shameer Kolothum
2026-01-12 15:28 ` Eric Auger
2026-01-13 14:41 ` Shameer Kolothum
2026-01-13 17:56 ` Nicolin Chen
2026-01-26 13:30 ` Eric Auger
2026-01-26 14:22 ` Eric Auger
2025-12-10 13:37 ` [RFC PATCH 06/16] hw/arm/tegra241-cmdqv: Map VINTF Page0 into guest Shameer Kolothum
2025-12-29 19:28 ` Nicolin Chen
2026-01-26 13:48 ` Eric Auger
2026-01-26 15:46 ` Shameer Kolothum
2026-01-27 0:04 ` Nicolin Chen via
2026-01-27 0:04 ` Nicolin Chen via qemu development
2026-01-27 13:23 ` Eric Auger
2026-01-27 19:36 ` Nicolin Chen via
2026-01-27 19:36 ` Nicolin Chen via qemu development
2026-01-26 13:58 ` Eric Auger
2025-12-10 13:37 ` [RFC PATCH 07/16] hw/arm/tegra241-cmdqv: Add read emulation support for registers Shameer Kolothum
2025-12-29 19:42 ` Nicolin Chen
2026-01-26 15:13 ` Eric Auger
2026-01-26 19:10 ` Nicolin Chen
2025-12-10 13:37 ` [RFC PATCH 08/16] system/physmem: Add helper to check whether a guest PA maps to RAM Shameer Kolothum
2026-01-12 15:35 ` Eric Auger
2025-12-10 13:37 ` [RFC PATCH 09/16] hw/arm/tegra241-cmdqv:: Add write emulation for registers Shameer Kolothum
2026-01-26 15:18 ` Eric Auger
2025-12-10 13:37 ` [RFC PATCH 10/16] hw/arm/tegra241-cmdqv: Allocate vEVENTQ object Shameer Kolothum
2025-12-29 19:49 ` Nicolin Chen
2025-12-30 9:47 ` Shameer Kolothum
2025-12-30 17:54 ` Nicolin Chen
2025-12-30 18:10 ` Shameer Kolothum
2025-12-30 18:22 ` Nicolin Chen
2025-12-30 18:30 ` Shameer Kolothum
2025-12-10 13:37 ` [RFC PATCH 11/16] hw/arm/tegra241-cmdqv: Read and propagate Tegra241 CMDQV errors Shameer Kolothum
2025-12-29 19:52 ` Nicolin Chen
2026-01-26 15:19 ` Eric Auger
2025-12-10 13:37 ` [RFC PATCH 12/16] hw/arm/tegra241-cmdqv: Add reset handler Shameer Kolothum
2025-12-10 13:37 ` [RFC PATCH 13/16] hw/arm/tegra241-cmdqv: Limit queue size based on backend page size Shameer Kolothum
2025-12-29 19:57 ` Nicolin Chen
2025-12-10 13:37 ` [RFC PATCH 14/16] virt-acpi-build: Rename AcpiIortSMMUv3Dev to AcpiSMMUv3Dev Shameer Kolothum
2025-12-29 19:59 ` Nicolin Chen
2026-01-26 15:25 ` Eric Auger
2025-12-10 13:37 ` [RFC PATCH 15/16] hw/arm/virt-acpi: Advertise Tegra241 CMDQV nodes in DSDT Shameer Kolothum
2025-12-29 20:11 ` Nicolin Chen
2025-12-30 10:13 ` Shameer Kolothum
2025-12-30 18:11 ` Nicolin Chen
2025-12-30 18:23 ` Nicolin Chen
2025-12-30 19:13 ` Shameer Kolothum
2026-01-26 15:28 ` Eric Auger
2026-01-27 0:42 ` Nicolin Chen
2025-12-10 13:37 ` [RFC PATCH 16/16] hw/arm/smmuv3: Add tegra241-cmdqv property for SMMUv3 device Shameer Kolothum
2025-12-29 20:14 ` Nicolin Chen
2025-12-11 17:54 ` [RFC PATCH 00/16] hw/arm: Introduce Tegra241 CMDQV support for accelerated SMMUv3 Eric Auger
2025-12-12 0:23 ` Shameer Kolothum
2025-12-17 19:32 ` Shameer Kolothum
2026-01-12 15:44 ` Eric Auger
2026-01-13 15:23 ` Shameer Kolothum
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aVLRbI2dYkvIwEBv@Asurada-Nvidia \
--to=nicolinc@nvidia.com \
--cc=eric.auger@redhat.com \
--cc=jgg@nvidia.com \
--cc=jonathan.cameron@huawei.com \
--cc=kjaju@nvidia.com \
--cc=mochs@nvidia.com \
--cc=nathanc@nvidia.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=skolothumtho@nvidia.com \
--cc=zhangfei.gao@linaro.org \
--cc=zhenzhong.duan@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.