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From: Chao Liu via qemu development <qemu-devel@nongnu.org>
To: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	alistair.francis@wdc.com, liwei1518@gmail.com,
	zhiwei_liu@linux.alibaba.com,
	"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>
Subject: Re: [PATCH v5 11/15] hw/riscv/fdt-common, virt.c: add riscv_create_fdt_rtc()
Date: Sat, 29 Aug 2026 11:12:12 +0800	[thread overview]
Message-ID: <apJOA-ooEmsjj77P@ChaodeMacBook-Pro.local> (raw)
In-Reply-To: <20260828203918.350131-12-daniel.barboza@oss.qualcomm.com>

On Fri, Aug 28, 2026 at 05:39:13PM +0800, Daniel Henrique Barboza wrote:
> The soon to be added 'riscv-server-ref' board will add a rtc FDT subnode
> that is similar to what the 'virt' board users.  Put it into a helper to
> avoid copy/pasting code.
> 
> No FDT changes intended.
> 
> Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Chao Liu <chao.liu@processmission.com>

Thanks,
Chao

> ---
>  hw/riscv/fdt-common.c         | 21 +++++++++++++++++++++
>  hw/riscv/virt.c               | 26 ++------------------------
>  include/hw/riscv/fdt-common.h |  3 +++
>  3 files changed, 26 insertions(+), 24 deletions(-)
> 
> diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c
> index 0107aadaad..ce2dcb43b4 100644
> --- a/hw/riscv/fdt-common.c
> +++ b/hw/riscv/fdt-common.c
> @@ -828,3 +828,24 @@ void riscv_create_fdt_uart(void *fdt, const MemMapEntry *uart_mem,
>          qemu_fdt_setprop_cells(fdt, name, "interrupts", uart_irq, 0x4);
>      }
>  }
> +
> +void riscv_create_fdt_rtc(void *fdt, const MemMapEntry *rtc_mem,
> +                          int rtc_irq, int aia_type,
> +                          uint32_t irq_phandle)
> +{
> +    g_autofree char *name = NULL;
> +
> +    name = g_strdup_printf("/soc/rtc@%"HWADDR_PRIx,
> +                           rtc_mem->base);
> +    qemu_fdt_add_subnode(fdt, name);
> +    qemu_fdt_setprop_string(fdt, name, "compatible", "google,goldfish-rtc");
> +    qemu_fdt_setprop_sized_cells(fdt, name, "reg",
> +                                 2, rtc_mem->base,
> +                                 2, rtc_mem->size);
> +    qemu_fdt_setprop_cell(fdt, name, "interrupt-parent", irq_phandle);
> +    if (aia_type == AIA_TYPE_NONE) {
> +        qemu_fdt_setprop_cell(fdt, name, "interrupts", rtc_irq);
> +    } else {
> +        qemu_fdt_setprop_cells(fdt, name, "interrupts", rtc_irq, 0x4);
> +    }
> +}
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 3e40513dc1..ccea5784f0 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -436,29 +436,6 @@ static void create_fdt_uarts(RISCVVirtState *s, uint32_t irq_mmio_phandle)
>      qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", name);
>  }
>  
> -static void create_fdt_rtc(RISCVVirtState *s,
> -                           uint32_t irq_mmio_phandle)
> -{
> -    g_autofree char *name = NULL;
> -    MachineState *ms = MACHINE(s);
> -
> -    name = g_strdup_printf("/soc/rtc@%"HWADDR_PRIx,
> -                           s->memmap[VIRT_RTC].base);
> -    qemu_fdt_add_subnode(ms->fdt, name);
> -    qemu_fdt_setprop_string(ms->fdt, name, "compatible",
> -        "google,goldfish-rtc");
> -    qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg",
> -                                 2, s->memmap[VIRT_RTC].base,
> -                                 2, s->memmap[VIRT_RTC].size);
> -    qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent",
> -        irq_mmio_phandle);
> -    if (s->aia_type == VIRT_AIA_TYPE_NONE) {
> -        qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", RTC_IRQ);
> -    } else {
> -        qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", RTC_IRQ, 0x4);
> -    }
> -}
> -
>  static void create_fdt_fw_cfg(RISCVVirtState *s)
>  {
>      MachineState *ms = MACHINE(s);
> @@ -566,7 +543,8 @@ static void finalize_fdt(RISCVVirtState *s)
>  
>      create_fdt_uarts(s, irq_mmio_phandle);
>  
> -    create_fdt_rtc(s, irq_mmio_phandle);
> +    riscv_create_fdt_rtc(MACHINE(s)->fdt, &s->memmap[VIRT_RTC], RTC_IRQ,
> +                         s->aia_type, irq_mmio_phandle);
>  }
>  
>  static void create_fdt(RISCVVirtState *s)
> diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h
> index c8b25348bd..eb9db8278d 100644
> --- a/include/hw/riscv/fdt-common.h
> +++ b/include/hw/riscv/fdt-common.h
> @@ -133,4 +133,7 @@ char *riscv_fdt_get_uart_nodename(hwaddr addr);
>  void riscv_create_fdt_uart(void *fdt, const MemMapEntry *uart_mem,
>                             int uart_irq, int aia_type,
>                             uint32_t irq_phandle);
> +void riscv_create_fdt_rtc(void *fdt, const MemMapEntry *rtc_mem,
> +                          int rtc_irq, int aia_type,
> +                          uint32_t irq_phandle);
>  #endif
> -- 
> 2.43.0
> 


WARNING: multiple messages have this Message-ID (diff)
From: Chao Liu via <qemu-riscv@nongnu.org>
To: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	alistair.francis@wdc.com, liwei1518@gmail.com,
	zhiwei_liu@linux.alibaba.com,
	"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>
Subject: Re: [PATCH v5 11/15] hw/riscv/fdt-common, virt.c: add riscv_create_fdt_rtc()
Date: Sat, 29 Aug 2026 11:12:12 +0800	[thread overview]
Message-ID: <apJOA-ooEmsjj77P@ChaodeMacBook-Pro.local> (raw)
In-Reply-To: <20260828203918.350131-12-daniel.barboza@oss.qualcomm.com>

On Fri, Aug 28, 2026 at 05:39:13PM +0800, Daniel Henrique Barboza wrote:
> The soon to be added 'riscv-server-ref' board will add a rtc FDT subnode
> that is similar to what the 'virt' board users.  Put it into a helper to
> avoid copy/pasting code.
> 
> No FDT changes intended.
> 
> Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Chao Liu <chao.liu@processmission.com>

Thanks,
Chao

> ---
>  hw/riscv/fdt-common.c         | 21 +++++++++++++++++++++
>  hw/riscv/virt.c               | 26 ++------------------------
>  include/hw/riscv/fdt-common.h |  3 +++
>  3 files changed, 26 insertions(+), 24 deletions(-)
> 
> diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c
> index 0107aadaad..ce2dcb43b4 100644
> --- a/hw/riscv/fdt-common.c
> +++ b/hw/riscv/fdt-common.c
> @@ -828,3 +828,24 @@ void riscv_create_fdt_uart(void *fdt, const MemMapEntry *uart_mem,
>          qemu_fdt_setprop_cells(fdt, name, "interrupts", uart_irq, 0x4);
>      }
>  }
> +
> +void riscv_create_fdt_rtc(void *fdt, const MemMapEntry *rtc_mem,
> +                          int rtc_irq, int aia_type,
> +                          uint32_t irq_phandle)
> +{
> +    g_autofree char *name = NULL;
> +
> +    name = g_strdup_printf("/soc/rtc@%"HWADDR_PRIx,
> +                           rtc_mem->base);
> +    qemu_fdt_add_subnode(fdt, name);
> +    qemu_fdt_setprop_string(fdt, name, "compatible", "google,goldfish-rtc");
> +    qemu_fdt_setprop_sized_cells(fdt, name, "reg",
> +                                 2, rtc_mem->base,
> +                                 2, rtc_mem->size);
> +    qemu_fdt_setprop_cell(fdt, name, "interrupt-parent", irq_phandle);
> +    if (aia_type == AIA_TYPE_NONE) {
> +        qemu_fdt_setprop_cell(fdt, name, "interrupts", rtc_irq);
> +    } else {
> +        qemu_fdt_setprop_cells(fdt, name, "interrupts", rtc_irq, 0x4);
> +    }
> +}
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 3e40513dc1..ccea5784f0 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -436,29 +436,6 @@ static void create_fdt_uarts(RISCVVirtState *s, uint32_t irq_mmio_phandle)
>      qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", name);
>  }
>  
> -static void create_fdt_rtc(RISCVVirtState *s,
> -                           uint32_t irq_mmio_phandle)
> -{
> -    g_autofree char *name = NULL;
> -    MachineState *ms = MACHINE(s);
> -
> -    name = g_strdup_printf("/soc/rtc@%"HWADDR_PRIx,
> -                           s->memmap[VIRT_RTC].base);
> -    qemu_fdt_add_subnode(ms->fdt, name);
> -    qemu_fdt_setprop_string(ms->fdt, name, "compatible",
> -        "google,goldfish-rtc");
> -    qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg",
> -                                 2, s->memmap[VIRT_RTC].base,
> -                                 2, s->memmap[VIRT_RTC].size);
> -    qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent",
> -        irq_mmio_phandle);
> -    if (s->aia_type == VIRT_AIA_TYPE_NONE) {
> -        qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", RTC_IRQ);
> -    } else {
> -        qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", RTC_IRQ, 0x4);
> -    }
> -}
> -
>  static void create_fdt_fw_cfg(RISCVVirtState *s)
>  {
>      MachineState *ms = MACHINE(s);
> @@ -566,7 +543,8 @@ static void finalize_fdt(RISCVVirtState *s)
>  
>      create_fdt_uarts(s, irq_mmio_phandle);
>  
> -    create_fdt_rtc(s, irq_mmio_phandle);
> +    riscv_create_fdt_rtc(MACHINE(s)->fdt, &s->memmap[VIRT_RTC], RTC_IRQ,
> +                         s->aia_type, irq_mmio_phandle);
>  }
>  
>  static void create_fdt(RISCVVirtState *s)
> diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h
> index c8b25348bd..eb9db8278d 100644
> --- a/include/hw/riscv/fdt-common.h
> +++ b/include/hw/riscv/fdt-common.h
> @@ -133,4 +133,7 @@ char *riscv_fdt_get_uart_nodename(hwaddr addr);
>  void riscv_create_fdt_uart(void *fdt, const MemMapEntry *uart_mem,
>                             int uart_irq, int aia_type,
>                             uint32_t irq_phandle);
> +void riscv_create_fdt_rtc(void *fdt, const MemMapEntry *rtc_mem,
> +                          int rtc_irq, int aia_type,
> +                          uint32_t irq_phandle);
>  #endif
> -- 
> 2.43.0
> 


  reply	other threads:[~2026-08-29  3:12 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-28 20:39 [PATCH v5 00/15] hw/riscv: trivial code dup work (riscv-server-ref prep) Daniel Henrique Barboza
2026-08-28 20:39 ` [PATCH v5 01/15] hw/riscv/fdt-common: prepend helpers with "riscv_" Daniel Henrique Barboza
2026-09-01  4:42   ` Alistair Francis
2026-09-02 16:24   ` Philippe Mathieu-Daudé
2026-09-02 16:38     ` Daniel Henrique Barboza
2026-08-28 20:39 ` [PATCH v5 02/15] hw/riscv/fdt-common, virt.c: add riscv_create_fdt_flash() Daniel Henrique Barboza
2026-09-01  4:45   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 03/15] hw/riscv/fdt-common, virt.c: add riscv_create_fdt_syscon() Daniel Henrique Barboza
2026-09-01  4:45   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 04/15] hw/riscv/fdt-common, virt.c: add riscv_create_fdt_riscv_iommu_sys() Daniel Henrique Barboza
2026-09-01  4:47   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 05/15] hw/riscv/fdt_common, virt.c: add riscv_create_fdt_pcie() Daniel Henrique Barboza
2026-08-29  3:08   ` Chao Liu via
2026-08-29  3:08     ` Chao Liu via qemu development
2026-09-01  4:49   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 06/15] hw/riscv/fdt_common, virt.c: add riscv_create_fdt_imsic() Daniel Henrique Barboza
2026-08-29  3:08   ` Chao Liu via
2026-08-29  3:08     ` Chao Liu via qemu development
2026-09-01  4:51   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 07/15] hw/riscv/fdt_common, virt.c: add riscv_create_fdt_socket_aplic() Daniel Henrique Barboza
2026-08-29  3:09   ` Chao Liu via
2026-08-29  3:09     ` Chao Liu via qemu development
2026-09-01  5:14   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 08/15] hw/riscv/virt.c: fix aclint soc/mtimer nodename Daniel Henrique Barboza
2026-08-29  3:10   ` Chao Liu
2026-09-01  5:15   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 09/15] hw/riscv/fdt-common, virt.c: add riscv_create_fdt_socket_aclint() Daniel Henrique Barboza
2026-08-29  3:10   ` Chao Liu via
2026-08-29  3:10     ` Chao Liu via qemu development
2026-09-01  5:17   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 10/15] hw/riscv/fdt-common, virt.c: add riscv_create_fdt_uart() Daniel Henrique Barboza
2026-08-29  3:11   ` Chao Liu via qemu development
2026-08-29  3:11     ` Chao Liu via
2026-09-01  5:23   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 11/15] hw/riscv/fdt-common, virt.c: add riscv_create_fdt_rtc() Daniel Henrique Barboza
2026-08-29  3:12   ` Chao Liu via qemu development [this message]
2026-08-29  3:12     ` Chao Liu via
2026-09-01  5:23   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 12/15] hw/riscv/device-common, virt.c: add riscv_create_platform_bus() Daniel Henrique Barboza
2026-08-29  3:12   ` Chao Liu via
2026-08-29  3:12     ` Chao Liu via qemu development
2026-09-01  5:24   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 13/15] hw/riscv/device-common, virt.c: add flash helpers Daniel Henrique Barboza
2026-08-29  3:12   ` Chao Liu via qemu development
2026-08-29  3:12     ` Chao Liu via
2026-09-01  5:28   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 14/15] hw/riscv/device-common, virt.c: add riscv_gpex_pcie_init() Daniel Henrique Barboza
2026-08-29  3:13   ` Chao Liu via
2026-08-29  3:13     ` Chao Liu via qemu development
2026-09-01  5:28   ` Alistair Francis
2026-08-28 20:39 ` [PATCH v5 15/15] hw/riscv/riscv-iommu-sys.c, virt.c: add riscv_create_iommu_sys() Daniel Henrique Barboza
2026-08-29  3:13   ` Chao Liu via qemu development
2026-08-29  3:13     ` Chao Liu via
2026-09-01  5:28   ` Alistair Francis
2026-09-01  5:32 ` [PATCH v5 00/15] hw/riscv: trivial code dup work (riscv-server-ref prep) Alistair Francis

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