* [PULL 00/59] Misc HW patches for 2026-10-27
@ 2026-10-27 19:22 Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 01/59] scripts/checkpatch.pl: Don't complain about spaces before Fixes tags Philippe Mathieu-Daudé
` (58 more replies)
0 siblings, 59 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
I apologize for having kept this patch queue for so long before posting :/
The following changes since commit ab2e62917cab5fcf2c9abf9289d58ac263092e44:
Merge tag 'pull-tcg-20261025' of https://gitlab.com/rth7680/qemu into staging (2026-10-27 09:22:37 -0500)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/hw-misc-20261027
for you to fetch changes up to 17dd01a63b1657259ceac7eda9de370b946e892f:
qemu/arch-defs: increase width of QEMU_ARCH_* masks enums to be 64 bits (2026-10-27 20:21:55 +0100)
Ignoring:
ERROR: line over 90 characters
#39: FILE: scripts/checkpatch.pl:1892:
+ my $tag_space = not ($line =~ /^\s*fixes:? [0-9a-f]{5,40}/i);
and:
tcg/sparc64/tcg-target.c.inc: In function 'tcg_out_movi_int':
tcg/sparc64/tcg-target.c.inc:477:24: error: argument 2 null where non-null expected [-Werror=nonnull]
477 | tcg_tbrel_diff(s, NULL));
| ^~~~~~~~~~~~~~
In file included from include/tcg/tcg-op-common.h:11,
from ../tcg/tcg.c:41:
include/tcg/tcg.h:913:25: note: in a call to function 'tcg_tbrel_diff' declared 'nonnull'
913 | static inline ptrdiff_t tcg_tbrel_diff(TCGContext *s, const void *target)
| ^~~~~~~~~~~~~~
cc1: all warnings being treated as errors
----------------------------------------------------------------
Misc HW patches
- Don't complain about spaces before 'Fixes' tags in scripts/checkpatch.pl
- Various fixes (SD card, i.MX, SH4 UART, CAN, PCIe, ...)
- Widen QEMU_ARCH_* and arch_bitmask to 64-bit
- Remove deprecated 'debug-threads' option for -name
- MAINTAINERS updates
----------------------------------------------------------------
Bernhard Beschow (43):
hw/watchdog/wdt_imx2: Preserve own locked bits in WCR
hw/watchdog/wdt_imx2: Fix handling of write one once WCR bits
hw/watchdog/wdt_imx2: Clear WDT lock on reset
hw/watchdog/wdt_imx2: Remove redundant attributes
hw/arm/imx8mm-evk: Fix reference count of SoC object
docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk
invocations
hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default
tests/functional/arm: Add console test for `sabrelite` machine
hw/arm/mcimx6ul-evk: Have 512 MiB of RAM by default
hw/arm/mcimx7d-sabre: Have 2 CPUs and 2 GiB of RAM by default
tests/functional/arm: Add console test for `mcimx7d-sabre` machine
hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE
hw/arm/fsl-imx31: Derive from TYPE_SYS_BUS_DEVICE
hw/arm/fsl-imx6: Derive from TYPE_SYS_BUS_DEVICE
hw/arm/fsl-imx6ul: Derive from TYPE_SYS_BUS_DEVICE
hw/arm/fsl-imx7: Derive from TYPE_SYS_BUS_DEVICE
hw/timer/imx_gpt: Wire clock control module via link property
hw/timer/imx_epit: Wire clock control module via link property
hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM
hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX
Kconfig: Extract config IMX_AVIC from config IMX
Kconfig: Extract config IMX_GPCV2 from config IMX
Kconfig: Extract config IMX_RNG from config IMX
Kconfig: Extract config FSL_IMX7_GPR from config IMX
Kconfig: Extract config FSL_IMX{6, 7}_SRC from config IMX
Kconfig: Extract config FSL_IMX7_SNVS from config IMX
Kconfig: Extract dedicated config FSL_IMXx_CCM from config IMX
Kconfig: Extract config IMX_GPT from config IMX
Kconfig: Extract config IMX_EPIT from config IMX
Kconfig: Extract config GPIO_IMX from config IMX
Kconfig: Extract config IMX_SPI from config IMX
Kconfig: Extract config IMX_SERIAL from config IMX
Kconfig: Remove config IMX
hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency
hw/arm/fsl-imx8m: Fix typo
hw/misc/imx6_src: Avoid casting from void *
hw/char/imx_serial: Avoid casting from void *
hw/intc/imx_avic: Avoid casting from void *
hw/misc/imx*_ccm: Avoid casting from void *
hw/usb/imx-usb-phy: Avoid casting from void *
hw/net/imx_fec: Trace with QOM path where easily possible
hw/net/lan9118_phy: Trace with QOM path
hw/watchdog/wdt_imx2: Trace with QOM path
Bin Meng (1):
hw/sd/sdcard: Keep high-capacity memory blocks at 512 bytes
Daniel P. Berrangé (1):
hw/arm: remove pci-bridge/pci_expander_bridge.h from virt.c
Gustavo Romero (1):
MAINTAINERS: Update Gustavo's email address
Jamin Lin (1):
hw/pci-host/aspeed_pcie: Fix global MSI setting during class
initialization
Marc-André Lureau (3):
hw/char/sh_serial: fix RDF flag clear on FIFO reset
hw/char/sh_serial: use rx_cnt for available FIFO space
hw/char/sh_serial: fix break detection flag
Peter Maydell (5):
scripts/checkpatch.pl: Don't complain about spaces before Fixes tags
hw/net/can/flexcan: Fix FLEXCAN_CRCR_MBCRC definition
hw/net/cadence_gem: Check guest-provided queue numbers in screening
registers
hw/misc/allwinner-h3-dramc: Avoid shift by negative amount
hw/display/xlnx_dp: Make assertions clearer
Philippe Mathieu-Daudé (1):
system: Remove deprecated 'debug-threads' option for -name
Yonggang Luo (3):
qemu/arch-defs: extract QEMU_ARCH_BIT for QEMU_ARCH_* enums
qemu/arch-defs: Use SYS_EMU_TARGET__MAX to define QEMU_ARCH_ALL
qemu/arch-defs: increase width of QEMU_ARCH_* masks enums to be 64
bits
MAINTAINERS | 6 +-
docs/about/deprecated.rst | 7 ---
docs/about/removed-features.rst | 9 ++-
docs/system/arm/imx8m.rst | 2 +-
docs/system/arm/sabrelite.rst | 4 +-
hw/net/can/flexcan_regs.h | 2 +-
include/hw/arm/fsl-imx25.h | 5 +-
include/hw/arm/fsl-imx31.h | 5 +-
include/hw/arm/fsl-imx6.h | 5 +-
include/hw/arm/fsl-imx6ul.h | 5 +-
include/hw/arm/fsl-imx7.h | 5 +-
include/hw/arm/fsl-imx8mm.h | 4 +-
include/hw/arm/fsl-imx8mp.h | 4 +-
include/hw/watchdog/wdt_imx2.h | 2 -
include/qemu/base-arch-defs.h | 67 +++++++++++----------
monitor/monitor-hmp-internal.h | 2 +-
hw/arm/fsl-imx25.c | 13 ++--
hw/arm/fsl-imx31.c | 13 ++--
hw/arm/fsl-imx6.c | 10 +--
hw/arm/fsl-imx6ul.c | 10 +--
hw/arm/fsl-imx7.c | 8 +--
hw/arm/fsl-imx8mm.c | 5 +-
hw/arm/fsl-imx8mp.c | 5 +-
hw/arm/imx25_pdk.c | 2 +-
hw/arm/imx8mm-evk.c | 4 +-
hw/arm/kzm.c | 2 +-
hw/arm/mcimx6ul-evk.c | 3 +-
hw/arm/mcimx7d-sabre.c | 4 +-
hw/arm/sabrelite.c | 5 +-
hw/arm/virt.c | 1 -
hw/char/imx_serial.c | 10 +--
hw/char/sh_serial.c | 6 +-
hw/display/xlnx_dp.c | 4 +-
hw/intc/imx_avic.c | 6 +-
hw/misc/allwinner-h3-dramc.c | 2 +-
hw/misc/imx25_ccm.c | 4 +-
hw/misc/imx31_ccm.c | 4 +-
hw/misc/imx6_ccm.c | 8 +--
hw/misc/imx6_src.c | 4 +-
hw/misc/imx6ul_ccm.c | 8 +--
hw/misc/imx7_src.c | 4 +-
hw/net/cadence_gem.c | 21 +++++--
hw/net/imx_fec.c | 28 +++++----
hw/net/lan9118_phy.c | 10 +--
hw/pci-host/aspeed_pcie.c | 4 +-
hw/sd/sd.c | 43 +++++++------
hw/timer/imx_epit.c | 14 +++++
hw/timer/imx_gpt.c | 14 +++++
hw/usb/imx-usb-phy.c | 4 +-
hw/watchdog/wdt_imx2.c | 29 +++------
system/arch_init.c | 4 +-
system/qdev-monitor.c | 2 +-
system/vl.c | 13 +---
tests/qtest/migration/framework.c | 4 +-
tests/qtest/migration/precopy-tests.c | 2 +-
hw/arm/Kconfig | 57 +++++++++++++++---
hw/char/Kconfig | 3 +
hw/char/meson.build | 2 +-
hw/gpio/Kconfig | 3 +
hw/gpio/meson.build | 2 +-
hw/intc/Kconfig | 6 ++
hw/intc/meson.build | 3 +-
hw/misc/Kconfig | 41 +++++++++++--
hw/misc/meson.build | 24 ++++----
hw/net/Kconfig | 2 +-
hw/net/trace-events | 33 +++++-----
hw/ssi/Kconfig | 4 ++
hw/ssi/meson.build | 2 +-
hw/timer/Kconfig | 10 +++
hw/timer/meson.build | 4 +-
hw/vmapple/Kconfig | 1 -
hw/watchdog/trace-events | 8 +--
qemu-options.hx | 7 +--
scripts/checkpatch.pl | 2 +-
tests/functional/aarch64/test_imx8mm_evk.py | 4 +-
tests/functional/aarch64/test_imx8mp_evk.py | 4 +-
tests/functional/arm/meson.build | 4 ++
tests/functional/arm/test_mcimx7d_sabre.py | 46 ++++++++++++++
tests/functional/arm/test_sabrelite.py | 46 ++++++++++++++
79 files changed, 502 insertions(+), 287 deletions(-)
create mode 100755 tests/functional/arm/test_mcimx7d_sabre.py
create mode 100755 tests/functional/arm/test_sabrelite.py
--
2.55.0
^ permalink raw reply [flat|nested] 66+ messages in thread
* [PULL 01/59] scripts/checkpatch.pl: Don't complain about spaces before Fixes tags
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 02/59] hw/sd/sdcard: Keep high-capacity memory blocks at 512 bytes Philippe Mathieu-Daudé
` (57 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Peter Maydell <peter.maydell@linaro.org>
The checkpatch.pl script insists that Fixes tags are at the start of
each line of its input. Although this is where they ought to be
in the commit message, it is not where the script will see them
in common usage patterns like
git show <hash> | ./scripts/checkpatch.pl -
because 'git show' prefaces each line of the commit message body with
four spaces. Allow spaces before the Fixes tag; this matches how we
check for e.g. Signed-off-by: tags.
Fixes: 910e1d41be6b2 ("scripts/checkpatch: validate Fixes: tag format and commit ancestry")
Reported-by: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Stefano Garzarella <sgarzare@redhat.com>
Message-ID: <20261023152357.1614817-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
scripts/checkpatch.pl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 5df266acb172..82f62f602125 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -1889,7 +1889,7 @@ sub process {
if ($line !~ /^\s*Fixes:\s+CVE/i) {
my $tag_case = not ($tag eq "Fixes:");
- my $tag_space = not ($line =~ /^fixes:? [0-9a-f]{5,40}/i);
+ my $tag_space = not ($line =~ /^\s*fixes:? [0-9a-f]{5,40}/i);
my $id_length = not ($orig_commit =~ /^[0-9a-f]{12,40}$/);
my $id_case = not ($orig_commit !~ /[A-F]/);
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 02/59] hw/sd/sdcard: Keep high-capacity memory blocks at 512 bytes
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 01/59] scripts/checkpatch.pl: Don't complain about spaces before Fixes tags Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 03/59] hw/watchdog/wdt_imx2: Preserve own locked bits in WCR Philippe Mathieu-Daudé
` (56 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bin Meng <bin.meng@processmission.com>
SDHC and SDXC memory commands always transfer 512-byte blocks regardless
of the length selected by CMD16. QEMU stores that selected length for
LOCK_UNLOCK but also used it directly for several memory command paths.
Route single- and multi-block memory sizing through the existing helper
that distinguishes high-capacity cards from SDSC.
This lets PolarFire SoC HSS validate the complete GPT header and locate
its boot partition instead of receiving only the eight-byte signature.
Cc: qemu-stable@nongnu.org
Fixes: 2d7adea4fe57 ("hw/sd: Support SDHC size cards")
Signed-off-by: Bin Meng <bin.meng@processmission.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261014012323.322790-12-bin.meng@processmission.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/sd/sd.c | 43 +++++++++++++++++++++++++------------------
1 file changed, 25 insertions(+), 18 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index b1b3b1226a76..0083b8e064e9 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1975,18 +1975,20 @@ static sd_rsp_type_t sd_cmd_SET_BLOCKLEN(SDState *sd, SDRequest req)
static sd_rsp_type_t sd_cmd_READ_SINGLE_BLOCK(SDState *sd, SDRequest req)
{
uint64_t addr;
+ uint32_t blk_len;
if (sd->state != sd_transfer_state) {
return sd_invalid_state_for_cmd(sd, req);
}
+ blk_len = sd_blk_len(sd);
addr = sd_req_get_address(sd, req);
- if (!address_in_range(sd, "READ_SINGLE_BLOCK", addr, sd->blk_len)) {
+ if (!address_in_range(sd, "READ_SINGLE_BLOCK", addr, blk_len)) {
return sd_r1;
}
- sd_blk_read(sd, addr, sd->blk_len);
- return sd_cmd_to_sendingdata(sd, req, addr, NULL, sd->blk_len);
+ sd_blk_read(sd, addr, blk_len);
+ return sd_cmd_to_sendingdata(sd, req, addr, NULL, blk_len);
}
/* CMD19 */
@@ -2025,13 +2027,15 @@ static sd_rsp_type_t sd_cmd_SET_BLOCK_COUNT(SDState *sd, SDRequest req)
static sd_rsp_type_t sd_cmd_WRITE_SINGLE_BLOCK(SDState *sd, SDRequest req)
{
uint64_t addr;
+ uint32_t blk_len;
if (sd->state != sd_transfer_state) {
return sd_invalid_state_for_cmd(sd, req);
}
+ blk_len = sd_blk_len(sd);
addr = sd_req_get_address(sd, req);
- if (!address_in_range(sd, "WRITE_SINGLE_BLOCK", addr, sd->blk_len)) {
+ if (!address_in_range(sd, "WRITE_SINGLE_BLOCK", addr, blk_len)) {
return sd_r1;
}
@@ -2045,7 +2049,7 @@ static sd_rsp_type_t sd_cmd_WRITE_SINGLE_BLOCK(SDState *sd, SDRequest req)
}
sd->blk_written = 0;
- return sd_cmd_to_receivingdata(sd, req, addr, sd->blk_len);
+ return sd_cmd_to_receivingdata(sd, req, addr, blk_len);
}
/* CMD26 */
@@ -2372,7 +2376,7 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
switch (sd->state) {
case sd_transfer_state:
- if (!address_in_range(sd, "READ_BLOCK", addr, sd->blk_len)) {
+ if (!address_in_range(sd, "READ_BLOCK", addr, sd_blk_len(sd))) {
return sd_r1;
}
@@ -2392,7 +2396,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
switch (sd->state) {
case sd_transfer_state:
- if (!address_in_range(sd, "WRITE_BLOCK", addr, sd->blk_len)) {
+ if (!address_in_range(sd, "WRITE_BLOCK", addr,
+ sd_blk_len(sd))) {
return sd_r1;
}
@@ -2662,6 +2667,7 @@ static void sdcard_write_data_dump(const char *proto, const char *cmd_desc,
static size_t sd_write_data(SDState *sd, const void *buf, size_t length)
{
unsigned int partition_access;
+ uint32_t blk_len;
int i;
const uint8_t *value = buf;
@@ -2678,6 +2684,7 @@ static size_t sd_write_data(SDState *sd, const void *buf, size_t length)
if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION))
return length;
+ blk_len = sd_blk_len(sd);
sdcard_write_data_dump(sd->proto->name,
sd->last_cmd_name,
sd->current_cmd, sd->data_offset, buf, length);
@@ -2704,7 +2711,7 @@ static size_t sd_write_data(SDState *sd, const void *buf, size_t length)
if (sd->data_offset == 0) {
/* Start of the block - let's check the address is valid */
if (!address_in_range(sd, "WRITE_MULTIPLE_BLOCK",
- sd->data_start, sd->blk_len)) {
+ sd->data_start, blk_len)) {
break;
}
if (sd->size <= SDSC_MAX_CAPACITY) {
@@ -2715,7 +2722,7 @@ static size_t sd_write_data(SDState *sd, const void *buf, size_t length)
}
}
sd->data[sd->data_offset++] = value[0];
- if (sd->data_offset >= sd->blk_len) {
+ if (sd->data_offset >= blk_len) {
/* TODO: Check CRC before committing */
sd->state = sd_programming_state;
partition_access = sd->ext_csd[EXT_CSD_PART_CONFIG]
@@ -2726,7 +2733,7 @@ static size_t sd_write_data(SDState *sd, const void *buf, size_t length)
sd_blk_write(sd, sd->data_start, sd->data_offset);
}
sd->blk_written++;
- sd->data_start += sd->blk_len;
+ sd->data_start += blk_len;
sd->data_offset = 0;
sd->csd[14] |= 0x40;
@@ -2810,7 +2817,7 @@ static size_t sd_read_data(SDState *sd, void *buf, size_t length)
/* TODO: Append CRCs */
const uint8_t dummy_byte = 0x00;
unsigned int partition_access;
- uint32_t io_len;
+ uint32_t blk_len;
uint8_t *value = buf;
if (!sd->blk || !blk_is_inserted(sd->blk)) {
@@ -2830,11 +2837,11 @@ static size_t sd_read_data(SDState *sd, void *buf, size_t length)
return length;
}
- io_len = sd_blk_len(sd);
+ blk_len = sd_blk_len(sd);
trace_sdcard_read_data(sd->proto->name,
sd->last_cmd_name, sd->current_cmd,
- sd->data_offset, sd->data_size, io_len);
+ sd->data_offset, sd->data_size, blk_len);
switch (sd->current_cmd) {
case 6: /* CMD6: SWITCH_FUNCTION */
case 8: /* CMD8: SEND_EXT_CSD */
@@ -2859,22 +2866,22 @@ static size_t sd_read_data(SDState *sd, void *buf, size_t length)
if (sd->data_offset == 0) {
if (!address_in_range(sd, "READ_MULTIPLE_BLOCK",
- sd->data_start, io_len)) {
+ sd->data_start, blk_len)) {
*value = dummy_byte;
return length;
}
partition_access = sd->ext_csd[EXT_CSD_PART_CONFIG]
& EXT_CSD_PART_CONFIG_ACC_MASK;
if (partition_access == EXT_CSD_PART_CONFIG_ACC_RPMB) {
- emmc_rpmb_blk_read(sd, sd->data_start, io_len);
+ emmc_rpmb_blk_read(sd, sd->data_start, blk_len);
} else {
- sd_blk_read(sd, sd->data_start, io_len);
+ sd_blk_read(sd, sd->data_start, blk_len);
}
}
*value = sd->data[sd->data_offset++];
- if (sd->data_offset >= io_len) {
- sd->data_start += io_len;
+ if (sd->data_offset >= blk_len) {
+ sd->data_start += blk_len;
sd->data_offset = 0;
if (sd->multi_blk_cnt != 0) {
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 03/59] hw/watchdog/wdt_imx2: Preserve own locked bits in WCR
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 01/59] scripts/checkpatch.pl: Don't complain about spaces before Fixes tags Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 02/59] hw/sd/sdcard: Keep high-capacity memory blocks at 512 bytes Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 04/59] hw/watchdog/wdt_imx2: Fix handling of write one once WCR bits Philippe Mathieu-Daudé
` (55 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Apparently there is a typo in the WCR locked bits handling: The locked
values for s->wcr must come from itself rather than from s->wicr, so fix
that. Without it, guests such as u-boot may experience inadvertent
reboots when configuring the WCR register.
Cc: qemu-stable@nongnu.org
Fixes: daca13d495a1 ("hw/watchdog: Implement full i.MX watchdog support")
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-2-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/watchdog/wdt_imx2.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
index c83d4107c19f..3283990bbf88 100644
--- a/hw/watchdog/wdt_imx2.c
+++ b/hw/watchdog/wdt_imx2.c
@@ -156,18 +156,18 @@ static void imx2_wdt_write(void *opaque, hwaddr addr,
case IMX2_WDT_WCR:
if (s->wcr_locked) {
value &= ~IMX2_WDT_WCR_LOCK_MASK;
- value |= (s->wicr & IMX2_WDT_WCR_LOCK_MASK);
+ value |= (s->wcr & IMX2_WDT_WCR_LOCK_MASK);
}
s->wcr_locked = true;
if (s->wcr_wde_locked) {
value &= ~IMX2_WDT_WCR_WDE;
- value |= (s->wicr & ~IMX2_WDT_WCR_WDE);
+ value |= (s->wcr & ~IMX2_WDT_WCR_WDE);
} else if (value & IMX2_WDT_WCR_WDE) {
s->wcr_wde_locked = true;
}
if (s->wcr_wdt_locked) {
value &= ~IMX2_WDT_WCR_WDT;
- value |= (s->wicr & ~IMX2_WDT_WCR_WDT);
+ value |= (s->wcr & ~IMX2_WDT_WCR_WDT);
} else if (value & IMX2_WDT_WCR_WDT) {
s->wcr_wdt_locked = true;
}
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 04/59] hw/watchdog/wdt_imx2: Fix handling of write one once WCR bits
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2026-10-27 19:22 ` [PULL 03/59] hw/watchdog/wdt_imx2: Preserve own locked bits in WCR Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 05/59] hw/watchdog/wdt_imx2: Clear WDT lock on reset Philippe Mathieu-Daudé
` (54 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
In locked state, the WDE and WDT bits of the WCR register are one and
need to be preserved when written. At the moment, the logic is reversed
such that all but the locked bits are preserved in locked state. Fix
that.
Cc: qemu-stable@nongnu.org
Fixes: daca13d495a1 ("hw/watchdog: Implement full i.MX watchdog support")
Reported-by: Bin Meng <bin.meng@processmission.com>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-3-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/watchdog/wdt_imx2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
index 3283990bbf88..d897ff6e52b0 100644
--- a/hw/watchdog/wdt_imx2.c
+++ b/hw/watchdog/wdt_imx2.c
@@ -161,13 +161,13 @@ static void imx2_wdt_write(void *opaque, hwaddr addr,
s->wcr_locked = true;
if (s->wcr_wde_locked) {
value &= ~IMX2_WDT_WCR_WDE;
- value |= (s->wcr & ~IMX2_WDT_WCR_WDE);
+ value |= (s->wcr & IMX2_WDT_WCR_WDE);
} else if (value & IMX2_WDT_WCR_WDE) {
s->wcr_wde_locked = true;
}
if (s->wcr_wdt_locked) {
value &= ~IMX2_WDT_WCR_WDT;
- value |= (s->wcr & ~IMX2_WDT_WCR_WDT);
+ value |= (s->wcr & IMX2_WDT_WCR_WDT);
} else if (value & IMX2_WDT_WCR_WDT) {
s->wcr_wdt_locked = true;
}
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 05/59] hw/watchdog/wdt_imx2: Clear WDT lock on reset
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2026-10-27 19:22 ` [PULL 04/59] hw/watchdog/wdt_imx2: Fix handling of write one once WCR bits Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 06/59] hw/watchdog/wdt_imx2: Remove redundant attributes Philippe Mathieu-Daudé
` (53 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
The WDT bit gets reset and becomes writeable after power on reset which
imx2_wdt_reset() represents. While the WDT bit in the WCR register
already gets reset, its locked attribute wasn't. Fix this inconsistency
by adding the missing unlock of its locked attribute.
Cc: qemu-stable@nongnu.org
Fixes: daca13d495a1 ("hw/watchdog: Implement full i.MX watchdog support")
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-4-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/hw/watchdog/wdt_imx2.h | 2 +-
hw/watchdog/wdt_imx2.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/hw/watchdog/wdt_imx2.h b/include/hw/watchdog/wdt_imx2.h
index ad36b8820d84..fc01fc46e736 100644
--- a/include/hw/watchdog/wdt_imx2.h
+++ b/include/hw/watchdog/wdt_imx2.h
@@ -85,7 +85,7 @@ struct IMX2WdtState {
bool wcr_locked; /* affects WDZST, WDBG, and WDW */
bool wcr_wde_locked; /* affects WDE */
- bool wcr_wdt_locked; /* affects WDT (never cleared) */
+ bool wcr_wdt_locked; /* affects WDT, cleared on POR */
};
#endif /* WDT_IMX2_H */
diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
index d897ff6e52b0..a15f452d4890 100644
--- a/hw/watchdog/wdt_imx2.c
+++ b/hw/watchdog/wdt_imx2.c
@@ -60,6 +60,7 @@ static void imx2_wdt_reset(DeviceState *dev)
s->wicr_locked = false;
s->wcr_locked = false;
s->wcr_wde_locked = false;
+ s->wcr_wdt_locked = false;
s->wcr = IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS;
s->wsr = 0;
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 06/59] hw/watchdog/wdt_imx2: Remove redundant attributes
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2026-10-27 19:22 ` [PULL 05/59] hw/watchdog/wdt_imx2: Clear WDT lock on reset Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 07/59] hw/arm/imx8mm-evk: Fix reference count of SoC object Philippe Mathieu-Daudé
` (52 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Since WDT and WDE are write one once bits, their values always
correspond with their respective locked attributes. Thus, the attributes
are redundant. Take advantage of this observation to simplify the code.
Note that removing the attributes changes the vmstate structure which
constitutes a migration break. This is allowed since QEMU does not
guarantee migration compatibility for i.MX devices between feature
releases.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Message-ID: <20261006083445.30362-5-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/hw/watchdog/wdt_imx2.h | 2 --
hw/watchdog/wdt_imx2.c | 20 ++++----------------
2 files changed, 4 insertions(+), 18 deletions(-)
diff --git a/include/hw/watchdog/wdt_imx2.h b/include/hw/watchdog/wdt_imx2.h
index fc01fc46e736..0bf290395980 100644
--- a/include/hw/watchdog/wdt_imx2.h
+++ b/include/hw/watchdog/wdt_imx2.h
@@ -84,8 +84,6 @@ struct IMX2WdtState {
uint16_t wmcr;
bool wcr_locked; /* affects WDZST, WDBG, and WDW */
- bool wcr_wde_locked; /* affects WDE */
- bool wcr_wdt_locked; /* affects WDT, cleared on POR */
};
#endif /* WDT_IMX2_H */
diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
index a15f452d4890..c19f0383ad74 100644
--- a/hw/watchdog/wdt_imx2.c
+++ b/hw/watchdog/wdt_imx2.c
@@ -59,8 +59,6 @@ static void imx2_wdt_reset(DeviceState *dev)
s->wicr_locked = false;
s->wcr_locked = false;
- s->wcr_wde_locked = false;
- s->wcr_wdt_locked = false;
s->wcr = IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS;
s->wsr = 0;
@@ -156,22 +154,13 @@ static void imx2_wdt_write(void *opaque, hwaddr addr,
switch (addr) {
case IMX2_WDT_WCR:
if (s->wcr_locked) {
+ /* WDZST, WDBG, and WDW are write-once bits */
value &= ~IMX2_WDT_WCR_LOCK_MASK;
value |= (s->wcr & IMX2_WDT_WCR_LOCK_MASK);
}
s->wcr_locked = true;
- if (s->wcr_wde_locked) {
- value &= ~IMX2_WDT_WCR_WDE;
- value |= (s->wcr & IMX2_WDT_WCR_WDE);
- } else if (value & IMX2_WDT_WCR_WDE) {
- s->wcr_wde_locked = true;
- }
- if (s->wcr_wdt_locked) {
- value &= ~IMX2_WDT_WCR_WDT;
- value |= (s->wcr & IMX2_WDT_WCR_WDT);
- } else if (value & IMX2_WDT_WCR_WDT) {
- s->wcr_wdt_locked = true;
- }
+ /* WDT and WDE are write one once bits */
+ value |= (s->wcr & (IMX2_WDT_WCR_WDT | IMX2_WDT_WCR_WDE));
s->wcr = value;
if (!(value & IMX2_WDT_WCR_SRS)) {
@@ -234,13 +223,12 @@ static const MemoryRegionOps imx2_wdt_ops = {
static const VMStateDescription vmstate_imx2_wdt = {
.name = "imx2.wdt",
+ .version_id = 1,
.fields = (const VMStateField[]) {
VMSTATE_PTIMER(timer, IMX2WdtState),
VMSTATE_PTIMER(itimer, IMX2WdtState),
VMSTATE_BOOL(wicr_locked, IMX2WdtState),
VMSTATE_BOOL(wcr_locked, IMX2WdtState),
- VMSTATE_BOOL(wcr_wde_locked, IMX2WdtState),
- VMSTATE_BOOL(wcr_wdt_locked, IMX2WdtState),
VMSTATE_UINT16(wcr, IMX2WdtState),
VMSTATE_UINT16(wsr, IMX2WdtState),
VMSTATE_UINT16(wrsr, IMX2WdtState),
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 07/59] hw/arm/imx8mm-evk: Fix reference count of SoC object
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2026-10-27 19:22 ` [PULL 06/59] hw/watchdog/wdt_imx2: Remove redundant attributes Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 08/59] docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk invocations Philippe Mathieu-Daudé
` (51 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Using sysbus_realize_and_unref() requires object_new() rather than
object_new_with_props(), otherwise the initial reference count is
subtracted twice, i.e. ends up being one too low.
Cc: qemu-stable@nongnu.org
Fixes: 7bcd1f30bc83 ("hw/arm: Add the i.MX 8MM EVK board")
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-6-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/imx8mm-evk.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/imx8mm-evk.c b/hw/arm/imx8mm-evk.c
index c3215b11cb99..6de0d9c4a2ef 100644
--- a/hw/arm/imx8mm-evk.c
+++ b/hw/arm/imx8mm-evk.c
@@ -83,8 +83,8 @@ static void imx8mm_evk_init(MachineState *machine)
ims->bootinfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC;
ims->bootinfo.modify_dtb = imx8mm_evk_modify_dtb;
- s = FSL_IMX8MM(object_new_with_props(TYPE_FSL_IMX8MM, OBJECT(machine),
- "soc", &error_fatal, NULL));
+ s = FSL_IMX8MM(object_new(TYPE_FSL_IMX8MM));
+ object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
object_property_set_uint(OBJECT(s), "fec1-phy-num", 1, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal);
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 08/59] docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk invocations
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2026-10-27 19:22 ` [PULL 07/59] hw/arm/imx8mm-evk: Fix reference count of SoC object Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 09/59] hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default Philippe Mathieu-Daudé
` (50 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Both boards provide defaults matching real hardware. No need to ask
users to repeat these. Also, remove these redundant arguments from the
functional tests such that the defaults get tested.
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-7-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
docs/system/arm/imx8m.rst | 2 +-
tests/functional/aarch64/test_imx8mm_evk.py | 4 +---
tests/functional/aarch64/test_imx8mp_evk.py | 4 +---
3 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/docs/system/arm/imx8m.rst b/docs/system/arm/imx8m.rst
index 1bcb8255be57..5348757089c4 100644
--- a/docs/system/arm/imx8m.rst
+++ b/docs/system/arm/imx8m.rst
@@ -79,7 +79,7 @@ For i.MX 8M Mini EVK:
.. code-block:: bash
- $ qemu-system-aarch64 -M imx8mm-evk -smp 4 -m 2G \
+ $ qemu-system-aarch64 -M imx8mm-evk \
-display none -serial null -serial stdio \
-kernel Image \
-dtb imx8mm-evk.dtb \
diff --git a/tests/functional/aarch64/test_imx8mm_evk.py b/tests/functional/aarch64/test_imx8mm_evk.py
index 86725991f147..73d286167c55 100755
--- a/tests/functional/aarch64/test_imx8mm_evk.py
+++ b/tests/functional/aarch64/test_imx8mm_evk.py
@@ -52,9 +52,7 @@ def test_aarch64_imx8mm_evk_usdhc(self):
self.require_accelerator("tcg")
self.set_machine('imx8mm-evk')
self.vm.set_console(console_index=1)
- self.vm.add_args('-m', '2G',
- '-smp', '4',
- '-kernel', self.kernel_path,
+ self.vm.add_args('-kernel', self.kernel_path,
'-initrd', self.initrd_path,
'-dtb', self.dtb_path,
'-append', 'root=/dev/mmcblk2p1',
diff --git a/tests/functional/aarch64/test_imx8mp_evk.py b/tests/functional/aarch64/test_imx8mp_evk.py
index 99ddcdef8350..2ec421c32632 100755
--- a/tests/functional/aarch64/test_imx8mp_evk.py
+++ b/tests/functional/aarch64/test_imx8mp_evk.py
@@ -52,9 +52,7 @@ def test_aarch64_imx8mp_evk_usdhc(self):
self.require_accelerator("tcg")
self.set_machine('imx8mp-evk')
self.vm.set_console(console_index=1)
- self.vm.add_args('-m', '2G',
- '-smp', '4',
- '-kernel', self.kernel_path,
+ self.vm.add_args('-kernel', self.kernel_path,
'-initrd', self.initrd_path,
'-dtb', self.dtb_path,
'-append', 'root=/dev/mmcblk2p1',
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 09/59] hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2026-10-27 19:22 ` [PULL 08/59] docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk invocations Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 10/59] tests/functional/arm: Add console test for `sabrelite` machine Philippe Mathieu-Daudé
` (49 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Having four CPUs and 1 GiB of RAM matches real hardware. Fix the machine
defaults to make its use more ergonomic and less error-prone. Also
reflect this in the board documentation.
To reproduce the old default behavior for e.g. migration purposes,
`-smp 1 -m 128M` needs to be passed on the command line.
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-8-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
docs/system/arm/sabrelite.rst | 4 ++--
hw/arm/sabrelite.c | 3 +++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/docs/system/arm/sabrelite.rst b/docs/system/arm/sabrelite.rst
index d3a3c01dd6db..b8ac9548f592 100644
--- a/docs/system/arm/sabrelite.rst
+++ b/docs/system/arm/sabrelite.rst
@@ -55,7 +55,7 @@ To boot the newly built Linux kernel in QEMU with the SABRE Lite machine, use:
.. code-block:: bash
- $ qemu-system-arm -M sabrelite -smp 4 -m 1G \
+ $ qemu-system-arm -M sabrelite \
-display none -serial null -serial stdio \
-kernel arch/arm/boot/zImage \
-dtb arch/arm/boot/dts/imx6q-sabrelite.dtb \
@@ -89,7 +89,7 @@ the -kernel argument, along with an SD card image with rootfs:
.. code-block:: bash
- $ qemu-system-arm -M sabrelite -smp 4 -m 1G \
+ $ qemu-system-arm -M sabrelite \
-display none -serial null -serial stdio \
-kernel u-boot
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index 05dfabd9376d..34f302f83c6c 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -17,6 +17,7 @@
#include "hw/core/boards.h"
#include "hw/core/qdev-properties.h"
#include "qemu/error-report.h"
+#include "qemu/units.h"
#include "system/qtest.h"
struct SabreliteMachineState {
@@ -139,7 +140,9 @@ static void sabrelite_machine_class_init(ObjectClass *oc, const void *data)
mc->desc = "Freescale i.MX6 Quad SABRE Lite Board (Cortex-A9)";
mc->init = sabrelite_init;
mc->max_cpus = FSL_IMX6_NUM_CPUS;
+ mc->default_cpus = FSL_IMX6_NUM_CPUS;
mc->ignore_memory_transaction_failures = true;
+ mc->default_ram_size = 1 * GiB;
mc->default_ram_id = "sabrelite.ram";
mc->auto_create_sdcard = true;
}
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 10/59] tests/functional/arm: Add console test for `sabrelite` machine
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2026-10-27 19:22 ` [PULL 09/59] hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 11/59] hw/arm/mcimx6ul-evk: Have 512 MiB of RAM by default Philippe Mathieu-Daudé
` (48 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
The test currently exercises the Linux kernel and waits for the first
daemons to be started. At this point, basic hardware is initialized and
if the log message is reached, no driver ended up in an endless loop,
thus the system should be usable.
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-9-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
MAINTAINERS | 1 +
tests/functional/arm/meson.build | 2 ++
tests/functional/arm/test_sabrelite.py | 46 ++++++++++++++++++++++++++
3 files changed, 49 insertions(+)
create mode 100755 tests/functional/arm/test_sabrelite.py
diff --git a/MAINTAINERS b/MAINTAINERS
index 4ca1751e30f5..47fbd05db186 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1069,6 +1069,7 @@ F: include/hw/usb/imx-usb-phy.h
F: include/hw/arm/fsl-imx6.h
F: include/hw/misc/imx6_*.h
F: include/hw/ssi/imx_spi.h
+F: tests/functional/arm/test_sabrelite.py
SBSA-REF
M: Peter Maydell <peter.maydell@linaro.org>
diff --git a/tests/functional/arm/meson.build b/tests/functional/arm/meson.build
index 61b00932db93..989b841555d7 100644
--- a/tests/functional/arm/meson.build
+++ b/tests/functional/arm/meson.build
@@ -24,6 +24,7 @@ test_arm_timeouts = {
'quanta_gsj' : 240,
'raspi2' : 120,
'replay' : 240,
+ 'sabrelite' : 240,
'tuxrun' : 240,
'sx1' : 360,
}
@@ -65,6 +66,7 @@ tests_arm_system_thorough = [
'raspi2',
'realview',
'replay',
+ 'sabrelite',
'smdkc210',
'stellaris',
'sx1',
diff --git a/tests/functional/arm/test_sabrelite.py b/tests/functional/arm/test_sabrelite.py
new file mode 100755
index 000000000000..31a0a49eac4d
--- /dev/null
+++ b/tests/functional/arm/test_sabrelite.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python3
+#
+# Functional test that boots a Linux kernel and checks the console
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+from qemu_test import LinuxKernelTest, Asset
+
+
+class SabreliteMachine(LinuxKernelTest):
+
+ ASSET_KERNEL = Asset(
+ ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+ '20230607/images/netboot/vmlinuz'),
+ '5851e9c61465a26db810796db671c4729e66e81c365b3ebb1a4b7f772737605b')
+
+ ASSET_INITRD = Asset(
+ ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+ '20230607/images/netboot/initrd.gz'),
+ 'fe33f836232a9107716d34dc56d36dea81bab039243a2a42ea6583a50c9b92ca')
+
+ ASSET_DTB = Asset(
+ ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+ '20230607/images/device-tree/imx6q-sabrelite.dtb'),
+ '3ad637c8ea55ebd058a67f686e050b82ccb0d1327bc283623c133c48ad87db44')
+
+ def setUp(self):
+ super().setUp()
+
+ self.kernel_path = self.ASSET_KERNEL.fetch()
+ self.initrd_path = self.ASSET_INITRD.fetch()
+ self.dtb_path = self.ASSET_DTB.fetch()
+
+ def test_console(self):
+ self.require_accelerator("tcg")
+ self.set_machine('sabrelite')
+ self.vm.set_console(console_index=1)
+ self.vm.add_args('-kernel', self.kernel_path,
+ '-initrd', self.initrd_path,
+ '-dtb', self.dtb_path)
+
+ self.vm.launch()
+ self.wait_for_console_pattern('Starting system log daemon:')
+
+if __name__ == '__main__':
+ LinuxKernelTest.main()
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 11/59] hw/arm/mcimx6ul-evk: Have 512 MiB of RAM by default
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2026-10-27 19:22 ` [PULL 10/59] tests/functional/arm: Add console test for `sabrelite` machine Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 12/59] hw/arm/mcimx7d-sabre: Have 2 CPUs and 2 GiB " Philippe Mathieu-Daudé
` (47 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Having 512 MiB of RAM matches real hardware. Fix the machine
default to make its use more ergonomic and less error-prone.
To reproduce the old default behavior for e.g. migration purposes,
`-m 128M` needs to be added to the command line.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261006083445.30362-10-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/mcimx6ul-evk.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index 40071d2c7b96..4964cb934519 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -73,6 +73,7 @@ static void mcimx6ul_evk_machine_init(MachineClass *mc)
mc->desc = "Freescale i.MX6UL Evaluation Kit (Cortex-A7)";
mc->init = mcimx6ul_evk_init;
mc->max_cpus = FSL_IMX6UL_NUM_CPUS;
+ mc->default_ram_size = 512 * MiB;
mc->default_ram_id = "mcimx6ul-evk.ram";
mc->auto_create_sdcard = true;
}
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 12/59] hw/arm/mcimx7d-sabre: Have 2 CPUs and 2 GiB of RAM by default
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2026-10-27 19:22 ` [PULL 11/59] hw/arm/mcimx6ul-evk: Have 512 MiB of RAM by default Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 13/59] tests/functional/arm: Add console test for `mcimx7d-sabre` machine Philippe Mathieu-Daudé
` (46 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Having two CPUs and 1 GiB of RAM matches real hardware. Fix the machine
defaults to make its use more ergonomic and less error-prone.
To reproduce the old default behavior for e.g. migration purposes,
`-smp 1 -m 128M` needs to be passed on the command line.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261006083445.30362-11-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/mcimx7d-sabre.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 65fdb19c06fa..47744e66a4a7 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -81,6 +81,8 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
mc->desc = "Freescale i.MX7 DUAL SABRE (Cortex-A7)";
mc->init = mcimx7d_sabre_init;
mc->max_cpus = FSL_IMX7_NUM_CPUS;
+ mc->default_cpus = FSL_IMX7_NUM_CPUS;
+ mc->default_ram_size = 2 * GiB;
mc->default_ram_id = "mcimx7d-sabre.ram";
mc->auto_create_sdcard = true;
}
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 13/59] tests/functional/arm: Add console test for `mcimx7d-sabre` machine
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2026-10-27 19:22 ` [PULL 12/59] hw/arm/mcimx7d-sabre: Have 2 CPUs and 2 GiB " Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 14/59] hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE Philippe Mathieu-Daudé
` (45 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
The test currently exercises the Linux kernel and waits for the first
daemons to be started. At this point, basic hardware is initialized and
if the log message is reached, no driver ended up in an endless loop,
thus the system should be usable.
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-12-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
MAINTAINERS | 1 +
tests/functional/arm/meson.build | 2 +
tests/functional/arm/test_mcimx7d_sabre.py | 46 ++++++++++++++++++++++
3 files changed, 49 insertions(+)
create mode 100755 tests/functional/arm/test_mcimx7d_sabre.py
diff --git a/MAINTAINERS b/MAINTAINERS
index 47fbd05db186..78d1663f09b4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -950,6 +950,7 @@ F: include/hw/misc/imx7_*.h
F: hw/pci-host/designware.c
F: include/hw/pci-host/designware.h
F: docs/system/arm/mcimx7d-sabre.rst
+F: tests/functional/arm/test_mcimx7d_sabre.py
MCIMX8MM-EVK / iMX8MM
M: Gaurav Sharma <gaurav.sharma_7@nxp.com>
diff --git a/tests/functional/arm/meson.build b/tests/functional/arm/meson.build
index 989b841555d7..e657ecd27824 100644
--- a/tests/functional/arm/meson.build
+++ b/tests/functional/arm/meson.build
@@ -20,6 +20,7 @@ test_arm_timeouts = {
'bpim2u' : 500,
'collie' : 180,
'cubieboard' : 360,
+ 'mcimx7d_sabre' : 240,
'orangepi' : 540,
'quanta_gsj' : 240,
'raspi2' : 120,
@@ -60,6 +61,7 @@ tests_arm_system_thorough = [
'emcraft_sf2',
'integratorcp',
'max78000fthr',
+ 'mcimx7d_sabre',
'microbit',
'orangepi',
'quanta_gsj',
diff --git a/tests/functional/arm/test_mcimx7d_sabre.py b/tests/functional/arm/test_mcimx7d_sabre.py
new file mode 100755
index 000000000000..2894b5201fd9
--- /dev/null
+++ b/tests/functional/arm/test_mcimx7d_sabre.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python3
+#
+# Functional test that boots a Linux kernel and checks the console
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+from qemu_test import LinuxKernelTest, Asset
+
+
+class Mcimx7dSabreMachine(LinuxKernelTest):
+
+ ASSET_KERNEL = Asset(
+ ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+ '20230607/images/netboot/vmlinuz'),
+ '5851e9c61465a26db810796db671c4729e66e81c365b3ebb1a4b7f772737605b')
+
+ ASSET_INITRD = Asset(
+ ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+ '20230607/images/netboot/initrd.gz'),
+ 'fe33f836232a9107716d34dc56d36dea81bab039243a2a42ea6583a50c9b92ca')
+
+ ASSET_DTB = Asset(
+ ('https://ftp.debian.org/debian/dists/bookworm/main/installer-armhf/'
+ '20230607/images/device-tree/imx7d-sdb.dtb'),
+ 'eed45fe3ba682cc814217bc4558551d36c034ec7a7692c4eb6eaf86132baf80c')
+
+ def setUp(self):
+ super().setUp()
+
+ self.kernel_path = self.ASSET_KERNEL.fetch()
+ self.initrd_path = self.ASSET_INITRD.fetch()
+ self.dtb_path = self.ASSET_DTB.fetch()
+
+ def test_console(self):
+ self.require_accelerator("tcg")
+ self.set_machine('mcimx7d-sabre')
+ self.vm.set_console(console_index=0)
+ self.vm.add_args('-kernel', self.kernel_path,
+ '-initrd', self.initrd_path,
+ '-dtb', self.dtb_path)
+
+ self.vm.launch()
+ self.wait_for_console_pattern('Starting system log daemon:')
+
+if __name__ == '__main__':
+ LinuxKernelTest.main()
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 14/59] hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (12 preceding siblings ...)
2026-10-27 19:22 ` [PULL 13/59] tests/functional/arm: Add console test for `mcimx7d-sabre` machine Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 15/59] hw/arm/fsl-imx31: " Philippe Mathieu-Daudé
` (44 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset
upon machine reset.
Remove clearing user-creatable which is implicit for SysBus-based
devices.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-13-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/hw/arm/fsl-imx25.h | 5 ++---
hw/arm/fsl-imx25.c | 7 +------
hw/arm/imx25_pdk.c | 2 +-
3 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
index b68d4334a0c3..4bb4d5b3e53f 100644
--- a/include/hw/arm/fsl-imx25.h
+++ b/include/hw/arm/fsl-imx25.h
@@ -29,6 +29,7 @@
#include "hw/sd/sdhci.h"
#include "hw/usb/chipidea.h"
#include "hw/watchdog/wdt_imx2.h"
+#include "hw/core/sysbus.h"
#include "system/memory.h"
#include "target/arm/cpu.h"
#include "qom/object.h"
@@ -45,10 +46,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslIMX25State, FSL_IMX25)
#define FSL_IMX25_NUM_USBS 2
struct FslIMX25State {
- /*< private >*/
- DeviceState parent_obj;
+ SysBusDevice parent_obj;
- /*< public >*/
ARMCPU cpu;
IMXAVICState avic;
IMX25CCMState ccm;
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index 7f65f4ca4bbc..efb22359c5b3 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -317,16 +317,11 @@ static void fsl_imx25_class_init(ObjectClass *oc, const void *data)
device_class_set_props(dc, fsl_imx25_properties);
dc->realize = fsl_imx25_realize;
dc->desc = "i.MX25 SOC";
- /*
- * Reason: uses serial_hds in realize and the imx25 board does not
- * support multiple CPUs
- */
- dc->user_creatable = false;
}
static const TypeInfo fsl_imx25_type_info = {
.name = TYPE_FSL_IMX25,
- .parent = TYPE_DEVICE,
+ .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(FslIMX25State),
.instance_init = fsl_imx25_init,
.class_init = fsl_imx25_class_init,
diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
index 243c30a67e7e..a33050788c32 100644
--- a/hw/arm/imx25_pdk.c
+++ b/hw/arm/imx25_pdk.c
@@ -72,7 +72,7 @@ static void imx25_pdk_init(MachineState *machine)
object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX25);
- qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);
+ sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
/* We need to initialize our memory */
if (machine->ram_size > (FSL_IMX25_SDRAM0_SIZE + FSL_IMX25_SDRAM1_SIZE)) {
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 15/59] hw/arm/fsl-imx31: Derive from TYPE_SYS_BUS_DEVICE
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (13 preceding siblings ...)
2026-10-27 19:22 ` [PULL 14/59] hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 16/59] hw/arm/fsl-imx6: " Philippe Mathieu-Daudé
` (43 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset
upon machine reset.
Remove clearing user-creatable which is implicit for SysBus-based
devices.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-14-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/hw/arm/fsl-imx31.h | 5 ++---
hw/arm/fsl-imx31.c | 7 +------
hw/arm/kzm.c | 2 +-
3 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h
index 41232a223733..ea916de15aaf 100644
--- a/include/hw/arm/fsl-imx31.h
+++ b/include/hw/arm/fsl-imx31.h
@@ -25,6 +25,7 @@
#include "hw/i2c/imx_i2c.h"
#include "hw/gpio/imx_gpio.h"
#include "hw/watchdog/wdt_imx2.h"
+#include "hw/core/sysbus.h"
#include "system/memory.h"
#include "target/arm/cpu.h"
#include "qom/object.h"
@@ -38,10 +39,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslIMX31State, FSL_IMX31)
#define FSL_IMX31_NUM_GPIOS 3
struct FslIMX31State {
- /*< private >*/
- DeviceState parent_obj;
+ SysBusDevice parent_obj;
- /*< public >*/
ARMCPU cpu;
IMXAVICState avic;
IMX31CCMState ccm;
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index 190f863355d4..dd929c108588 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -224,16 +224,11 @@ static void fsl_imx31_class_init(ObjectClass *oc, const void *data)
dc->realize = fsl_imx31_realize;
dc->desc = "i.MX31 SOC";
- /*
- * Reason: uses serial_hds in realize and the kzm board does not
- * support multiple CPUs
- */
- dc->user_creatable = false;
}
static const TypeInfo fsl_imx31_type_info = {
.name = TYPE_FSL_IMX31,
- .parent = TYPE_DEVICE,
+ .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(FslIMX31State),
.instance_init = fsl_imx31_init,
.class_init = fsl_imx31_class_init,
diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
index 387bf54ced18..e9cc53ce0172 100644
--- a/hw/arm/kzm.c
+++ b/hw/arm/kzm.c
@@ -69,7 +69,7 @@ static void kzm_init(MachineState *machine)
object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX31);
- qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);
+ sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
/* Check the amount of memory is compatible with the SOC */
if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) {
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 16/59] hw/arm/fsl-imx6: Derive from TYPE_SYS_BUS_DEVICE
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (14 preceding siblings ...)
2026-10-27 19:22 ` [PULL 15/59] hw/arm/fsl-imx31: " Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 17/59] hw/arm/fsl-imx6ul: " Philippe Mathieu-Daudé
` (42 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset
upon machine reset.
Remove clearing user-creatable which is implicit for SysBus-based
devices.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-15-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/hw/arm/fsl-imx6.h | 5 ++---
hw/arm/fsl-imx6.c | 4 +---
hw/arm/sabrelite.c | 2 +-
3 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index 376deea3a49f..4cf26f1fbc3b 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -35,6 +35,7 @@
#include "hw/usb/imx-usb-phy.h"
#include "hw/pci-host/designware.h"
#include "hw/core/or-irq.h"
+#include "hw/core/sysbus.h"
#include "system/memory.h"
#include "target/arm/cpu.h"
#include "net/can_emu.h"
@@ -56,10 +57,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslIMX6State, FSL_IMX6)
#define FSL_IMX6_NUM_CANS 2
struct FslIMX6State {
- /*< private >*/
- DeviceState parent_obj;
+ SysBusDevice parent_obj;
- /*< public >*/
ARMCPU cpu[FSL_IMX6_NUM_CPUS];
A9MPPrivState a9mpcore;
IMX6CCMState ccm;
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index eec9673c6fbf..7ba9b85a2eac 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -519,13 +519,11 @@ static void fsl_imx6_class_init(ObjectClass *oc, const void *data)
device_class_set_props(dc, fsl_imx6_properties);
dc->realize = fsl_imx6_realize;
dc->desc = "i.MX6 SOC";
- /* Reason: Uses serial_hd() in the realize() function */
- dc->user_creatable = false;
}
static const TypeInfo fsl_imx6_type_info = {
.name = TYPE_FSL_IMX6,
- .parent = TYPE_DEVICE,
+ .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(FslIMX6State),
.instance_init = fsl_imx6_init,
.class_init = fsl_imx6_class_init,
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index 34f302f83c6c..201766d8ea31 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -66,7 +66,7 @@ static void sabrelite_init(MachineState *machine)
OBJECT(s->canbus[i]), &error_fatal);
}
- qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);
+ sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR,
machine->ram);
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 17/59] hw/arm/fsl-imx6ul: Derive from TYPE_SYS_BUS_DEVICE
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (15 preceding siblings ...)
2026-10-27 19:22 ` [PULL 16/59] hw/arm/fsl-imx6: " Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 18/59] hw/arm/fsl-imx7: " Philippe Mathieu-Daudé
` (41 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset
upon machine reset.
Remove clearing user-creatable which is implicit for SysBus-based
devices.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-16-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/hw/arm/fsl-imx6ul.h | 5 ++---
hw/arm/fsl-imx6ul.c | 4 +---
hw/arm/mcimx6ul-evk.c | 2 +-
3 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h
index 6205fe6b7767..9ae0488990ce 100644
--- a/include/hw/arm/fsl-imx6ul.h
+++ b/include/hw/arm/fsl-imx6ul.h
@@ -18,6 +18,7 @@
#define FSL_IMX6UL_H
#include "hw/cpu/a15mpcore.h"
+#include "hw/core/sysbus.h"
#include "hw/misc/imx6ul_ccm.h"
#include "hw/misc/imx6_src.h"
#include "hw/misc/imx7_snvs.h"
@@ -64,10 +65,8 @@ enum FslIMX6ULConfiguration {
};
struct FslIMX6ULState {
- /*< private >*/
- DeviceState parent_obj;
+ SysBusDevice parent_obj;
- /*< public >*/
ARMCPU cpu;
A15MPPrivState a7mpcore;
IMXGPTState gpt[FSL_IMX6UL_NUM_GPTS];
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 1863558a0d67..84451c99097a 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -730,13 +730,11 @@ static void fsl_imx6ul_class_init(ObjectClass *oc, const void *data)
device_class_set_props(dc, fsl_imx6ul_properties);
dc->realize = fsl_imx6ul_realize;
dc->desc = "i.MX6UL SOC";
- /* Reason: Uses serial_hds and nd_table in realize() directly */
- dc->user_creatable = false;
}
static const TypeInfo fsl_imx6ul_type_info = {
.name = TYPE_FSL_IMX6UL,
- .parent = TYPE_DEVICE,
+ .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(FslIMX6ULState),
.instance_init = fsl_imx6ul_init,
.class_init = fsl_imx6ul_class_init,
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index 4964cb934519..53d221b4a9a5 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -44,7 +44,7 @@ static void mcimx6ul_evk_init(MachineState *machine)
object_property_set_uint(OBJECT(s), "fec2-phy-num", 1, &error_fatal);
object_property_set_bool(OBJECT(s), "fec1-phy-connected", false,
&error_fatal);
- qdev_realize(DEVICE(s), NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal);
memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR,
machine->ram);
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 18/59] hw/arm/fsl-imx7: Derive from TYPE_SYS_BUS_DEVICE
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (16 preceding siblings ...)
2026-10-27 19:22 ` [PULL 17/59] hw/arm/fsl-imx6ul: " Philippe Mathieu-Daudé
@ 2026-10-27 19:22 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 19/59] hw/timer/imx_gpt: Wire clock control module via link property Philippe Mathieu-Daudé
` (40 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:22 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset
upon machine reset.
Remove clearing user-creatable which is implicit for SysBus-based
devices.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-17-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/hw/arm/fsl-imx7.h | 5 ++---
hw/arm/fsl-imx7.c | 5 +----
hw/arm/mcimx7d-sabre.c | 2 +-
3 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index a573e0dd4f8c..945d8c5ad78b 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -37,6 +37,7 @@
#include "hw/pci-host/designware.h"
#include "hw/usb/chipidea.h"
#include "hw/core/or-irq.h"
+#include "hw/core/sysbus.h"
#include "target/arm/cpu.h"
#include "qom/object.h"
#include "qemu/units.h"
@@ -64,10 +65,8 @@ enum FslIMX7Configuration {
};
struct FslIMX7State {
- /*< private >*/
- DeviceState parent_obj;
+ SysBusDevice parent_obj;
- /*< public >*/
ARMCPU cpu[FSL_IMX7_NUM_CPUS];
A15MPPrivState a7mpcore;
IMXGPTState gpt[FSL_IMX7_NUM_GPTS];
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index 2defa498d388..fc5d0efe0600 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -753,15 +753,12 @@ static void fsl_imx7_class_init(ObjectClass *oc, const void *data)
device_class_set_props(dc, fsl_imx7_properties);
dc->realize = fsl_imx7_realize;
-
- /* Reason: Uses serial_hds and nd_table in realize() directly */
- dc->user_creatable = false;
dc->desc = "i.MX7 SOC";
}
static const TypeInfo fsl_imx7_type_info = {
.name = TYPE_FSL_IMX7,
- .parent = TYPE_DEVICE,
+ .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(FslIMX7State),
.instance_init = fsl_imx7_init,
.class_init = fsl_imx7_class_init,
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 47744e66a4a7..55c23061b0a4 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -52,7 +52,7 @@ static void mcimx7d_sabre_init(MachineState *machine)
object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
object_property_set_bool(OBJECT(s), "fec2-phy-connected", false,
&error_fatal);
- qdev_realize(DEVICE(s), NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal);
memory_region_add_subregion(get_system_memory(), FSL_IMX7_MMDC_ADDR,
machine->ram);
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 19/59] hw/timer/imx_gpt: Wire clock control module via link property
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (17 preceding siblings ...)
2026-10-27 19:22 ` [PULL 18/59] hw/arm/fsl-imx7: " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 20/59] hw/timer/imx_epit: " Philippe Mathieu-Daudé
` (39 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
When wiring struct IMXGPTState to the clock control module, it is
currently necessary to reach into its private data. Moreover, when
forgetting to wire the clock control module, QEMU will crash after the
guest has already started. Fix both by letting struct IMXGPTState
expose a link property which is checked at realize time.
Inspired-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-17-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/fsl-imx25.c | 3 ++-
hw/arm/fsl-imx31.c | 3 ++-
hw/arm/fsl-imx6.c | 3 ++-
hw/arm/fsl-imx6ul.c | 3 ++-
hw/arm/fsl-imx7.c | 3 ++-
hw/arm/fsl-imx8mm.c | 3 ++-
hw/arm/fsl-imx8mp.c | 3 ++-
hw/timer/imx_gpt.c | 14 ++++++++++++++
8 files changed, 28 insertions(+), 7 deletions(-)
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index efb22359c5b3..0840c2d86ada 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -138,7 +138,8 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
{ FSL_IMX25_GPT4_ADDR, FSL_IMX25_GPT4_IRQ }
};
- s->gpt[i].ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), errp)) {
return;
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index dd929c108588..b440ad6e28d7 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -105,7 +105,8 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
serial_table[i].irq));
}
- s->gpt.ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->gpt), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt), errp)) {
return;
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 7ba9b85a2eac..22deb7249639 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -204,7 +204,8 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in(gic, serial_table[i].irq));
}
- s->gpt.ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->gpt), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt), errp)) {
return;
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 84451c99097a..2786889bdafe 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -245,7 +245,8 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_GPT2_IRQ,
};
- s->gpt[i].ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0,
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index fc5d0efe0600..9e206c59a17e 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -250,7 +250,8 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
FSL_IMX7_GPT4_IRQ,
};
- s->gpt[i].ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, FSL_IMX7_GPTn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0,
diff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c
index 875e92bb3473..37934d295111 100644
--- a/hw/arm/fsl-imx8mm.c
+++ b/hw/arm/fsl-imx8mm.c
@@ -420,7 +420,8 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
fsl_imx8mm_memmap[FSL_IMX8MM_GPT6].addr,
};
- s->gpt[i].ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), errp)) {
return;
diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c
index bcd91739d9b2..f855378dff2d 100644
--- a/hw/arm/fsl-imx8mp.c
+++ b/hw/arm/fsl-imx8mp.c
@@ -447,7 +447,8 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp)
fsl_imx8mp_memmap[FSL_IMX8MP_GPT6].addr,
};
- s->gpt[i].ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), errp)) {
return;
diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c
index cdc025712625..22fc8203bfd3 100644
--- a/hw/timer/imx_gpt.c
+++ b/hw/timer/imx_gpt.c
@@ -15,8 +15,10 @@
#include "qemu/osdep.h"
#include "hw/core/irq.h"
+#include "hw/core/qdev-properties.h"
#include "hw/timer/imx_gpt.h"
#include "migration/vmstate.h"
+#include "qapi/error.h"
#include "qemu/module.h"
#include "qemu/log.h"
#include "trace.h"
@@ -522,6 +524,12 @@ static void imx_gpt_realize(DeviceState *dev, Error **errp)
IMXGPTState *s = IMX_GPT(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ if (!s->ccm) {
+ error_setg(errp, "%s 'clock-control-module' link property not set",
+ dev->canonical_path);
+ return;
+ }
+
sysbus_init_irq(sbd, &s->irq);
memory_region_init_io(&s->iomem, OBJECT(s), &imx_gpt_ops, s, TYPE_IMX_GPT,
0x00001000);
@@ -530,12 +538,18 @@ static void imx_gpt_realize(DeviceState *dev, Error **errp)
s->timer = ptimer_init(imx_gpt_timeout, s, PTIMER_POLICY_LEGACY);
}
+static const Property imx_timer_gpt_properties[] = {
+ DEFINE_PROP_LINK("clock-control-module", IMXGPTState, ccm, TYPE_IMX_CCM,
+ IMXCCMState *),
+};
+
static void imx_gpt_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = imx_gpt_realize;
device_class_set_legacy_reset(dc, imx_gpt_reset);
+ device_class_set_props(dc, imx_timer_gpt_properties);
dc->vmsd = &vmstate_imx_timer_gpt;
dc->desc = "i.MX general timer";
}
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 20/59] hw/timer/imx_epit: Wire clock control module via link property
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (18 preceding siblings ...)
2026-10-27 19:23 ` [PULL 19/59] hw/timer/imx_gpt: Wire clock control module via link property Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 21/59] hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM Philippe Mathieu-Daudé
` (38 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
When wiring struct IMXEPITState to the clock control module, it is
currently necessary to reach into its private data. Moreover, when
forgetting to wire the clock control module, QEMU will crash after the
guest has already started. Fix both by letting struct IMXEPITState
expose a link property which is checked at realize time.
Inspired-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-18-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/fsl-imx25.c | 3 ++-
hw/arm/fsl-imx31.c | 3 ++-
hw/arm/fsl-imx6.c | 3 ++-
hw/arm/fsl-imx6ul.c | 3 ++-
hw/timer/imx_epit.c | 14 ++++++++++++++
5 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index 0840c2d86ada..a8745d5d1abf 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -160,7 +160,8 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
{ FSL_IMX25_EPIT2_ADDR, FSL_IMX25_EPIT2_IRQ }
};
- s->epit[i].ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), errp)) {
return;
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index b440ad6e28d7..79e2f7f79562 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -126,7 +126,8 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
{ FSL_IMX31_EPIT2_ADDR, FSL_IMX31_EPIT2_IRQ },
};
- s->epit[i].ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), errp)) {
return;
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 22deb7249639..5bb828fbb655 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -225,7 +225,8 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
{ FSL_IMX6_EPIT2_ADDR, FSL_IMX6_EPIT2_IRQ },
};
- s->epit[i].ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), errp)) {
return;
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 2786889bdafe..f72121e23d0c 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -270,7 +270,8 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_EPIT2_IRQ,
};
- s->epit[i].ccm = IMX_CCM(&s->ccm);
+ object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module",
+ OBJECT(&s->ccm), &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0,
diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c
index 374ec7d324d5..e1050b51d82b 100644
--- a/hw/timer/imx_epit.c
+++ b/hw/timer/imx_epit.c
@@ -17,7 +17,9 @@
#include "hw/timer/imx_epit.h"
#include "migration/vmstate.h"
#include "hw/core/irq.h"
+#include "hw/core/qdev-properties.h"
#include "hw/misc/imx_ccm.h"
+#include "qapi/error.h"
#include "qemu/module.h"
#include "qemu/log.h"
#include "trace.h"
@@ -386,6 +388,12 @@ static void imx_epit_realize(DeviceState *dev, Error **errp)
IMXEPITState *s = IMX_EPIT(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ if (!s->ccm) {
+ error_setg(errp, "%s 'clock-control-module' link property not set",
+ dev->canonical_path);
+ return;
+ }
+
sysbus_init_irq(sbd, &s->irq);
memory_region_init_io(&s->iomem, OBJECT(s), &imx_epit_ops, s, TYPE_IMX_EPIT,
0x00001000);
@@ -412,12 +420,18 @@ static void imx_epit_dev_reset(DeviceState *dev)
imx_epit_reset(s, true);
}
+static const Property imx_timer_epit_properties[] = {
+ DEFINE_PROP_LINK("clock-control-module", IMXEPITState, ccm, TYPE_IMX_CCM,
+ IMXCCMState *),
+};
+
static void imx_epit_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = imx_epit_realize;
device_class_set_legacy_reset(dc, imx_epit_dev_reset);
+ device_class_set_props(dc, imx_timer_epit_properties);
dc->vmsd = &vmstate_imx_timer_epit;
dc->desc = "i.MX periodic timer";
}
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 21/59] hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (19 preceding siblings ...)
2026-10-27 19:23 ` [PULL 20/59] hw/timer/imx_epit: " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 22/59] hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX Philippe Mathieu-Daudé
` (37 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
TYPE_FSL_IMX8MM models the whole address space by representing
unimplemented devices with TYPE_UNIMPLEMENTED_DEVICE. This means that
UNIMP needs to be selected by config FSL_IMX8MM which is currently
missing. Fix that.
Fixes: 7bcd1f30bc83 ("hw/arm: Add the i.MX 8MM EVK(Evaluation Kit) board")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-19-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 4445f16f4517..6e8755783e67 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -627,6 +627,7 @@ config FSL_IMX8MM
select SDHCI
select PCI_EXPRESS_DESIGNWARE
select PCI_EXPRESS_FSL_IMX8M_PHY
+ select UNIMP
select USB_DWC3
select WDT_IMX2
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 22/59] hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (20 preceding siblings ...)
2026-10-27 19:23 ` [PULL 21/59] hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 23/59] Kconfig: Extract config IMX_AVIC " Philippe Mathieu-Daudé
` (36 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Since commit 464ce71a963b "Kconfig: Extract CONFIG_USB_CHIPIDEA from
CONFIG_IMX" all relevant i.MX SoC models select USB_CHIPIDEA such
that selecting USB_EHCI_SYSBUS became redundant in CONFIG_IMX. Remove
it.
Fixes: 464ce71a963b ("Kconfig: Extract CONFIG_USB_CHIPIDEA from CONFIG_IMX")
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-18-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/misc/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index 7abd22869a47..8cfc390afd33 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -93,7 +93,6 @@ config IMX
bool
select PTIMER
select SSI
- select USB_EHCI_SYSBUS
config FSL_IMX8MP_ANALOG
bool
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 23/59] Kconfig: Extract config IMX_AVIC from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (21 preceding siblings ...)
2026-10-27 19:23 ` [PULL 22/59] hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 24/59] Kconfig: Extract config IMX_GPCV2 " Philippe Mathieu-Daudé
` (35 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_AVIC to eventually eliminate config IMX.
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-19-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 2 ++
hw/intc/Kconfig | 3 +++
hw/intc/meson.build | 3 ++-
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 6e8755783e67..2b7547cf3de1 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -480,6 +480,7 @@ config FSL_IMX25
depends on TCG && ARM
imply I2C_DEVICES
select IMX
+ select IMX_AVIC
select IMX_FEC
select IMX_I2C
select USB_CHIPIDEA
@@ -493,6 +494,7 @@ config FSL_IMX31
imply I2C_DEVICES
select SERIAL_MM
select IMX
+ select IMX_AVIC
select IMX_I2C
select WDT_IMX2
select LAN9118
diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig
index 05e697967d03..97355f9df78f 100644
--- a/hw/intc/Kconfig
+++ b/hw/intc/Kconfig
@@ -5,6 +5,9 @@ config I8259
bool
select ISA_BUS
+config IMX_AVIC
+ bool
+
config PL190
bool
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index 0620b0792a16..74d84b8ddcd7 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -23,7 +23,8 @@ system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c', 'exynos
system_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c'))
system_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c'))
system_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_avic.c', 'imx_gpcv2.c'))
+system_ss.add(when: 'CONFIG_IMX_AVIC', if_true: files('imx_avic.c'))
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpcv2.c'))
system_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic_common.c'), if_false: files('ioapic-stub.c'))
system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_intc.c'))
system_ss.add(when: 'CONFIG_OPENPIC', if_true: files('openpic.c'))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 24/59] Kconfig: Extract config IMX_GPCV2 from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (22 preceding siblings ...)
2026-10-27 19:23 ` [PULL 23/59] Kconfig: Extract config IMX_AVIC " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 25/59] Kconfig: Extract config IMX_RNG " Philippe Mathieu-Daudé
` (34 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_GPCV2 to eventually eliminate config IMX.
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-20-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 2 ++
hw/intc/Kconfig | 3 +++
hw/intc/meson.build | 2 +-
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 2b7547cf3de1..45a67b1ae6c2 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -581,6 +581,7 @@ config FSL_IMX7
select PCI
select IMX
select IMX_FEC
+ select IMX_GPCV2
select IMX_I2C
select WDT_IMX2
select PCI_EXPRESS_DESIGNWARE
@@ -662,6 +663,7 @@ config FSL_IMX6UL
select IMX
select IMX6UL_LCDIF
select IMX_FEC
+ select IMX_GPCV2
select IMX_I2C
select IMX_USBPHY
select WDT_IMX2
diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig
index 97355f9df78f..98dba7efb865 100644
--- a/hw/intc/Kconfig
+++ b/hw/intc/Kconfig
@@ -8,6 +8,9 @@ config I8259
config IMX_AVIC
bool
+config IMX_GPCV2
+ bool
+
config PL190
bool
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index 74d84b8ddcd7..2ac575095f08 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -24,7 +24,7 @@ system_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c'))
system_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c'))
system_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c'))
system_ss.add(when: 'CONFIG_IMX_AVIC', if_true: files('imx_avic.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpcv2.c'))
+system_ss.add(when: 'CONFIG_IMX_GPCV2', if_true: files('imx_gpcv2.c'))
system_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic_common.c'), if_false: files('ioapic-stub.c'))
system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_intc.c'))
system_ss.add(when: 'CONFIG_OPENPIC', if_true: files('openpic.c'))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 25/59] Kconfig: Extract config IMX_RNG from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (23 preceding siblings ...)
2026-10-27 19:23 ` [PULL 24/59] Kconfig: Extract config IMX_GPCV2 " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 26/59] Kconfig: Extract config FSL_IMX7_GPR " Philippe Mathieu-Daudé
` (33 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_RNG to eventually eliminate config IMX.
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-21-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 1 +
hw/misc/Kconfig | 3 +++
hw/misc/meson.build | 2 +-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 45a67b1ae6c2..53f723661cf8 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -483,6 +483,7 @@ config FSL_IMX25
select IMX_AVIC
select IMX_FEC
select IMX_I2C
+ select IMX_RNG
select USB_CHIPIDEA
select WDT_IMX2
select SDHCI
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index 8cfc390afd33..d9991494b7fa 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -94,6 +94,9 @@ config IMX
select PTIMER
select SSI
+config IMX_RNG
+ bool
+
config FSL_IMX8MP_ANALOG
bool
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 90f3f89de701..cebc5f0d6ef4 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -64,6 +64,7 @@ system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
system_ss.add(when: 'CONFIG_FSL_IMX8MP_ANALOG', if_true: files('imx8mp_analog.c'))
system_ss.add(when: 'CONFIG_FSL_IMX8MP_CCM', if_true: files('imx8mp_ccm.c'))
+system_ss.add(when: 'CONFIG_IMX_RNG', if_true: files('imx_rngc.c'))
system_ss.add(when: 'CONFIG_IMX', if_true: files(
'imx25_ccm.c',
'imx31_ccm.c',
@@ -75,7 +76,6 @@ system_ss.add(when: 'CONFIG_IMX', if_true: files(
'imx7_gpr.c',
'imx7_snvs.c',
'imx_ccm.c',
- 'imx_rngc.c',
))
system_ss.add(when: 'CONFIG_MAX78000_AES', if_true: files('max78000_aes.c'))
system_ss.add(when: 'CONFIG_MAX78000_GCR', if_true: files('max78000_gcr.c'))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 26/59] Kconfig: Extract config FSL_IMX7_GPR from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (24 preceding siblings ...)
2026-10-27 19:23 ` [PULL 25/59] Kconfig: Extract config IMX_RNG " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 27/59] Kconfig: Extract config FSL_IMX{6, 7}_SRC " Philippe Mathieu-Daudé
` (32 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config FSL_IMX7_GPR to eventually eliminate config IMX.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261006083445.30362-22-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 1 +
hw/misc/Kconfig | 3 +++
hw/misc/meson.build | 2 +-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 53f723661cf8..55e09e3d9957 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -579,6 +579,7 @@ config FSL_IMX7
imply TEST_DEVICES
imply I2C_DEVICES
select A15MPCORE
+ select FSL_IMX7_GPR
select PCI
select IMX
select IMX_FEC
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index d9991494b7fa..b329d6bfda97 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -97,6 +97,9 @@ config IMX
config IMX_RNG
bool
+config FSL_IMX7_GPR
+ bool
+
config FSL_IMX8MP_ANALOG
bool
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index cebc5f0d6ef4..d6f1162ff9c6 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -62,6 +62,7 @@ system_ss.add(when: 'CONFIG_AXP2XX_PMU', if_true: files('axp2xx.c'))
system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('arm_sysctl.c'))
system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX7_GPR', if_true: files('imx7_gpr.c'))
system_ss.add(when: 'CONFIG_FSL_IMX8MP_ANALOG', if_true: files('imx8mp_analog.c'))
system_ss.add(when: 'CONFIG_FSL_IMX8MP_CCM', if_true: files('imx8mp_ccm.c'))
system_ss.add(when: 'CONFIG_IMX_RNG', if_true: files('imx_rngc.c'))
@@ -73,7 +74,6 @@ system_ss.add(when: 'CONFIG_IMX', if_true: files(
'imx6ul_ccm.c',
'imx7_ccm.c',
'imx7_src.c',
- 'imx7_gpr.c',
'imx7_snvs.c',
'imx_ccm.c',
))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 27/59] Kconfig: Extract config FSL_IMX{6, 7}_SRC from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (25 preceding siblings ...)
2026-10-27 19:23 ` [PULL 26/59] Kconfig: Extract config FSL_IMX7_GPR " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 28/59] Kconfig: Extract config FSL_IMX7_SNVS " Philippe Mathieu-Daudé
` (31 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
SoC-specific config FSL_IMX{6,7}_SRC to eventually eliminate config
IMX.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261006083445.30362-23-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 3 +++
hw/misc/Kconfig | 6 ++++++
hw/misc/meson.build | 4 ++--
3 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 55e09e3d9957..5e6b81bfbb95 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -505,6 +505,7 @@ config FSL_IMX6
imply PCIE_DEVICES
imply I2C_DEVICES
select A9MPCORE
+ select FSL_IMX6_SRC
select IMX
select IMX_FEC
select IMX_I2C
@@ -580,6 +581,7 @@ config FSL_IMX7
imply I2C_DEVICES
select A15MPCORE
select FSL_IMX7_GPR
+ select FSL_IMX7_SRC
select PCI
select IMX
select IMX_FEC
@@ -662,6 +664,7 @@ config FSL_IMX6UL
depends on TCG && ARM
imply I2C_DEVICES
select A15MPCORE
+ select FSL_IMX6_SRC
select IMX
select IMX6UL_LCDIF
select IMX_FEC
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index b329d6bfda97..ce9fabb8edc8 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -97,9 +97,15 @@ config IMX
config IMX_RNG
bool
+config FSL_IMX6_SRC
+ bool
+
config FSL_IMX7_GPR
bool
+config FSL_IMX7_SRC
+ bool
+
config FSL_IMX8MP_ANALOG
bool
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index d6f1162ff9c6..44a21b9faf63 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -62,7 +62,9 @@ system_ss.add(when: 'CONFIG_AXP2XX_PMU', if_true: files('axp2xx.c'))
system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('arm_sysctl.c'))
system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX6_SRC', if_true: files('imx6_src.c'))
system_ss.add(when: 'CONFIG_FSL_IMX7_GPR', if_true: files('imx7_gpr.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX7_SRC', if_true: files('imx7_src.c'))
system_ss.add(when: 'CONFIG_FSL_IMX8MP_ANALOG', if_true: files('imx8mp_analog.c'))
system_ss.add(when: 'CONFIG_FSL_IMX8MP_CCM', if_true: files('imx8mp_ccm.c'))
system_ss.add(when: 'CONFIG_IMX_RNG', if_true: files('imx_rngc.c'))
@@ -70,10 +72,8 @@ system_ss.add(when: 'CONFIG_IMX', if_true: files(
'imx25_ccm.c',
'imx31_ccm.c',
'imx6_ccm.c',
- 'imx6_src.c',
'imx6ul_ccm.c',
'imx7_ccm.c',
- 'imx7_src.c',
'imx7_snvs.c',
'imx_ccm.c',
))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 28/59] Kconfig: Extract config FSL_IMX7_SNVS from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (26 preceding siblings ...)
2026-10-27 19:23 ` [PULL 27/59] Kconfig: Extract config FSL_IMX{6, 7}_SRC " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 29/59] Kconfig: Extract dedicated config FSL_IMXx_CCM " Philippe Mathieu-Daudé
` (30 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config FSL_IMX7_SNVS to eventually eliminate config IMX.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261006083445.30362-24-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 5 +++++
hw/misc/Kconfig | 3 +++
hw/misc/meson.build | 2 +-
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 5e6b81bfbb95..c01b1ea979bf 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -506,6 +506,7 @@ config FSL_IMX6
imply I2C_DEVICES
select A9MPCORE
select FSL_IMX6_SRC
+ select FSL_IMX7_SNVS
select IMX
select IMX_FEC
select IMX_I2C
@@ -581,6 +582,7 @@ config FSL_IMX7
imply I2C_DEVICES
select A15MPCORE
select FSL_IMX7_GPR
+ select FSL_IMX7_SNVS
select FSL_IMX7_SRC
select PCI
select IMX
@@ -600,6 +602,7 @@ config FSL_IMX8MP
imply PCI_DEVICES
select ARM_GIC
select CAN_FLEXCAN
+ select FSL_IMX7_SNVS
select FSL_IMX8MP_ANALOG
select FSL_IMX8MP_CCM
select IMX
@@ -625,6 +628,7 @@ config FSL_IMX8MM
imply PCI_DEVICES
imply I2C_DEVICES
select ARM_GIC
+ select FSL_IMX7_SNVS
select FSL_IMX8MP_ANALOG
select FSL_IMX8MP_CCM
select IMX
@@ -665,6 +669,7 @@ config FSL_IMX6UL
imply I2C_DEVICES
select A15MPCORE
select FSL_IMX6_SRC
+ select FSL_IMX7_SNVS
select IMX
select IMX6UL_LCDIF
select IMX_FEC
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index ce9fabb8edc8..a69c56ecc69b 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -103,6 +103,9 @@ config FSL_IMX6_SRC
config FSL_IMX7_GPR
bool
+config FSL_IMX7_SNVS
+ bool
+
config FSL_IMX7_SRC
bool
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 44a21b9faf63..f4a4bc1c482a 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -64,6 +64,7 @@ system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
system_ss.add(when: 'CONFIG_FSL_IMX6_SRC', if_true: files('imx6_src.c'))
system_ss.add(when: 'CONFIG_FSL_IMX7_GPR', if_true: files('imx7_gpr.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX7_SNVS', if_true: files('imx7_snvs.c'))
system_ss.add(when: 'CONFIG_FSL_IMX7_SRC', if_true: files('imx7_src.c'))
system_ss.add(when: 'CONFIG_FSL_IMX8MP_ANALOG', if_true: files('imx8mp_analog.c'))
system_ss.add(when: 'CONFIG_FSL_IMX8MP_CCM', if_true: files('imx8mp_ccm.c'))
@@ -74,7 +75,6 @@ system_ss.add(when: 'CONFIG_IMX', if_true: files(
'imx6_ccm.c',
'imx6ul_ccm.c',
'imx7_ccm.c',
- 'imx7_snvs.c',
'imx_ccm.c',
))
system_ss.add(when: 'CONFIG_MAX78000_AES', if_true: files('max78000_aes.c'))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 29/59] Kconfig: Extract dedicated config FSL_IMXx_CCM from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (27 preceding siblings ...)
2026-10-27 19:23 ` [PULL 28/59] Kconfig: Extract config FSL_IMX7_SNVS " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 30/59] Kconfig: Extract config IMX_GPT " Philippe Mathieu-Daudé
` (29 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
SoC-specific config FSL_IMXx_CCM to eventually eliminate config IMX.
Note that config IMX_CCM represents a base class for i.MX clock
control modules which is used in i.MX timers and FlexCAN.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-25-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 5 +++++
hw/misc/Kconfig | 25 +++++++++++++++++++++++++
hw/misc/meson.build | 14 ++++++--------
hw/net/Kconfig | 2 +-
4 files changed, 37 insertions(+), 9 deletions(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index c01b1ea979bf..4d9279ca2c8e 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -479,6 +479,7 @@ config FSL_IMX25
default y
depends on TCG && ARM
imply I2C_DEVICES
+ select FSL_IMX25_CCM
select IMX
select IMX_AVIC
select IMX_FEC
@@ -493,6 +494,7 @@ config FSL_IMX31
default y
depends on TCG && ARM
imply I2C_DEVICES
+ select FSL_IMX31_CCM
select SERIAL_MM
select IMX
select IMX_AVIC
@@ -505,6 +507,7 @@ config FSL_IMX6
imply PCIE_DEVICES
imply I2C_DEVICES
select A9MPCORE
+ select FSL_IMX6_CCM
select FSL_IMX6_SRC
select FSL_IMX7_SNVS
select IMX
@@ -581,6 +584,7 @@ config FSL_IMX7
imply TEST_DEVICES
imply I2C_DEVICES
select A15MPCORE
+ select FSL_IMX7_CCM
select FSL_IMX7_GPR
select FSL_IMX7_SNVS
select FSL_IMX7_SRC
@@ -669,6 +673,7 @@ config FSL_IMX6UL
imply I2C_DEVICES
select A15MPCORE
select FSL_IMX6_SRC
+ select FSL_IMX6UL_CCM
select FSL_IMX7_SNVS
select IMX
select IMX6UL_LCDIF
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index a69c56ecc69b..de95648f0b0b 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -91,15 +91,39 @@ config ECCMEMCTL
config IMX
bool
+ depends on IMX_CCM
select PTIMER
select SSI
+config IMX_CCM
+ bool
+
config IMX_RNG
bool
+config FSL_IMX25_CCM
+ bool
+ select IMX_CCM
+
+config FSL_IMX31_CCM
+ bool
+ select IMX_CCM
+
+config FSL_IMX6_CCM
+ bool
+ select IMX_CCM
+
config FSL_IMX6_SRC
bool
+config FSL_IMX6UL_CCM
+ bool
+ select IMX_CCM
+
+config FSL_IMX7_CCM
+ bool
+ select IMX_CCM
+
config FSL_IMX7_GPR
bool
@@ -114,6 +138,7 @@ config FSL_IMX8MP_ANALOG
config FSL_IMX8MP_CCM
bool
+ select IMX_CCM
config STM32_RCC
bool
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index f4a4bc1c482a..a859e704a5f0 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -62,21 +62,19 @@ system_ss.add(when: 'CONFIG_AXP2XX_PMU', if_true: files('axp2xx.c'))
system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('arm_sysctl.c'))
system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX25_CCM', if_true: files('imx25_ccm.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX31_CCM', if_true: files('imx31_ccm.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX6_CCM', if_true: files('imx6_ccm.c'))
system_ss.add(when: 'CONFIG_FSL_IMX6_SRC', if_true: files('imx6_src.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX6UL_CCM', if_true: files('imx6ul_ccm.c'))
+system_ss.add(when: 'CONFIG_FSL_IMX7_CCM', if_true: files('imx7_ccm.c'))
system_ss.add(when: 'CONFIG_FSL_IMX7_GPR', if_true: files('imx7_gpr.c'))
system_ss.add(when: 'CONFIG_FSL_IMX7_SNVS', if_true: files('imx7_snvs.c'))
system_ss.add(when: 'CONFIG_FSL_IMX7_SRC', if_true: files('imx7_src.c'))
system_ss.add(when: 'CONFIG_FSL_IMX8MP_ANALOG', if_true: files('imx8mp_analog.c'))
system_ss.add(when: 'CONFIG_FSL_IMX8MP_CCM', if_true: files('imx8mp_ccm.c'))
+system_ss.add(when: 'CONFIG_IMX_CCM', if_true: files('imx_ccm.c'))
system_ss.add(when: 'CONFIG_IMX_RNG', if_true: files('imx_rngc.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files(
- 'imx25_ccm.c',
- 'imx31_ccm.c',
- 'imx6_ccm.c',
- 'imx6ul_ccm.c',
- 'imx7_ccm.c',
- 'imx_ccm.c',
-))
system_ss.add(when: 'CONFIG_MAX78000_AES', if_true: files('max78000_aes.c'))
system_ss.add(when: 'CONFIG_MAX78000_GCR', if_true: files('max78000_gcr.c'))
system_ss.add(when: 'CONFIG_MAX78000_ICC', if_true: files('max78000_icc.c'))
diff --git a/hw/net/Kconfig b/hw/net/Kconfig
index b56a173eed5e..4a2cacbcd2a9 100644
--- a/hw/net/Kconfig
+++ b/hw/net/Kconfig
@@ -160,5 +160,5 @@ config CAN_CTUCANFD_PCI
config CAN_FLEXCAN
bool
- depends on IMX
+ depends on IMX_CCM
select CAN_BUS
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 30/59] Kconfig: Extract config IMX_GPT from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (28 preceding siblings ...)
2026-10-27 19:23 ` [PULL 29/59] Kconfig: Extract dedicated config FSL_IMXx_CCM " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 31/59] Kconfig: Extract config IMX_EPIT " Philippe Mathieu-Daudé
` (28 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_GPT to eventually eliminate config IMX.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-26-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 7 +++++++
hw/timer/Kconfig | 5 +++++
hw/timer/meson.build | 2 +-
3 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 4d9279ca2c8e..57bff99c2585 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -483,6 +483,7 @@ config FSL_IMX25
select IMX
select IMX_AVIC
select IMX_FEC
+ select IMX_GPT
select IMX_I2C
select IMX_RNG
select USB_CHIPIDEA
@@ -498,6 +499,7 @@ config FSL_IMX31
select SERIAL_MM
select IMX
select IMX_AVIC
+ select IMX_GPT
select IMX_I2C
select WDT_IMX2
select LAN9118
@@ -512,6 +514,7 @@ config FSL_IMX6
select FSL_IMX7_SNVS
select IMX
select IMX_FEC
+ select IMX_GPT
select IMX_I2C
select IMX_USBPHY
select CAN_FLEXCAN
@@ -592,6 +595,7 @@ config FSL_IMX7
select IMX
select IMX_FEC
select IMX_GPCV2
+ select IMX_GPT
select IMX_I2C
select WDT_IMX2
select PCI_EXPRESS_DESIGNWARE
@@ -611,6 +615,7 @@ config FSL_IMX8MP
select FSL_IMX8MP_CCM
select IMX
select IMX_FEC
+ select IMX_GPT
select IMX_I2C
select OR_IRQ
select PCI_EXPRESS_DESIGNWARE
@@ -637,6 +642,7 @@ config FSL_IMX8MM
select FSL_IMX8MP_CCM
select IMX
select IMX_FEC
+ select IMX_GPT
select IMX_I2C
select OR_IRQ
select SDHCI
@@ -679,6 +685,7 @@ config FSL_IMX6UL
select IMX6UL_LCDIF
select IMX_FEC
select IMX_GPCV2
+ select IMX_GPT
select IMX_I2C
select IMX_USBPHY
select WDT_IMX2
diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig
index e1b751a54a7c..49a4d20e55b1 100644
--- a/hw/timer/Kconfig
+++ b/hw/timer/Kconfig
@@ -23,6 +23,11 @@ config I8254
bool
depends on ISA_BUS
+config IMX_GPT
+ bool
+ depends on IMX_CCM
+ select PTIMER
+
config ALLWINNER_A10_PIT
bool
select PTIMER
diff --git a/hw/timer/meson.build b/hw/timer/meson.build
index 8323efaf46b6..477dd47486ea 100644
--- a/hw/timer/meson.build
+++ b/hw/timer/meson.build
@@ -16,7 +16,7 @@ system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_gptimer.c'))
system_ss.add(when: 'CONFIG_HPET_C', if_true: files('hpet.c'))
system_ss.add(when: 'CONFIG_I8254', if_true: files('i8254_common.c', 'i8254.c'))
system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_epit.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpt.c'))
+system_ss.add(when: 'CONFIG_IMX_GPT', if_true: files('imx_gpt.c'))
system_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_gictimer.c'))
system_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-timer.c'))
system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_timer.c'))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 31/59] Kconfig: Extract config IMX_EPIT from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (29 preceding siblings ...)
2026-10-27 19:23 ` [PULL 30/59] Kconfig: Extract config IMX_GPT " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 32/59] Kconfig: Extract config GPIO_IMX " Philippe Mathieu-Daudé
` (27 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_EPIT to eventually eliminate config IMX.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-27-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 4 ++++
hw/misc/Kconfig | 2 --
hw/timer/Kconfig | 5 +++++
hw/timer/meson.build | 2 +-
4 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 57bff99c2585..4b52df2a324f 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -482,6 +482,7 @@ config FSL_IMX25
select FSL_IMX25_CCM
select IMX
select IMX_AVIC
+ select IMX_EPIT
select IMX_FEC
select IMX_GPT
select IMX_I2C
@@ -499,6 +500,7 @@ config FSL_IMX31
select SERIAL_MM
select IMX
select IMX_AVIC
+ select IMX_EPIT
select IMX_GPT
select IMX_I2C
select WDT_IMX2
@@ -513,6 +515,7 @@ config FSL_IMX6
select FSL_IMX6_SRC
select FSL_IMX7_SNVS
select IMX
+ select IMX_EPIT
select IMX_FEC
select IMX_GPT
select IMX_I2C
@@ -683,6 +686,7 @@ config FSL_IMX6UL
select FSL_IMX7_SNVS
select IMX
select IMX6UL_LCDIF
+ select IMX_EPIT
select IMX_FEC
select IMX_GPCV2
select IMX_GPT
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index de95648f0b0b..d625141aafd0 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -91,8 +91,6 @@ config ECCMEMCTL
config IMX
bool
- depends on IMX_CCM
- select PTIMER
select SSI
config IMX_CCM
diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig
index 49a4d20e55b1..e098376d4087 100644
--- a/hw/timer/Kconfig
+++ b/hw/timer/Kconfig
@@ -23,6 +23,11 @@ config I8254
bool
depends on ISA_BUS
+config IMX_EPIT
+ bool
+ depends on IMX_CCM
+ select PTIMER
+
config IMX_GPT
bool
depends on IMX_CCM
diff --git a/hw/timer/meson.build b/hw/timer/meson.build
index 477dd47486ea..e2bcdbdf6530 100644
--- a/hw/timer/meson.build
+++ b/hw/timer/meson.build
@@ -15,7 +15,7 @@ system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pwm.c'))
system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_gptimer.c'))
system_ss.add(when: 'CONFIG_HPET_C', if_true: files('hpet.c'))
system_ss.add(when: 'CONFIG_I8254', if_true: files('i8254_common.c', 'i8254.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_epit.c'))
+system_ss.add(when: 'CONFIG_IMX_EPIT', if_true: files('imx_epit.c'))
system_ss.add(when: 'CONFIG_IMX_GPT', if_true: files('imx_gpt.c'))
system_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_gictimer.c'))
system_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-timer.c'))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 32/59] Kconfig: Extract config GPIO_IMX from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (30 preceding siblings ...)
2026-10-27 19:23 ` [PULL 31/59] Kconfig: Extract config IMX_EPIT " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 33/59] Kconfig: Extract config IMX_SPI " Philippe Mathieu-Daudé
` (26 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config GPIO_IMX to eventually eliminate config IMX.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261006083445.30362-28-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 7 +++++++
hw/gpio/Kconfig | 3 +++
hw/gpio/meson.build | 2 +-
3 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 4b52df2a324f..92e6e3b4790b 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -480,6 +480,7 @@ config FSL_IMX25
depends on TCG && ARM
imply I2C_DEVICES
select FSL_IMX25_CCM
+ select GPIO_IMX
select IMX
select IMX_AVIC
select IMX_EPIT
@@ -497,6 +498,7 @@ config FSL_IMX31
depends on TCG && ARM
imply I2C_DEVICES
select FSL_IMX31_CCM
+ select GPIO_IMX
select SERIAL_MM
select IMX
select IMX_AVIC
@@ -514,6 +516,7 @@ config FSL_IMX6
select FSL_IMX6_CCM
select FSL_IMX6_SRC
select FSL_IMX7_SNVS
+ select GPIO_IMX
select IMX
select IMX_EPIT
select IMX_FEC
@@ -594,6 +597,7 @@ config FSL_IMX7
select FSL_IMX7_GPR
select FSL_IMX7_SNVS
select FSL_IMX7_SRC
+ select GPIO_IMX
select PCI
select IMX
select IMX_FEC
@@ -616,6 +620,7 @@ config FSL_IMX8MP
select FSL_IMX7_SNVS
select FSL_IMX8MP_ANALOG
select FSL_IMX8MP_CCM
+ select GPIO_IMX
select IMX
select IMX_FEC
select IMX_GPT
@@ -643,6 +648,7 @@ config FSL_IMX8MM
select FSL_IMX7_SNVS
select FSL_IMX8MP_ANALOG
select FSL_IMX8MP_CCM
+ select GPIO_IMX
select IMX
select IMX_FEC
select IMX_GPT
@@ -684,6 +690,7 @@ config FSL_IMX6UL
select FSL_IMX6_SRC
select FSL_IMX6UL_CCM
select FSL_IMX7_SNVS
+ select GPIO_IMX
select IMX
select IMX6UL_LCDIF
select IMX_EPIT
diff --git a/hw/gpio/Kconfig b/hw/gpio/Kconfig
index ea0fb72b4062..5ea2c5f4277f 100644
--- a/hw/gpio/Kconfig
+++ b/hw/gpio/Kconfig
@@ -1,6 +1,9 @@
config PL061
bool
+config GPIO_IMX
+ bool
+
config GPIO_KEY
bool
diff --git a/hw/gpio/meson.build b/hw/gpio/meson.build
index 8ede5e88ae5e..d60dc42ab303 100644
--- a/hw/gpio/meson.build
+++ b/hw/gpio/meson.build
@@ -1,3 +1,4 @@
+system_ss.add(when: 'CONFIG_GPIO_IMX', if_true: files('imx_gpio.c'))
system_ss.add(when: 'CONFIG_GPIO_KEY', if_true: files('gpio_key.c'))
system_ss.add(when: 'CONFIG_GPIO_MPC8XXX', if_true: files('mpc8xxx.c'))
system_ss.add(when: 'CONFIG_GPIO_PWR', if_true: files('gpio_pwr.c'))
@@ -6,7 +7,6 @@ system_ss.add(when: 'CONFIG_PCA9554', if_true: files('pca9554.c'))
system_ss.add(when: 'CONFIG_PL061', if_true: files('pl061.c'))
system_ss.add(when: 'CONFIG_ZAURUS_SCOOP', if_true: files('zaurus.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpio.c'))
system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_gpio.c'))
system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_gpio.c'))
system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gpio.c'))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 33/59] Kconfig: Extract config IMX_SPI from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (31 preceding siblings ...)
2026-10-27 19:23 ` [PULL 32/59] Kconfig: Extract config GPIO_IMX " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 34/59] Kconfig: Extract config IMX_SERIAL " Philippe Mathieu-Daudé
` (25 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_SPI to eventually eliminate config IMX.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261006083445.30362-29-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 5 +++++
hw/misc/Kconfig | 1 -
hw/ssi/Kconfig | 4 ++++
hw/ssi/meson.build | 2 +-
4 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 92e6e3b4790b..89b3ecd99a2b 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -522,6 +522,7 @@ config FSL_IMX6
select IMX_FEC
select IMX_GPT
select IMX_I2C
+ select IMX_SPI
select IMX_USBPHY
select CAN_FLEXCAN
select WDT_IMX2
@@ -604,6 +605,7 @@ config FSL_IMX7
select IMX_GPCV2
select IMX_GPT
select IMX_I2C
+ select IMX_SPI
select WDT_IMX2
select PCI_EXPRESS_DESIGNWARE
select SDHCI
@@ -625,6 +627,7 @@ config FSL_IMX8MP
select IMX_FEC
select IMX_GPT
select IMX_I2C
+ select IMX_SPI
select OR_IRQ
select PCI_EXPRESS_DESIGNWARE
select PCI_EXPRESS_FSL_IMX8M_PHY
@@ -653,6 +656,7 @@ config FSL_IMX8MM
select IMX_FEC
select IMX_GPT
select IMX_I2C
+ select IMX_SPI
select OR_IRQ
select SDHCI
select PCI_EXPRESS_DESIGNWARE
@@ -698,6 +702,7 @@ config FSL_IMX6UL
select IMX_GPCV2
select IMX_GPT
select IMX_I2C
+ select IMX_SPI
select IMX_USBPHY
select WDT_IMX2
select SDHCI
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index d625141aafd0..e1396aa8c221 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -91,7 +91,6 @@ config ECCMEMCTL
config IMX
bool
- select SSI
config IMX_CCM
bool
diff --git a/hw/ssi/Kconfig b/hw/ssi/Kconfig
index 1bd56463c1e0..d477d20e9ba4 100644
--- a/hw/ssi/Kconfig
+++ b/hw/ssi/Kconfig
@@ -32,3 +32,7 @@ config PNV_SPI
config ALLWINNER_A10_SPI
bool
select SSI
+
+config IMX_SPI
+ bool
+ select SSI
diff --git a/hw/ssi/meson.build b/hw/ssi/meson.build
index 6afb1ea20012..f334e48e2fe8 100644
--- a/hw/ssi/meson.build
+++ b/hw/ssi/meson.build
@@ -9,7 +9,7 @@ system_ss.add(when: 'CONFIG_STM32F2XX_SPI', if_true: files('stm32f2xx_spi.c'))
system_ss.add(when: 'CONFIG_XILINX_SPI', if_true: files('xilinx_spi.c'))
system_ss.add(when: 'CONFIG_XILINX_SPIPS', if_true: files('xilinx_spips.c'))
system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-ospi.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_spi.c'))
+system_ss.add(when: 'CONFIG_IMX_SPI', if_true: files('imx_spi.c'))
system_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_spi_host.c'))
system_ss.add(when: 'CONFIG_BCM2835_SPI', if_true: files('bcm2835_spi.c'))
system_ss.add(when: 'CONFIG_PNV_SPI', if_true: files('pnv_spi.c'))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 34/59] Kconfig: Extract config IMX_SERIAL from config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (32 preceding siblings ...)
2026-10-27 19:23 ` [PULL 33/59] Kconfig: Extract config IMX_SPI " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 35/59] Kconfig: Remove " Philippe Mathieu-Daudé
` (24 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Over time, QEMU has grown a number of i.MX boards and the monolithic
config IMX drags in unneeded dependencies into each SoC model. Extract
config IMX_SERIAL to eventually eliminate config IMX.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-30-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 7 +++++++
hw/char/Kconfig | 3 +++
hw/char/meson.build | 2 +-
3 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 89b3ecd99a2b..4b67f6432f82 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -488,6 +488,7 @@ config FSL_IMX25
select IMX_GPT
select IMX_I2C
select IMX_RNG
+ select IMX_SERIAL
select USB_CHIPIDEA
select WDT_IMX2
select SDHCI
@@ -505,6 +506,7 @@ config FSL_IMX31
select IMX_EPIT
select IMX_GPT
select IMX_I2C
+ select IMX_SERIAL
select WDT_IMX2
select LAN9118
@@ -522,6 +524,7 @@ config FSL_IMX6
select IMX_FEC
select IMX_GPT
select IMX_I2C
+ select IMX_SERIAL
select IMX_SPI
select IMX_USBPHY
select CAN_FLEXCAN
@@ -605,6 +608,7 @@ config FSL_IMX7
select IMX_GPCV2
select IMX_GPT
select IMX_I2C
+ select IMX_SERIAL
select IMX_SPI
select WDT_IMX2
select PCI_EXPRESS_DESIGNWARE
@@ -627,6 +631,7 @@ config FSL_IMX8MP
select IMX_FEC
select IMX_GPT
select IMX_I2C
+ select IMX_SERIAL
select IMX_SPI
select OR_IRQ
select PCI_EXPRESS_DESIGNWARE
@@ -656,6 +661,7 @@ config FSL_IMX8MM
select IMX_FEC
select IMX_GPT
select IMX_I2C
+ select IMX_SERIAL
select IMX_SPI
select OR_IRQ
select SDHCI
@@ -702,6 +708,7 @@ config FSL_IMX6UL
select IMX_GPCV2
select IMX_GPT
select IMX_I2C
+ select IMX_SERIAL
select IMX_SPI
select IMX_USBPHY
select WDT_IMX2
diff --git a/hw/char/Kconfig b/hw/char/Kconfig
index 704004064192..d77f851668b2 100644
--- a/hw/char/Kconfig
+++ b/hw/char/Kconfig
@@ -48,6 +48,9 @@ config VIRTIO_SERIAL
default y
depends on VIRTIO
+config IMX_SERIAL
+ bool
+
config MAX78000_UART
bool
diff --git a/hw/char/meson.build b/hw/char/meson.build
index b2250ee6aea3..111bc1da64ae 100644
--- a/hw/char/meson.build
+++ b/hw/char/meson.build
@@ -3,7 +3,7 @@ system_ss.add(when: 'CONFIG_CMSDK_APB_UART', if_true: files('cmsdk-apb-uart.c'))
system_ss.add(when: 'CONFIG_ESCC', if_true: files('escc.c'))
system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_apbuart.c'))
system_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_uart.c'))
-system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_serial.c'))
+system_ss.add(when: 'CONFIG_IMX_SERIAL', if_true: files('imx_serial.c'))
system_ss.add(when: 'CONFIG_IP_OCTAL_232', if_true: files('ipoctal232.c'))
system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('parallel-isa.c'))
system_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugcon.c'))
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 35/59] Kconfig: Remove config IMX
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (33 preceding siblings ...)
2026-10-27 19:23 ` [PULL 34/59] Kconfig: Extract config IMX_SERIAL " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 36/59] hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency Philippe Mathieu-Daudé
` (23 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
The previous changes removed all uses of config IMX. Remove the now
hollow config item.
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-31-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/Kconfig | 7 -------
hw/misc/Kconfig | 3 ---
2 files changed, 10 deletions(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 4b67f6432f82..e9f796f71848 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -481,7 +481,6 @@ config FSL_IMX25
imply I2C_DEVICES
select FSL_IMX25_CCM
select GPIO_IMX
- select IMX
select IMX_AVIC
select IMX_EPIT
select IMX_FEC
@@ -501,7 +500,6 @@ config FSL_IMX31
select FSL_IMX31_CCM
select GPIO_IMX
select SERIAL_MM
- select IMX
select IMX_AVIC
select IMX_EPIT
select IMX_GPT
@@ -519,7 +517,6 @@ config FSL_IMX6
select FSL_IMX6_SRC
select FSL_IMX7_SNVS
select GPIO_IMX
- select IMX
select IMX_EPIT
select IMX_FEC
select IMX_GPT
@@ -603,7 +600,6 @@ config FSL_IMX7
select FSL_IMX7_SRC
select GPIO_IMX
select PCI
- select IMX
select IMX_FEC
select IMX_GPCV2
select IMX_GPT
@@ -627,7 +623,6 @@ config FSL_IMX8MP
select FSL_IMX8MP_ANALOG
select FSL_IMX8MP_CCM
select GPIO_IMX
- select IMX
select IMX_FEC
select IMX_GPT
select IMX_I2C
@@ -657,7 +652,6 @@ config FSL_IMX8MM
select FSL_IMX8MP_ANALOG
select FSL_IMX8MP_CCM
select GPIO_IMX
- select IMX
select IMX_FEC
select IMX_GPT
select IMX_I2C
@@ -701,7 +695,6 @@ config FSL_IMX6UL
select FSL_IMX6UL_CCM
select FSL_IMX7_SNVS
select GPIO_IMX
- select IMX
select IMX6UL_LCDIF
select IMX_EPIT
select IMX_FEC
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
index e1396aa8c221..a5d03fb42601 100644
--- a/hw/misc/Kconfig
+++ b/hw/misc/Kconfig
@@ -89,9 +89,6 @@ config IVSHMEM_FLAT_DEVICE
config ECCMEMCTL
bool
-config IMX
- bool
-
config IMX_CCM
bool
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 36/59] hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (34 preceding siblings ...)
2026-10-27 19:23 ` [PULL 35/59] Kconfig: Remove " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 37/59] hw/arm/fsl-imx8m: Fix typo Philippe Mathieu-Daudé
` (22 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
The config option GPIO_PWR provides the "gpio-pwr" type which is
currently only used by the ARM virt machine. Remove this unused
dependency from config VMAPPLE.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-34-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/vmapple/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
index 2382b2976722..b8aa7d8eb073 100644
--- a/hw/vmapple/Kconfig
+++ b/hw/vmapple/Kconfig
@@ -25,7 +25,6 @@ config VMAPPLE
select PL011 # UART
select PL031 # RTC
select PL061 # GPIO
- select GPIO_PWR
select PVPANIC_MMIO
select VMAPPLE_AES
select VMAPPLE_BDIF
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 37/59] hw/arm/fsl-imx8m: Fix typo
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (35 preceding siblings ...)
2026-10-27 19:23 ` [PULL 36/59] hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 38/59] hw/misc/imx6_src: Avoid casting from void * Philippe Mathieu-Daudé
` (21 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
This is IMX8MP and IMX8MM, not IMX6.
Fixes: 0c105b261551 ("hw/arm/fsl-imx8mp: Add Ethernet controller")
Fixes: 857670200c51 ("hw/arm/fsl-imx8mm: Adding support for ENET ethernet controller")
Reviewed-by: Gaurav Sharma <gaurav.sharma_7@nxp.com>
Reviewed-by: Bin Meng <bin.meng@processmission.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20261006083445.30362-32-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/hw/arm/fsl-imx8mm.h | 4 ++--
include/hw/arm/fsl-imx8mp.h | 4 ++--
hw/arm/fsl-imx8mm.c | 2 +-
hw/arm/fsl-imx8mp.c | 2 +-
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/hw/arm/fsl-imx8mm.h b/include/hw/arm/fsl-imx8mm.h
index 60d79a6e3c61..1966fa505fe4 100644
--- a/include/hw/arm/fsl-imx8mm.h
+++ b/include/hw/arm/fsl-imx8mm.h
@@ -229,8 +229,8 @@ enum FslImx8mmIrqs {
FSL_IMX8MM_WDOG2_IRQ = 79,
FSL_IMX8MM_WDOG3_IRQ = 10,
- FSL_IMX8MM_ENET1_MAC_IRQ = 118,
- FSL_IMX6_ENET1_MAC_1588_IRQ = 121,
+ FSL_IMX8MM_ENET1_MAC_IRQ = 118,
+ FSL_IMX8MM_ENET1_MAC_1588_IRQ = 121,
FSL_IMX8MM_PCI_INTA_IRQ = 122,
FSL_IMX8MM_PCI_INTB_IRQ = 123,
diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h
index 2be3c51af56a..3acfffd30fb9 100644
--- a/include/hw/arm/fsl-imx8mp.h
+++ b/include/hw/arm/fsl-imx8mp.h
@@ -276,8 +276,8 @@ enum FslImx8mpIrqs {
FSL_IMX8MP_WDOG2_IRQ = 79,
FSL_IMX8MP_WDOG3_IRQ = 10,
- FSL_IMX8MP_ENET1_MAC_IRQ = 118,
- FSL_IMX6_ENET1_MAC_1588_IRQ = 121,
+ FSL_IMX8MP_ENET1_MAC_IRQ = 118,
+ FSL_IMX8MP_ENET1_MAC_1588_IRQ = 121,
FSL_IMX8MP_PCI_INTA_IRQ = 126,
FSL_IMX8MP_PCI_INTB_IRQ = 125,
diff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c
index 37934d295111..90c167346147 100644
--- a/hw/arm/fsl-imx8mm.c
+++ b/hw/arm/fsl-imx8mm.c
@@ -590,7 +590,7 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->enet), 0,
qdev_get_gpio_in(gicdev, FSL_IMX8MM_ENET1_MAC_IRQ));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->enet), 1,
- qdev_get_gpio_in(gicdev, FSL_IMX6_ENET1_MAC_1588_IRQ));
+ qdev_get_gpio_in(gicdev, FSL_IMX8MM_ENET1_MAC_1588_IRQ));
/* SNVS */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) {
diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c
index f855378dff2d..fbc094b7db90 100644
--- a/hw/arm/fsl-imx8mp.c
+++ b/hw/arm/fsl-imx8mp.c
@@ -620,7 +620,7 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->enet), 0,
qdev_get_gpio_in(gicdev, FSL_IMX8MP_ENET1_MAC_IRQ));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->enet), 1,
- qdev_get_gpio_in(gicdev, FSL_IMX6_ENET1_MAC_1588_IRQ));
+ qdev_get_gpio_in(gicdev, FSL_IMX8MP_ENET1_MAC_1588_IRQ));
/* SNVS */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) {
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 38/59] hw/misc/imx6_src: Avoid casting from void *
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (36 preceding siblings ...)
2026-10-27 19:23 ` [PULL 37/59] hw/arm/fsl-imx8m: Fix typo Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 39/59] hw/char/imx_serial: " Philippe Mathieu-Daudé
` (20 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-36-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/misc/imx6_src.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/misc/imx6_src.c b/hw/misc/imx6_src.c
index 8d2c4175e4e1..5bc1318f9d28 100644
--- a/hw/misc/imx6_src.c
+++ b/hw/misc/imx6_src.c
@@ -89,7 +89,7 @@ static void imx6_src_reset(DeviceState *dev)
static uint64_t imx6_src_read(void *opaque, hwaddr offset, unsigned size)
{
uint32_t value = 0;
- IMX6SRCState *s = (IMX6SRCState *)opaque;
+ IMX6SRCState *s = opaque;
uint32_t index = offset >> 2;
if (index < SRC_MAX) {
@@ -150,7 +150,7 @@ static void imx6_defer_clear_reset_bit(int cpuid,
static void imx6_src_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
- IMX6SRCState *s = (IMX6SRCState *)opaque;
+ IMX6SRCState *s = opaque;
uint32_t index = offset >> 2;
unsigned long change_mask;
unsigned long current_value = value;
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 39/59] hw/char/imx_serial: Avoid casting from void *
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (37 preceding siblings ...)
2026-10-27 19:23 ` [PULL 38/59] hw/misc/imx6_src: Avoid casting from void * Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 40/59] hw/intc/imx_avic: " Philippe Mathieu-Daudé
` (19 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-37-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/char/imx_serial.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c
index 8ac4efbb5e98..8780678ea4be 100644
--- a/hw/char/imx_serial.c
+++ b/hw/char/imx_serial.c
@@ -186,7 +186,7 @@ static void imx_serial_reset_at_boot(DeviceState *dev)
static uint64_t imx_serial_read(void *opaque, hwaddr offset,
unsigned size)
{
- IMXSerialState *s = (IMXSerialState *)opaque;
+ IMXSerialState *s = opaque;
Chardev *chr = qemu_chr_fe_get_driver(&s->chr);
uint32_t c, rx_used;
uint8_t rxtl = s->ufcr & TL_MASK;
@@ -277,7 +277,7 @@ static uint64_t imx_serial_read(void *opaque, hwaddr offset,
static void imx_serial_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
- IMXSerialState *s = (IMXSerialState *)opaque;
+ IMXSerialState *s = opaque;
g_autofree char *label = qemu_chr_fe_backend_name(&s->chr);
unsigned char ch;
@@ -386,14 +386,14 @@ static void imx_serial_write(void *opaque, hwaddr offset,
static int imx_can_receive(void *opaque)
{
- IMXSerialState *s = (IMXSerialState *)opaque;
+ IMXSerialState *s = opaque;
return s->ucr2 & UCR2_RXEN ? fifo32_num_free(&s->rx_fifo) : 0;
}
static void imx_put_data(void *opaque, uint32_t value)
{
- IMXSerialState *s = (IMXSerialState *)opaque;
+ IMXSerialState *s = opaque;
Chardev *chr = qemu_chr_fe_get_driver(&s->chr);
uint8_t rxtl = s->ufcr & TL_MASK;
@@ -416,7 +416,7 @@ static void imx_put_data(void *opaque, uint32_t value)
static void imx_receive(void *opaque, const uint8_t *buf, int size)
{
- IMXSerialState *s = (IMXSerialState *)opaque;
+ IMXSerialState *s = opaque;
s->usr2 |= USR2_WAKE;
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 40/59] hw/intc/imx_avic: Avoid casting from void *
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (38 preceding siblings ...)
2026-10-27 19:23 ` [PULL 39/59] hw/char/imx_serial: " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 41/59] hw/misc/imx*_ccm: " Philippe Mathieu-Daudé
` (18 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-38-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/intc/imx_avic.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/intc/imx_avic.c b/hw/intc/imx_avic.c
index a3d71aba8ef6..d05c71fb3941 100644
--- a/hw/intc/imx_avic.c
+++ b/hw/intc/imx_avic.c
@@ -89,7 +89,7 @@ static void imx_avic_update(IMXAVICState *s)
static void imx_avic_set_irq(void *opaque, int irq, int level)
{
- IMXAVICState *s = (IMXAVICState *)opaque;
+ IMXAVICState *s = opaque;
if (level) {
DPRINTF("Raising IRQ %d, prio %d\n",
@@ -108,7 +108,7 @@ static void imx_avic_set_irq(void *opaque, int irq, int level)
static uint64_t imx_avic_read(void *opaque,
hwaddr offset, unsigned size)
{
- IMXAVICState *s = (IMXAVICState *)opaque;
+ IMXAVICState *s = opaque;
DPRINTF("read(offset = 0x%" HWADDR_PRIx ")\n", offset);
@@ -217,7 +217,7 @@ static uint64_t imx_avic_read(void *opaque,
static void imx_avic_write(void *opaque, hwaddr offset,
uint64_t val, unsigned size)
{
- IMXAVICState *s = (IMXAVICState *)opaque;
+ IMXAVICState *s = opaque;
/* Vector Registers not yet supported */
if (offset >= 0x100 && offset <= 0x2fc) {
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 41/59] hw/misc/imx*_ccm: Avoid casting from void *
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (39 preceding siblings ...)
2026-10-27 19:23 ` [PULL 40/59] hw/intc/imx_avic: " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 42/59] hw/usb/imx-usb-phy: " Philippe Mathieu-Daudé
` (17 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-39-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/misc/imx25_ccm.c | 4 ++--
hw/misc/imx31_ccm.c | 4 ++--
hw/misc/imx6_ccm.c | 8 ++++----
hw/misc/imx6ul_ccm.c | 8 ++++----
hw/misc/imx7_src.c | 4 ++--
5 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/hw/misc/imx25_ccm.c b/hw/misc/imx25_ccm.c
index a91b0be68285..8fd2a329ddbc 100644
--- a/hw/misc/imx25_ccm.c
+++ b/hw/misc/imx25_ccm.c
@@ -217,7 +217,7 @@ static void imx25_ccm_reset(DeviceState *dev)
static uint64_t imx25_ccm_read(void *opaque, hwaddr offset, unsigned size)
{
uint32_t value = 0;
- IMX25CCMState *s = (IMX25CCMState *)opaque;
+ IMX25CCMState *s = opaque;
if (offset < 0x70) {
value = s->reg[offset >> 2];
@@ -234,7 +234,7 @@ static uint64_t imx25_ccm_read(void *opaque, hwaddr offset, unsigned size)
static void imx25_ccm_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
- IMX25CCMState *s = (IMX25CCMState *)opaque;
+ IMX25CCMState *s = opaque;
trace_imx25_ccm_write(imx25_ccm_reg_name(offset >> 2), value);
diff --git a/hw/misc/imx31_ccm.c b/hw/misc/imx31_ccm.c
index 8d620711ddd9..3cb9f44fab82 100644
--- a/hw/misc/imx31_ccm.c
+++ b/hw/misc/imx31_ccm.c
@@ -222,7 +222,7 @@ static void imx31_ccm_reset(DeviceState *dev)
static uint64_t imx31_ccm_read(void *opaque, hwaddr offset, unsigned size)
{
uint32_t value = 0;
- IMX31CCMState *s = (IMX31CCMState *)opaque;
+ IMX31CCMState *s = opaque;
if ((offset >> 2) < IMX31_CCM_MAX_REG) {
value = s->reg[offset >> 2];
@@ -239,7 +239,7 @@ static uint64_t imx31_ccm_read(void *opaque, hwaddr offset, unsigned size)
static void imx31_ccm_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
- IMX31CCMState *s = (IMX31CCMState *)opaque;
+ IMX31CCMState *s = opaque;
trace_imx31_ccm_write(imx31_ccm_reg_name(offset >> 2), value);
diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
index 45fdd0d5a8d5..4a40fe08ea72 100644
--- a/hw/misc/imx6_ccm.c
+++ b/hw/misc/imx6_ccm.c
@@ -491,7 +491,7 @@ static uint64_t imx6_ccm_read(void *opaque, hwaddr offset, unsigned size)
{
uint32_t value = 0;
uint32_t index = offset >> 2;
- IMX6CCMState *s = (IMX6CCMState *)opaque;
+ IMX6CCMState *s = opaque;
value = s->ccm[index];
@@ -504,7 +504,7 @@ static void imx6_ccm_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
uint32_t index = offset >> 2;
- IMX6CCMState *s = (IMX6CCMState *)opaque;
+ IMX6CCMState *s = opaque;
trace_imx6_ccm_write(imx6_ccm_reg_name(index), (uint32_t)value);
@@ -519,7 +519,7 @@ static uint64_t imx6_analog_read(void *opaque, hwaddr offset, unsigned size)
{
uint32_t value;
uint32_t index = offset >> 2;
- IMX6CCMState *s = (IMX6CCMState *)opaque;
+ IMX6CCMState *s = opaque;
switch (index) {
case CCM_ANALOG_PLL_ARM_SET:
@@ -611,7 +611,7 @@ static void imx6_analog_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
uint32_t index = offset >> 2;
- IMX6CCMState *s = (IMX6CCMState *)opaque;
+ IMX6CCMState *s = opaque;
trace_imx6_analog_write(imx6_analog_reg_name(index), (uint32_t)value);
diff --git a/hw/misc/imx6ul_ccm.c b/hw/misc/imx6ul_ccm.c
index c4f6e372fe1c..f12ba6ebe22f 100644
--- a/hw/misc/imx6ul_ccm.c
+++ b/hw/misc/imx6ul_ccm.c
@@ -625,7 +625,7 @@ static uint64_t imx6ul_ccm_read(void *opaque, hwaddr offset, unsigned size)
{
uint32_t value = 0;
uint32_t index = offset >> 2;
- IMX6ULCCMState *s = (IMX6ULCCMState *)opaque;
+ IMX6ULCCMState *s = opaque;
assert(index < CCM_MAX);
@@ -640,7 +640,7 @@ static void imx6ul_ccm_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
uint32_t index = offset >> 2;
- IMX6ULCCMState *s = (IMX6ULCCMState *)opaque;
+ IMX6ULCCMState *s = opaque;
assert(index < CCM_MAX);
@@ -654,7 +654,7 @@ static uint64_t imx6ul_analog_read(void *opaque, hwaddr offset, unsigned size)
{
uint32_t value;
uint32_t index = offset >> 2;
- IMX6ULCCMState *s = (IMX6ULCCMState *)opaque;
+ IMX6ULCCMState *s = opaque;
assert(index < CCM_ANALOG_MAX);
@@ -754,7 +754,7 @@ static void imx6ul_analog_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
uint32_t index = offset >> 2;
- IMX6ULCCMState *s = (IMX6ULCCMState *)opaque;
+ IMX6ULCCMState *s = opaque;
assert(index < CCM_ANALOG_MAX);
diff --git a/hw/misc/imx7_src.c b/hw/misc/imx7_src.c
index 77f13bd020b7..4a59e347c58d 100644
--- a/hw/misc/imx7_src.c
+++ b/hw/misc/imx7_src.c
@@ -105,7 +105,7 @@ static void imx7_src_reset(DeviceState *dev)
static uint64_t imx7_src_read(void *opaque, hwaddr offset, unsigned size)
{
uint32_t value = 0;
- IMX7SRCState *s = (IMX7SRCState *)opaque;
+ IMX7SRCState *s = opaque;
uint32_t index = offset >> 2;
if (index < SRC_MAX) {
@@ -167,7 +167,7 @@ static void imx7_defer_clear_reset_bit(uint32_t cpuid,
static void imx7_src_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
- IMX7SRCState *s = (IMX7SRCState *)opaque;
+ IMX7SRCState *s = opaque;
uint32_t index = offset >> 2;
long unsigned int change_mask;
uint32_t current_value = value;
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 42/59] hw/usb/imx-usb-phy: Avoid casting from void *
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (40 preceding siblings ...)
2026-10-27 19:23 ` [PULL 41/59] hw/misc/imx*_ccm: " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 43/59] hw/net/imx_fec: Trace with QOM path where easily possible Philippe Mathieu-Daudé
` (16 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-40-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/usb/imx-usb-phy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/usb/imx-usb-phy.c b/hw/usb/imx-usb-phy.c
index c25566d0fae1..2b2913c38751 100644
--- a/hw/usb/imx-usb-phy.c
+++ b/hw/usb/imx-usb-phy.c
@@ -49,7 +49,7 @@ static void imx_usbphy_reset(DeviceState *dev)
static uint64_t imx_usbphy_read(void *opaque, hwaddr offset, unsigned size)
{
- IMXUSBPHYState *s = (IMXUSBPHYState *)opaque;
+ IMXUSBPHYState *s = opaque;
uint32_t index = offset >> 2;
uint32_t value;
@@ -108,7 +108,7 @@ static uint64_t imx_usbphy_read(void *opaque, hwaddr offset, unsigned size)
static void imx_usbphy_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
- IMXUSBPHYState *s = (IMXUSBPHYState *)opaque;
+ IMXUSBPHYState *s = opaque;
uint32_t index = offset >> 2;
switch (index) {
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 43/59] hw/net/imx_fec: Trace with QOM path where easily possible
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (41 preceding siblings ...)
2026-10-27 19:23 ` [PULL 42/59] hw/usb/imx-usb-phy: " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 44/59] hw/net/lan9118_phy: Trace with QOM path Philippe Mathieu-Daudé
` (15 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Some i.MX SoCs have multiple i.MX network IP blocks. Allow to
distinguish them via their QOM path when tracing.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-41-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/net/imx_fec.c | 28 +++++++++++++++-------------
hw/net/trace-events | 24 ++++++++++++------------
2 files changed, 27 insertions(+), 25 deletions(-)
diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index c177b7ff2b7b..fb8bcd52d203 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -248,7 +248,7 @@ static uint32_t imx_phy_read(IMXFECState *s, int reg)
if (s->phy_consumer && phy == s->phy_consumer->phy_num) {
s = s->phy_consumer;
} else {
- trace_imx_phy_read_num(phy, s->phy_num);
+ trace_imx_phy_read_num(DEVICE(s)->canonical_path, phy, s->phy_num);
return 0xffff;
}
}
@@ -270,7 +270,7 @@ static void imx_phy_write(IMXFECState *s, int reg, uint32_t val)
if (s->phy_consumer && phy == s->phy_consumer->phy_num) {
s = s->phy_consumer;
} else {
- trace_imx_phy_write_num(phy, s->phy_num);
+ trace_imx_phy_write_num(DEVICE(s)->canonical_path, phy, s->phy_num);
return;
}
}
@@ -364,7 +364,7 @@ static void imx_fec_do_tx(IMXFECState *s)
if ((bd.flags & ENET_BD_R) == 0) {
/* Run out of descriptors to transmit. */
- trace_imx_eth_tx_bd_busy();
+ trace_imx_eth_tx_bd_busy(DEVICE(s)->canonical_path);
break;
}
@@ -446,7 +446,7 @@ static void imx_enet_do_tx(IMXFECState *s, uint32_t index)
if ((bd.flags & ENET_BD_R) == 0) {
/* Run out of descriptors to transmit. */
- trace_imx_eth_tx_bd_busy();
+ trace_imx_eth_tx_bd_busy(DEVICE(s)->canonical_path);
break;
}
@@ -521,7 +521,7 @@ static void imx_eth_enable_rx(IMXFECState *s, bool flush)
s->regs[ENET_RDAR] = (bd.flags & ENET_BD_E) ? ENET_RDAR_RDAR : 0;
if (!s->regs[ENET_RDAR]) {
- trace_imx_eth_rx_bd_full();
+ trace_imx_eth_rx_bd_full(DEVICE(s)->canonical_path);
} else if (flush) {
qemu_flush_queued_packets(qemu_get_queue(s->nic));
}
@@ -659,7 +659,8 @@ static uint64_t imx_eth_read(void *opaque, hwaddr offset, unsigned size)
break;
}
- trace_imx_eth_read(index, imx_eth_reg_name(s, index), value);
+ trace_imx_eth_read(DEVICE(s)->canonical_path, index,
+ imx_eth_reg_name(s, index), value);
return value;
}
@@ -767,7 +768,8 @@ static void imx_eth_write(void *opaque, hwaddr offset, uint64_t value,
const bool single_tx_ring = !imx_eth_is_multi_tx_ring(s);
uint32_t index = offset >> 2;
- trace_imx_eth_write(index, imx_eth_reg_name(s, index), value);
+ trace_imx_eth_write(DEVICE(s)->canonical_path, index,
+ imx_eth_reg_name(s, index), value);
switch (index) {
case ENET_EIR:
@@ -951,7 +953,7 @@ static ssize_t imx_fec_receive(NetClientState *nc, const uint8_t *buf,
unsigned int buf_len;
size_t size = len;
- trace_imx_fec_receive(size);
+ trace_imx_fec_receive(DEVICE(s)->canonical_path, size);
if (!s->regs[ENET_RDAR]) {
qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Unexpected packet\n",
@@ -993,7 +995,7 @@ static ssize_t imx_fec_receive(NetClientState *nc, const uint8_t *buf,
bd.length = buf_len;
size -= buf_len;
- trace_imx_fec_receive_len(addr, bd.length);
+ trace_imx_fec_receive_len(DEVICE(s)->canonical_path, addr, bd.length);
/* The last 4 bytes are the CRC. */
if (size < 4) {
@@ -1013,7 +1015,7 @@ static ssize_t imx_fec_receive(NetClientState *nc, const uint8_t *buf,
/* Last buffer in frame. */
bd.flags |= flags | ENET_BD_L;
- trace_imx_fec_receive_last(bd.flags);
+ trace_imx_fec_receive_last(DEVICE(s)->canonical_path, bd.flags);
s->regs[ENET_EIR] |= ENET_INT_RXF;
} else {
@@ -1047,7 +1049,7 @@ static ssize_t imx_enet_receive(NetClientState *nc, const uint8_t *buf,
size_t size = len;
bool shift16 = s->regs[ENET_RACC] & ENET_RACC_SHIFT16;
- trace_imx_enet_receive(size);
+ trace_imx_enet_receive(DEVICE(s)->canonical_path, size);
if (!s->regs[ENET_RDAR]) {
qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Unexpected packet\n",
@@ -1093,7 +1095,7 @@ static ssize_t imx_enet_receive(NetClientState *nc, const uint8_t *buf,
bd.length = buf_len;
size -= buf_len;
- trace_imx_enet_receive_len(addr, bd.length);
+ trace_imx_enet_receive_len(DEVICE(s)->canonical_path, addr, bd.length);
/* The last 4 bytes are the CRC. */
if (size < 4) {
@@ -1131,7 +1133,7 @@ static ssize_t imx_enet_receive(NetClientState *nc, const uint8_t *buf,
/* Last buffer in frame. */
bd.flags |= flags | ENET_BD_L;
- trace_imx_enet_receive_last(bd.flags);
+ trace_imx_enet_receive_last(DEVICE(s)->canonical_path, bd.flags);
/* Indicate that we've updated the last buffer descriptor. */
bd.last_buffer = ENET_BD_BDU;
diff --git a/hw/net/trace-events b/hw/net/trace-events
index 001a20b0e2ac..81af808044e1 100644
--- a/hw/net/trace-events
+++ b/hw/net/trace-events
@@ -444,20 +444,20 @@ i82596_ca_init(uint32_t scb, uint8_t mode, uint32_t base) "CA: Init - SCB=0x%08x
i82596_ioport_write(uint32_t addr, uint32_t val) "IO write addr=0x%08x val=0x%08x"
# imx_fec.c
-imx_phy_read_num(int phy, int configured) "read request from unconfigured phy %d (configured %d)"
-imx_phy_write_num(int phy, int configured) "write request to unconfigured phy %d (configured %d)"
+imx_phy_read_num(const char *path, int phy, int configured) "%s: read request from unconfigured phy %d (configured %d)"
+imx_phy_write_num(const char *path, int phy, int configured) "%s: write request to unconfigured phy %d (configured %d)"
imx_fec_read_bd(uint64_t addr, int flags, int len, int data) "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x"
imx_enet_read_bd(uint64_t addr, int flags, int len, int data, int options, int status) "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x option 0x%04x status 0x%04x"
-imx_eth_tx_bd_busy(void) "tx_bd ran out of descriptors to transmit"
-imx_eth_rx_bd_full(void) "RX buffer is full"
-imx_eth_read(int reg, const char *reg_name, uint32_t value) "reg[%d:%s] => 0x%08"PRIx32
-imx_eth_write(int reg, const char *reg_name, uint64_t value) "reg[%d:%s] <= 0x%08"PRIx64
-imx_fec_receive(size_t size) "len %zu"
-imx_fec_receive_len(uint64_t addr, int len) "rx_bd 0x%"PRIx64" length %d"
-imx_fec_receive_last(int last) "rx frame flags 0x%04x"
-imx_enet_receive(size_t size) "len %zu"
-imx_enet_receive_len(uint64_t addr, int len) "rx_bd 0x%"PRIx64" length %d"
-imx_enet_receive_last(int last) "rx frame flags 0x%04x"
+imx_eth_tx_bd_busy(const char *path) "%s: tx_bd ran out of descriptors to transmit"
+imx_eth_rx_bd_full(const char *path) "%s: RX buffer is full"
+imx_eth_read(const char *path, int reg, const char *reg_name, uint32_t value) "%s: reg[%d:%s] => 0x%08"PRIx32
+imx_eth_write(const char *path, int reg, const char *reg_name, uint64_t value) "%s: reg[%d:%s] <= 0x%08"PRIx64
+imx_fec_receive(const char *path, size_t size) "%s: len %zu"
+imx_fec_receive_len(const char *path, uint64_t addr, int len) "%s: rx_bd 0x%"PRIx64" length %d"
+imx_fec_receive_last(const char *path, int last) "%s: rx frame flags 0x%04x"
+imx_enet_receive(const char *path, size_t size) "%s: len %zu"
+imx_enet_receive_len(const char *path, uint64_t addr, int len) "%s, rx_bd 0x%"PRIx64" length %d"
+imx_enet_receive_last(const char *path, int last) "%s: rx frame flags 0x%04x"
# npcm7xx_emc.c
npcm7xx_emc_reset(int emc_num) "Resetting emc%d"
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 44/59] hw/net/lan9118_phy: Trace with QOM path
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (42 preceding siblings ...)
2026-10-27 19:23 ` [PULL 43/59] hw/net/imx_fec: Trace with QOM path where easily possible Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 45/59] hw/watchdog/wdt_imx2: " Philippe Mathieu-Daudé
` (14 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
Some i.MX SoCs have multiple i.MX network IP blocks which in QEMU use
the LAN9118 Phy. Allow to distinguish them via their QOM path when
tracing.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-42-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/net/lan9118_phy.c | 10 +++++-----
hw/net/trace-events | 9 +++++----
2 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/hw/net/lan9118_phy.c b/hw/net/lan9118_phy.c
index 2fc027d112cc..ee87a51241d1 100644
--- a/hw/net/lan9118_phy.c
+++ b/hw/net/lan9118_phy.c
@@ -85,14 +85,14 @@ uint16_t lan9118_phy_read(Lan9118PhyState *s, int reg)
break;
}
- trace_lan9118_phy_read(val, reg);
+ trace_lan9118_phy_read(DEVICE(s)->canonical_path, val, reg);
return val;
}
void lan9118_phy_write(Lan9118PhyState *s, int reg, uint16_t val)
{
- trace_lan9118_phy_write(val, reg);
+ trace_lan9118_phy_write(DEVICE(s)->canonical_path, val, reg);
switch (reg) {
case MII_BMCR:
@@ -138,11 +138,11 @@ void lan9118_phy_update_link(Lan9118PhyState *s, bool link_down)
/* Autonegotiation status mirrors link status. */
if (link_down) {
- trace_lan9118_phy_update_link("down");
+ trace_lan9118_phy_link_down(DEVICE(s)->canonical_path);
s->status &= ~(MII_BMSR_AN_COMP | MII_BMSR_LINK_ST);
s->ints |= PHY_INT_DOWN;
} else {
- trace_lan9118_phy_update_link("up");
+ trace_lan9118_phy_link_up(DEVICE(s)->canonical_path);
s->status |= MII_BMSR_AN_COMP | MII_BMSR_LINK_ST;
s->ints |= PHY_INT_ENERGYON;
s->ints |= PHY_INT_AUTONEG_COMPLETE;
@@ -152,7 +152,7 @@ void lan9118_phy_update_link(Lan9118PhyState *s, bool link_down)
void lan9118_phy_reset(Lan9118PhyState *s)
{
- trace_lan9118_phy_reset();
+ trace_lan9118_phy_reset(DEVICE(s)->canonical_path);
s->control = MII_BMCR_AUTOEN | MII_BMCR_SPEED100;
s->status = MII_BMSR_100TX_FD
diff --git a/hw/net/trace-events b/hw/net/trace-events
index 81af808044e1..839a612d3569 100644
--- a/hw/net/trace-events
+++ b/hw/net/trace-events
@@ -11,10 +11,11 @@ allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) "MMIO read: offset=0x%"
allwinner_sun8i_emac_write(uint64_t offset, uint64_t val) "MMIO write: offset=0x%" PRIx64 " value=0x%" PRIx64
# lan9118_phy.c
-lan9118_phy_read(uint16_t val, int reg) "[0x%02x] -> 0x%04" PRIx16
-lan9118_phy_write(uint16_t val, int reg) "[0x%02x] <- 0x%04" PRIx16
-lan9118_phy_update_link(const char *s) "%s"
-lan9118_phy_reset(void) ""
+lan9118_phy_read(const char *path, uint16_t val, int reg) "%s: [0x%02x] -> 0x%04" PRIx16
+lan9118_phy_write(const char *path, uint16_t val, int reg) "%s: [0x%02x] <- 0x%04" PRIx16
+lan9118_phy_link_down(const char *path) "%s"
+lan9118_phy_link_up(const char *path) "%s"
+lan9118_phy_reset(const char *path) "%s"
# lance.c
lance_mem_readw(uint64_t addr, uint32_t ret) "addr=0x%"PRIx64"val=0x%04x"
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 45/59] hw/watchdog/wdt_imx2: Trace with QOM path
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (43 preceding siblings ...)
2026-10-27 19:23 ` [PULL 44/59] hw/net/lan9118_phy: Trace with QOM path Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 46/59] hw/arm: remove pci-bridge/pci_expander_bridge.h from virt.c Philippe Mathieu-Daudé
` (13 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Bernhard Beschow <shentey@gmail.com>
SoCs such as the i.MX8M Plus have several of these watchdog devices.
Allow to distinguish the instances when tracing.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260921214710.29422-43-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/watchdog/wdt_imx2.c | 8 ++++----
hw/watchdog/trace-events | 8 ++++----
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
index c19f0383ad74..f8129625e582 100644
--- a/hw/watchdog/wdt_imx2.c
+++ b/hw/watchdog/wdt_imx2.c
@@ -23,7 +23,7 @@ static void imx2_wdt_interrupt(void *opaque)
{
IMX2WdtState *s = IMX2_WDT(opaque);
- trace_imx2_wdt_interrupt();
+ trace_imx2_wdt_interrupt(DEVICE(s)->canonical_path);
s->wicr |= IMX2_WDT_WICR_WTIS;
qemu_set_irq(s->irq, 1);
@@ -33,7 +33,7 @@ static void imx2_wdt_expired(void *opaque)
{
IMX2WdtState *s = IMX2_WDT(opaque);
- trace_imx2_wdt_expired();
+ trace_imx2_wdt_expired(DEVICE(s)->canonical_path);
s->wrsr = IMX2_WDT_WRSR_TOUT;
@@ -90,7 +90,7 @@ static uint64_t imx2_wdt_read(void *opaque, hwaddr addr, unsigned int size)
break;
}
- trace_imx2_wdt_read(addr, value);
+ trace_imx2_wdt_read(DEVICE(s)->canonical_path, addr, value);
return value;
}
@@ -149,7 +149,7 @@ static void imx2_wdt_write(void *opaque, hwaddr addr,
{
IMX2WdtState *s = IMX2_WDT(opaque);
- trace_imx2_wdt_write(addr, value);
+ trace_imx2_wdt_write(DEVICE(s)->canonical_path, addr, value);
switch (addr) {
case IMX2_WDT_WCR:
diff --git a/hw/watchdog/trace-events b/hw/watchdog/trace-events
index b388f7b2506f..5963943d5dc2 100644
--- a/hw/watchdog/trace-events
+++ b/hw/watchdog/trace-events
@@ -18,10 +18,10 @@ aspeed_wdt_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d"
aspeed_wdt_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size=%d value=0x%"PRIx64
# wdt_imx2.c
-imx2_wdt_read(uint32_t addr, uint16_t data) "[0x%" PRIx32 "] -> 0x%" PRIx16
-imx2_wdt_write(uint32_t addr, uint16_t data) "[0x%" PRIx32 "] <- 0x%" PRIx16
-imx2_wdt_interrupt(void) ""
-imx2_wdt_expired(void) ""
+imx2_wdt_read(const char *qom_path, uint32_t addr, uint16_t data) "%s: [0x%" PRIx32 "] -> 0x%" PRIx16
+imx2_wdt_write(const char *qom_path, uint32_t addr, uint16_t data) "%s: [0x%" PRIx32 "] <- 0x%" PRIx16
+imx2_wdt_interrupt(const char *qom_path) "%s"
+imx2_wdt_expired(const char *qom_path) "%s"
# spapr_watchdog.c
spapr_watchdog_start(uint64_t flags, uint64_t num, uint64_t timeout) "Flags 0x%" PRIx64 " num=%" PRId64 " %" PRIu64 "ms"
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 46/59] hw/arm: remove pci-bridge/pci_expander_bridge.h from virt.c
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (44 preceding siblings ...)
2026-10-27 19:23 ` [PULL 45/59] hw/watchdog/wdt_imx2: " Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 47/59] MAINTAINERS: Update Gustavo's email address Philippe Mathieu-Daudé
` (12 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Daniel P. Berrangé <berrange@redhat.com>
This include is redundant as the function is declares is not
referenced.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260928095646.3555447-2-berrange@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/arm/virt.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 0d56197dacee..3ab3ad8c3b64 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -58,7 +58,6 @@
#include "qemu/module.h"
#include "hw/pci/pci_bus.h"
#include "hw/pci-host/gpex.h"
-#include "hw/pci-bridge/pci_expander_bridge.h"
#include "hw/virtio/virtio-pci.h"
#include "hw/core/sysbus-fdt.h"
#include "hw/core/platform-bus.h"
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 47/59] MAINTAINERS: Update Gustavo's email address
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (45 preceding siblings ...)
2026-10-27 19:23 ` [PULL 46/59] hw/arm: remove pci-bridge/pci_expander_bridge.h from virt.c Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 48/59] hw/char/sh_serial: fix RDF flag clear on FIFO reset Philippe Mathieu-Daudé
` (11 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Gustavo Romero <gromero@redhat.com>
Update my email address to my current Red Hat address.
Signed-off-by: Gustavo Romero <gromero@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261002185538.1020233-1-gromero@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 78d1663f09b4..13c21595e61e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2307,7 +2307,7 @@ F: docs/specs/*pci*
F: docs/system/sriov.rst
ARM PCI Hotplug
-M: Gustavo Romero <gustavo.romero@linaro.org>
+M: Gustavo Romero <gromero@redhat.com>
L: qemu-arm@nongnu.org
S: Supported
F: tests/functional/aarch64/test_hotplug_pci.py
@@ -3183,7 +3183,7 @@ F: include/hw/hyperv/dynmem-proto.h
F: include/hw/hyperv/hv-balloon.h
ivshmem-flat
-M: Gustavo Romero <gustavo.romero@linaro.org>
+M: Gustavo Romero <gromero@redhat.com>
S: Maintained
F: hw/misc/ivshmem-flat.c
F: include/hw/misc/ivshmem-flat.h
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 48/59] hw/char/sh_serial: fix RDF flag clear on FIFO reset
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (46 preceding siblings ...)
2026-10-27 19:23 ` [PULL 47/59] MAINTAINERS: Update Gustavo's email address Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 49/59] hw/char/sh_serial: use rx_cnt for available FIFO space Philippe Mathieu-Daudé
` (10 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Marc-André Lureau <marcandre.lureau@redhat.com>
The FCR write handler cleared bit 1 of the status register (sr) instead
of the SH_SERIAL_FLAG_RDF flag in the flags field. This meant the
"receive data full" condition was never actually cleared when the guest
reset the FIFO.
Reported-by: Pavee Hui <phui@google.com>
Fixes: 63242a007a18 ("SH4: Serial controller improvement")
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Yoshinori Sato <yoshinori.sato@nifty.com>
Message-ID: <20261004-issue-4560-v1-36-ccbef537cbeb@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/char/sh_serial.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c
index 10f96e3a44bc..30a22ea2d1c0 100644
--- a/hw/char/sh_serial.c
+++ b/hw/char/sh_serial.c
@@ -175,7 +175,7 @@ static void sh_serial_write(void *opaque, hwaddr offs,
}
if (val & (1 << 1)) {
sh_serial_clear_fifo(s);
- s->sr &= ~(1 << 1);
+ s->flags &= ~SH_SERIAL_FLAG_RDF;
}
return;
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 49/59] hw/char/sh_serial: use rx_cnt for available FIFO space
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (47 preceding siblings ...)
2026-10-27 19:23 ` [PULL 48/59] hw/char/sh_serial: fix RDF flag clear on FIFO reset Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 50/59] hw/char/sh_serial: fix break detection flag Philippe Mathieu-Daudé
` (9 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Marc-André Lureau <marcandre.lureau@redhat.com>
sh_serial_can_receive() used rx_head (the circular buffer write pointer)
to compute available space. Since rx_head wraps around, this could
overestimate or underestimate the remaining capacity. Use rx_cnt, which
tracks the actual number of buffered bytes.
Reported-by: Pavee Hui <phui@google.com>
Fixes: 543671d9907f ("hw/char/sh_serial: Return correct number of empty RX FIFO elements")
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Yoshinori Sato <yoshinori.sato@nifty.com>
Message-ID: <20261004-issue-4560-v1-37-ccbef537cbeb@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/char/sh_serial.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c
index 30a22ea2d1c0..8728842b84e0 100644
--- a/hw/char/sh_serial.c
+++ b/hw/char/sh_serial.c
@@ -316,7 +316,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs,
static int sh_serial_can_receive(SHSerialState *s)
{
- return s->scr & (1 << 4) ? SH_RX_FIFO_LENGTH - s->rx_head : 0;
+ return s->scr & (1 << 4) ? SH_RX_FIFO_LENGTH - s->rx_cnt : 0;
}
static void sh_serial_receive_break(SHSerialState *s)
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 50/59] hw/char/sh_serial: fix break detection flag
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (48 preceding siblings ...)
2026-10-27 19:23 ` [PULL 49/59] hw/char/sh_serial: use rx_cnt for available FIFO space Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name Philippe Mathieu-Daudé
` (8 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Marc-André Lureau <marcandre.lureau@redhat.com>
sh_serial_receive_break() set bit 4 of the status register (sr) instead
of SH_SERIAL_FLAG_BRK (bit 3) in the flags field. The read path checks
flags, not sr, so break events were never visible to the guest.
Fixes: 63242a007a18 ("SH4: Serial controller improvement")
Reported-by: Pavee Hui <phui@google.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Yoshinori Sato <yoshinori.sato@nifty.com>
Message-ID: <20261004-issue-4560-v1-38-ccbef537cbeb@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/char/sh_serial.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c
index 8728842b84e0..8933af24be10 100644
--- a/hw/char/sh_serial.c
+++ b/hw/char/sh_serial.c
@@ -322,7 +322,7 @@ static int sh_serial_can_receive(SHSerialState *s)
static void sh_serial_receive_break(SHSerialState *s)
{
if (s->feat & SH_SERIAL_FEAT_SCIF) {
- s->sr |= (1 << 4);
+ s->flags |= SH_SERIAL_FLAG_BRK;
}
}
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (49 preceding siblings ...)
2026-10-27 19:23 ` [PULL 50/59] hw/char/sh_serial: fix break detection flag Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-28 1:01 ` Richard Henderson
2026-10-27 19:23 ` [PULL 52/59] hw/pci-host/aspeed_pcie: Fix global MSI setting during class initialization Philippe Mathieu-Daudé
` (7 subsequent siblings)
58 siblings, 1 reply; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
'debug-threads' option for -name was deprecated in v11.0
(commit 1b65aeed2a0 "system: unconditionally enable thread
naming") thus can now be removed.
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dave@treblig.org>
Message-Id: <20261018232917.7716-1-philmd@oss.qualcomm.com>
---
docs/about/deprecated.rst | 7 -------
docs/about/removed-features.rst | 9 +++++++--
system/vl.c | 11 -----------
tests/qtest/migration/framework.c | 4 ++--
tests/qtest/migration/precopy-tests.c | 2 +-
qemu-options.hx | 7 +++----
6 files changed, 13 insertions(+), 27 deletions(-)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index 153fe118151c..ffcbe624a4e9 100644
--- a/docs/about/deprecated.rst
+++ b/docs/about/deprecated.rst
@@ -54,13 +54,6 @@ as short-form boolean values, and passed to plugins as ``arg_name=on``.
However, short-form booleans are deprecated and full explicit ``arg_name=on``
form is preferred.
-``debug-threads`` option for ``-name`` (since 11.0)
-'''''''''''''''''''''''''''''''''''''''''''''''''''
-
-The ``debug-threads`` option of the ``-name`` argument is now
-ignored. Thread naming is unconditionally enabled for all platforms
-where it is supported.
-
``-mon`` option (since 11.1)
''''''''''''''''''''''''''''
diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst
index 6a9944a0c794..cd4f3338bccf 100644
--- a/docs/about/removed-features.rst
+++ b/docs/about/removed-features.rst
@@ -578,6 +578,11 @@ kernel since 2001. None of the board types QEMU supports need
Keeping 32-bit host support alive was a substantial burden for the
QEMU project. Thus QEMU dropped all support for all 32-bit host systems.
+``debug-threads`` option for ``-name`` (removed in 11.2)
+''''''''''''''''''''''''''''''''''''''''''''''''''''''''
+
+Thread naming is unconditionally enabled for all platforms where it
+is supported.
User-mode emulator command line arguments
-----------------------------------------
@@ -779,8 +784,8 @@ values could be assigned to integer device properties or vice versa.
Removed with no replacement, as it reported only a limited set of
threads (for example, it only reported source side of multifd threads,
without reporting any destination threads, or non-multifd source
-threads). For debugging purpose, please use ``-name
-$VM,debug-threads=on`` instead.
+threads). For debugging purpose, thread names are unconditionally
+enabled where supported.
``migrate`` argument ``detach`` (removed in 11.0)
''''''''''''''''''''''''''''''''''''''''''''''''''
diff --git a/system/vl.c b/system/vl.c
index 468a9fc247ac..e766402f7e19 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -403,11 +403,6 @@ static QemuOptsList qemu_name_opts = {
.name = "process",
.type = QEMU_OPT_STRING,
.help = "Sets the name of the QEMU process, as shown in top etc",
- }, {
- .name = "debug-threads",
- .type = QEMU_OPT_BOOL,
- .help = "Enable thread names"
- "(deprecated, always enabled where supported)",
},
{ /* End of list */ }
},
@@ -556,12 +551,6 @@ static int parse_name(void *opaque, QemuOpts *opts, Error **errp)
{
const char *proc_name;
- if (qemu_opt_get(opts, "debug-threads") &&
- !qemu_opt_get_bool(opts, "debug-threads", false)) {
- fprintf(stderr, "Ignoring deprecated 'debug-threads=no' option, " \
- "thread naming is unconditionally enabled\n");
- }
-
qemu_name = qemu_opt_get(opts, "guest");
proc_name = qemu_opt_get(opts, "process");
diff --git a/tests/qtest/migration/framework.c b/tests/qtest/migration/framework.c
index b7aef6b21cbb..fbe1e1f247d6 100644
--- a/tests/qtest/migration/framework.c
+++ b/tests/qtest/migration/framework.c
@@ -413,7 +413,7 @@ int migrate_args(char **from, char **to, MigrateStart *args)
cmd_source = g_strdup_printf("-accel kvm%s -accel tcg "
"-machine %s,%s "
- "-name source,debug-threads=on "
+ "-name source "
"%s "
"-serial file:%s/src_serial "
"%s %s %s",
@@ -433,7 +433,7 @@ int migrate_args(char **from, char **to, MigrateStart *args)
cmd_target = g_strdup_printf("-accel kvm%s -accel tcg "
"-machine %s,%s "
- "-name target,debug-threads=on "
+ "-name target "
"%s "
"-serial file:%s/dest_serial "
"-incoming defer "
diff --git a/tests/qtest/migration/precopy-tests.c b/tests/qtest/migration/precopy-tests.c
index d57ffcac234d..3298bf026a1a 100644
--- a/tests/qtest/migration/precopy-tests.c
+++ b/tests/qtest/migration/precopy-tests.c
@@ -807,7 +807,7 @@ static QTestState *dirtylimit_start_vm(void)
bootpath = bootfile_create(qtest_get_arch(), tmpfs, false);
cmd = g_strdup_printf("-accel kvm,dirty-ring-size=4096 "
- "-name dirtylimit-test,debug-threads=on "
+ "-name dirtylimit-test "
"-m 150M -smp 1 "
"-serial file:%s/vm_serial "
"-drive file=%s,format=raw ",
diff --git a/qemu-options.hx b/qemu-options.hx
index f72f30e246d6..c9653ca69daf 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -1376,18 +1376,17 @@ SRST
ERST
DEF("name", HAS_ARG, QEMU_OPTION_name,
- "-name string1[,process=string2][,debug-threads=on|off]\n"
+ "-name string1[,process=string2]\n"
" set the name of the guest\n"
" string1 sets the window title and string2 the process name\n"
- " When debug-threads is enabled, individual threads are given a separate name\n"
" NOTE: The thread names are for debugging and not a stable API.\n",
QEMU_ARCH_ALL)
SRST
``-name name``
Sets the name of the guest. This name will be displayed in the SDL
window caption. The name will also be used for the VNC server. Also
- optionally set the top visible process name in Linux. Naming of
- individual threads can also be enabled on Linux to aid debugging.
+ where supported, set the top visible process name (individual threads
+ are always given a separate name to aid debugging).
ERST
DEF("uuid", HAS_ARG, QEMU_OPTION_uuid,
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 52/59] hw/pci-host/aspeed_pcie: Fix global MSI setting during class initialization
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (50 preceding siblings ...)
2026-10-27 19:23 ` [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 53/59] hw/net/can/flexcan: Fix FLEXCAN_CRCR_MBCRC definition Philippe Mathieu-Daudé
` (6 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Jamin Lin <jamin_lin@aspeedtech.com>
The ASPEED PCIe class may be registered for machines that do not
instantiate a PCIe root complex. Updating the global msi_nonbroken
flag from class_init() therefore affects unrelated machines.
Defer the update to the per-device realize handler, so the flag
changes only when an ASPEED PCIe root complex is actually
instantiated.
Cc: qemu-stable@nongnu.org
Fixes: f002aa35f320 ("hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge")
Reported-by: Marcelo Manzo <marcelomanzo@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Marcelo Manzo <marcelomanzo@gmail.com>
Tested-by: Marcelo Manzo <marcelomanzo@gmail.com>
Message-ID: <20261020033755.2618640-1-jamin_lin@aspeedtech.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/pci-host/aspeed_pcie.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/aspeed_pcie.c b/hw/pci-host/aspeed_pcie.c
index b46eb74234bb..ceb010f21338 100644
--- a/hw/pci-host/aspeed_pcie.c
+++ b/hw/pci-host/aspeed_pcie.c
@@ -181,6 +181,8 @@ static void aspeed_pcie_rc_realize(DeviceState *dev, Error **errp)
g_autofree char *dram_alias_name = NULL;
g_autofree char *root_bus_name = NULL;
+ msi_nonbroken = true;
+
/* PCI configuration space */
pcie_host_mmcfg_init(pex, PCIE_MMCFG_SIZE_MAX);
sysbus_init_mmio(sbd, &pex->mmio);
@@ -294,8 +296,6 @@ static void aspeed_pcie_rc_class_init(ObjectClass *klass, const void *data)
hc->root_bus_path = aspeed_pcie_rc_root_bus_path;
device_class_set_props(dc, aspeed_pcie_rc_props);
-
- msi_nonbroken = true;
}
/*
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 53/59] hw/net/can/flexcan: Fix FLEXCAN_CRCR_MBCRC definition
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (51 preceding siblings ...)
2026-10-27 19:23 ` [PULL 52/59] hw/pci-host/aspeed_pcie: Fix global MSI setting during class initialization Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 54/59] hw/net/cadence_gem: Check guest-provided queue numbers in screening registers Philippe Mathieu-Daudé
` (5 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Peter Maydell <peter.maydell@linaro.org>
FLEXCAN_CRC_MBCRC is defined as
(((x) & FLEXCAN_CRCR_MBCRC_MASK) << 16)
but FLEXCAN_CRCRC_MBCRC_MASK is (like the other _MASK values
in this header) defined to be an in-place mask
FLEXCAN_GENMASK(22, 16)
(a value with bits set from 16 to 22). The mask and shift operations
are done in the wrong order, and so the result of the macro can only
ever be zero.
Fix the macro to shift first and mask second.
Cc: qemu-stable@nongnu.org
Fixes: 3c4e23cbb597 ("hw/net/can/flexcan: NXP FlexCAN core emulation")
Resolves: Coverity CID 1662973
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Matyas Bobek <matyas.bobek@gmail.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-ID: <20261022195924.672606-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/net/can/flexcan_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/net/can/flexcan_regs.h b/hw/net/can/flexcan_regs.h
index c18bc4736e5b..7923bf836ff8 100644
--- a/hw/net/can/flexcan_regs.h
+++ b/hw/net/can/flexcan_regs.h
@@ -150,7 +150,7 @@
/* FLEXCAN CRC Register (CRCR) bits */
#define FLEXCAN_CRCR_MBCRC_MASK FLEXCAN_GENMASK(22, 16)
-#define FLEXCAN_CRCR_MBCRC(x) (((x) & FLEXCAN_CRCR_MBCRC_MASK) << 16)
+#define FLEXCAN_CRCR_MBCRC(x) (((x) << 16) & FLEXCAN_CRCR_MBCRC_MASK)
#define FLEXCAN_CRCR_TXCRC_MASK FLEXCAN_GENMASK(14, 0)
#define FLEXCAN_CRCR_TXCRC(x) ((x) & FLEXCAN_CRCR_TXCRC_MASK)
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 54/59] hw/net/cadence_gem: Check guest-provided queue numbers in screening registers
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (52 preceding siblings ...)
2026-10-27 19:23 ` [PULL 53/59] hw/net/can/flexcan: Fix FLEXCAN_CRCR_MBCRC definition Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 55/59] hw/misc/allwinner-h3-dramc: Avoid shift by negative amount Philippe Mathieu-Daudé
` (4 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Peter Maydell <peter.maydell@linaro.org>
The Cadence GEM allows the guest to program "screening registers"
which control which queue received network data should be sent to.
The field for the queue number in these registers is 4 bits, but the
device might not actually have that many queues. We weren't checking
this, which meant the guest could program a value that caused us to
index off the end of various arrays.
Check against num_priority_queues, and treat out-of-range values
as if the screen didn't match (i.e. go to queue 0). (This is a
best guess at reasonable behaviour since I don't have access to
a datasheet for this device.)
Cc: qemu-stable@nongnu.org
Fixes: e8e4994313b7 ("cadence_gem: Add support for screening")
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4363
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261023153106.1710228-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/net/cadence_gem.c | 21 +++++++++++++++++----
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 39e3620ef5ba..9a94b3b8ca4c 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -854,6 +854,7 @@ static int get_queue_from_screen(CadenceGEMState *s, uint8_t *rxbuf_ptr,
uint32_t reg;
bool matched, mismatched;
int i, j;
+ int queue = 0; /* default to queue 0 if no match */
for (i = 0; i < s->num_type1_screeners; i++) {
reg = s->regs[R_SCREENING_TYPE1_REG0 + i];
@@ -881,7 +882,8 @@ static int get_queue_from_screen(CadenceGEMState *s, uint8_t *rxbuf_ptr,
}
if (matched && !mismatched) {
- return FIELD_EX32(reg, SCREENING_TYPE1_REG0, QUEUE_NUM);
+ queue = FIELD_EX32(reg, SCREENING_TYPE1_REG0, QUEUE_NUM);
+ goto out;
}
}
@@ -974,12 +976,23 @@ static int get_queue_from_screen(CadenceGEMState *s, uint8_t *rxbuf_ptr,
}
if (matched && !mismatched) {
- return FIELD_EX32(reg, SCREENING_TYPE2_REG0, QUEUE_NUM);
+ queue = FIELD_EX32(reg, SCREENING_TYPE2_REG0, QUEUE_NUM);
+ break;
}
}
- /* We made it here, assume it's queue 0 */
- return 0;
+out:
+ if (queue >= s->num_priority_queues) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "Screening register selected out of range queue %d\n",
+ queue);
+ /*
+ * This is a best guess at reasonable behaviour in the absence
+ * of a datasheet to confirm it.
+ */
+ queue = 0;
+ }
+ return queue;
}
static uint32_t gem_get_queue_base_addr(CadenceGEMState *s, bool tx, int q)
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 55/59] hw/misc/allwinner-h3-dramc: Avoid shift by negative amount
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (53 preceding siblings ...)
2026-10-27 19:23 ` [PULL 54/59] hw/net/cadence_gem: Check guest-provided queue numbers in screening registers Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 56/59] hw/display/xlnx_dp: Make assertions clearer Philippe Mathieu-Daudé
` (3 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Peter Maydell <peter.maydell@linaro.org>
In allwinner_h3_dramc_map_rows(), we take a row_bits count from a
register, and calculate (1 << (row_bits - 3)). If the guest programs
row_bits to less than 3 then this is undefined behaviour.
Treat overly small row_bits values as "doesn't match actual RAM
size".
Fixes: b71d0385e97e ("hw/arm/allwinner-h3: add SDRAM controller device")
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4210
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com>
Message-ID: <20261023153150.1710372-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/misc/allwinner-h3-dramc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/allwinner-h3-dramc.c b/hw/misc/allwinner-h3-dramc.c
index 10d929a3039b..2a4b33aa1826 100644
--- a/hw/misc/allwinner-h3-dramc.c
+++ b/hw/misc/allwinner-h3-dramc.c
@@ -78,7 +78,7 @@ static void allwinner_h3_dramc_map_rows(AwH3DramCtlState *s, uint8_t row_bits,
}
}
- if (s->ram_size == (1 << (row_bits - 3))) {
+ if (row_bits >= 3 && s->ram_size == (1 << (row_bits - 3))) {
/* When row bits is the expected value, remove the mirror */
memory_region_set_enabled(&s->row_mirror_alias, false);
trace_allwinner_h3_dramc_rowmirror_disable();
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 56/59] hw/display/xlnx_dp: Make assertions clearer
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (54 preceding siblings ...)
2026-10-27 19:23 ` [PULL 55/59] hw/misc/allwinner-h3-dramc: Avoid shift by negative amount Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 57/59] qemu/arch-defs: extract QEMU_ARCH_BIT for QEMU_ARCH_* enums Philippe Mathieu-Daudé
` (2 subsequent siblings)
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Peter Maydell <peter.maydell@linaro.org>
The xlnx_dp code has some assertions in its read and write functions
guarding the fallback "read from core_registers[]" codepath. The
array can't be overrun because of the defined size of the memory
region, but the read assert is confusingly written and the write
assert seems to be completely garbled.
Replace both with a simple check against the size the array, which
makes it clear that we're asserting that we won't overflow it.
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4586
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261026152409.2869104-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
hw/display/xlnx_dp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c
index 98126ef320d4..d6b4e7bba612 100644
--- a/hw/display/xlnx_dp.c
+++ b/hw/display/xlnx_dp.c
@@ -795,10 +795,10 @@ static uint64_t xlnx_dp_read(void *opaque, hwaddr offset, unsigned size)
ret = 0;
break;
default:
- assert(offset <= (0x3AC >> 2));
if (offset == (0x3A8 >> 2) || offset == (0x3AC >> 2)) {
ret = s->core_registers[DP_INT_MASK];
} else {
+ assert(offset < ARRAY_SIZE(s->core_registers));
ret = s->core_registers[offset];
}
break;
@@ -969,7 +969,7 @@ static void xlnx_dp_write(void *opaque, hwaddr offset, uint64_t value,
xlnx_dp_update_irq(s);
break;
default:
- assert(offset <= (0x504C >> 2));
+ assert(offset < ARRAY_SIZE(s->core_registers));
s->core_registers[offset] = value;
break;
}
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 57/59] qemu/arch-defs: extract QEMU_ARCH_BIT for QEMU_ARCH_* enums
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (55 preceding siblings ...)
2026-10-27 19:23 ` [PULL 56/59] hw/display/xlnx_dp: Make assertions clearer Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 58/59] qemu/arch-defs: Use SYS_EMU_TARGET__MAX to define QEMU_ARCH_ALL Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 59/59] qemu/arch-defs: increase width of QEMU_ARCH_* masks enums to be 64 bits Philippe Mathieu-Daudé
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261027061504.2213-2-luoyonggang@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/qemu/base-arch-defs.h | 60 ++++++++++++++++++-----------------
1 file changed, 31 insertions(+), 29 deletions(-)
diff --git a/include/qemu/base-arch-defs.h b/include/qemu/base-arch-defs.h
index f33465738c9c..806ad8094a41 100644
--- a/include/qemu/base-arch-defs.h
+++ b/include/qemu/base-arch-defs.h
@@ -9,36 +9,38 @@
#include "qapi/qapi-types-machine.h"
+#define QEMU_ARCH_BIT(target) (1UL << (target))
+
enum {
- QEMU_ARCH_ALPHA = (1UL << SYS_EMU_TARGET_ALPHA),
- QEMU_ARCH_ARM = (1UL << SYS_EMU_TARGET_ARM) |
- (1UL << SYS_EMU_TARGET_AARCH64),
- QEMU_ARCH_I386 = (1UL << SYS_EMU_TARGET_I386) |
- (1UL << SYS_EMU_TARGET_X86_64),
- QEMU_ARCH_M68K = (1UL << SYS_EMU_TARGET_M68K),
- QEMU_ARCH_MICROBLAZE = (1UL << SYS_EMU_TARGET_MICROBLAZE),
- QEMU_ARCH_MIPS = (1UL << SYS_EMU_TARGET_MIPS) |
- (1UL << SYS_EMU_TARGET_MIPSEL) |
- (1UL << SYS_EMU_TARGET_MIPS64) |
- (1UL << SYS_EMU_TARGET_MIPS64EL),
- QEMU_ARCH_PPC = (1UL << SYS_EMU_TARGET_PPC) |
- (1UL << SYS_EMU_TARGET_PPC64),
- QEMU_ARCH_S390X = (1UL << SYS_EMU_TARGET_S390X),
- QEMU_ARCH_SH4 = (1UL << SYS_EMU_TARGET_SH4) |
- (1UL << SYS_EMU_TARGET_SH4EB),
- QEMU_ARCH_SPARC = (1UL << SYS_EMU_TARGET_SPARC) |
- (1UL << SYS_EMU_TARGET_SPARC64),
- QEMU_ARCH_XTENSA = (1UL << SYS_EMU_TARGET_XTENSA) |
- (1UL << SYS_EMU_TARGET_XTENSAEB),
- QEMU_ARCH_OR1K = (1UL << SYS_EMU_TARGET_OR1K),
- QEMU_ARCH_TRICORE = (1UL << SYS_EMU_TARGET_TRICORE),
- QEMU_ARCH_HPPA = (1UL << SYS_EMU_TARGET_HPPA),
- QEMU_ARCH_RISCV = (1UL << SYS_EMU_TARGET_RISCV32) |
- (1UL << SYS_EMU_TARGET_RISCV64),
- QEMU_ARCH_RX = (1UL << SYS_EMU_TARGET_RX),
- QEMU_ARCH_AVR = (1UL << SYS_EMU_TARGET_AVR),
- QEMU_ARCH_HEXAGON = (1UL << SYS_EMU_TARGET_HEXAGON),
- QEMU_ARCH_LOONGARCH = (1UL << SYS_EMU_TARGET_LOONGARCH64),
+ QEMU_ARCH_ALPHA = QEMU_ARCH_BIT(SYS_EMU_TARGET_ALPHA),
+ QEMU_ARCH_ARM = QEMU_ARCH_BIT(SYS_EMU_TARGET_ARM) |
+ QEMU_ARCH_BIT(SYS_EMU_TARGET_AARCH64),
+ QEMU_ARCH_I386 = QEMU_ARCH_BIT(SYS_EMU_TARGET_I386) |
+ QEMU_ARCH_BIT(SYS_EMU_TARGET_X86_64),
+ QEMU_ARCH_M68K = QEMU_ARCH_BIT(SYS_EMU_TARGET_M68K),
+ QEMU_ARCH_MICROBLAZE = QEMU_ARCH_BIT(SYS_EMU_TARGET_MICROBLAZE),
+ QEMU_ARCH_MIPS = QEMU_ARCH_BIT(SYS_EMU_TARGET_MIPS) |
+ QEMU_ARCH_BIT(SYS_EMU_TARGET_MIPSEL) |
+ QEMU_ARCH_BIT(SYS_EMU_TARGET_MIPS64) |
+ QEMU_ARCH_BIT(SYS_EMU_TARGET_MIPS64EL),
+ QEMU_ARCH_PPC = QEMU_ARCH_BIT(SYS_EMU_TARGET_PPC) |
+ QEMU_ARCH_BIT(SYS_EMU_TARGET_PPC64),
+ QEMU_ARCH_S390X = QEMU_ARCH_BIT(SYS_EMU_TARGET_S390X),
+ QEMU_ARCH_SH4 = QEMU_ARCH_BIT(SYS_EMU_TARGET_SH4) |
+ QEMU_ARCH_BIT(SYS_EMU_TARGET_SH4EB),
+ QEMU_ARCH_SPARC = QEMU_ARCH_BIT(SYS_EMU_TARGET_SPARC) |
+ QEMU_ARCH_BIT(SYS_EMU_TARGET_SPARC64),
+ QEMU_ARCH_XTENSA = QEMU_ARCH_BIT(SYS_EMU_TARGET_XTENSA) |
+ QEMU_ARCH_BIT(SYS_EMU_TARGET_XTENSAEB),
+ QEMU_ARCH_OR1K = QEMU_ARCH_BIT(SYS_EMU_TARGET_OR1K),
+ QEMU_ARCH_TRICORE = QEMU_ARCH_BIT(SYS_EMU_TARGET_TRICORE),
+ QEMU_ARCH_HPPA = QEMU_ARCH_BIT(SYS_EMU_TARGET_HPPA),
+ QEMU_ARCH_RISCV = QEMU_ARCH_BIT(SYS_EMU_TARGET_RISCV32) |
+ QEMU_ARCH_BIT(SYS_EMU_TARGET_RISCV64),
+ QEMU_ARCH_RX = QEMU_ARCH_BIT(SYS_EMU_TARGET_RX),
+ QEMU_ARCH_AVR = QEMU_ARCH_BIT(SYS_EMU_TARGET_AVR),
+ QEMU_ARCH_HEXAGON = QEMU_ARCH_BIT(SYS_EMU_TARGET_HEXAGON),
+ QEMU_ARCH_LOONGARCH = QEMU_ARCH_BIT(SYS_EMU_TARGET_LOONGARCH64),
QEMU_ARCH_ALL = UINT32_MAX,
};
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 58/59] qemu/arch-defs: Use SYS_EMU_TARGET__MAX to define QEMU_ARCH_ALL
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (56 preceding siblings ...)
2026-10-27 19:23 ` [PULL 57/59] qemu/arch-defs: extract QEMU_ARCH_BIT for QEMU_ARCH_* enums Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 59/59] qemu/arch-defs: increase width of QEMU_ARCH_* masks enums to be 64 bits Philippe Mathieu-Daudé
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Yonggang Luo <luoyonggang@gmail.com>
This is more precise, so we can iterate all target_arch with QEMU_ARCH_ALL
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261027061504.2213-3-luoyonggang@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/qemu/base-arch-defs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/qemu/base-arch-defs.h b/include/qemu/base-arch-defs.h
index 806ad8094a41..a6478c2d3fff 100644
--- a/include/qemu/base-arch-defs.h
+++ b/include/qemu/base-arch-defs.h
@@ -41,7 +41,7 @@ enum {
QEMU_ARCH_AVR = QEMU_ARCH_BIT(SYS_EMU_TARGET_AVR),
QEMU_ARCH_HEXAGON = QEMU_ARCH_BIT(SYS_EMU_TARGET_HEXAGON),
QEMU_ARCH_LOONGARCH = QEMU_ARCH_BIT(SYS_EMU_TARGET_LOONGARCH64),
- QEMU_ARCH_ALL = UINT32_MAX,
+ QEMU_ARCH_ALL = QEMU_ARCH_BIT(SYS_EMU_TARGET__MAX) - 1,
};
QEMU_BUILD_BUG_ON(SYS_EMU_TARGET__MAX > 32);
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* [PULL 59/59] qemu/arch-defs: increase width of QEMU_ARCH_* masks enums to be 64 bits
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
` (57 preceding siblings ...)
2026-10-27 19:23 ` [PULL 58/59] qemu/arch-defs: Use SYS_EMU_TARGET__MAX to define QEMU_ARCH_ALL Philippe Mathieu-Daudé
@ 2026-10-27 19:23 ` Philippe Mathieu-Daudé
58 siblings, 0 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-27 19:23 UTC (permalink / raw)
To: qemu-devel
From: Yonggang Luo <luoyonggang@gmail.com>
SYS_EMU_TARGET__MAX is already 29, nearing the 32-target limit.
So increase width of QEMU_ARCH_* masks enums and related types;
So that we can add needed Linux user-mode targets to EmuTarget;
And also enabled the possibility add more system-mode targets in future.
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261027061504.2213-4-luoyonggang@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
include/qemu/base-arch-defs.h | 7 ++++---
monitor/monitor-hmp-internal.h | 2 +-
system/arch_init.c | 4 ++--
system/qdev-monitor.c | 2 +-
system/vl.c | 2 +-
5 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/include/qemu/base-arch-defs.h b/include/qemu/base-arch-defs.h
index a6478c2d3fff..f2e3bc542030 100644
--- a/include/qemu/base-arch-defs.h
+++ b/include/qemu/base-arch-defs.h
@@ -9,7 +9,7 @@
#include "qapi/qapi-types-machine.h"
-#define QEMU_ARCH_BIT(target) (1UL << (target))
+#define QEMU_ARCH_BIT(target) (1ULL << (target))
enum {
QEMU_ARCH_ALPHA = QEMU_ARCH_BIT(SYS_EMU_TARGET_ALPHA),
@@ -44,7 +44,8 @@ enum {
QEMU_ARCH_ALL = QEMU_ARCH_BIT(SYS_EMU_TARGET__MAX) - 1,
};
-QEMU_BUILD_BUG_ON(SYS_EMU_TARGET__MAX > 32);
+/* Keep target-specific masks within qemu_opt_set_number()'s int64_t range. */
+QEMU_BUILD_BUG_ON(SYS_EMU_TARGET__MAX > 63);
/**
* qemu_arch_available:
@@ -52,6 +53,6 @@ QEMU_BUILD_BUG_ON(SYS_EMU_TARGET__MAX > 32);
*
* Return whether the current target architecture is contained in @arch_bitmask
*/
-bool qemu_arch_available(uint32_t arch_bitmask);
+bool qemu_arch_available(uint64_t arch_bitmask);
#endif
diff --git a/monitor/monitor-hmp-internal.h b/monitor/monitor-hmp-internal.h
index 4e2430551abf..b61d27170767 100644
--- a/monitor/monitor-hmp-internal.h
+++ b/monitor/monitor-hmp-internal.h
@@ -69,7 +69,7 @@ typedef struct HMPCommand {
* Allow to restrict the command for a particular set of
* target architectures.
*/
- uint32_t arch_bitmask;
+ uint64_t arch_bitmask;
bool coroutine;
} HMPCommand;
diff --git a/system/arch_init.c b/system/arch_init.c
index 1ad2f3d6f78b..b8362b12a6d2 100644
--- a/system/arch_init.c
+++ b/system/arch_init.c
@@ -26,7 +26,7 @@
#include "qemu/bitops.h"
#include "qemu/target-info-qapi.h"
-bool qemu_arch_available(uint32_t arch_bitmask)
+bool qemu_arch_available(uint64_t arch_bitmask)
{
- return extract32(arch_bitmask, target_arch(), 1);
+ return extract64(arch_bitmask, target_arch(), 1);
}
diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c
index 8185822daa71..b3ca619f3c9f 100644
--- a/system/qdev-monitor.c
+++ b/system/qdev-monitor.c
@@ -54,7 +54,7 @@ typedef struct QDevAlias
{
const char *typename;
const char *alias;
- uint32_t arch_mask;
+ uint64_t arch_mask;
} QDevAlias;
/* default virtio transport per architecture */
diff --git a/system/vl.c b/system/vl.c
index e766402f7e19..c40c0596fde3 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -917,7 +917,7 @@ typedef struct QEMUOption {
const char *name;
int flags;
int index;
- uint32_t arch_mask;
+ uint64_t arch_mask;
} QEMUOption;
static const QEMUOption qemu_options[] = {
--
2.55.0
^ permalink raw reply related [flat|nested] 66+ messages in thread
* Re: [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name
2026-10-27 19:23 ` [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name Philippe Mathieu-Daudé
@ 2026-10-28 1:01 ` Richard Henderson
2026-10-28 7:32 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 66+ messages in thread
From: Richard Henderson @ 2026-10-28 1:01 UTC (permalink / raw)
To: qemu-devel
On 10/27/26 14:23, Philippe Mathieu-Daudé wrote:
> 'debug-threads' option for -name was deprecated in v11.0
> (commit 1b65aeed2a0 "system: unconditionally enable thread
> naming") thus can now be removed.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@oss.qualcomm.com>
> Reviewed-by: Pierrick Bouvier<pierrick.bouvier@oss.qualcomm.com>
> Reviewed-by: Ján Tomko<jtomko@redhat.com>
> Reviewed-by: Dr. David Alan Gilbert<dave@treblig.org>
> Message-Id:<20261018232917.7716-1-philmd@oss.qualcomm.com>
> ---
> docs/about/deprecated.rst | 7 -------
> docs/about/removed-features.rst | 9 +++++++--
> system/vl.c | 11 -----------
> tests/qtest/migration/framework.c | 4 ++--
> tests/qtest/migration/precopy-tests.c | 2 +-
> qemu-options.hx | 7 +++----
> 6 files changed, 13 insertions(+), 27 deletions(-)
You need to remove this from the testsuite as well:
https://gitlab.com/qemu-project/qemu/-/jobs/17523155796#L58
r~
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name
2026-10-28 1:01 ` Richard Henderson
@ 2026-10-28 7:32 ` Philippe Mathieu-Daudé
2026-10-28 8:13 ` Richard Henderson
2026-10-28 9:47 ` Daniel P. Berrangé
0 siblings, 2 replies; 66+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-10-28 7:32 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: Peter Xu, Fabiano Rosas, Daniel P. Berrangé,
devel@lists.libvirt.org, Markus Armbruster,
Dr. David Alan Gilbert
(Cc'ing migration compat and libvirt teams)
On 28/10/26 02:01, Richard Henderson wrote:
> On 10/27/26 14:23, Philippe Mathieu-Daudé wrote:
>> 'debug-threads' option for -name was deprecated in v11.0
>> (commit 1b65aeed2a0 "system: unconditionally enable thread
>> naming") thus can now be removed.
>>
>> Signed-off-by: Philippe Mathieu-Daudé<philmd@oss.qualcomm.com>
>> Reviewed-by: Pierrick Bouvier<pierrick.bouvier@oss.qualcomm.com>
>> Reviewed-by: Ján Tomko<jtomko@redhat.com>
>> Reviewed-by: Dr. David Alan Gilbert<dave@treblig.org>
>> Message-Id:<20261018232917.7716-1-philmd@oss.qualcomm.com>
>> ---
>> docs/about/deprecated.rst | 7 -------
>> docs/about/removed-features.rst | 9 +++++++--
>> system/vl.c | 11 -----------
>> tests/qtest/migration/framework.c | 4 ++--
>> tests/qtest/migration/precopy-tests.c | 2 +-
>> qemu-options.hx | 7 +++----
>> 6 files changed, 13 insertions(+), 27 deletions(-)
>
> You need to remove this from the testsuite as well:
>
> https://gitlab.com/qemu-project/qemu/-/jobs/17523155796#L58
Hmm I was surprised because the pipeline in my fork passed, but then
looking clearer this job is marked as "allow_failure: true" for me,
why is it blocking on the mainstream repo?
Back to the test, this is the migration-compat-x86_64 job running
previous release binary vs latest one, so I'd think this is the
expected behavior, v11.0 and v11.1 have that deprecated option, and
we can not test vs v11.2 which removed it.
If we want to change that workflow, then when deprecating on v11.0
we also need to remove the tests coverage, so when we remove the
feature at $deprecation_release+2 the migration-compat test does not
break. Here the question is, do we want to keep testing deprecated
features? Maybe yes in the case of unmaintained area when the
deprecation process triggers new maintainers stepping in and the
deprecation to be cancelled.
We could also mark the feature removed but keep it ignored and
undocumented until the next release but we'll likely forget and
miss that in workflow so I don't recommend that way.
Maybe there are another ways to resolve that but I'm not seeing
them. Ideas?
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name
2026-10-28 7:32 ` Philippe Mathieu-Daudé
@ 2026-10-28 8:13 ` Richard Henderson
2026-10-28 9:47 ` Daniel P. Berrangé
1 sibling, 0 replies; 66+ messages in thread
From: Richard Henderson @ 2026-10-28 8:13 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Peter Xu, Fabiano Rosas, Daniel P. Berrangé,
devel@lists.libvirt.org, Markus Armbruster,
Dr. David Alan Gilbert
On 10/28/26 02:32, Philippe Mathieu-Daudé wrote:
> (Cc'ing migration compat and libvirt teams)
>
> On 28/10/26 02:01, Richard Henderson wrote:
>> On 10/27/26 14:23, Philippe Mathieu-Daudé wrote:
>>> 'debug-threads' option for -name was deprecated in v11.0
>>> (commit 1b65aeed2a0 "system: unconditionally enable thread
>>> naming") thus can now be removed.
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé<philmd@oss.qualcomm.com>
>>> Reviewed-by: Pierrick Bouvier<pierrick.bouvier@oss.qualcomm.com>
>>> Reviewed-by: Ján Tomko<jtomko@redhat.com>
>>> Reviewed-by: Dr. David Alan Gilbert<dave@treblig.org>
>>> Message-Id:<20261018232917.7716-1-philmd@oss.qualcomm.com>
>>> ---
>>> docs/about/deprecated.rst | 7 -------
>>> docs/about/removed-features.rst | 9 +++++++--
>>> system/vl.c | 11 -----------
>>> tests/qtest/migration/framework.c | 4 ++--
>>> tests/qtest/migration/precopy-tests.c | 2 +-
>>> qemu-options.hx | 7 +++----
>>> 6 files changed, 13 insertions(+), 27 deletions(-)
>>
>> You need to remove this from the testsuite as well:
>>
>> https://gitlab.com/qemu-project/qemu/-/jobs/17523155796#L58
>
> Hmm I was surprised because the pipeline in my fork passed, but then
> looking clearer this job is marked as "allow_failure: true" for me,
> why is it blocking on the mainstream repo?
allow_failure is for unstable things, not things that will reliably fail
until they're addressed. The macos job is allow_failure; should we
knowingly allow a commit that leaves that broken?
r~
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name
2026-10-28 7:32 ` Philippe Mathieu-Daudé
2026-10-28 8:13 ` Richard Henderson
@ 2026-10-28 9:47 ` Daniel P. Berrangé
2026-10-28 11:54 ` Peter Xu
1 sibling, 1 reply; 66+ messages in thread
From: Daniel P. Berrangé @ 2026-10-28 9:47 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Richard Henderson, qemu-devel, Peter Xu, Fabiano Rosas,
devel@lists.libvirt.org, Markus Armbruster,
Dr. David Alan Gilbert
On Wed, Oct 28, 2026 at 08:32:20AM +0100, Philippe Mathieu-Daudé wrote:
> (Cc'ing migration compat and libvirt teams)
>
> On 28/10/26 02:01, Richard Henderson wrote:
> > On 10/27/26 14:23, Philippe Mathieu-Daudé wrote:
> > > 'debug-threads' option for -name was deprecated in v11.0
> > > (commit 1b65aeed2a0 "system: unconditionally enable thread
> > > naming") thus can now be removed.
> > >
> > > Signed-off-by: Philippe Mathieu-Daudé<philmd@oss.qualcomm.com>
> > > Reviewed-by: Pierrick Bouvier<pierrick.bouvier@oss.qualcomm.com>
> > > Reviewed-by: Ján Tomko<jtomko@redhat.com>
> > > Reviewed-by: Dr. David Alan Gilbert<dave@treblig.org>
> > > Message-Id:<20261018232917.7716-1-philmd@oss.qualcomm.com>
> > > ---
> > > docs/about/deprecated.rst | 7 -------
> > > docs/about/removed-features.rst | 9 +++++++--
> > > system/vl.c | 11 -----------
> > > tests/qtest/migration/framework.c | 4 ++--
> > > tests/qtest/migration/precopy-tests.c | 2 +-
> > > qemu-options.hx | 7 +++----
> > > 6 files changed, 13 insertions(+), 27 deletions(-)
> >
> > You need to remove this from the testsuite as well:
> >
> > https://gitlab.com/qemu-project/qemu/-/jobs/17523155796#L58
>
> Hmm I was surprised because the pipeline in my fork passed, but then
> looking clearer this job is marked as "allow_failure: true" for me,
> why is it blocking on the mainstream repo?
It isn't blocking on upstream repo, it is allow_failure: true there
too. Manual inspection of the job shows it is a real bug though.
> Back to the test, this is the migration-compat-x86_64 job running
> previous release binary vs latest one, so I'd think this is the
> expected behavior, v11.0 and v11.1 have that deprecated option, and
> we can not test vs v11.2 which removed it.
>
> If we want to change that workflow, then when deprecating on v11.0
> we also need to remove the tests coverage, so when we remove the
> feature at $deprecation_release+2 the migration-compat test does not
> break. Here the question is, do we want to keep testing deprecated
> features? Maybe yes in the case of unmaintained area when the
> deprecation process triggers new maintainers stepping in and the
> deprecation to be cancelled.
>
> We could also mark the feature removed but keep it ignored and
> undocumented until the next release but we'll likely forget and
> miss that in workflow so I don't recommend that way.
>
> Maybe there are another ways to resolve that but I'm not seeing
> them. Ideas?
'debug-threads=on' has no relationship to live migration data
stream, it merely gives the threads names. Just remove this
option from the migration testsuite as it is irrelevant to
what is being tested.
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name
2026-10-28 9:47 ` Daniel P. Berrangé
@ 2026-10-28 11:54 ` Peter Xu
2026-10-28 12:04 ` Daniel P. Berrangé
0 siblings, 1 reply; 66+ messages in thread
From: Peter Xu @ 2026-10-28 11:54 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: Philippe Mathieu-Daudé, Richard Henderson, qemu-devel,
Fabiano Rosas, devel@lists.libvirt.org, Markus Armbruster,
Dr. David Alan Gilbert
On Wed, Oct 28, 2026 at 09:47:43AM +0000, Daniel P. Berrangé wrote:
> On Wed, Oct 28, 2026 at 08:32:20AM +0100, Philippe Mathieu-Daudé wrote:
> > (Cc'ing migration compat and libvirt teams)
> >
> > On 28/10/26 02:01, Richard Henderson wrote:
> > > On 10/27/26 14:23, Philippe Mathieu-Daudé wrote:
> > > > 'debug-threads' option for -name was deprecated in v11.0
> > > > (commit 1b65aeed2a0 "system: unconditionally enable thread
> > > > naming") thus can now be removed.
> > > >
> > > > Signed-off-by: Philippe Mathieu-Daudé<philmd@oss.qualcomm.com>
> > > > Reviewed-by: Pierrick Bouvier<pierrick.bouvier@oss.qualcomm.com>
> > > > Reviewed-by: Ján Tomko<jtomko@redhat.com>
> > > > Reviewed-by: Dr. David Alan Gilbert<dave@treblig.org>
> > > > Message-Id:<20261018232917.7716-1-philmd@oss.qualcomm.com>
> > > > ---
> > > > docs/about/deprecated.rst | 7 -------
> > > > docs/about/removed-features.rst | 9 +++++++--
> > > > system/vl.c | 11 -----------
> > > > tests/qtest/migration/framework.c | 4 ++--
> > > > tests/qtest/migration/precopy-tests.c | 2 +-
> > > > qemu-options.hx | 7 +++----
> > > > 6 files changed, 13 insertions(+), 27 deletions(-)
> > >
> > > You need to remove this from the testsuite as well:
> > >
> > > https://gitlab.com/qemu-project/qemu/-/jobs/17523155796#L58
> >
> > Hmm I was surprised because the pipeline in my fork passed, but then
> > looking clearer this job is marked as "allow_failure: true" for me,
> > why is it blocking on the mainstream repo?
>
> It isn't blocking on upstream repo, it is allow_failure: true there
> too. Manual inspection of the job shows it is a real bug though.
>
> > Back to the test, this is the migration-compat-x86_64 job running
> > previous release binary vs latest one, so I'd think this is the
> > expected behavior, v11.0 and v11.1 have that deprecated option, and
> > we can not test vs v11.2 which removed it.
> >
> > If we want to change that workflow, then when deprecating on v11.0
> > we also need to remove the tests coverage, so when we remove the
> > feature at $deprecation_release+2 the migration-compat test does not
> > break. Here the question is, do we want to keep testing deprecated
> > features? Maybe yes in the case of unmaintained area when the
> > deprecation process triggers new maintainers stepping in and the
> > deprecation to be cancelled.
> >
> > We could also mark the feature removed but keep it ignored and
> > undocumented until the next release but we'll likely forget and
> > miss that in workflow so I don't recommend that way.
> >
> > Maybe there are another ways to resolve that but I'm not seeing
> > them. Ideas?
>
> 'debug-threads=on' has no relationship to live migration data
> stream, it merely gives the threads names. Just remove this
> option from the migration testsuite as it is irrelevant to
> what is being tested.
We're testing with the old migration-test for compat, so Phil doesn't have
an easy way to remove that part:
.migration-compat-common:
...
# Use the migration-tests from the older QEMU tree. This avoids
# testing an old QEMU against new features/tests that it is not
# compatible with.
- cd build-previous
Intentional to avoid new things not working with old QEMU binaries, but
then this will be the case things break if we don't have protection of
2-release deprecation (where we could have removed the usage in test cases
2 releases in advance too when deprecating).
At least two options I see: (1) for this release, we lose compat
protection, we'll need to manually guard it, or (2) we provide some way to
script/patch on top of the build-previous/ build before it builds, in this
case we only need to remove the string in that test alone.
I prefer (2) but I'd apologize in advance I don't have almost any time
upstream before forum (replied this one only because I want to raise the
point of using old test, in case Fabiano's already in PTO), I'm not sure if
someone thinks it worthwhile.
Thanks,
--
Peter Xu
^ permalink raw reply [flat|nested] 66+ messages in thread
* Re: [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name
2026-10-28 11:54 ` Peter Xu
@ 2026-10-28 12:04 ` Daniel P. Berrangé
0 siblings, 0 replies; 66+ messages in thread
From: Daniel P. Berrangé @ 2026-10-28 12:04 UTC (permalink / raw)
To: Peter Xu
Cc: Philippe Mathieu-Daudé, Richard Henderson, qemu-devel,
Fabiano Rosas, devel@lists.libvirt.org, Markus Armbruster,
Dr. David Alan Gilbert
On Wed, Oct 28, 2026 at 07:54:28AM -0400, Peter Xu wrote:
> On Wed, Oct 28, 2026 at 09:47:43AM +0000, Daniel P. Berrangé wrote:
> > On Wed, Oct 28, 2026 at 08:32:20AM +0100, Philippe Mathieu-Daudé wrote:
> > > (Cc'ing migration compat and libvirt teams)
> > >
> > > On 28/10/26 02:01, Richard Henderson wrote:
> > > > On 10/27/26 14:23, Philippe Mathieu-Daudé wrote:
> > > > > 'debug-threads' option for -name was deprecated in v11.0
> > > > > (commit 1b65aeed2a0 "system: unconditionally enable thread
> > > > > naming") thus can now be removed.
> > > > >
> > > > > Signed-off-by: Philippe Mathieu-Daudé<philmd@oss.qualcomm.com>
> > > > > Reviewed-by: Pierrick Bouvier<pierrick.bouvier@oss.qualcomm.com>
> > > > > Reviewed-by: Ján Tomko<jtomko@redhat.com>
> > > > > Reviewed-by: Dr. David Alan Gilbert<dave@treblig.org>
> > > > > Message-Id:<20261018232917.7716-1-philmd@oss.qualcomm.com>
> > > > > ---
> > > > > docs/about/deprecated.rst | 7 -------
> > > > > docs/about/removed-features.rst | 9 +++++++--
> > > > > system/vl.c | 11 -----------
> > > > > tests/qtest/migration/framework.c | 4 ++--
> > > > > tests/qtest/migration/precopy-tests.c | 2 +-
> > > > > qemu-options.hx | 7 +++----
> > > > > 6 files changed, 13 insertions(+), 27 deletions(-)
> > > >
> > > > You need to remove this from the testsuite as well:
> > > >
> > > > https://gitlab.com/qemu-project/qemu/-/jobs/17523155796#L58
> > >
> > > Hmm I was surprised because the pipeline in my fork passed, but then
> > > looking clearer this job is marked as "allow_failure: true" for me,
> > > why is it blocking on the mainstream repo?
> >
> > It isn't blocking on upstream repo, it is allow_failure: true there
> > too. Manual inspection of the job shows it is a real bug though.
> >
> > > Back to the test, this is the migration-compat-x86_64 job running
> > > previous release binary vs latest one, so I'd think this is the
> > > expected behavior, v11.0 and v11.1 have that deprecated option, and
> > > we can not test vs v11.2 which removed it.
> > >
> > > If we want to change that workflow, then when deprecating on v11.0
> > > we also need to remove the tests coverage, so when we remove the
> > > feature at $deprecation_release+2 the migration-compat test does not
> > > break. Here the question is, do we want to keep testing deprecated
> > > features? Maybe yes in the case of unmaintained area when the
> > > deprecation process triggers new maintainers stepping in and the
> > > deprecation to be cancelled.
> > >
> > > We could also mark the feature removed but keep it ignored and
> > > undocumented until the next release but we'll likely forget and
> > > miss that in workflow so I don't recommend that way.
> > >
> > > Maybe there are another ways to resolve that but I'm not seeing
> > > them. Ideas?
> >
> > 'debug-threads=on' has no relationship to live migration data
> > stream, it merely gives the threads names. Just remove this
> > option from the migration testsuite as it is irrelevant to
> > what is being tested.
>
> We're testing with the old migration-test for compat, so Phil doesn't have
> an easy way to remove that part:
>
> .migration-compat-common:
> ...
> # Use the migration-tests from the older QEMU tree. This avoids
> # testing an old QEMU against new features/tests that it is not
> # compatible with.
> - cd build-previous
>
> Intentional to avoid new things not working with old QEMU binaries, but
> then this will be the case things break if we don't have protection of
> 2-release deprecation (where we could have removed the usage in test cases
> 2 releases in advance too when deprecating).
>
> At least two options I see: (1) for this release, we lose compat
> protection, we'll need to manually guard it, or (2) we provide some way to
> script/patch on top of the build-previous/ build before it builds, in this
> case we only need to remove the string in that test alone.
Or (3) push a change to -stable branches to remove debug-threads usage
from old migration-test and use stable HEAD, not the tagged version.
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 66+ messages in thread
end of thread, other threads:[~2026-10-28 12:05 UTC | newest]
Thread overview: 66+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-27 19:22 [PULL 00/59] Misc HW patches for 2026-10-27 Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 01/59] scripts/checkpatch.pl: Don't complain about spaces before Fixes tags Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 02/59] hw/sd/sdcard: Keep high-capacity memory blocks at 512 bytes Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 03/59] hw/watchdog/wdt_imx2: Preserve own locked bits in WCR Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 04/59] hw/watchdog/wdt_imx2: Fix handling of write one once WCR bits Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 05/59] hw/watchdog/wdt_imx2: Clear WDT lock on reset Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 06/59] hw/watchdog/wdt_imx2: Remove redundant attributes Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 07/59] hw/arm/imx8mm-evk: Fix reference count of SoC object Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 08/59] docs, tests/functional: Drop redundant CLI arguments in imx8m*-evk invocations Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 09/59] hw/arm/sabrelite: Have 4 CPUs and 1 GiB of RAM by default Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 10/59] tests/functional/arm: Add console test for `sabrelite` machine Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 11/59] hw/arm/mcimx6ul-evk: Have 512 MiB of RAM by default Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 12/59] hw/arm/mcimx7d-sabre: Have 2 CPUs and 2 GiB " Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 13/59] tests/functional/arm: Add console test for `mcimx7d-sabre` machine Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 14/59] hw/arm/fsl-imx25: Derive from TYPE_SYS_BUS_DEVICE Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 15/59] hw/arm/fsl-imx31: " Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 16/59] hw/arm/fsl-imx6: " Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 17/59] hw/arm/fsl-imx6ul: " Philippe Mathieu-Daudé
2026-10-27 19:22 ` [PULL 18/59] hw/arm/fsl-imx7: " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 19/59] hw/timer/imx_gpt: Wire clock control module via link property Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 20/59] hw/timer/imx_epit: " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 21/59] hw/arm/Kconfig: Select missing UNIMP in config FSL_IMX8MM Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 22/59] hw/misc/Kconfig: Remove redundant USB_EHCI_SYSBUS from config IMX Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 23/59] Kconfig: Extract config IMX_AVIC " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 24/59] Kconfig: Extract config IMX_GPCV2 " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 25/59] Kconfig: Extract config IMX_RNG " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 26/59] Kconfig: Extract config FSL_IMX7_GPR " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 27/59] Kconfig: Extract config FSL_IMX{6, 7}_SRC " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 28/59] Kconfig: Extract config FSL_IMX7_SNVS " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 29/59] Kconfig: Extract dedicated config FSL_IMXx_CCM " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 30/59] Kconfig: Extract config IMX_GPT " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 31/59] Kconfig: Extract config IMX_EPIT " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 32/59] Kconfig: Extract config GPIO_IMX " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 33/59] Kconfig: Extract config IMX_SPI " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 34/59] Kconfig: Extract config IMX_SERIAL " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 35/59] Kconfig: Remove " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 36/59] hw/vmapple/Kconfig: Remove unused GPIO_PWR dependency Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 37/59] hw/arm/fsl-imx8m: Fix typo Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 38/59] hw/misc/imx6_src: Avoid casting from void * Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 39/59] hw/char/imx_serial: " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 40/59] hw/intc/imx_avic: " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 41/59] hw/misc/imx*_ccm: " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 42/59] hw/usb/imx-usb-phy: " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 43/59] hw/net/imx_fec: Trace with QOM path where easily possible Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 44/59] hw/net/lan9118_phy: Trace with QOM path Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 45/59] hw/watchdog/wdt_imx2: " Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 46/59] hw/arm: remove pci-bridge/pci_expander_bridge.h from virt.c Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 47/59] MAINTAINERS: Update Gustavo's email address Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 48/59] hw/char/sh_serial: fix RDF flag clear on FIFO reset Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 49/59] hw/char/sh_serial: use rx_cnt for available FIFO space Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 50/59] hw/char/sh_serial: fix break detection flag Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 51/59] system: Remove deprecated 'debug-threads' option for -name Philippe Mathieu-Daudé
2026-10-28 1:01 ` Richard Henderson
2026-10-28 7:32 ` Philippe Mathieu-Daudé
2026-10-28 8:13 ` Richard Henderson
2026-10-28 9:47 ` Daniel P. Berrangé
2026-10-28 11:54 ` Peter Xu
2026-10-28 12:04 ` Daniel P. Berrangé
2026-10-27 19:23 ` [PULL 52/59] hw/pci-host/aspeed_pcie: Fix global MSI setting during class initialization Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 53/59] hw/net/can/flexcan: Fix FLEXCAN_CRCR_MBCRC definition Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 54/59] hw/net/cadence_gem: Check guest-provided queue numbers in screening registers Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 55/59] hw/misc/allwinner-h3-dramc: Avoid shift by negative amount Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 56/59] hw/display/xlnx_dp: Make assertions clearer Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 57/59] qemu/arch-defs: extract QEMU_ARCH_BIT for QEMU_ARCH_* enums Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 58/59] qemu/arch-defs: Use SYS_EMU_TARGET__MAX to define QEMU_ARCH_ALL Philippe Mathieu-Daudé
2026-10-27 19:23 ` [PULL 59/59] qemu/arch-defs: increase width of QEMU_ARCH_* masks enums to be 64 bits Philippe Mathieu-Daudé
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