From: Shameerali Kolothum Thodi via <qemu-devel@nongnu.org>
To: Donald Dutile <ddutile@redhat.com>,
"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "eric.auger@redhat.com" <eric.auger@redhat.com>,
"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
"jgg@nvidia.com" <jgg@nvidia.com>,
"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
"berrange@redhat.com" <berrange@redhat.com>,
"nathanc@nvidia.com" <nathanc@nvidia.com>,
"mochs@nvidia.com" <mochs@nvidia.com>,
"smostafa@google.com" <smostafa@google.com>,
Linuxarm <linuxarm@huawei.com>,
"Wangzhou (B)" <wangzhou1@hisilicon.com>,
jiangkunkun <jiangkunkun@huawei.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
"zhangfei.gao@linaro.org" <zhangfei.gao@linaro.org>
Subject: RE: [PATCH v2 1/6] hw/arm/smmuv3: Add support to associate a PCIe RC
Date: Tue, 6 May 2025 08:42:01 +0000 [thread overview]
Message-ID: <ea2789664ea646148d5bf565cffc039d@huawei.com> (raw)
In-Reply-To: <03c31d89-ad24-4470-99d0-a77e693e3ba2@redhat.com>
> -----Original Message-----
> From: Donald Dutile <ddutile@redhat.com>
> Sent: Friday, May 2, 2025 7:17 PM
> To: Shameerali Kolothum Thodi
> <shameerali.kolothum.thodi@huawei.com>; qemu-arm@nongnu.org;
> qemu-devel@nongnu.org
> Cc: eric.auger@redhat.com; peter.maydell@linaro.org; jgg@nvidia.com;
> nicolinc@nvidia.com; berrange@redhat.com; nathanc@nvidia.com;
> mochs@nvidia.com; smostafa@google.com; Linuxarm
> <linuxarm@huawei.com>; Wangzhou (B) <wangzhou1@hisilicon.com>;
> jiangkunkun <jiangkunkun@huawei.com>; Jonathan Cameron
> <jonathan.cameron@huawei.com>; zhangfei.gao@linaro.org
> Subject: Re: [PATCH v2 1/6] hw/arm/smmuv3: Add support to associate a
> PCIe RC
>
>
>
> On 5/2/25 6:27 AM, Shameer Kolothum wrote:
> > Although this change does not affect functionality at present, it lays
> > the groundwork for enabling user-created SMMUv3 devices in
> > future patches
> >
> > Signed-off-by: Shameer Kolothum
> <shameerali.kolothum.thodi@huawei.com>
> > ---
> > hw/arm/smmuv3.c | 26 ++++++++++++++++++++++++++
> > hw/arm/virt.c | 3 ++-
> > 2 files changed, 28 insertions(+), 1 deletion(-)
> >
> > diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> > index ab67972353..605de9b721 100644
> > --- a/hw/arm/smmuv3.c
> > +++ b/hw/arm/smmuv3.c
> > @@ -24,6 +24,7 @@
> > #include "hw/qdev-properties.h"
> > #include "hw/qdev-core.h"
> > #include "hw/pci/pci.h"
> > +#include "hw/pci/pci_bridge.h"
> > #include "cpu.h"
> > #include "exec/target_page.h"
> > #include "trace.h"
> > @@ -1874,6 +1875,25 @@ static void smmu_reset_exit(Object *obj,
> ResetType type)
> > smmuv3_init_regs(s);
> > }
> >
> > +static int smmuv3_pcie_bus(Object *obj, void *opaque)
> > +{
> > + DeviceState *d = opaque;
> > + PCIBus *bus;
> > +
> > + if (!object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
> > + return 0;
> > + }
> > +
> > + bus = PCI_HOST_BRIDGE(obj)->bus;
> > + if (d->parent_bus && !strcmp(bus->qbus.name, d->parent_bus-
> >name)) {
> > + object_property_set_link(OBJECT(d), "primary-bus", OBJECT(bus),
> > + &error_abort);
> > + /* Return non-zero as we got the bus and don't need further
> iteration.*/
> > + return 1;
> > + }
> > + return 0;
> > +}
> > +
> > static void smmu_realize(DeviceState *d, Error **errp)
> > {
> > SMMUState *sys = ARM_SMMU(d);
> > @@ -1882,6 +1902,10 @@ static void smmu_realize(DeviceState *d, Error
> **errp)
> > SysBusDevice *dev = SYS_BUS_DEVICE(d);
> > Error *local_err = NULL;
> >
> > + if (!object_property_get_link(OBJECT(d), "primary-bus", &error_abort))
> {
> > + object_child_foreach_recursive(object_get_root(),
> smmuv3_pcie_bus, d);
> > + }
> > +
> > c->parent_realize(d, &local_err);
> > if (local_err) {
> > error_propagate(errp, local_err);
> > @@ -1996,6 +2020,8 @@ static void smmuv3_class_init(ObjectClass
> *klass, const void *data)
> > device_class_set_parent_realize(dc, smmu_realize,
> > &c->parent_realize);
> > device_class_set_props(dc, smmuv3_properties);
> > + dc->hotpluggable = false;
> > + dc->bus_type = TYPE_PCIE_BUS;
> Does this force legacy SMMUv3 to be tied to a PCIe bus now?
> if so, will that break some existing legacy smmuv3 configs?, i.e., virtio-scsi
> attached to a legacy smmuv3.
No. It won't break the existing config as Eric has already replied. The only difference is
as Eric rightly pointed out, SMMUv3 is a platform device and we are specifying
the device bus type as PCIE, which is a bit odd. The initial RFC was with a specific
"pci-bus" as command line option , ie,
-device arm-smmuv3, pci-bus=pcie0,...
and then there were feedbacks that it is more intuitive and makes life easy with
libvirt if we can use the Qemu device "bus" option and hence the change.
Thanks,
Shameer
next prev parent reply other threads:[~2025-05-06 8:42 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-02 10:27 [PATCH v2 0/6] Add support for user creatable SMMUv3 device Shameer Kolothum via
2025-05-02 10:27 ` Shameer Kolothum via
2025-05-02 10:27 ` [PATCH v2 1/6] hw/arm/smmuv3: Add support to associate a PCIe RC Shameer Kolothum via
2025-05-02 10:27 ` Shameer Kolothum via
2025-05-02 17:22 ` Nicolin Chen
2025-05-06 8:14 ` Shameerali Kolothum Thodi via
2025-05-06 8:14 ` Shameerali Kolothum Thodi via
2025-05-02 18:16 ` Donald Dutile
2025-05-05 8:19 ` Eric Auger
2025-05-06 9:07 ` Shameerali Kolothum Thodi
2025-05-06 9:07 ` Shameerali Kolothum Thodi via
2025-05-06 9:35 ` Eric Auger
2025-05-06 8:42 ` Shameerali Kolothum Thodi via [this message]
2025-05-06 11:47 ` Markus Armbruster
2025-05-06 12:20 ` Shameerali Kolothum Thodi via
2025-05-06 20:48 ` Donald Dutile
2025-05-07 7:17 ` Markus Armbruster
2025-05-07 8:50 ` Shameerali Kolothum Thodi via
2025-05-07 8:50 ` Shameerali Kolothum Thodi via
2025-05-08 13:45 ` Donald Dutile
2025-05-08 13:57 ` Peter Maydell
2025-05-09 7:57 ` Markus Armbruster
2025-05-09 8:00 ` Shameerali Kolothum Thodi via
2025-05-09 8:00 ` Shameerali Kolothum Thodi via
2025-05-09 10:37 ` Peter Maydell
2025-05-09 10:46 ` Daniel P. Berrangé
2025-05-09 11:43 ` Peter Maydell
2025-05-22 7:39 ` Shameerali Kolothum Thodi via
2025-05-22 7:39 ` Shameerali Kolothum Thodi via
2025-05-16 20:53 ` Donald Dutile
2025-05-09 7:29 ` Shameerali Kolothum Thodi via
2025-05-09 7:29 ` Shameerali Kolothum Thodi via
2025-05-09 8:14 ` Daniel P. Berrangé
2025-05-09 8:18 ` Shameerali Kolothum Thodi via
2025-05-09 8:18 ` Shameerali Kolothum Thodi via
2025-05-09 8:44 ` Eric Auger
2025-05-02 10:27 ` [PATCH v2 2/6] hw/arm/virt-acpi-build: Update IORT for multiple smmuv3 devices Shameer Kolothum via
2025-05-02 10:27 ` Shameer Kolothum via
2025-05-02 17:13 ` Nicolin Chen
2025-05-02 18:18 ` Donald Dutile
2025-05-06 8:43 ` Shameerali Kolothum Thodi via
2025-05-06 8:00 ` Shameerali Kolothum Thodi via
2025-05-06 8:00 ` Shameerali Kolothum Thodi via
2025-05-05 8:39 ` Eric Auger
2025-05-06 9:12 ` Shameerali Kolothum Thodi via
2025-05-06 9:12 ` Shameerali Kolothum Thodi via
2025-05-02 10:27 ` [PATCH v2 3/6] hw/arm/virt: Factor out common SMMUV3 dt bindings code Shameer Kolothum via
2025-05-02 10:27 ` Shameer Kolothum via
2025-05-02 17:15 ` Nicolin Chen
2025-05-05 9:01 ` Eric Auger
2025-05-06 9:19 ` Shameerali Kolothum Thodi via
2025-05-06 9:19 ` Shameerali Kolothum Thodi via
2025-05-02 10:27 ` [PATCH v2 4/6] hw/arm/virt: Add an SMMU_IO_LEN macro Shameer Kolothum via
2025-05-02 10:27 ` Shameer Kolothum via
2025-05-02 18:20 ` Donald Dutile
2025-05-05 9:03 ` Eric Auger
2025-05-02 10:27 ` [PATCH v2 5/6] hw/arm/virt: Add support for smmuv3 device Shameer Kolothum via
2025-05-02 10:27 ` Shameer Kolothum via
2025-05-02 17:54 ` Nicolin Chen
2025-05-06 8:36 ` Shameerali Kolothum Thodi via
2025-05-05 10:12 ` Eric Auger
2025-05-06 9:29 ` Shameerali Kolothum Thodi via
2025-05-02 10:27 ` [PATCH v2 6/6] hw/arm/smmuv3: Enable smmuv3 device creation Shameer Kolothum via
2025-05-02 10:27 ` Shameer Kolothum via
2025-05-02 18:00 ` Nicolin Chen
2025-05-05 10:13 ` Eric Auger
2025-05-02 18:11 ` [PATCH v2 0/6] Add support for user creatable SMMUv3 device Donald Dutile
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