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* Re: [Qemu-devel] [qemu patch 2/2] kvmclock: reduce kvmclock difference on migration
From: Paolo Bonzini @ 2016-11-14 14:22 UTC (permalink / raw)
  To: Marcelo Tosatti
  Cc: kvm, qemu-devel, Dr. David Alan Gilbert, Juan Quintela,
	Radim Krcmar, Eduardo Habkost
In-Reply-To: <20161114140028.GA25935@amt.cnet>



On 14/11/2016 15:00, Marcelo Tosatti wrote:
> On Mon, Nov 14, 2016 at 02:54:38PM +0100, Paolo Bonzini wrote:
>>
>>
>> On 14/11/2016 13:36, Marcelo Tosatti wrote:
>>> +        /* local (running VM) restore */
>>> +        if (s->clock_valid) {
>>> +            /*
>>> +             * if host does not support reliable KVM_GET_CLOCK,
>>> +             * read kvmclock value from memory
>>> +             */
>>> +            if (!kvm_has_adjust_clock_stable()) {
>>> +                time_at_migration = kvmclock_current_nsec(s);
>>
>> Just assign to s->clock here...
> 
> If kvmclock is not enabled, you want to use s->clock,
> rather than 0.
> 
>>> +            }
>>> +        /* migration/savevm/init restore */
>>> +        } else {
>>> +            /*
>>> +             * use s->clock in case machine uses reliable
>>> +             * get clock and host where vm was executing
>>> +             * supported reliable get clock
>>> +             */
>>> +            if (!s->mach_use_reliable_get_clock ||
>>> +                !s->src_use_reliable_get_clock) {
>>> +                time_at_migration = kvmclock_current_nsec(s);
>>
>> ... and here, so that time_at_migration is not needed anymore.
> 
> Same as above.

You're right.

>> Also here it's enough to look at s->src_user_reliable_get_clock, because
>> if s->mach_use_reliable_get_clock is false,
>> s->src_use_reliable_get_clock will be false as well.
> 
> Yes, but i like the code annotation.

Ah, I think we're looking at it differently.

I'm thinking "mach_use_reliable_get_clock is just for migration,
src_use_reliable_get_clock is the state".  Perhaps you're thinking of
enabling/disabling the whole new code for old machines?  What is the
advantage?

>>> +            }
>>> +        }
>>>  
>>> -        /* We can't rely on the migrated clock value, just discard it */
>>> +        /* We can't rely on the saved clock value, just discard it */
>>>          if (time_at_migration) {
>>>              s->clock = time_at_migration;
>>
>> [...]
>>
>>>
>>> +static bool kvmclock_src_use_reliable_get_clock(void *opaque)
>>> +{
>>> +    KVMClockState *s = opaque;
>>> +
>>> +    /*
>>> +     * On machine types that support reliable KVM_GET_CLOCK,
>>> +     * if host kernel does provide reliable KVM_GET_CLOCK,
>>> +     * set src_use_reliable_get_clock=true so that destination
>>> +     * avoids reading kvmclock from memory.
>>> +     */
>>> +    if (s->mach_use_reliable_get_clock && kvm_has_adjust_clock_stable()) {
>>> +        s->src_use_reliable_get_clock = true;
>>> +    }
>>> +
>>> +    return s->src_use_reliable_get_clock;
>>> +}
>>
>> Here you can just return s->mach_use_reliable_get_clock. 
> 
> mach_use_reliable_get_clock can be true but host might not support it.

Yes, but the "needed" function is only required to avoid breaking
pc-i440fx-2.7 and earlier.  If you return true here, you can still
migrate a "false" value for src_use_reliable_get_clock.

>>  To set
>> s->src_use_reliable_get_clock, after issuing KVM_GET_CLOCK you can look
>> at the KVM_CLOCK_TSC_STABLE bit in the kvm_clock struct's flags.
> 
> KVM_CLOCK_TSC_STABLE bit in the kvmclock structure != 
> KVM_GET_CLOCK returns reliable value, right?

It is the same as "is using masterclock", which is actually a stricter
condition than the KVM_CHECK_EXTENSION return value.  The right check to
use is whether masterclock is in use, and then the idea is to treat
clock,src_use_reliable_get_clock as one tuple that is updated atomically.

Paolo

^ permalink raw reply

* Re: [qemu patch 2/2] kvmclock: reduce kvmclock difference on migration
From: Paolo Bonzini @ 2016-11-14 14:22 UTC (permalink / raw)
  To: Marcelo Tosatti
  Cc: kvm, qemu-devel, Dr. David Alan Gilbert, Juan Quintela,
	Radim Krcmar, Eduardo Habkost
In-Reply-To: <20161114140028.GA25935@amt.cnet>



On 14/11/2016 15:00, Marcelo Tosatti wrote:
> On Mon, Nov 14, 2016 at 02:54:38PM +0100, Paolo Bonzini wrote:
>>
>>
>> On 14/11/2016 13:36, Marcelo Tosatti wrote:
>>> +        /* local (running VM) restore */
>>> +        if (s->clock_valid) {
>>> +            /*
>>> +             * if host does not support reliable KVM_GET_CLOCK,
>>> +             * read kvmclock value from memory
>>> +             */
>>> +            if (!kvm_has_adjust_clock_stable()) {
>>> +                time_at_migration = kvmclock_current_nsec(s);
>>
>> Just assign to s->clock here...
> 
> If kvmclock is not enabled, you want to use s->clock,
> rather than 0.
> 
>>> +            }
>>> +        /* migration/savevm/init restore */
>>> +        } else {
>>> +            /*
>>> +             * use s->clock in case machine uses reliable
>>> +             * get clock and host where vm was executing
>>> +             * supported reliable get clock
>>> +             */
>>> +            if (!s->mach_use_reliable_get_clock ||
>>> +                !s->src_use_reliable_get_clock) {
>>> +                time_at_migration = kvmclock_current_nsec(s);
>>
>> ... and here, so that time_at_migration is not needed anymore.
> 
> Same as above.

You're right.

>> Also here it's enough to look at s->src_user_reliable_get_clock, because
>> if s->mach_use_reliable_get_clock is false,
>> s->src_use_reliable_get_clock will be false as well.
> 
> Yes, but i like the code annotation.

Ah, I think we're looking at it differently.

I'm thinking "mach_use_reliable_get_clock is just for migration,
src_use_reliable_get_clock is the state".  Perhaps you're thinking of
enabling/disabling the whole new code for old machines?  What is the
advantage?

>>> +            }
>>> +        }
>>>  
>>> -        /* We can't rely on the migrated clock value, just discard it */
>>> +        /* We can't rely on the saved clock value, just discard it */
>>>          if (time_at_migration) {
>>>              s->clock = time_at_migration;
>>
>> [...]
>>
>>>
>>> +static bool kvmclock_src_use_reliable_get_clock(void *opaque)
>>> +{
>>> +    KVMClockState *s = opaque;
>>> +
>>> +    /*
>>> +     * On machine types that support reliable KVM_GET_CLOCK,
>>> +     * if host kernel does provide reliable KVM_GET_CLOCK,
>>> +     * set src_use_reliable_get_clock=true so that destination
>>> +     * avoids reading kvmclock from memory.
>>> +     */
>>> +    if (s->mach_use_reliable_get_clock && kvm_has_adjust_clock_stable()) {
>>> +        s->src_use_reliable_get_clock = true;
>>> +    }
>>> +
>>> +    return s->src_use_reliable_get_clock;
>>> +}
>>
>> Here you can just return s->mach_use_reliable_get_clock. 
> 
> mach_use_reliable_get_clock can be true but host might not support it.

Yes, but the "needed" function is only required to avoid breaking
pc-i440fx-2.7 and earlier.  If you return true here, you can still
migrate a "false" value for src_use_reliable_get_clock.

>>  To set
>> s->src_use_reliable_get_clock, after issuing KVM_GET_CLOCK you can look
>> at the KVM_CLOCK_TSC_STABLE bit in the kvm_clock struct's flags.
> 
> KVM_CLOCK_TSC_STABLE bit in the kvmclock structure != 
> KVM_GET_CLOCK returns reliable value, right?

It is the same as "is using masterclock", which is actually a stricter
condition than the KVM_CHECK_EXTENSION return value.  The right check to
use is whether masterclock is in use, and then the idea is to treat
clock,src_use_reliable_get_clock as one tuple that is updated atomically.

Paolo

^ permalink raw reply

* [U-Boot] [PATCH 3/7] sunxi: Enable UBI and NAND support
From: Hans de Goede @ 2016-11-14 14:21 UTC (permalink / raw)
  To: u-boot
In-Reply-To: <20161114141237.pbvskuy76zbyv2iz@lukather>

Hi,

On 14-11-16 15:12, Maxime Ripard wrote:
> On Mon, Nov 14, 2016 at 12:18:06PM +0100, Hans de Goede wrote:
>>>  #ifdef CONFIG_SPL_SPI_SUNXI
>>> @@ -143,7 +157,14 @@
>>>  #define CONFIG_GENERIC_MMC
>>>  #define CONFIG_MMC_SUNXI
>>>  #define CONFIG_MMC_SUNXI_SLOT		0
>>> -#define CONFIG_ENV_IS_IN_MMC
>>> +#endif
>>> +
>>> +#if defined(CONFIG_ENV_IS_IN_NAND)
>>> +#define CONFIG_ENV_OFFSET			0xc00000
>>> +#define CONFIG_ENV_SIZE				0x400000
>>> +#elif defined(CONFIG_ENV_IS_IN_MMC)
>>> +#define CONFIG_ENV_OFFSET			(544 << 10) /* (8 + 24 + 512) KiB */
>>> +#define CONFIG_ENV_SIZE				(128 << 10) /* 128 KiB */
>>>  #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
>>>  #endif
>
> Oh, and this part is broken. It relies on the fact that all board
> define ENV_IS_IN_MMC (which they should), while obviously they
> don't. I'm not exactly sure about what the proper fix would be.

Yes, this has been a known problem for a while, but never
became an issue due to lack of NAND support.

My preferred way for dealing with this be would for the
environment code in u-boot allowing to build in multiple
back-ends and use spl_boot_device() which then would need
to loose its spl prefix. For the CHIP devices I'm sure
you can come up with a simpler fix since those don't
have an sdcard-slot. But for other boards this will be
necessary as we really don't want to have separate
nand and mmc u-boot.bin files.

Anyways this is something for whomever will take over
as sunxi custodian from me. Maybe someone from free-electrons
can co-maintain with Jagan ?

Regards,

Hans

^ permalink raw reply

* [PATCH 0/2] Add support for the DW IP Prototyping Kits for MIPI CSI-2 Host
From: Ramiro Oliveira @ 2016-11-14 14:20 UTC (permalink / raw)
  To: robh+dt, mark.rutland, mchehab, devicetree, linux-kernel,
	linux-media
  Cc: davem, gregkh, geert+renesas, akpm, linux, hverkuil,
	laurent.pinchart+renesas, arnd, sudipm.mukherjee, tiffany.lin,
	minghsiu.tsai, jean-christophe.trotin, andrew-ct.chen,
	simon.horman, songjun.wu, bparrot, CARLOS.PALMINHA,
	Ramiro.Oliveira

This patchset adds basic support for the DW CSI-2 Host IPK. There are 
some parts of the kit that aren't currently supported by this media 
platform driver but will be in the future.

Ramiro Oliveira (2):
  Add Documentation for Media Device, Video Device, and Synopsys DW MIPI
    CSI-2 Host
  Add basic support for DW CSI-2 Host IPK

 .../devicetree/bindings/media/snps,dw-mipi-csi.txt |  27 +
 .../devicetree/bindings/media/snps,plat-ipk.txt    |   9 +
 .../bindings/media/snps,video-device.txt           |  12 +
 MAINTAINERS                                        |   7 +
 drivers/media/platform/Kconfig                     |   1 +
 drivers/media/platform/Makefile                    |   2 +
 drivers/media/platform/dwc/Kconfig                 |  36 +
 drivers/media/platform/dwc/Makefile                |   3 +
 drivers/media/platform/dwc/dw_mipi_csi.c           | 687 +++++++++++++++++
 drivers/media/platform/dwc/dw_mipi_csi.h           | 179 +++++
 drivers/media/platform/dwc/plat_ipk.c              | 835 +++++++++++++++++++++
 drivers/media/platform/dwc/plat_ipk.h              |  97 +++
 drivers/media/platform/dwc/plat_ipk_video.h        |  97 +++
 drivers/media/platform/dwc/video_device.c          | 741 ++++++++++++++++++
 drivers/media/platform/dwc/video_device.h          | 101 +++
 15 files changed, 2834 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
 create mode 100644 Documentation/devicetree/bindings/media/snps,plat-ipk.txt
 create mode 100644 Documentation/devicetree/bindings/media/snps,video-device.txt
 create mode 100644 drivers/media/platform/dwc/Kconfig
 create mode 100644 drivers/media/platform/dwc/Makefile
 create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.c
 create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.h
 create mode 100644 drivers/media/platform/dwc/plat_ipk.c
 create mode 100644 drivers/media/platform/dwc/plat_ipk.h
 create mode 100644 drivers/media/platform/dwc/plat_ipk_video.h
 create mode 100644 drivers/media/platform/dwc/video_device.c
 create mode 100644 drivers/media/platform/dwc/video_device.h

-- 
2.10.2



^ permalink raw reply

* [PATCH 2/2] Add basic support for DW CSI-2 Host IPK
From: Ramiro Oliveira @ 2016-11-14 14:20 UTC (permalink / raw)
  To: robh+dt, mark.rutland, mchehab, devicetree, linux-kernel,
	linux-media
  Cc: davem, gregkh, geert+renesas, akpm, linux, hverkuil,
	laurent.pinchart+renesas, arnd, sudipm.mukherjee, tiffany.lin,
	minghsiu.tsai, jean-christophe.trotin, andrew-ct.chen,
	simon.horman, songjun.wu, bparrot, CARLOS.PALMINHA,
	Ramiro.Oliveira
In-Reply-To: <cover.1479132355.git.roliveir@synopsys.com>

Add support for basic configuration of the DW CSI-2 Host IPK

Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
---
 MAINTAINERS                                 |   7 +
 drivers/media/platform/Kconfig              |   1 +
 drivers/media/platform/Makefile             |   2 +
 drivers/media/platform/dwc/Kconfig          |  36 ++
 drivers/media/platform/dwc/Makefile         |   3 +
 drivers/media/platform/dwc/dw_mipi_csi.c    | 687 +++++++++++++++++++++++
 drivers/media/platform/dwc/dw_mipi_csi.h    | 179 ++++++
 drivers/media/platform/dwc/plat_ipk.c       | 835 ++++++++++++++++++++++++++++
 drivers/media/platform/dwc/plat_ipk.h       |  97 ++++
 drivers/media/platform/dwc/plat_ipk_video.h |  97 ++++
 drivers/media/platform/dwc/video_device.c   | 741 ++++++++++++++++++++++++
 drivers/media/platform/dwc/video_device.h   | 101 ++++
 12 files changed, 2786 insertions(+)
 create mode 100644 drivers/media/platform/dwc/Kconfig
 create mode 100644 drivers/media/platform/dwc/Makefile
 create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.c
 create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.h
 create mode 100644 drivers/media/platform/dwc/plat_ipk.c
 create mode 100644 drivers/media/platform/dwc/plat_ipk.h
 create mode 100644 drivers/media/platform/dwc/plat_ipk_video.h
 create mode 100644 drivers/media/platform/dwc/video_device.c
 create mode 100644 drivers/media/platform/dwc/video_device.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 6a71422..f54dfd8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10618,6 +10618,13 @@ S:	Maintained
 F:	drivers/staging/media/st-cec/
 F:	Documentation/devicetree/bindings/media/stih-cec.txt
 
+SYNOPSYS DESIGNWARE CSI-2 HOST IPK DRIVER
+M:	Ramiro Oliveira <roliveir@synopsys.com>
+L:	linux-media@vger.kernel.org
+T:	git git://linuxtv.org/media_tree.git
+S:	Maintained
+F:	drivers/media/platform/dwc/
+
 SYNOPSYS DESIGNWARE DMAC DRIVER
 M:	Viresh Kumar <vireshk@kernel.org>
 M:	Andy Shevchenko <andriy.shevchenko@linux.intel.com>
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index 754edbf1..6fef760f 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -120,6 +120,7 @@ source "drivers/media/platform/am437x/Kconfig"
 source "drivers/media/platform/xilinx/Kconfig"
 source "drivers/media/platform/rcar-vin/Kconfig"
 source "drivers/media/platform/atmel/Kconfig"
+source "drivers/media/platform/dwc/Kconfig"
 
 config VIDEO_TI_CAL
 	tristate "TI CAL (Camera Adaptation Layer) driver"
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index f842933..623f5d2 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -61,6 +61,8 @@ obj-$(CONFIG_VIDEO_RCAR_VIN)		+= rcar-vin/
 
 obj-$(CONFIG_VIDEO_ATMEL_ISC)		+= atmel/
 
+obj-$(CONFIG_VIDEO_DWC)			+= dwc/
+
 ccflags-y += -I$(srctree)/drivers/media/i2c
 
 obj-$(CONFIG_VIDEO_MEDIATEK_VPU)	+= mtk-vpu/
diff --git a/drivers/media/platform/dwc/Kconfig b/drivers/media/platform/dwc/Kconfig
new file mode 100644
index 0000000..fb8533b
--- /dev/null
+++ b/drivers/media/platform/dwc/Kconfig
@@ -0,0 +1,36 @@
+config VIDEO_DWC
+	bool "Designware Cores CSI-2 IPK (EXPERIMENTAL)"
+	depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && OF && HAS_DMA
+	help
+	  Say Y here to enable support for the DesignWare Cores CSI-2 Host IP
+	  Prototyping Kit.
+
+if VIDEO_DWC
+config DWC_PLATFORM
+	tristate "SNPS DWC MIPI CSI2 Host"
+	depends on VIDEO_DWC
+	help
+	  This is the V4L2 plaftorm driver driver for the DWC CSI-2 HOST IPK
+
+	  To compile this driver as a module, choose M here
+
+
+config DWC_MIPI_CSI2_HOST
+	tristate "SNPS DWC MIPI CSI2 Host"
+	select GENERIC_PHY
+	depends on VIDEO_DWC
+	help
+	  This is a V4L2 driver for SNPS DWC MIPI-CSI2
+
+	  To compile this driver as a module, choose M here
+
+config DWC_VIDEO_DEVICE
+	tristate "DWC VIDEO DEVICE"
+	select VIDEOBUF2_VMALLOC
+	select VIDEOBUF2_DMA_CONTIG
+	depends on VIDEO_DWC
+	help
+	  This is a V4L2 driver for SNPS Video device
+	  To compile this driver as a module, choose M here
+
+endif # VIDEO_DWC
diff --git a/drivers/media/platform/dwc/Makefile b/drivers/media/platform/dwc/Makefile
new file mode 100644
index 0000000..75c74b7
--- /dev/null
+++ b/drivers/media/platform/dwc/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_DWC_PLATFORM)		+= plat_ipk.o
+obj-$(CONFIG_DWC_MIPI_CSI2_HOST)	+= dw_mipi_csi.o
+obj-$(CONFIG_DWC_VIDEO_DEVICE)		+= video_device.o
diff --git a/drivers/media/platform/dwc/dw_mipi_csi.c b/drivers/media/platform/dwc/dw_mipi_csi.c
new file mode 100644
index 0000000..1337a5e
--- /dev/null
+++ b/drivers/media/platform/dwc/dw_mipi_csi.c
@@ -0,0 +1,687 @@
+/*
+ * DWC MIPI CSI-2 Host device driver
+ *
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ * Author: Ramiro Oliveira <ramiro.oliveira@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation, either version 2 of the License,
+ * or (at your option) any later version.
+ */
+
+
+#include "dw_mipi_csi.h"
+
+/** @short Driver args: debug */
+static unsigned int debug;
+module_param(debug, uint, 0644);
+MODULE_PARM_DESC(debug, "Activates debug info");
+
+/*
+ * Basic IO read and write operations
+ */
+
+/**
+ * @short Video formats supported by the MIPI CSI-2
+ */
+static const struct mipi_fmt dw_mipi_csi_formats[] = {
+	{
+	 .name = "RAW BGGR 8",
+	 .code = MEDIA_BUS_FMT_SBGGR8_1X8,
+	 .depth = 8,
+	 },
+	{
+	 .name = "RAW10",
+	 .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE,
+	 .depth = 10,
+	 },
+	{
+	 .name = "RGB565",
+	 .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
+	 .depth = 16,
+	 },
+	{
+	 .name = "BGR565",
+	 .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
+	 .depth = 16,
+	 },
+	{
+	 .name = "RGB888",
+	 .code = MEDIA_BUS_FMT_RGB888_2X12_LE,
+	 .depth = 24,
+	 },
+	{
+	 .name = "BGR888",
+	 .code = MEDIA_BUS_FMT_RGB888_2X12_BE,
+	 .depth = 24,
+	 },
+};
+
+static struct mipi_csi_dev *
+sd_to_mipi_csi_dev(struct v4l2_subdev *sdev)
+{
+	return container_of(sdev, struct mipi_csi_dev, sd);
+}
+
+void
+dw_mipi_csi_write(struct mipi_csi_dev *dev,
+		  unsigned int address, unsigned int data)
+{
+	iowrite32(data, dev->base_address + address);
+}
+
+u32
+dw_mipi_csi_read(struct mipi_csi_dev *dev, unsigned long address)
+{
+	return ioread32(dev->base_address + address);
+}
+
+void
+dw_mipi_csi_write_part(struct mipi_csi_dev *dev,
+		       unsigned long address, unsigned long data,
+		       unsigned char shift, unsigned char width)
+{
+	u32 mask = (1 << width) - 1;
+	u32 temp = dw_mipi_csi_read(dev, address);
+
+	temp &= ~(mask << shift);
+	temp |= (data & mask) << shift;
+	dw_mipi_csi_write(dev, address, temp);
+}
+
+static const struct mipi_fmt *
+find_dw_mipi_csi_format(struct v4l2_mbus_framefmt *mf)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(dw_mipi_csi_formats); i++)
+		if (mf->code == dw_mipi_csi_formats[i].code)
+			return &dw_mipi_csi_formats[i];
+	return NULL;
+}
+
+int
+enable_video_output(struct mipi_csi_dev *dev)
+{
+	return 0;
+}
+
+int
+disable_video_output(struct mipi_csi_dev *dev)
+{
+	phy_power_off(dev->phy);
+	return 0;
+}
+
+static void
+dw_mipi_csi_reset(struct mipi_csi_dev *dev)
+{
+	dw_mipi_csi_write(dev, R_CSI2_CTRL_RESETN, 0);
+	/* mdelay(1); */
+	dw_mipi_csi_write(dev, R_CSI2_CTRL_RESETN, 1);
+}
+
+static int
+dw_mipi_csi_mask_irq_power_off(struct mipi_csi_dev *dev)
+{
+	/* set only one lane (lane 0) as active (ON) */
+	dw_mipi_csi_write(dev, R_CSI2_N_LANES, 0);
+
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY_FATAL, 0);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT_FATAL, 0);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_FRAME_FATAL, 0);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY, 0);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT, 0);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_LINE, 0);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_IPI, 0);
+
+	dw_mipi_csi_write(dev, R_CSI2_CTRL_RESETN, 0);
+
+	return 0;
+
+}
+
+static int
+dw_mipi_csi_hw_stdby(struct mipi_csi_dev *dev)
+{
+	/* set only one lane (lane 0) as active (ON) */
+	dw_mipi_csi_reset(dev);
+
+	dw_mipi_csi_write(dev, R_CSI2_N_LANES, 0);
+
+	phy_init(dev->phy);
+
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY_FATAL, 0xFFFFFFFF);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT_FATAL, 0xFFFFFFFF);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_FRAME_FATAL, 0xFFFFFFFF);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY, 0xFFFFFFFF);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT, 0xFFFFFFFF);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_LINE, 0xFFFFFFFF);
+	dw_mipi_csi_write(dev, R_CSI2_MASK_INT_IPI, 0xFFFFFFFF);
+
+	return 0;
+
+}
+
+void
+dw_mipi_csi_set_ipi_fmt(struct mipi_csi_dev *dev)
+{
+	switch (dev->fmt->code) {
+	case MEDIA_BUS_FMT_RGB565_2X8_BE:
+	case MEDIA_BUS_FMT_RGB565_2X8_LE:
+		dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RGB565);
+		v4l2_dbg(1, debug, &dev->sd, "DT: RGB 565");
+		break;
+
+	case MEDIA_BUS_FMT_RGB888_2X12_LE:
+	case MEDIA_BUS_FMT_RGB888_2X12_BE:
+		dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RGB888);
+		v4l2_dbg(1, debug, &dev->sd, "DT: RGB 888");
+		break;
+	case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE:
+		dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RAW10);
+		v4l2_dbg(1, debug, &dev->sd, "DT: RAW 10");
+		break;
+	case MEDIA_BUS_FMT_SBGGR8_1X8:
+		dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RAW8);
+		v4l2_dbg(1, debug, &dev->sd, "DT: RAW 8");
+		break;
+	default:
+		dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RGB565);
+		v4l2_dbg(1, debug, &dev->sd, "Error");
+		break;
+	}
+}
+
+void
+__dw_mipi_csi_fill_timings(struct mipi_csi_dev *dev,
+			   const struct v4l2_bt_timings *bt)
+{
+
+	if (bt == NULL)
+		return;
+
+	dev->hw.hsa = bt->hsync;
+	dev->hw.hbp = bt->hbackporch;
+	dev->hw.hsd = bt->hsync;
+	dev->hw.htotal = bt->height + bt->vfrontporch +
+	    bt->vsync + bt->vbackporch;
+	dev->hw.vsa = bt->vsync;
+	dev->hw.vbp = bt->vbackporch;
+	dev->hw.vfp = bt->vfrontporch;
+	dev->hw.vactive = bt->height;
+}
+
+void
+dw_mipi_csi_start(struct mipi_csi_dev *dev)
+{
+	const struct v4l2_bt_timings *bt = &v4l2_dv_timings_presets[0].bt;
+
+	__dw_mipi_csi_fill_timings(dev, bt);
+
+	dw_mipi_csi_write(dev, R_CSI2_N_LANES, (dev->hw.num_lanes - 1));
+	v4l2_dbg(1, debug, &dev->sd, "N Lanes: %d\n", dev->hw.num_lanes);
+
+	/*IPI Related Configuration */
+	if ((dev->hw.output_type == IPI_OUT)
+	    || (dev->hw.output_type == BOTH_OUT)) {
+
+		dw_mipi_csi_write_part(dev, R_CSI2_IPI_MODE, dev->hw.ipi_mode,
+				       0, 1);
+		v4l2_dbg(1, debug, &dev->sd, "IPI MODE: %d\n",
+			 dev->hw.ipi_mode);
+
+		dw_mipi_csi_write_part(dev, R_CSI2_IPI_MODE,
+				       dev->hw.ipi_color_mode, 8, 1);
+		v4l2_dbg(1, debug, &dev->sd, "Color Mode: %d\n",
+			 dev->hw.ipi_color_mode);
+
+		dw_mipi_csi_write(dev, R_CSI2_IPI_VCID, dev->hw.virtual_ch);
+		v4l2_dbg(1, debug, &dev->sd, "Virtual Channel: %d\n",
+			 dev->hw.virtual_ch);
+
+		dw_mipi_csi_write_part(dev, R_CSI2_IPI_MEM_FLUSH,
+				       dev->hw.ipi_auto_flush, 8, 1);
+		v4l2_dbg(1, debug, &dev->sd, "Auto-flush: %d\n",
+			 dev->hw.ipi_auto_flush);
+
+		dw_mipi_csi_write(dev, R_CSI2_IPI_HSA_TIME, dev->hw.hsa);
+		v4l2_dbg(1, debug, &dev->sd, "HSA: %d\n", dev->hw.hsa);
+
+		dw_mipi_csi_write(dev, R_CSI2_IPI_HBP_TIME, dev->hw.hbp);
+		v4l2_dbg(1, debug, &dev->sd, "HBP: %d\n", dev->hw.hbp);
+
+		dw_mipi_csi_write(dev, R_CSI2_IPI_HSD_TIME, dev->hw.hsd);
+		v4l2_dbg(1, debug, &dev->sd, "HSD: %d\n", dev->hw.hsd);
+
+		if (dev->hw.ipi_mode == AUTO_TIMING) {
+			dw_mipi_csi_write(dev, R_CSI2_IPI_HLINE_TIME,
+					  dev->hw.htotal);
+			v4l2_dbg(1, debug, &dev->sd, "H total: %d\n",
+				 dev->hw.htotal);
+
+			dw_mipi_csi_write(dev, R_CSI2_IPI_VSA_LINES,
+					  dev->hw.vsa);
+			v4l2_dbg(1, debug, &dev->sd, "VSA: %d\n", dev->hw.vsa);
+
+			dw_mipi_csi_write(dev, R_CSI2_IPI_VBP_LINES,
+					  dev->hw.vbp);
+			v4l2_dbg(1, debug, &dev->sd, "VBP: %d\n", dev->hw.vbp);
+
+			dw_mipi_csi_write(dev, R_CSI2_IPI_VFP_LINES,
+					  dev->hw.vfp);
+			v4l2_dbg(1, debug, &dev->sd, "VFP: %d\n", dev->hw.vfp);
+
+			dw_mipi_csi_write(dev, R_CSI2_IPI_VACTIVE_LINES,
+					  dev->hw.vactive);
+			v4l2_dbg(1, debug, &dev->sd, "V Active: %d\n",
+				 dev->hw.vactive);
+		}
+	}
+
+	phy_power_on(dev->phy);
+}
+
+static int
+dw_mipi_csi_enum_mbus_code(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_pad_config *cfg,
+			   struct v4l2_subdev_mbus_code_enum *code)
+{
+	if (code->index >= ARRAY_SIZE(dw_mipi_csi_formats))
+		return -EINVAL;
+
+	code->code = dw_mipi_csi_formats[code->index].code;
+	return 0;
+}
+
+static struct mipi_fmt const *
+dw_mipi_csi_try_format(struct v4l2_mbus_framefmt *mf)
+{
+	struct mipi_fmt const *fmt;
+
+	fmt = find_dw_mipi_csi_format(mf);
+	if (fmt == NULL)
+		fmt = &dw_mipi_csi_formats[0];
+
+	mf->code = fmt->code;
+	return fmt;
+}
+
+static struct v4l2_mbus_framefmt *
+__dw_mipi_csi_get_format(struct mipi_csi_dev *dev,
+			 struct v4l2_subdev_pad_config *cfg,
+			 enum v4l2_subdev_format_whence which)
+{
+	if (which == V4L2_SUBDEV_FORMAT_TRY)
+		return cfg ? v4l2_subdev_get_try_format(&dev->sd, cfg,
+							0) : NULL;
+
+	return &dev->format;
+}
+
+static int
+dw_mipi_csi_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
+		    struct v4l2_subdev_format *fmt)
+{
+	struct mipi_csi_dev *dev = sd_to_mipi_csi_dev(sd);
+	struct mipi_fmt const *dev_fmt;
+	struct v4l2_mbus_framefmt *mf;
+	int i = 0;
+	const struct v4l2_bt_timings *bt_r = &v4l2_dv_timings_presets[0].bt;
+
+	mf = __dw_mipi_csi_get_format(dev, cfg, fmt->which);
+
+	dev_fmt = dw_mipi_csi_try_format(&fmt->format);
+	if (dev_fmt) {
+		*mf = fmt->format;
+		if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE)
+			dev->fmt = dev_fmt;
+		dw_mipi_csi_set_ipi_fmt(dev);
+	}
+	while (v4l2_dv_timings_presets[i].bt.width) {
+		const struct v4l2_bt_timings *bt =
+		    &v4l2_dv_timings_presets[i].bt;
+		if (mf->width == bt->width && mf->height == bt->width) {
+			__dw_mipi_csi_fill_timings(dev, bt);
+			return 0;
+		}
+		i++;
+	}
+
+	__dw_mipi_csi_fill_timings(dev, bt_r);
+	return 0;
+
+}
+
+static int
+dw_mipi_csi_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
+		    struct v4l2_subdev_format *fmt)
+{
+	struct mipi_csi_dev *dev = sd_to_mipi_csi_dev(sd);
+	struct v4l2_mbus_framefmt *mf;
+
+	mf = __dw_mipi_csi_get_format(dev, cfg, fmt->which);
+	if (!mf)
+		return -EINVAL;
+
+	mutex_lock(&dev->lock);
+	fmt->format = *mf;
+	mutex_unlock(&dev->lock);
+	return 0;
+}
+
+static int
+dw_mipi_csi_s_power(struct v4l2_subdev *sd, int on)
+{
+	struct mipi_csi_dev *dev = sd_to_mipi_csi_dev(sd);
+
+	if (on) {
+		dw_mipi_csi_hw_stdby(dev);
+		dw_mipi_csi_start(dev);
+	} else {
+		dw_mipi_csi_mask_irq_power_off(dev);
+	}
+
+	return 0;
+}
+
+static int
+dw_mipi_csi_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct v4l2_mbus_framefmt *format =
+	    v4l2_subdev_get_try_format(sd, fh->pad, 0);
+
+	format->colorspace = V4L2_COLORSPACE_SRGB;
+	format->code = dw_mipi_csi_formats[0].code;
+	format->width = MIN_WIDTH;
+	format->height = MIN_HEIGHT;
+	format->field = V4L2_FIELD_NONE;
+
+	return 0;
+}
+
+static const struct v4l2_subdev_internal_ops dw_mipi_csi_sd_internal_ops = {
+	.open = dw_mipi_csi_open,
+};
+
+static struct v4l2_subdev_core_ops dw_mipi_csi_core_ops = {
+	.s_power = dw_mipi_csi_s_power,
+};
+
+static struct v4l2_subdev_pad_ops dw_mipi_csi_pad_ops = {
+	.enum_mbus_code = dw_mipi_csi_enum_mbus_code,
+	.get_fmt = dw_mipi_csi_get_fmt,
+	.set_fmt = dw_mipi_csi_set_fmt,
+};
+
+static struct v4l2_subdev_ops dw_mipi_csi_subdev_ops = {
+	.core = &dw_mipi_csi_core_ops,
+	.pad = &dw_mipi_csi_pad_ops,
+};
+
+static irqreturn_t
+dw_mipi_csi_irq1(int irq, void *dev_id)
+{
+
+	struct mipi_csi_dev *dev = dev_id;
+	u32 int_status, ind_status;
+	unsigned long flags;
+
+	int_status = dw_mipi_csi_read(dev, R_CSI2_INTERRUPT);
+	spin_lock_irqsave(&dev->slock, flags);
+
+	if (int_status & CSI2_INT_PHY_FATAL) {
+		ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PHY_FATAL);
+		pr_info_ratelimited("%08X CSI INT PHY FATAL: %08X\n",
+				    (uint32_t) dev->base_address, ind_status);
+	}
+
+	if (int_status & CSI2_INT_PKT_FATAL) {
+		ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PKT_FATAL);
+		pr_info_ratelimited("%08X CSI INT PKT FATAL: %08X\n",
+				    (uint32_t) dev->base_address, ind_status);
+	}
+
+	if (int_status & CSI2_INT_FRAME_FATAL) {
+		ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_FRAME_FATAL);
+		pr_info_ratelimited("%08X CSI INT FRAME FATAL: %08X\n",
+				    (uint32_t) dev->base_address, ind_status);
+	}
+
+	if (int_status & CSI2_INT_PHY) {
+		ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PHY);
+		pr_info_ratelimited("%08X CSI INT PHY: %08X\n",
+				    (uint32_t) dev->base_address, ind_status);
+	}
+
+	if (int_status & CSI2_INT_PKT) {
+		ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PKT);
+		pr_info_ratelimited("%08X CSI INT PKT: %08X\n",
+				    (uint32_t) dev->base_address, ind_status);
+	}
+
+	if (int_status & CSI2_INT_LINE) {
+		ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_LINE);
+		pr_info_ratelimited("%08X CSI INT LINE: %08X\n",
+				    (uint32_t) dev->base_address, ind_status);
+	}
+
+	if (int_status & CSI2_INT_IPI) {
+		ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_IPI);
+		pr_info_ratelimited("%08X CSI INT IPI: %08X\n",
+				    (uint32_t) dev->base_address, ind_status);
+	}
+	spin_unlock_irqrestore(&dev->slock, flags);
+	return IRQ_HANDLED;
+}
+
+static int
+dw_mipi_csi_parse_dt(struct platform_device *pdev, struct mipi_csi_dev *dev)
+{
+	struct device_node *node = pdev->dev.of_node;
+	int reg;
+	int ret = 0;
+
+	/* Device tree information */
+	ret = of_property_read_u32(node, "data-lanes", &dev->hw.num_lanes);
+	if (ret) {
+		dev_err(&pdev->dev, "Couldn't read data-lanes\n");
+		return ret;
+	}
+
+	ret = of_property_read_u32(node, "output-type", &dev->hw.output_type);
+	if (ret) {
+		dev_err(&pdev->dev, "Couldn't read output-type\n");
+		return ret;
+	}
+
+	ret = of_property_read_u32(node, "ipi-mode", &dev->hw.ipi_mode);
+	if (ret) {
+		dev_err(&pdev->dev, "Couldn't read ipi-mode\n");
+		return ret;
+	}
+
+	ret =
+	    of_property_read_u32(node, "ipi-auto-flush",
+				 &dev->hw.ipi_auto_flush);
+	if (ret) {
+		dev_err(&pdev->dev, "Couldn't read ipi-auto-flush\n");
+		return ret;
+	}
+
+	ret =
+	    of_property_read_u32(node, "ipi-color-mode",
+				 &dev->hw.ipi_color_mode);
+	if (ret) {
+		dev_err(&pdev->dev, "Couldn't read ipi-color-mode\n");
+		return ret;
+	}
+
+	ret =
+	    of_property_read_u32(node, "virtual-channel", &dev->hw.virtual_ch);
+	if (ret) {
+		dev_err(&pdev->dev, "Couldn't read virtual-channel\n");
+		return ret;
+	}
+
+	node = of_get_child_by_name(node, "port");
+	if (!node)
+		return -EINVAL;
+
+	ret = of_property_read_u32(node, "reg", &reg);
+	if (ret) {
+		dev_err(&pdev->dev, "Couldn't read reg value\n");
+		return ret;
+	}
+	dev->index = reg - 1;
+
+	if (dev->index >= CSI_MAX_ENTITIES)
+		return -ENXIO;
+
+	return 0;
+}
+
+static const struct of_device_id dw_mipi_csi_of_match[];
+
+/**
+ * @short Initialization routine - Entry point of the driver
+ * @param[in] pdev pointer to the platform device structure
+ * @return 0 on success and a negative number on failure
+ * Refer to Linux errors.
+ */
+static int mipi_csi_probe(struct platform_device *pdev)
+{
+	const struct of_device_id *of_id;
+	struct device *dev = &pdev->dev;
+	struct resource *res = NULL;
+	struct mipi_csi_dev *mipi_csi;
+	int ret = -ENOMEM;
+
+	dev_info(&pdev->dev, "Installing MIPI CSI-2 module\n");
+
+	dev_dbg(&pdev->dev, "Device registration\n");
+	mipi_csi = devm_kzalloc(dev, sizeof(*mipi_csi), GFP_KERNEL);
+	if (!dev)
+		return -ENOMEM;
+
+	mutex_init(&mipi_csi->lock);
+	spin_lock_init(&mipi_csi->slock);
+	mipi_csi->pdev = pdev;
+
+	of_id = of_match_node(dw_mipi_csi_of_match, dev->of_node);
+	if (WARN_ON(of_id == NULL))
+		return -EINVAL;
+
+	ret = dw_mipi_csi_parse_dt(pdev, mipi_csi);
+	if (ret < 0)
+		return ret;
+
+	dev_info(dev, "Request DPHY\n");
+	mipi_csi->phy = devm_phy_get(dev, "csi2-dphy");
+	if (IS_ERR(mipi_csi->phy))
+		return PTR_ERR(mipi_csi->phy);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	mipi_csi->base_address = devm_ioremap_resource(dev, res);
+
+	if (IS_ERR(mipi_csi->base_address))
+		return PTR_ERR(mipi_csi->base_address);
+
+	mipi_csi->ctrl_irq_number = platform_get_irq(pdev, 0);
+	if (mipi_csi->ctrl_irq_number <= 0) {
+		dev_err(dev, "IRQ number not set.\n");
+		return mipi_csi->ctrl_irq_number;
+	}
+
+	ret = devm_request_irq(dev, mipi_csi->ctrl_irq_number,
+			       dw_mipi_csi_irq1, IRQF_SHARED,
+			       dev_name(dev), mipi_csi);
+	if (ret) {
+		dev_err(dev, "IRQ failed\n");
+		goto end;
+	}
+
+	v4l2_subdev_init(&mipi_csi->sd, &dw_mipi_csi_subdev_ops);
+	mipi_csi->sd.owner = THIS_MODULE;
+	snprintf(mipi_csi->sd.name, sizeof(mipi_csi->sd.name), "%s.%d",
+		 CSI_DEVICE_NAME, mipi_csi->index);
+	mipi_csi->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+	mipi_csi->fmt = &dw_mipi_csi_formats[0];
+
+	mipi_csi->format.code = dw_mipi_csi_formats[0].code;
+	mipi_csi->format.width = MIN_WIDTH;
+	mipi_csi->format.height = MIN_HEIGHT;
+
+	mipi_csi->pads[CSI_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
+	mipi_csi->pads[CSI_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
+	ret = media_entity_pads_init(&mipi_csi->sd.entity,
+				     CSI_PADS_NUM, mipi_csi->pads);
+
+	if (ret < 0) {
+		dev_err(dev, "Media Entity init failed\n");
+		goto entity_cleanup;
+	}
+
+	/* This allows to retrieve the platform device id by the host driver */
+	v4l2_set_subdevdata(&mipi_csi->sd, pdev);
+
+	/* .. and a pointer to the subdev. */
+	platform_set_drvdata(pdev, &mipi_csi->sd);
+
+	dw_mipi_csi_mask_irq_power_off(mipi_csi);
+	dev_info(dev, "DW MIPI CSI-2 Host registered successfully\n");
+	return 0;
+
+entity_cleanup:
+	media_entity_cleanup(&mipi_csi->sd.entity);
+end:
+	return ret;
+}
+
+/**
+ * @short Exit routine - Exit point of the driver
+ * @param[in] pdev pointer to the platform device structure
+ * @return 0 on success and a negative number on failure
+ * Refer to Linux errors.
+ */
+static int mipi_csi_remove(struct platform_device *pdev)
+{
+	struct v4l2_subdev *sd = platform_get_drvdata(pdev);
+	struct mipi_csi_dev *mipi_csi = sd_to_mipi_csi_dev(sd);
+
+	dev_dbg(&pdev->dev, "Removing MIPI CSI-2 module\n");
+	media_entity_cleanup(&mipi_csi->sd.entity);
+
+	return 0;
+}
+
+/**
+ * @short of_device_id structure
+ */
+static const struct of_device_id dw_mipi_csi_of_match[] = {
+	{
+	 .compatible = "snps,dw-mipi-csi"},
+	{ /* sentinel */ },
+};
+
+MODULE_DEVICE_TABLE(of, dw_mipi_csi_of_match);
+
+/**
+ * @short Platform driver structure
+ */
+static struct platform_driver __refdata dw_mipi_csi_pdrv = {
+	.remove = mipi_csi_remove,
+	.probe = mipi_csi_probe,
+	.driver = {
+		   .name = CSI_DEVICE_NAME,
+		   .owner = THIS_MODULE,
+		   .of_match_table = dw_mipi_csi_of_match,
+		   },
+};
+
+module_platform_driver(dw_mipi_csi_pdrv);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
+MODULE_DESCRIPTION("Synopsys DW MIPI CSI-2 Host driver");
diff --git a/drivers/media/platform/dwc/dw_mipi_csi.h b/drivers/media/platform/dwc/dw_mipi_csi.h
new file mode 100644
index 0000000..5e4c48c
--- /dev/null
+++ b/drivers/media/platform/dwc/dw_mipi_csi.h
@@ -0,0 +1,179 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef DW_MIPI_CSI_H_
+#define DW_MIPI_CSI_H_
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_graph.h>
+#include <linux/delay.h>
+#include <linux/wait.h>
+#include <linux/string.h>
+#include <linux/phy/phy.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-dv-timings.h>
+#include <linux/videodev2.h>
+#include <linux/io.h>
+
+#include "plat_ipk_video.h"
+
+#define CSI_DEVICE_NAME	"dw-mipi-csi"
+
+/** @short DWC MIPI CSI-2 register addresses*/
+enum register_addresses {
+	R_CSI2_VERSION = 0x00,
+	R_CSI2_N_LANES = 0x04,
+	R_CSI2_CTRL_RESETN = 0x08,
+	R_CSI2_INTERRUPT = 0x0C,
+	R_CSI2_DATA_IDS_1 = 0x10,
+	R_CSI2_DATA_IDS_2 = 0x14,
+	R_CSI2_IPI_MODE = 0x80,
+	R_CSI2_IPI_VCID = 0x84,
+	R_CSI2_IPI_DATA_TYPE = 0x88,
+	R_CSI2_IPI_MEM_FLUSH = 0x8C,
+	R_CSI2_IPI_HSA_TIME = 0x90,
+	R_CSI2_IPI_HBP_TIME = 0x94,
+	R_CSI2_IPI_HSD_TIME = 0x98,
+	R_CSI2_IPI_HLINE_TIME = 0x9C,
+	R_CSI2_IPI_VSA_LINES = 0xB0,
+	R_CSI2_IPI_VBP_LINES = 0xB4,
+	R_CSI2_IPI_VFP_LINES = 0xB8,
+	R_CSI2_IPI_VACTIVE_LINES = 0xBC,
+	R_CSI2_INT_PHY_FATAL = 0xe0,
+	R_CSI2_MASK_INT_PHY_FATAL = 0xe4,
+	R_CSI2_FORCE_INT_PHY_FATAL = 0xe8,
+	R_CSI2_INT_PKT_FATAL = 0xf0,
+	R_CSI2_MASK_INT_PKT_FATAL = 0xf4,
+	R_CSI2_FORCE_INT_PKT_FATAL = 0xf8,
+	R_CSI2_INT_FRAME_FATAL = 0x100,
+	R_CSI2_MASK_INT_FRAME_FATAL = 0x104,
+	R_CSI2_FORCE_INT_FRAME_FATAL = 0x108,
+	R_CSI2_INT_PHY = 0x110,
+	R_CSI2_MASK_INT_PHY = 0x114,
+	R_CSI2_FORCE_INT_PHY = 0x118,
+	R_CSI2_INT_PKT = 0x120,
+	R_CSI2_MASK_INT_PKT = 0x124,
+	R_CSI2_FORCE_INT_PKT = 0x128,
+	R_CSI2_INT_LINE = 0x130,
+	R_CSI2_MASK_INT_LINE = 0x134,
+	R_CSI2_FORCE_INT_LINE = 0x138,
+	R_CSI2_INT_IPI = 0x140,
+	R_CSI2_MASK_INT_IPI = 0x144,
+	R_CSI2_FORCE_INT_IPI = 0x148
+};
+
+/** @short IPI Data Types */
+enum data_type {
+	CSI_2_YUV420_8 = 0x18,
+	CSI_2_YUV420_10 = 0x19,
+	CSI_2_YUV420_8_LEG = 0x1A,
+	CSI_2_YUV420_8_SHIFT = 0x1C,
+	CSI_2_YUV420_10_SHIFT = 0x1D,
+	CSI_2_YUV422_8 = 0x1E,
+	CSI_2_YUV422_10 = 0x1F,
+	CSI_2_RGB444 = 0x20,
+	CSI_2_RGB555 = 0x21,
+	CSI_2_RGB565 = 0x22,
+	CSI_2_RGB666 = 0x23,
+	CSI_2_RGB888 = 0x24,
+	CSI_2_RAW6 = 0x28,
+	CSI_2_RAW7 = 0x29,
+	CSI_2_RAW8 = 0x2A,
+	CSI_2_RAW10 = 0x2B,
+	CSI_2_RAW12 = 0x2C,
+	CSI_2_RAW14 = 0x2D,
+};
+
+/** @short Interrupt Masks */
+enum interrupt_type {
+	CSI2_INT_PHY_FATAL = 1 << 0,
+	CSI2_INT_PKT_FATAL = 1 << 1,
+	CSI2_INT_FRAME_FATAL = 1 << 2,
+	CSI2_INT_PHY = 1 << 16,
+	CSI2_INT_PKT = 1 << 17,
+	CSI2_INT_LINE = 1 << 18,
+	CSI2_INT_IPI = 1 << 19,
+
+};
+
+/** @short DWC MIPI CSI-2 output types*/
+enum output_type {
+	IPI_OUT = 0,
+	IDI_OUT = 1,
+	BOTH_OUT = 2
+};
+
+/** @short IPI output types*/
+enum ipi_output_type {
+	CAMERA_TIMING = 0,
+	AUTO_TIMING = 1
+};
+
+/**
+ * @short Format template
+ */
+struct mipi_fmt {
+	const char *name;
+	u32 code;
+	u8 depth;
+};
+
+struct csi_hw {
+
+	uint32_t num_lanes;
+	uint32_t output_type;
+
+	/*IPI Info */
+	uint32_t ipi_mode;
+	uint32_t ipi_color_mode;
+	uint32_t ipi_auto_flush;
+	uint32_t virtual_ch;
+
+	uint32_t hsa;
+	uint32_t hbp;
+	uint32_t hsd;
+	uint32_t htotal;
+
+	uint32_t vsa;
+	uint32_t vbp;
+	uint32_t vfp;
+	uint32_t vactive;
+};
+
+/**
+ * @short Structure to embed device driver information
+ */
+struct mipi_csi_dev {
+	struct v4l2_subdev sd;
+	struct video_device vdev;
+
+	struct mutex lock;
+	spinlock_t slock;
+	struct media_pad pads[CSI_PADS_NUM];
+	struct platform_device *pdev;
+	u8 index;
+
+	/** Store current format */
+	const struct mipi_fmt *fmt;
+	struct v4l2_mbus_framefmt format;
+
+	/** Device Tree Information */
+	void __iomem *base_address;
+	uint32_t ctrl_irq_number;
+
+	struct csi_hw hw;
+
+	struct phy *phy;
+};
+
+#endif				/* DW_MIPI_CSI */
diff --git a/drivers/media/platform/dwc/plat_ipk.c b/drivers/media/platform/dwc/plat_ipk.c
new file mode 100644
index 0000000..48b9e36
--- /dev/null
+++ b/drivers/media/platform/dwc/plat_ipk.c
@@ -0,0 +1,835 @@
+/**
+ * DWC MIPI CSI-2 Host IPK platform device driver
+ *
+ * Based on Omnivision OV7670 Camera Driver
+ * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
+ * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
+ *
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ * Author: Ramiro Oliveira <ramiro.oliveira@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation, either version 2 of the License,
+ * or (at your option) any later version.
+ */
+
+#include "plat_ipk.h"
+#include "video_device.h"
+#include "dw_mipi_csi.h"
+#include <media/v4l2-of.h>
+#include <media/v4l2-subdev.h>
+
+static int
+__plat_ipk_pipeline_s_format(struct plat_ipk_media_pipeline *ep,
+			     struct v4l2_subdev_format *fmt)
+{
+
+	struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+	static const u8 seq[IDX_MAX] = {IDX_SENSOR, IDX_CSI, IDX_VDEV};
+
+	fmt->which = V4L2_SUBDEV_FORMAT_ACTIVE;
+	v4l2_subdev_call(p->subdevs[seq[IDX_CSI]], pad, set_fmt, NULL, fmt);
+
+	return 0;
+}
+
+static void
+plat_ipk_pipeline_prepare(struct plat_ipk_pipeline *p, struct media_entity *me)
+{
+	struct v4l2_subdev *sd;
+	int i = 0;
+
+	for (i = 0; i < IDX_MAX; i++)
+		p->subdevs[i] = NULL;
+
+	while (1) {
+		struct media_pad *pad = NULL;
+
+		for (i = 0; i < me->num_pads; i++) {
+			struct media_pad *spad = &me->pads[i];
+
+			if (!(spad->flags & MEDIA_PAD_FL_SINK))
+				continue;
+
+			pad = media_entity_remote_pad(spad);
+			if (pad)
+				break;
+		}
+		if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
+			break;
+
+		sd = media_entity_to_v4l2_subdev(pad->entity);
+
+		switch (sd->grp_id) {
+		case GRP_ID_SENSOR:
+			p->subdevs[IDX_SENSOR] = sd;
+			break;
+		case GRP_ID_CSI:
+			p->subdevs[IDX_CSI] = sd;
+			break;
+		case GRP_ID_VIDEODEV:
+			p->subdevs[IDX_VDEV] = sd;
+			break;
+		default:
+			break;
+		}
+		me = &sd->entity;
+		if (me->num_pads == 1)
+			break;
+	}
+}
+
+static int __subdev_set_power(struct v4l2_subdev *sd, int on)
+{
+	int *use_count;
+	int ret;
+
+	if (sd == NULL) {
+		pr_info("null subdev\n");
+		return -ENXIO;
+	}
+	use_count = &sd->entity.use_count;
+	if (on && (*use_count)++ > 0)
+		return 0;
+	else if (!on && (*use_count == 0 || --(*use_count) > 0))
+		return 0;
+
+	pr_debug("%d %s !\n", on, sd->entity.name);
+	ret = v4l2_subdev_call(sd, core, s_power, on);
+
+	return ret != -ENOIOCTLCMD ? ret : 0;
+}
+
+static int plat_ipk_pipeline_s_power(struct plat_ipk_pipeline *p, bool on)
+{
+	static const u8 seq[IDX_MAX] = {IDX_CSI, IDX_SENSOR, IDX_VDEV};
+	int i, ret = 0;
+
+	for (i = 0; i < IDX_MAX; i++) {
+		unsigned int idx = seq[i];
+
+		if (p->subdevs[idx] == NULL)
+			pr_info("No device registered on %d\n", idx);
+		else {
+			ret = __subdev_set_power(p->subdevs[idx], on);
+			if (ret < 0 && ret != -ENXIO)
+				goto error;
+		}
+	}
+	return 0;
+error:
+	for (; i >= 0; i--) {
+		unsigned int idx = seq[i];
+
+		__subdev_set_power(p->subdevs[idx], !on);
+	}
+	return ret;
+}
+
+static int
+__plat_ipk_pipeline_open(struct plat_ipk_media_pipeline *ep,
+			 struct media_entity *me, bool prepare)
+{
+	struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+	int ret;
+
+	if (WARN_ON(p == NULL || me == NULL))
+		return -EINVAL;
+
+	if (prepare)
+		plat_ipk_pipeline_prepare(p, me);
+
+	ret = plat_ipk_pipeline_s_power(p, 1);
+	if (!ret)
+		return 0;
+
+	return ret;
+}
+
+static int __plat_ipk_pipeline_close(struct plat_ipk_media_pipeline *ep)
+{
+	struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+	int ret;
+
+	ret = plat_ipk_pipeline_s_power(p, 0);
+
+	return ret == -ENXIO ? 0 : ret;
+}
+
+static int
+__plat_ipk_pipeline_s_stream(struct plat_ipk_media_pipeline *ep, bool on)
+{
+	static const u8 seq[IDX_MAX] = {IDX_SENSOR, IDX_CSI, IDX_VDEV};
+	struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+	int i, ret = 0;
+
+	for (i = 0; i < IDX_MAX; i++) {
+		unsigned int idx = seq[i];
+
+		if (p->subdevs[idx] == NULL)
+			pr_debug("No device registered on %d\n", idx);
+		else {
+			ret =
+			    v4l2_subdev_call(p->subdevs[idx], video, s_stream,
+					     on);
+
+			if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
+				goto error;
+		}
+	}
+	return 0;
+error:
+	for (; i >= 0; i--) {
+		unsigned int idx = seq[i];
+
+		v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
+	}
+	return ret;
+}
+
+static const struct plat_ipk_media_pipeline_ops plat_ipk_pipeline_ops = {
+	.open = __plat_ipk_pipeline_open,
+	.close = __plat_ipk_pipeline_close,
+	.set_format = __plat_ipk_pipeline_s_format,
+	.set_stream = __plat_ipk_pipeline_s_stream,
+};
+
+static struct plat_ipk_media_pipeline *
+plat_ipk_pipeline_create(struct plat_ipk_dev *plat_ipk)
+{
+	struct plat_ipk_pipeline *p;
+
+	p = kzalloc(sizeof(*p), GFP_KERNEL);
+	if (!p)
+		return NULL;
+
+	list_add_tail(&p->list, &plat_ipk->pipelines);
+
+	p->ep.ops = &plat_ipk_pipeline_ops;
+	return &p->ep;
+}
+
+static void
+plat_ipk_pipelines_free(struct plat_ipk_dev *plat_ipk)
+{
+	while (!list_empty(&plat_ipk->pipelines)) {
+		struct plat_ipk_pipeline *p;
+
+		p = list_entry(plat_ipk->pipelines.next, typeof(*p), list);
+		list_del(&p->list);
+		kfree(p);
+	}
+}
+
+static int
+plat_ipk_parse_port_node(struct plat_ipk_dev *plat_ipk,
+			 struct device_node *port, unsigned int index)
+{
+	struct device_node *rem, *ep;
+	struct v4l2_of_endpoint endpoint;
+	struct plat_ipk_source_info *pd = &plat_ipk->sensor[index].pdata;
+
+	/* Assume here a port node can have only one endpoint node. */
+	ep = of_get_next_child(port, NULL);
+	if (!ep)
+		return 0;
+
+	v4l2_of_parse_endpoint(ep, &endpoint);
+	if (WARN_ON(endpoint.base.port == 0) || index >= PLAT_MAX_SENSORS)
+		return -EINVAL;
+
+	pd->mux_id = endpoint.base.port - 1;
+
+	rem = of_graph_get_remote_port_parent(ep);
+	of_node_put(ep);
+	if (rem == NULL) {
+		v4l2_info(&plat_ipk->v4l2_dev,
+			  "Remote device at %s not found\n", ep->full_name);
+		return 0;
+	}
+
+	if (WARN_ON(index >= ARRAY_SIZE(plat_ipk->sensor)))
+		return -EINVAL;
+
+	plat_ipk->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_OF;
+	plat_ipk->sensor[index].asd.match.of.node = rem;
+	plat_ipk->async_subdevs[index] = &plat_ipk->sensor[index].asd;
+
+	plat_ipk->num_sensors++;
+
+	of_node_put(rem);
+	return 0;
+}
+
+
+static int plat_ipk_register_sensor_entities(struct plat_ipk_dev *plat_ipk)
+{
+	struct device_node *parent = plat_ipk->pdev->dev.of_node;
+	struct device_node *node;
+	int index = 0;
+	int ret;
+
+	plat_ipk->num_sensors = 0;
+
+	for_each_available_child_of_node(parent, node) {
+		struct device_node *port;
+
+		if (of_node_cmp(node->name, "csi2"))
+			continue;
+		port = of_get_next_child(node, NULL);
+		if (!port)
+			continue;
+
+		ret = plat_ipk_parse_port_node(plat_ipk, port, index);
+		if (ret < 0)
+			return ret;
+		index++;
+	}
+	return 0;
+}
+
+static int
+__of_get_port_id(struct device_node *np)
+{
+	u32 reg = 0;
+
+	np = of_get_child_by_name(np, "port");
+	if (!np)
+		return -EINVAL;
+	of_property_read_u32(np, "reg", &reg);
+
+	return reg - 1;
+}
+
+static int register_videodev_entity(struct plat_ipk_dev *plat_ipk,
+			 struct video_device_dev *vid_dev)
+{
+	struct v4l2_subdev *sd;
+	struct plat_ipk_media_pipeline *ep;
+	int ret;
+
+	sd = &vid_dev->subdev;
+	sd->grp_id = GRP_ID_VIDEODEV;
+
+	ep = plat_ipk_pipeline_create(plat_ipk);
+	if (!ep)
+		return -ENOMEM;
+
+	v4l2_set_subdev_hostdata(sd, ep);
+
+	ret = v4l2_device_register_subdev(&plat_ipk->v4l2_dev, sd);
+	if (!ret)
+		plat_ipk->vid_dev = vid_dev;
+	else
+		v4l2_err(&plat_ipk->v4l2_dev,
+			 "Failed to register Video Device\n");
+	return ret;
+}
+
+static int register_mipi_csi_entity(struct plat_ipk_dev *plat_ipk,
+			 struct platform_device *pdev, struct v4l2_subdev *sd)
+{
+	struct device_node *node = pdev->dev.of_node;
+	int id, ret;
+
+	id = node ? __of_get_port_id(node) : max(0, pdev->id);
+
+	if (WARN_ON(id < 0 || id >= CSI_MAX_ENTITIES))
+		return -ENOENT;
+
+	if (WARN_ON(plat_ipk->mipi_csi[id].sd))
+		return -EBUSY;
+
+	sd->grp_id = GRP_ID_CSI;
+	ret = v4l2_device_register_subdev(&plat_ipk->v4l2_dev, sd);
+
+	if (!ret)
+		plat_ipk->mipi_csi[id].sd = sd;
+	else
+		v4l2_err(&plat_ipk->v4l2_dev,
+			 "Failed to register MIPI-CSI.%d (%d)\n", id, ret);
+	return ret;
+}
+
+static int plat_ipk_register_platform_entity(struct plat_ipk_dev *plat_ipk,
+				struct platform_device *pdev, int plat_entity)
+{
+	struct device *dev = &pdev->dev;
+	int ret = -EPROBE_DEFER;
+	void *drvdata;
+
+
+	device_lock(dev);
+	if (!dev->driver || !try_module_get(dev->driver->owner))
+		goto dev_unlock;
+
+	drvdata = dev_get_drvdata(dev);
+
+	if (drvdata) {
+		switch (plat_entity) {
+		case IDX_VDEV:
+			ret = register_videodev_entity(plat_ipk, drvdata);
+			break;
+		case IDX_CSI:
+			ret = register_mipi_csi_entity(plat_ipk, pdev, drvdata);
+			break;
+		default:
+			ret = -ENODEV;
+		}
+	} else
+		dev_err(&plat_ipk->pdev->dev, "%s no drvdata\n", dev_name(dev));
+	module_put(dev->driver->owner);
+dev_unlock:
+	device_unlock(dev);
+	if (ret == -EPROBE_DEFER)
+		dev_info(&plat_ipk->pdev->dev,
+			 "deferring %s device registration\n", dev_name(dev));
+	else if (ret < 0)
+		dev_err(&plat_ipk->pdev->dev,
+			"%s device registration failed (%d)\n", dev_name(dev),
+			ret);
+	return ret;
+}
+
+static int
+plat_ipk_register_platform_entities(struct plat_ipk_dev *plat_ipk,
+				    struct device_node *parent)
+{
+	struct device_node *node;
+	int ret = 0;
+
+	for_each_available_child_of_node(parent, node) {
+		struct platform_device *pdev;
+		int plat_entity = -1;
+
+		pdev = of_find_device_by_node(node);
+		if (!pdev)
+			continue;
+
+		if (!strcmp(node->name, VIDEODEV_OF_NODE_NAME))
+			plat_entity = IDX_VDEV;
+		else if (!strcmp(node->name, CSI_OF_NODE_NAME))
+			plat_entity = IDX_CSI;
+
+		if (plat_entity >= 0)
+			ret = plat_ipk_register_platform_entity(plat_ipk, pdev,
+								plat_entity);
+		put_device(&pdev->dev);
+		if (ret < 0)
+			break;
+	}
+
+	return ret;
+}
+
+static void
+plat_ipk_unregister_entities(struct plat_ipk_dev *plat_ipk)
+{
+	int i;
+	struct video_device_dev *dev = plat_ipk->vid_dev;
+
+	if (dev == NULL)
+		return;
+	v4l2_device_unregister_subdev(&dev->subdev);
+	dev->ve.pipe = NULL;
+	plat_ipk->vid_dev = NULL;
+
+	for (i = 0; i < CSI_MAX_ENTITIES; i++) {
+		if (plat_ipk->mipi_csi[i].sd == NULL)
+			continue;
+		v4l2_device_unregister_subdev(plat_ipk->mipi_csi[i].sd);
+		plat_ipk->mipi_csi[i].sd = NULL;
+	}
+
+	v4l2_info(&plat_ipk->v4l2_dev, "Unregistered all entities\n");
+}
+
+static int
+__plat_ipk_create_videodev_sink_links(struct plat_ipk_dev *plat_ipk,
+				      struct media_entity *source,
+				      int pad)
+{
+	struct media_entity *sink;
+	int ret = 0;
+
+	if (!plat_ipk->vid_dev)
+		return 0;
+
+	sink = &plat_ipk->vid_dev->subdev.entity;
+	ret = media_create_pad_link(source, pad, sink,
+				    CSI_PAD_SOURCE, MEDIA_LNK_FL_ENABLED);
+	if (ret)
+		return ret;
+
+	ret = media_entity_call(sink, link_setup, &sink->pads[0],
+				&source->pads[pad], 0);
+	if (ret)
+		return 0;
+
+	v4l2_info(&plat_ipk->v4l2_dev, "created link [%s] -> [%s]\n",
+		  source->name, sink->name);
+
+	return 0;
+}
+
+
+static int
+__plat_ipk_create_videodev_source_links(struct plat_ipk_dev *plat_ipk)
+{
+	struct media_entity *source, *sink;
+	int ret = 0;
+
+	struct video_device_dev *vid_dev = plat_ipk->vid_dev;
+
+	if (vid_dev == NULL)
+		return -ENODEV;
+
+	source = &vid_dev->subdev.entity;
+	sink = &vid_dev->ve.vdev.entity;
+
+	ret = media_create_pad_link(source, VIDEO_DEV_SD_PAD_SOURCE_DMA,
+				    sink, 0, MEDIA_LNK_FL_ENABLED);
+
+	v4l2_info(&plat_ipk->v4l2_dev, "created link [%s] -> [%s]\n",
+		  source->name, sink->name);
+	return ret;
+}
+
+static int
+plat_ipk_create_links(struct plat_ipk_dev *plat_ipk)
+{
+	struct v4l2_subdev *csi_sensor[CSI_MAX_ENTITIES] = { NULL };
+	struct v4l2_subdev *sensor, *csi;
+	struct media_entity *source;
+	struct plat_ipk_source_info *pdata;
+	int i, pad, ret = 0;
+
+	for (i = 0; i < plat_ipk->num_sensors; i++) {
+		if (plat_ipk->sensor[i].subdev == NULL)
+			continue;
+
+		sensor = plat_ipk->sensor[i].subdev;
+		pdata = v4l2_get_subdev_hostdata(sensor);
+		if (!pdata)
+			continue;
+
+		source = NULL;
+
+		csi = plat_ipk->mipi_csi[pdata->mux_id].sd;
+		if (WARN(csi == NULL, "MIPI-CSI interface specified but	dw-mipi-csi module is not loaded!\n"))
+			return -EINVAL;
+
+		pad = sensor->entity.num_pads - 1;
+		ret = media_create_pad_link(&sensor->entity, pad,
+					    &csi->entity, CSI_PAD_SINK,
+					    MEDIA_LNK_FL_IMMUTABLE |
+					    MEDIA_LNK_FL_ENABLED);
+
+		if (ret)
+			return ret;
+		v4l2_info(&plat_ipk->v4l2_dev, "created link [%s] -> [%s]\n",
+			  sensor->entity.name, csi->entity.name);
+
+		csi_sensor[pdata->mux_id] = sensor;
+	}
+
+	for (i = 0; i < CSI_MAX_ENTITIES; i++) {
+		if (plat_ipk->mipi_csi[i].sd == NULL) {
+			pr_info("no link\n");
+			continue;
+		}
+
+		source = &plat_ipk->mipi_csi[i].sd->entity;
+		pad = VIDEO_DEV_SD_PAD_SINK_CSI;
+
+		ret = __plat_ipk_create_videodev_sink_links(plat_ipk, source,
+								pad);
+	}
+
+	ret = __plat_ipk_create_videodev_source_links(plat_ipk);
+	if (ret < 0)
+		return ret;
+
+	return ret;
+}
+
+static int __plat_ipk_modify_pipeline(struct media_entity *entity, bool enable)
+{
+	struct plat_ipk_video_entity *ve;
+	struct plat_ipk_pipeline *p;
+	struct video_device *vdev;
+	int ret;
+
+	vdev = media_entity_to_video_device(entity);
+
+	if (vdev->entity.use_count == 0)
+		return 0;
+
+	ve = vdev_to_plat_ipk_video_entity(vdev);
+	p = to_plat_ipk_pipeline(ve->pipe);
+
+	if (enable)
+		ret = __plat_ipk_pipeline_open(ve->pipe, entity, true);
+	else
+		ret = __plat_ipk_pipeline_close(ve->pipe);
+
+	if (ret == 0 && !enable)
+		memset(p->subdevs, 0, sizeof(p->subdevs));
+
+	return ret;
+}
+
+
+static int
+__plat_ipk_modify_pipelines(struct media_entity *entity, bool enable,
+			    struct media_entity_graph *graph)
+{
+	struct media_entity *entity_err = entity;
+	int ret;
+
+	media_entity_graph_walk_start(graph, entity);
+
+	while ((entity = media_entity_graph_walk_next(graph))) {
+		if (!is_media_entity_v4l2_video_device(entity))
+			continue;
+
+		ret = __plat_ipk_modify_pipeline(entity, enable);
+
+		if (ret < 0)
+			goto err;
+	}
+
+	return 0;
+
+err:
+	media_entity_graph_walk_start(graph, entity_err);
+
+	while ((entity_err = media_entity_graph_walk_next(graph))) {
+		if (!is_media_entity_v4l2_video_device(entity_err))
+			continue;
+
+		__plat_ipk_modify_pipeline(entity_err, !enable);
+
+		if (entity_err == entity)
+			break;
+	}
+
+	return ret;
+}
+
+static int
+plat_ipk_link_notify(struct media_link *link, unsigned int flags,
+		     unsigned int notification)
+{
+	struct media_entity_graph *graph =
+	    &container_of(link->graph_obj.mdev, struct plat_ipk_dev,
+			  media_dev)->link_setup_graph;
+	struct media_entity *sink = link->sink->entity;
+	int ret = 0;
+
+	pr_debug("Link notify\n");
+
+	if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
+		ret = media_entity_graph_walk_init(graph, link->graph_obj.mdev);
+		if (ret)
+			return ret;
+		if (!(flags & MEDIA_LNK_FL_ENABLED))
+			ret = __plat_ipk_modify_pipelines(sink, false, graph);
+
+	} else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) {
+		if (link->flags & MEDIA_LNK_FL_ENABLED)
+			ret = __plat_ipk_modify_pipelines(sink, true, graph);
+		media_entity_graph_walk_cleanup(graph);
+	}
+
+	return ret ? -EPIPE : 0;
+}
+static const struct media_device_ops plat_ipk_media_ops = {
+	.link_notify = plat_ipk_link_notify,
+};
+
+
+static int
+subdev_notifier_bound(struct v4l2_async_notifier *notifier,
+		      struct v4l2_subdev *subdev, struct v4l2_async_subdev *asd)
+{
+	struct plat_ipk_dev *plat_ipk = notifier_to_plat_ipk(notifier);
+	struct plat_ipk_sensor_info *si = NULL;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(plat_ipk->sensor); i++)
+		if (plat_ipk->sensor[i].asd.match.of.node ==
+		    subdev->dev->of_node)
+			si = &plat_ipk->sensor[i];
+
+	if (si == NULL)
+		return -EINVAL;
+
+	v4l2_set_subdev_hostdata(subdev, &si->pdata);
+
+	subdev->grp_id = GRP_ID_SENSOR;
+
+	si->subdev = subdev;
+
+	v4l2_info(&plat_ipk->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
+		  subdev->name, plat_ipk->num_sensors);
+
+	plat_ipk->num_sensors++;
+
+	return 0;
+}
+
+static int
+subdev_notifier_complete(struct v4l2_async_notifier *notifier)
+{
+	struct plat_ipk_dev *plat_ipk = notifier_to_plat_ipk(notifier);
+	int ret;
+
+	mutex_lock(&plat_ipk->media_dev.graph_mutex);
+
+	ret = plat_ipk_create_links(plat_ipk);
+	if (ret < 0)
+		goto unlock;
+
+	ret = v4l2_device_register_subdev_nodes(&plat_ipk->v4l2_dev);
+unlock:
+	mutex_unlock(&plat_ipk->media_dev.graph_mutex);
+	if (ret < 0)
+		return ret;
+
+	return media_device_register(&plat_ipk->media_dev);
+}
+
+static const struct of_device_id plat_ipk_of_match[];
+
+static int plat_ipk_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct v4l2_device *v4l2_dev;
+	struct plat_ipk_dev *plat_ipk;
+	int ret;
+
+	dev_info(dev, "Installing DW MIPI CSI-2 IPK Platform module\n");
+
+	plat_ipk = devm_kzalloc(dev, sizeof(*plat_ipk), GFP_KERNEL);
+	if (!plat_ipk)
+		return -ENOMEM;
+
+	spin_lock_init(&plat_ipk->slock);
+	INIT_LIST_HEAD(&plat_ipk->pipelines);
+	plat_ipk->pdev = pdev;
+
+	strlcpy(plat_ipk->media_dev.model, "SNPS IPK Platform",
+		sizeof(plat_ipk->media_dev.model));
+	plat_ipk->media_dev.ops = &plat_ipk_media_ops;
+	plat_ipk->media_dev.dev = dev;
+
+	v4l2_dev = &plat_ipk->v4l2_dev;
+	v4l2_dev->mdev = &plat_ipk->media_dev;
+	strlcpy(v4l2_dev->name, "plat-ipk", sizeof(v4l2_dev->name));
+
+	media_device_init(&plat_ipk->media_dev);
+
+	ret = v4l2_device_register(dev, &plat_ipk->v4l2_dev);
+	if (ret < 0) {
+		v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
+		return ret;
+	}
+
+	platform_set_drvdata(pdev, plat_ipk);
+
+	ret = plat_ipk_register_platform_entities(plat_ipk, dev->of_node);
+	if (ret)
+		goto err_m_ent;
+
+	ret = plat_ipk_register_sensor_entities(plat_ipk);
+	if (ret)
+		goto err_m_ent;
+
+	if (plat_ipk->num_sensors > 0) {
+		plat_ipk->subdev_notifier.subdevs = plat_ipk->async_subdevs;
+		plat_ipk->subdev_notifier.num_subdevs = plat_ipk->num_sensors;
+		plat_ipk->subdev_notifier.bound = subdev_notifier_bound;
+		plat_ipk->subdev_notifier.complete = subdev_notifier_complete;
+		plat_ipk->num_sensors = 0;
+
+		ret = v4l2_async_notifier_register(&plat_ipk->v4l2_dev,
+						   &plat_ipk->subdev_notifier);
+		if (ret)
+			goto err_m_ent;
+	}
+
+	return 0;
+
+err_m_ent:
+	plat_ipk_unregister_entities(plat_ipk);
+	media_device_unregister(&plat_ipk->media_dev);
+	media_device_cleanup(&plat_ipk->media_dev);
+	v4l2_device_unregister(&plat_ipk->v4l2_dev);
+	return ret;
+}
+
+static int plat_ipk_remove(struct platform_device *pdev)
+{
+	struct plat_ipk_dev *dev = platform_get_drvdata(pdev);
+
+	if (!dev)
+		return 0;
+
+	v4l2_async_notifier_unregister(&dev->subdev_notifier);
+
+	v4l2_device_unregister(&dev->v4l2_dev);
+	plat_ipk_unregister_entities(dev);
+	plat_ipk_pipelines_free(dev);
+	media_device_unregister(&dev->media_dev);
+	media_device_cleanup(&dev->media_dev);
+
+	dev_info(&pdev->dev, "Driver removed\n");
+
+	return 0;
+}
+
+/**
+ * @short of_device_id structure
+ */
+static const struct of_device_id plat_ipk_of_match[] = {
+	{.compatible = "snps,plat-ipk"},
+	{}
+};
+
+MODULE_DEVICE_TABLE(of, plat_ipk_of_match);
+
+/**
+ * @short Platform driver structure
+ */
+static struct platform_driver plat_ipk_pdrv = {
+	.remove = plat_ipk_remove,
+	.probe = plat_ipk_probe,
+	.driver = {
+		   .name = "snps,plat-ipk",
+		   .owner = THIS_MODULE,
+		   .of_match_table = plat_ipk_of_match,
+		   },
+};
+
+static int __init
+plat_ipk_init(void)
+{
+	request_module("dw-mipi-csi");
+
+	return platform_driver_register(&plat_ipk_pdrv);
+}
+
+static void __exit
+plat_ipk_exit(void)
+{
+	platform_driver_unregister(&plat_ipk_pdrv);
+}
+
+module_init(plat_ipk_init);
+module_exit(plat_ipk_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
+MODULE_DESCRIPTION("Platform driver for MIPI CSI-2 Host IPK");
diff --git a/drivers/media/platform/dwc/plat_ipk.h b/drivers/media/platform/dwc/plat_ipk.h
new file mode 100644
index 0000000..ef569eb
--- /dev/null
+++ b/drivers/media/platform/dwc/plat_ipk.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_IPK_H_
+#define PLAT_IPK_H_
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/list.h>
+#include <linux/string.h>
+#include <media/v4l2-device.h>
+#include <linux/videodev2.h>
+#include <media/media-entity.h>
+
+#include "plat_ipk_video.h"
+
+#define VIDEODEV_OF_NODE_NAME	"video-device"
+#define CSI_OF_NODE_NAME	"csi2"
+
+enum plat_ipk_subdev_index {
+	IDX_SENSOR,
+	IDX_CSI,
+	IDX_VDEV,
+	IDX_MAX,
+};
+
+struct plat_ipk_sensor_info {
+	struct plat_ipk_source_info pdata;
+	struct v4l2_async_subdev asd;
+	struct v4l2_subdev *subdev;
+	struct mipi_csi_dev *host;
+};
+
+struct plat_ipk_pipeline {
+	struct plat_ipk_media_pipeline ep;
+	struct list_head list;
+	struct media_entity *vdev_entity;
+	struct v4l2_subdev *subdevs[IDX_MAX];
+};
+
+#define to_plat_ipk_pipeline(_ep)\
+	 container_of(_ep, struct plat_ipk_pipeline, ep)
+
+struct mipi_csi_info {
+	struct v4l2_subdev *sd;
+	int id;
+};
+
+/**
+ * @short Structure to embed device driver information
+ */
+struct plat_ipk_dev {
+	struct mipi_csi_info		mipi_csi[CSI_MAX_ENTITIES];
+	struct video_device_dev		*vid_dev;
+	struct device			*dev;
+	struct media_device		media_dev;
+	struct v4l2_device		v4l2_dev;
+	struct platform_device		*pdev;
+	struct plat_ipk_sensor_info	sensor[PLAT_MAX_SENSORS];
+	struct v4l2_async_notifier	subdev_notifier;
+	struct v4l2_async_subdev	*async_subdevs[PLAT_MAX_SENSORS];
+	spinlock_t			slock;
+	struct list_head		pipelines;
+	int				num_sensors;
+	struct media_entity_graph	link_setup_graph;
+};
+
+static inline struct plat_ipk_dev *
+entity_to_plat_ipk_mdev(struct media_entity *me)
+{
+	return me->graph_obj.mdev == NULL ? NULL :
+	    container_of(me->graph_obj.mdev, struct plat_ipk_dev, media_dev);
+}
+
+static inline struct plat_ipk_dev *
+notifier_to_plat_ipk(struct v4l2_async_notifier *n)
+{
+	return container_of(n, struct plat_ipk_dev, subdev_notifier);
+}
+
+static inline void
+plat_ipk_graph_unlock(struct plat_ipk_video_entity *ve)
+{
+	mutex_unlock(&ve->vdev.entity.graph_obj.mdev->graph_mutex);
+}
+
+#endif				/* PLAT_IPK_H_ */
diff --git a/drivers/media/platform/dwc/plat_ipk_video.h b/drivers/media/platform/dwc/plat_ipk_video.h
new file mode 100644
index 0000000..6bfc9f8
--- /dev/null
+++ b/drivers/media/platform/dwc/plat_ipk_video.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_IPK_INCLUDES_H_
+#define PLAT_IPK_INCLUDES_H_
+
+#include <media/media-entity.h>
+#include <media/v4l2-dev.h>
+#include <media/v4l2-mediabus.h>
+#include <media/v4l2-subdev.h>
+
+/*
+ * The subdevices' group IDs.
+ */
+
+#define MAX_WIDTH	3280
+#define MAX_HEIGHT	1852
+
+#define MIN_WIDTH	640
+#define MIN_HEIGHT	480
+
+#define GRP_ID_SENSOR		(10)
+#define GRP_ID_CSI		(20)
+#define GRP_ID_VIDEODEV		(30)
+
+#define CSI_MAX_ENTITIES	1
+#define PLAT_MAX_SENSORS	1
+
+enum video_dev_pads {
+	VIDEO_DEV_SD_PAD_SINK_CSI = 0,
+	VIDEO_DEV_SD_PAD_SOURCE_DMA = 1,
+	VIDEO_DEV_SD_PADS_NUM = 2,
+};
+
+enum mipi_csi_pads {
+	CSI_PAD_SINK = 0,
+	CSI_PAD_SOURCE = 1,
+	CSI_PADS_NUM = 2,
+};
+
+struct plat_ipk_source_info {
+	u16 flags;
+	u16 mux_id;
+};
+
+struct plat_ipk_fmt {
+	u32 mbus_code;
+	char *name;
+	u32 fourcc;
+	u8 depth;
+};
+
+struct plat_ipk_media_pipeline;
+
+/*
+ * Media pipeline operations to be called from within a video node,  i.e. the
+ * last entity within the pipeline. Implemented by related media device driver.
+ */
+struct plat_ipk_media_pipeline_ops {
+	int (*prepare)(struct plat_ipk_media_pipeline *p,
+			struct media_entity *me);
+	int (*unprepare)(struct plat_ipk_media_pipeline *p);
+	int (*open)(struct plat_ipk_media_pipeline *p,
+			struct media_entity *me, bool resume);
+	int (*close)(struct plat_ipk_media_pipeline *p);
+	int (*set_stream)(struct plat_ipk_media_pipeline *p, bool state);
+	int (*set_format)(struct plat_ipk_media_pipeline *p,
+			struct v4l2_subdev_format *fmt);
+};
+
+struct plat_ipk_video_entity {
+	struct video_device vdev;
+	struct plat_ipk_media_pipeline *pipe;
+};
+
+struct plat_ipk_media_pipeline {
+	struct media_pipeline mp;
+	const struct plat_ipk_media_pipeline_ops *ops;
+};
+
+static inline struct plat_ipk_video_entity *
+vdev_to_plat_ipk_video_entity(struct video_device *vdev)
+{
+	return container_of(vdev, struct plat_ipk_video_entity, vdev);
+}
+
+#define plat_ipk_pipeline_call(ent, op, args...)\
+	(!(ent) ? -ENOENT : (((ent)->pipe->ops && (ent)->pipe->ops->op) ? \
+	(ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD))	  \
+
+
+#endif				/* PLAT_IPK_INCLUDES_H_ */
diff --git a/drivers/media/platform/dwc/video_device.c b/drivers/media/platform/dwc/video_device.c
new file mode 100644
index 0000000..d827426
--- /dev/null
+++ b/drivers/media/platform/dwc/video_device.c
@@ -0,0 +1,741 @@
+/*
+ * DWC MIPI CSI-2 Host IPK video device device driver
+ *
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ * Author: Ramiro Oliveira <ramiro.oliveira@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation, either version 2 of the License,
+ * or (at your option) any later version.
+ */
+
+#include "video_device.h"
+
+const struct plat_ipk_fmt vid_dev_formats[] = {
+	{
+		.name = "RGB888",
+		.fourcc = V4L2_PIX_FMT_BGR24,
+		.depth = 24,
+		.mbus_code = MEDIA_BUS_FMT_RGB888_2X12_LE,
+	}, {
+		.name = "RGB565",
+		.fourcc = V4L2_PIX_FMT_RGB565,
+		.depth = 16,
+		.mbus_code = MEDIA_BUS_FMT_RGB565_2X8_BE,
+	},
+};
+
+const struct plat_ipk_fmt *
+vid_dev_find_format(struct v4l2_format *f, int index)
+{
+	const struct plat_ipk_fmt *fmt = NULL;
+	unsigned int i;
+
+	if (index >= (int) ARRAY_SIZE(vid_dev_formats))
+		return NULL;
+
+	for (i = 0; i < ARRAY_SIZE(vid_dev_formats); ++i) {
+		fmt = &vid_dev_formats[i];
+		if (fmt->fourcc == f->fmt.pix.pixelformat)
+			return fmt;
+	}
+	return NULL;
+}
+
+/*
+ * Video node ioctl operations
+ */
+static int
+vidioc_querycap(struct file *file, void *priv, struct v4l2_capability *cap)
+{
+	struct video_device_dev *vid_dev = video_drvdata(file);
+
+	strlcpy(cap->driver, VIDEO_DEVICE_NAME, sizeof(cap->driver));
+	strlcpy(cap->card, VIDEO_DEVICE_NAME, sizeof(cap->card));
+	snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
+		 dev_name(&vid_dev->pdev->dev));
+
+	cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
+	cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
+	return 0;
+}
+
+int
+vidioc_enum_fmt_vid_cap(struct file *file, void *priv, struct v4l2_fmtdesc *f)
+{
+	const struct plat_ipk_fmt *p_fmt;
+
+	if (f->index >= ARRAY_SIZE(vid_dev_formats))
+		return -EINVAL;
+
+	p_fmt = &vid_dev_formats[f->index];
+
+	strlcpy(f->description, p_fmt->name, sizeof(f->description));
+	f->pixelformat = p_fmt->fourcc;
+
+	return 0;
+}
+
+int vidioc_g_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f)
+{
+	struct video_device_dev *dev = video_drvdata(file);
+
+	memcpy(&f->fmt.pix, &dev->format.fmt.pix,
+	       sizeof(struct v4l2_pix_format));
+
+	return 0;
+}
+
+static int
+vidioc_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f)
+{
+	const struct plat_ipk_fmt *fmt;
+
+	fmt = vid_dev_find_format(f, -1);
+	if (!fmt) {
+		f->fmt.pix.pixelformat = V4L2_PIX_FMT_RGB565;
+		fmt = vid_dev_find_format(f, -1);
+	}
+
+	f->fmt.pix.field = V4L2_FIELD_NONE;
+	v4l_bound_align_image(&f->fmt.pix.width, 48, MAX_WIDTH, 2,
+			      &f->fmt.pix.height, 32, MAX_HEIGHT, 0, 0);
+
+	f->fmt.pix.bytesperline = (f->fmt.pix.width * fmt->depth) >> 3;
+	f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
+	f->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB;
+	return 0;
+}
+
+int vidioc_s_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f)
+{
+	struct video_device_dev *dev = video_drvdata(file);
+	int ret;
+	struct v4l2_subdev_format fmt;
+
+	if (vb2_is_busy(&dev->vb_queue))
+		return -EBUSY;
+
+	ret = vidioc_try_fmt_vid_cap(file, dev, f);
+	if (ret)
+		return ret;
+
+	dev->fmt = vid_dev_find_format(f, -1);
+	pixel_format(dev) = f->fmt.pix.pixelformat;
+	width(dev) = f->fmt.pix.width;
+	height(dev) = f->fmt.pix.height;
+	bytes_per_line(dev) = width(dev) * dev->fmt->depth / 8;
+	size_image(dev) = height(dev) * bytes_per_line(dev);
+
+	fmt.format.colorspace = V4L2_COLORSPACE_SRGB;
+	fmt.format.code = dev->fmt->mbus_code;
+
+	fmt.format.width = width(dev);
+	fmt.format.height = height(dev);
+
+	ret = plat_ipk_pipeline_call(&dev->ve, set_format, &fmt);
+
+	return 0;
+}
+
+int vidioc_enum_framesizes(struct file *file, void *fh,
+		       struct v4l2_frmsizeenum *fsize)
+{
+	static const struct v4l2_frmsize_stepwise sizes = {
+		48, MAX_WIDTH, 4,
+		32, MAX_HEIGHT, 1
+	};
+	int i;
+
+	if (fsize->index)
+		return -EINVAL;
+	for (i = 0; i < ARRAY_SIZE(vid_dev_formats); i++)
+		if (vid_dev_formats[i].fourcc == fsize->pixel_format)
+			break;
+	if (i == ARRAY_SIZE(vid_dev_formats))
+		return -EINVAL;
+	fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
+	fsize->stepwise = sizes;
+	return 0;
+}
+
+int vidioc_enum_input(struct file *file, void *priv, struct v4l2_input *input)
+{
+	if (input->index != 0)
+		return -EINVAL;
+
+	input->type = V4L2_INPUT_TYPE_CAMERA;
+	input->std = V4L2_STD_ALL;	/* Not sure what should go here */
+	strcpy(input->name, "Camera");
+	return 0;
+}
+
+int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
+{
+	*i = 0;
+	return 0;
+}
+
+int vidioc_s_input(struct file *file, void *priv, unsigned int i)
+{
+	if (i != 0)
+		return -EINVAL;
+	return 0;
+}
+
+int vidioc_g_std(struct file *file, void *fh, v4l2_std_id *norm)
+{
+	*norm = V4L2_STD_NTSC_M;
+	return 0;
+}
+
+int vidioc_s_std(struct file *file, void *fh, v4l2_std_id a)
+{
+	return 0;
+}
+
+static int
+vid_dev_pipeline_validate(struct video_device_dev *vid_dev)
+{
+	return 0;
+}
+
+static int
+vid_dev_streamon(struct file *file, void *priv, enum v4l2_buf_type type)
+{
+	struct video_device_dev *vid_dev = video_drvdata(file);
+	struct media_entity *entity = &vid_dev->ve.vdev.entity;
+	int ret;
+
+	ret = media_entity_pipeline_start(entity, &vid_dev->ve.pipe->mp);
+	if (ret < 0)
+		return ret;
+
+	ret = vid_dev_pipeline_validate(vid_dev);
+	if (ret < 0)
+		goto err_p_stop;
+
+	vb2_ioctl_streamon(file, priv, type);
+	if (!ret)
+		return ret;
+
+err_p_stop:
+	media_entity_pipeline_stop(entity);
+	return 0;
+}
+
+static int
+vid_dev_streamoff(struct file *file, void *priv, enum v4l2_buf_type type)
+{
+	struct video_device_dev *vid_dev = video_drvdata(file);
+	int ret;
+
+	ret = vb2_ioctl_streamoff(file, priv, type);
+	if (ret < 0)
+		return ret;
+
+	media_entity_pipeline_stop(&vid_dev->ve.vdev.entity);
+	return 0;
+}
+
+static const struct v4l2_ioctl_ops vid_dev_ioctl_ops = {
+	.vidioc_querycap = vidioc_querycap,
+	.vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
+	.vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
+	.vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
+	.vidioc_enum_framesizes = vidioc_enum_framesizes,
+	.vidioc_enum_input = vidioc_enum_input,
+	.vidioc_g_input = vidioc_g_input,
+	.vidioc_s_input = vidioc_s_input,
+
+	.vidioc_reqbufs = vb2_ioctl_reqbufs,
+	.vidioc_create_bufs = vb2_ioctl_create_bufs,
+	.vidioc_prepare_buf = vb2_ioctl_prepare_buf,
+	.vidioc_querybuf = vb2_ioctl_querybuf,
+	.vidioc_qbuf = vb2_ioctl_qbuf,
+	.vidioc_dqbuf = vb2_ioctl_dqbuf,
+	.vidioc_streamon = vid_dev_streamon,
+	.vidioc_streamoff = vid_dev_streamoff,
+};
+
+/* Capture subdev media entity operations */
+static int
+vid_dev_link_setup(struct media_entity *entity,
+		   const struct media_pad *local,
+		   const struct media_pad *remote, u32 flags)
+{
+	return 0;
+}
+
+static const struct media_entity_operations vid_dev_subdev_media_ops = {
+	.link_setup = vid_dev_link_setup,
+};
+
+static int
+vid_dev_open(struct file *file)
+{
+	struct video_device_dev *vid_dev = video_drvdata(file);
+	struct media_entity *me = &vid_dev->ve.vdev.entity;
+	int ret;
+
+	mutex_lock(&vid_dev->lock);
+
+	ret = v4l2_fh_open(file);
+	if (ret < 0)
+		goto unlock;
+
+	if (!v4l2_fh_is_singular_file(file))
+		goto unlock;
+
+	mutex_lock(&me->graph_obj.mdev->graph_mutex);
+
+	ret = plat_ipk_pipeline_call(&vid_dev->ve, open, me, true);
+	if (ret == 0)
+		me->use_count++;
+
+	mutex_unlock(&me->graph_obj.mdev->graph_mutex);
+
+	if (!ret)
+		goto unlock;
+
+	v4l2_fh_release(file);
+unlock:
+	mutex_unlock(&vid_dev->lock);
+	return ret;
+}
+
+static int
+vid_dev_release(struct file *file)
+{
+	struct video_device_dev *vid_dev = video_drvdata(file);
+	struct media_entity *entity = &vid_dev->ve.vdev.entity;
+
+	mutex_lock(&vid_dev->lock);
+
+	if (v4l2_fh_is_singular_file(file)) {
+		plat_ipk_pipeline_call(&vid_dev->ve, close);
+		mutex_lock(&entity->graph_obj.mdev->graph_mutex);
+		entity->use_count--;
+		mutex_unlock(&entity->graph_obj.mdev->graph_mutex);
+	}
+
+	_vb2_fop_release(file, NULL);
+
+	mutex_unlock(&vid_dev->lock);
+	return 0;
+}
+
+static const struct v4l2_file_operations vid_dev_fops = {
+	.owner = THIS_MODULE,
+	.open = vid_dev_open,
+	.release = vid_dev_release,
+	.write = vb2_fop_write,
+	.read = vb2_fop_read,
+	.poll = vb2_fop_poll,
+	.unlocked_ioctl = video_ioctl2,
+	.mmap = vb2_fop_mmap,
+};
+
+/*
+ * VideoBuffer2 operations
+ */
+
+void fill_buffer(struct video_device_dev *dev, struct rx_buffer *buf,
+			int buf_num, unsigned long flags)
+{
+	int size = 0;
+	void *vbuf = NULL;
+
+	if (&buf->vb == NULL)
+		return;
+
+	size = vb2_plane_size(&buf->vb.vb2_buf, 0);
+	vbuf = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
+
+	if (vbuf) {
+		spin_unlock_irqrestore(&dev->slock, flags);
+
+		memcpy(vbuf, dev->dma_buf[buf_num].cpu_addr, size);
+
+		spin_lock_irqsave(&dev->slock, flags);
+
+		buf->vb.field = dev->format.fmt.pix.field;
+		buf->vb.sequence++;
+		buf->vb.vb2_buf.timestamp = ktime_get_ns();
+	}
+	vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
+}
+
+static void buffer_copy_process(void *param)
+{
+	struct video_device_dev *dev = (struct video_device_dev *) param;
+	unsigned long flags;
+	struct dmaqueue *dma_q = &dev->vidq;
+	struct rx_buffer *buf = NULL;
+
+	spin_lock_irqsave(&dev->slock, flags);
+
+	if (!list_empty(&dma_q->active)) {
+		buf = list_entry(dma_q->active.next, struct rx_buffer, list);
+		list_del(&buf->list);
+		fill_buffer(dev, buf, dev->last_idx, flags);
+	}
+
+	spin_unlock_irqrestore(&dev->slock, flags);
+}
+
+static inline struct rx_buffer *to_rx_buffer(struct vb2_v4l2_buffer *vb2)
+{
+	return container_of(vb2, struct rx_buffer, vb);
+}
+
+int queue_setup(struct vb2_queue *vq, unsigned int *nbuffers,
+			unsigned int *nplanes, unsigned int sizes[],
+			struct device *alloc_devs[])
+{
+	struct video_device_dev *dev = vb2_get_drv_priv(vq);
+	unsigned long size = 0;
+	int i;
+
+	size = size_image(dev);
+	if (size == 0)
+		return -EINVAL;
+
+	*nbuffers = N_BUFFERS;
+
+	for (i = 0; i < N_BUFFERS; i++) {
+		dev->dma_buf[i].cpu_addr = dma_alloc_coherent(&dev->pdev->dev,
+							      size_image(dev),
+							      &dev->
+							      dma_buf
+							      [i].dma_addr,
+							      GFP_KERNEL);
+	}
+
+	*nplanes = 1;
+	sizes[0] = size;
+
+	return 0;
+}
+
+int buffer_prepare(struct vb2_buffer *vb)
+{
+	struct rx_buffer *buf = NULL;
+	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
+	int size = 0;
+
+	if (vb == NULL) {
+		pr_warn("%s:vb2_buffer is null\n", FUNC_NAME);
+		return 0;
+	}
+
+	buf = to_rx_buffer(vbuf);
+
+	size = vb2_plane_size(&buf->vb.vb2_buf, 0);
+	vb2_set_plane_payload(&buf->vb.vb2_buf, 0, size);
+
+	INIT_LIST_HEAD(&buf->list);
+	return 0;
+}
+
+void buffer_queue(struct vb2_buffer *vb)
+{
+	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
+	struct video_device_dev *dev = NULL;
+	struct rx_buffer *buf = NULL;
+	struct dmaqueue *vidq = NULL;
+	struct dma_async_tx_descriptor *desc;
+	u32 flags;
+
+	if (vb == NULL) {
+		pr_warn("%s:vb2_buffer is null\n", FUNC_NAME);
+		return;
+	}
+
+	dev = vb2_get_drv_priv(vb->vb2_queue);
+	buf = to_rx_buffer(vbuf);
+	vidq = &dev->vidq;
+
+	flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK;
+	dev->xt.dir = DMA_DEV_TO_MEM;
+	dev->xt.src_sgl = false;
+	dev->xt.dst_inc = false;
+	dev->xt.dst_sgl = true;
+	dev->xt.dst_start = dev->dma_buf[dev->idx].dma_addr;
+
+	dev->last_idx = dev->idx;
+	dev->idx++;
+	if (dev->idx >= N_BUFFERS)
+		dev->idx = 0;
+
+	dev->xt.frame_size = 1;
+	dev->sgl[0].size = bytes_per_line(dev);
+	dev->sgl[0].icg = 0;
+	dev->xt.numf = height(dev);
+
+	desc = dmaengine_prep_interleaved_dma(dev->dma, &dev->xt, flags);
+	if (!desc) {
+		pr_err("Failed to prepare DMA transfer\n");
+		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
+		return;
+	}
+
+	desc->callback = buffer_copy_process;
+	desc->callback_param = dev;
+
+	spin_lock(&dev->slock);
+	list_add_tail(&buf->list, &vidq->active);
+	spin_unlock(&dev->slock);
+
+	dmaengine_submit(desc);
+
+	if (vb2_is_streaming(&dev->vb_queue))
+		dma_async_issue_pending(dev->dma);
+}
+
+int start_streaming(struct vb2_queue *vq, unsigned int count)
+{
+	struct video_device_dev *dev = vb2_get_drv_priv(vq);
+
+	dma_async_issue_pending(dev->dma);
+
+	return 0;
+}
+
+void stop_streaming(struct vb2_queue *vq)
+{
+	struct video_device_dev *dev = vb2_get_drv_priv(vq);
+	struct dmaqueue *dma_q = &dev->vidq;
+
+	/* Stop and reset the DMA engine. */
+	dmaengine_terminate_all(dev->dma);
+
+	while (!list_empty(&dma_q->active)) {
+		struct rx_buffer *buf;
+
+		buf = list_entry(dma_q->active.next, struct rx_buffer, list);
+		if (buf) {
+			list_del(&buf->list);
+			vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
+		}
+	}
+	list_del_init(&dev->vidq.active);
+}
+
+static const struct vb2_ops vb2_video_qops = {
+	.queue_setup = queue_setup,
+	.buf_prepare = buffer_prepare,
+	.buf_queue = buffer_queue,
+	.start_streaming = start_streaming,
+	.stop_streaming = stop_streaming,
+	.wait_prepare = vb2_ops_wait_prepare,
+	.wait_finish = vb2_ops_wait_finish,
+};
+
+static int vid_dev_subdev_s_power(struct v4l2_subdev *sd, int on)
+{
+	return 0;
+}
+
+static int vid_dev_subdev_registered(struct v4l2_subdev *sd)
+{
+	struct video_device_dev *vid_dev = v4l2_get_subdevdata(sd);
+	struct vb2_queue *q = &vid_dev->vb_queue;
+	struct video_device *vfd = &vid_dev->ve.vdev;
+	int ret;
+
+	memset(vfd, 0, sizeof(*vfd));
+
+	snprintf(vfd->name, sizeof(vfd->name), VIDEO_DEVICE_NAME);
+
+	vfd->fops = &vid_dev_fops;
+	vfd->ioctl_ops = &vid_dev_ioctl_ops;
+	vfd->v4l2_dev = sd->v4l2_dev;
+	vfd->minor = -1;
+	vfd->release = video_device_release_empty;
+	vfd->queue = q;
+
+	INIT_LIST_HEAD(&vid_dev->vidq.active);
+	init_waitqueue_head(&vid_dev->vidq.wq);
+	memset(q, 0, sizeof(*q));
+	q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+	q->io_modes = VB2_MMAP | VB2_USERPTR;
+	q->ops = &vb2_video_qops;
+	q->mem_ops = &vb2_vmalloc_memops;
+	q->buf_struct_size = sizeof(struct rx_buffer);
+	q->drv_priv = vid_dev;
+	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
+	q->lock = &vid_dev->lock;
+
+	ret = vb2_queue_init(q);
+	if (ret < 0)
+		return ret;
+
+	vid_dev->vd_pad.flags = MEDIA_PAD_FL_SINK;
+	ret = media_entity_pads_init(&vfd->entity, 1, &vid_dev->vd_pad);
+	if (ret < 0)
+		return ret;
+
+	video_set_drvdata(vfd, vid_dev);
+	vid_dev->ve.pipe = v4l2_get_subdev_hostdata(sd);
+
+	ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
+	if (ret < 0) {
+		media_entity_cleanup(&vfd->entity);
+		vid_dev->ve.pipe = NULL;
+		return ret;
+	}
+
+	v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
+		  vfd->name, video_device_node_name(vfd));
+	return 0;
+}
+
+static void vid_dev_subdev_unregistered(struct v4l2_subdev *sd)
+{
+	struct video_device_dev *vid_dev = v4l2_get_subdevdata(sd);
+
+	if (vid_dev == NULL)
+		return;
+
+	mutex_lock(&vid_dev->lock);
+
+	if (video_is_registered(&vid_dev->ve.vdev)) {
+		video_unregister_device(&vid_dev->ve.vdev);
+		media_entity_cleanup(&vid_dev->ve.vdev.entity);
+		vid_dev->ve.pipe = NULL;
+	}
+
+	mutex_unlock(&vid_dev->lock);
+}
+
+static const struct v4l2_subdev_internal_ops vid_dev_subdev_internal_ops = {
+	.registered = vid_dev_subdev_registered,
+	.unregistered = vid_dev_subdev_unregistered,
+};
+
+static const struct v4l2_subdev_core_ops vid_dev_subdev_core_ops = {
+	.s_power = vid_dev_subdev_s_power,
+};
+
+static struct v4l2_subdev_ops vid_dev_subdev_ops = {
+	.core = &vid_dev_subdev_core_ops,
+};
+
+static int vid_dev_create_capture_subdev(struct video_device_dev *vid_dev)
+{
+	struct v4l2_subdev *sd = &vid_dev->subdev;
+	int ret;
+
+	v4l2_subdev_init(sd, &vid_dev_subdev_ops);
+	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+	snprintf(sd->name, sizeof(sd->name), "Capture device");
+
+	vid_dev->subdev_pads[VIDEO_DEV_SD_PAD_SINK_CSI].flags =
+		MEDIA_PAD_FL_SOURCE;
+	vid_dev->subdev_pads[VIDEO_DEV_SD_PAD_SOURCE_DMA].flags =
+		MEDIA_PAD_FL_SINK;
+	ret =
+	    media_entity_pads_init(&sd->entity, VIDEO_DEV_SD_PADS_NUM,
+				   vid_dev->subdev_pads);
+	if (ret)
+		return ret;
+
+	sd->internal_ops = &vid_dev_subdev_internal_ops;
+	sd->entity.ops = &vid_dev_subdev_media_ops;
+	sd->owner = THIS_MODULE;
+	v4l2_set_subdevdata(sd, vid_dev);
+
+	return 0;
+}
+
+static void vid_dev_unregister_subdev(struct video_device_dev *vid_dev)
+{
+	struct v4l2_subdev *sd = &vid_dev->subdev;
+
+	v4l2_device_unregister_subdev(sd);
+	media_entity_cleanup(&sd->entity);
+	v4l2_set_subdevdata(sd, NULL);
+}
+
+static const struct of_device_id vid_dev_of_match[];
+
+static int vid_dev_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	const struct of_device_id *of_id;
+	int ret = 0;
+	struct video_device_dev *vid_dev;
+
+	dev_info(dev, "Installing IPK Video Device module\n");
+
+	if (!dev->of_node)
+		return -ENODEV;
+
+	vid_dev = devm_kzalloc(dev, sizeof(*vid_dev), GFP_KERNEL);
+	if (!vid_dev)
+		return -ENOMEM;
+
+	of_id = of_match_node(vid_dev_of_match, dev->of_node);
+	if (WARN_ON(of_id == NULL))
+		return -EINVAL;
+
+	vid_dev->pdev = pdev;
+
+	spin_lock_init(&vid_dev->slock);
+	mutex_init(&vid_dev->lock);
+
+	dev_info(&pdev->dev, "Requesting DMA\n");
+	vid_dev->dma = dma_request_slave_channel(&pdev->dev, "vdma0");
+	if (vid_dev->dma == NULL) {
+		dev_err(&pdev->dev, "no VDMA channel found\n");
+		ret = -ENODEV;
+		goto end;
+	}
+
+	ret = vid_dev_create_capture_subdev(vid_dev);
+	if (ret)
+		goto end;
+
+	platform_set_drvdata(pdev, vid_dev);
+
+	dev_info(dev, "Video Device registered successfully\n");
+	return 0;
+end:
+	dev_err(dev, "Video Device not registered!!\n");
+	return ret;
+}
+
+static int vid_dev_remove(struct platform_device *pdev)
+{
+	struct video_device_dev *dev = platform_get_drvdata(pdev);
+
+	vid_dev_unregister_subdev(dev);
+	dev_info(&pdev->dev, "Driver removed\n");
+
+	return 0;
+}
+
+static const struct of_device_id vid_dev_of_match[] = {
+	{.compatible = "snps,video-device"},
+	{}
+};
+
+MODULE_DEVICE_TABLE(of, vid_dev_of_match);
+
+static struct platform_driver __refdata vid_dev_pdrv = {
+	.remove = vid_dev_remove,
+	.probe = vid_dev_probe,
+	.driver = {
+		   .name = VIDEO_DEVICE_NAME,
+		   .owner = THIS_MODULE,
+		   .of_match_table = vid_dev_of_match,
+		   },
+};
+
+module_platform_driver(vid_dev_pdrv);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
+MODULE_DESCRIPTION("Driver for configuring DMA and Video Device");
diff --git a/drivers/media/platform/dwc/video_device.h b/drivers/media/platform/dwc/video_device.h
new file mode 100644
index 0000000..e828d4b
--- /dev/null
+++ b/drivers/media/platform/dwc/video_device.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef VIDEO_DEVICE_H_
+#define VIDEO_DEVICE_H_
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/of_irq.h>
+#include <linux/delay.h>
+#include <linux/list.h>
+#include <linux/wait.h>
+#include <linux/string.h>
+#include <linux/videodev2.h>
+#include <linux/dma/xilinx_dma.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-ioctl.h>
+#include <media/v4l2-fh.h>
+#include <media/v4l2-common.h>
+#include <media/videobuf2-vmalloc.h>
+#include <media/media-entity.h>
+#include <linux/io.h>
+
+#include "plat_ipk_video.h"
+
+#define N_BUFFERS 3
+
+#define VIDEO_DEVICE_NAME	"video-device"
+
+#define FUNC_NAME __func__
+
+struct rx_buffer {
+	/** @short Buffer for video frames */
+	struct vb2_v4l2_buffer vb;
+	struct list_head list;
+
+	dma_addr_t dma_addr;
+	void *cpu_addr;
+};
+
+struct dmaqueue {
+	struct list_head active;
+	wait_queue_head_t wq;
+};
+
+/**
+ * @short Structure to embed device driver information
+ */
+struct video_device_dev {
+	struct platform_device *pdev;
+	struct v4l2_device *v4l2_dev;
+	struct v4l2_subdev subdev;
+	struct media_pad vd_pad;
+	struct media_pad subdev_pads[VIDEO_DEV_SD_PADS_NUM];
+	struct mutex lock;
+	spinlock_t slock;
+	struct plat_ipk_video_entity ve;
+	struct v4l2_format format;
+	struct v4l2_pix_format pix_format;
+	const struct plat_ipk_fmt *fmt;
+	unsigned long *alloc_ctx;
+
+	/* Buffer and DMA */
+	struct vb2_queue vb_queue;
+	int idx;
+	int last_idx;
+	struct dmaqueue vidq;
+	struct rx_buffer dma_buf[N_BUFFERS];
+	struct dma_chan *dma;
+	struct dma_interleaved_template xt;
+	struct data_chunk sgl[1];
+};
+
+/**
+ * @short Defines to simplify the code reading
+ */
+
+#define pixel_format(dev)	\
+	dev->format.fmt.pix.pixelformat
+#define bytes_per_line(dev)	\
+	dev->format.fmt.pix.bytesperline
+#define width(dev)		\
+	dev->format.fmt.pix.width
+#define height(dev)		\
+	dev->format.fmt.pix.height
+#define size_image(dev)		\
+	dev->format.fmt.pix.sizeimage
+
+const struct plat_ipk_fmt *vid_dev_find_format(struct v4l2_format *f,
+					       int index);
+
+#endif				/* VIDEO_DEVICE_H_ */
-- 
2.10.2

^ permalink raw reply related

* [PATCH 1/2] Add Documentation for Media Device, Video Device, and Synopsys DW MIPI CSI-2 Host
From: Ramiro Oliveira @ 2016-11-14 14:20 UTC (permalink / raw)
  To: robh+dt, mark.rutland, mchehab, devicetree, linux-kernel,
	linux-media
  Cc: davem, gregkh, geert+renesas, akpm, linux, hverkuil,
	laurent.pinchart+renesas, arnd, sudipm.mukherjee, tiffany.lin,
	minghsiu.tsai, jean-christophe.trotin, andrew-ct.chen,
	simon.horman, songjun.wu, bparrot, CARLOS.PALMINHA,
	Ramiro.Oliveira
In-Reply-To: <cover.1479132355.git.roliveir@synopsys.com>

Add documentation for Media and Video Device, as well as the DW MIPI CSI-2 
Host.

Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
---
 .../devicetree/bindings/media/snps,dw-mipi-csi.txt | 27 ++++++++++++++++++++++
 .../devicetree/bindings/media/snps,plat-ipk.txt    |  9 ++++++++
 .../bindings/media/snps,video-device.txt           | 12 ++++++++++
 3 files changed, 48 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
 create mode 100644 Documentation/devicetree/bindings/media/snps,plat-ipk.txt
 create mode 100644 Documentation/devicetree/bindings/media/snps,video-device.txt

diff --git a/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
new file mode 100644
index 0000000..bec7441
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
@@ -0,0 +1,27 @@
+Synopsys DesignWare CSI-2 Host controller
+
+Description
+-----------
+
+This HW block is used to receive image coming from an MIPI CSI-2 compatible
+camera.
+
+Required properties:
+- compatible: shall be "snps,dw-mipi-csi"
+- reg		: physical base address and size of the device memory mapped
+		  registers;
+- interrupts	: CSI-2 Host interrupt
+- data-lanes    : Number of lanes to be used
+- output-type   : Core output to be used (IPI-> 0 or IDI->1 or BOTH->2)
+- phys, phy-names: List of one PHY specifier and identifier string (as defined
+  in Documentation/devicetree/bindings/phy/phy-bindings.txt).
+
+Optional properties(if in IPI mode):
+- ipi-mode 	: Mode to be used when in IPI(Camera -> 0 or Automatic -> 1)
+- ipi-color-mode: Color depth to be used in IPI (48 bits -> 0 or 16 bits -> 1)
+- ipi-auto-flush: Data auto-flush (1 -> Yes or 0 -> No)
+- virtual-channel: Virtual channel where data is present when in IPI
+
+The per-board settings:
+ - port sub-node describing a single endpoint connected to the dw-mipi-csi
+   as described in video-interfaces.txt[1].
diff --git a/Documentation/devicetree/bindings/media/snps,plat-ipk.txt b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
new file mode 100644
index 0000000..2d51541
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
@@ -0,0 +1,9 @@
+Synopsys DesignWare CSI-2 Host IPK Media Device
+
+This Media Device at the moment is not totally functional, however it is a base
+for the future.
+
+Required properties:
+
+- compatible: Must be "snps,plat-ipk".
+
diff --git a/Documentation/devicetree/bindings/media/snps,video-device.txt b/Documentation/devicetree/bindings/media/snps,video-device.txt
new file mode 100644
index 0000000..d467092
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/snps,video-device.txt
@@ -0,0 +1,12 @@
+Synopsys DesignWare CSI-2 Host video device
+
+This driver handles all the video handling part of this platform.
+
+Required properties:
+
+- compatible: Must be "snps,video-device".
+
+- dmas, dma-names: List of one DMA specifier and identifier string (as defined
+  in Documentation/devicetree/bindings/dma/dma.txt) per port. Each port
+  requires a DMA channel with the identifier string set to "port" followed by
+  the port index.
-- 
2.10.2

^ permalink raw reply related

* [PATCH 0/2] Add support for the DW IP Prototyping Kits for MIPI CSI-2 Host
From: Ramiro Oliveira @ 2016-11-14 14:20 UTC (permalink / raw)
  To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
	mchehab-DgEjT+Ai2ygdnm+yROfE0A, devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-media-u79uwXL29TY76Z2rM5mHXA
  Cc: davem-fT/PcQaiUtIeIZ0/mPfg9Q,
	gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
	geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ,
	akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b,
	linux-0h96xk9xTtrk1uMJSBkQmQ, hverkuil-qWit8jRvyhVmR6Xm/wNWPw,
	laurent.pinchart+renesas-ryLnwIuWjnjg/C1BVhZhaw, arnd-r2nGTMty4D4,
	sudipm.mukherjee-Re5JQEeQqe8AvxtiuMwx3w,
	tiffany.lin-NuS5LvNUpcJWk0Htik3J/w,
	minghsiu.tsai-NuS5LvNUpcJWk0Htik3J/w,
	jean-christophe.trotin-qxv4g6HH51o,
	andrew-ct.chen-NuS5LvNUpcJWk0Htik3J/w,
	simon.horman-wFxRvT7yatFl57MIdRCFDg,
	songjun.wu-UWL1GkI3JZL3oGB3hsPCZA, bparrot-l0cyMroinI0,
	CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w,
	Ramiro.Oliveira-HKixBCOQz3hWk0Htik3J/w

This patchset adds basic support for the DW CSI-2 Host IPK. There are 
some parts of the kit that aren't currently supported by this media 
platform driver but will be in the future.

Ramiro Oliveira (2):
  Add Documentation for Media Device, Video Device, and Synopsys DW MIPI
    CSI-2 Host
  Add basic support for DW CSI-2 Host IPK

 .../devicetree/bindings/media/snps,dw-mipi-csi.txt |  27 +
 .../devicetree/bindings/media/snps,plat-ipk.txt    |   9 +
 .../bindings/media/snps,video-device.txt           |  12 +
 MAINTAINERS                                        |   7 +
 drivers/media/platform/Kconfig                     |   1 +
 drivers/media/platform/Makefile                    |   2 +
 drivers/media/platform/dwc/Kconfig                 |  36 +
 drivers/media/platform/dwc/Makefile                |   3 +
 drivers/media/platform/dwc/dw_mipi_csi.c           | 687 +++++++++++++++++
 drivers/media/platform/dwc/dw_mipi_csi.h           | 179 +++++
 drivers/media/platform/dwc/plat_ipk.c              | 835 +++++++++++++++++++++
 drivers/media/platform/dwc/plat_ipk.h              |  97 +++
 drivers/media/platform/dwc/plat_ipk_video.h        |  97 +++
 drivers/media/platform/dwc/video_device.c          | 741 ++++++++++++++++++
 drivers/media/platform/dwc/video_device.h          | 101 +++
 15 files changed, 2834 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
 create mode 100644 Documentation/devicetree/bindings/media/snps,plat-ipk.txt
 create mode 100644 Documentation/devicetree/bindings/media/snps,video-device.txt
 create mode 100644 drivers/media/platform/dwc/Kconfig
 create mode 100644 drivers/media/platform/dwc/Makefile
 create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.c
 create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.h
 create mode 100644 drivers/media/platform/dwc/plat_ipk.c
 create mode 100644 drivers/media/platform/dwc/plat_ipk.h
 create mode 100644 drivers/media/platform/dwc/plat_ipk_video.h
 create mode 100644 drivers/media/platform/dwc/video_device.c
 create mode 100644 drivers/media/platform/dwc/video_device.h

-- 
2.10.2


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^ permalink raw reply

* [PATCH v2] drm/i915: Create a common GEN9_LP_FEATURE.
From: Ander Conselvan de Oliveira @ 2016-11-14 14:19 UTC (permalink / raw)
  To: intel-gfx; +Cc: Ander Conselvan de Oliveira, Rodrigo Vivi
In-Reply-To: <1478791400-21756-2-git-send-email-ander.conselvan.de.oliveira@intel.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>

The following LP platform inherits a lot of this platform
So let's simplify here to re-use this later.

v2: Keep ddb_size out of the new macro.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 45 ++++++++++++++++++++++-------------------
 1 file changed, 24 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 70a99ce..f8b93c1 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -343,30 +343,33 @@ static const struct intel_device_info intel_skylake_gt3_info = {
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
+#define GEN9_LP_FEATURES \
+	.gen = 9, \
+	.has_hotplug = 1, \
+	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
+	.num_pipes = 3, \
+	.has_64bit_reloc = 1, \
+	.has_ddi = 1, \
+	.has_fpga_dbg = 1, \
+	.has_fbc = 1, \
+	.has_runtime_pm = 1, \
+	.has_pooled_eu = 0, \
+	.has_csr = 1, \
+	.has_resource_streamer = 1, \
+	.has_rc6 = 1, \
+	.has_dp_mst = 1, \
+	.has_gmbus_irq = 1, \
+	.has_hw_contexts = 1, \
+	.has_logical_ring_contexts = 1, \
+	.has_guc = 1, \
+	GEN_DEFAULT_PIPEOFFSETS, \
+	IVB_CURSOR_OFFSETS, \
+	BDW_COLORS
+
 static const struct intel_device_info intel_broxton_info = {
 	.is_broxton = 1,
-	.gen = 9,
-	.has_hotplug = 1,
-	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
-	.num_pipes = 3,
-	.has_64bit_reloc = 1,
-	.has_ddi = 1,
-	.has_fpga_dbg = 1,
-	.has_fbc = 1,
-	.has_runtime_pm = 1,
-	.has_pooled_eu = 0,
-	.has_csr = 1,
-	.has_resource_streamer = 1,
-	.has_rc6 = 1,
-	.has_dp_mst = 1,
-	.has_gmbus_irq = 1,
-	.has_hw_contexts = 1,
-	.has_logical_ring_contexts = 1,
-	.has_guc = 1,
+	GEN9_LP_FEATURES,
 	.ddb_size = 512,
-	GEN_DEFAULT_PIPEOFFSETS,
-	IVB_CURSOR_OFFSETS,
-	BDW_COLORS,
 };
 
 static const struct intel_device_info intel_kabylake_info = {
-- 
2.5.5

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related

* Re: [x86/copy_user] adb402cd14: will-it-scale.per_process_ops -12.7% regression
From: Ye Xiaolong @ 2016-11-14 14:19 UTC (permalink / raw)
  To: lkp
In-Reply-To: <20161115100101.nzvhd5mlcb747n2h@pd.tnic>

[-- Attachment #1: Type: text/plain, Size: 2585 bytes --]

On 11/15, Borislav Petkov wrote:
>On Mon, Nov 14, 2016 at 10:37:11PM +0800, Ye Xiaolong wrote:
>> Below cmd should help on it:
>
>Right, before I go do this, can you please retest without
>
>CONFIG_DEBUG_ATOMIC_SLEEP=y
>
>?

Sorry for the late, here is the comparison, disable
CONFIG_DEBUG_ATOMIC_SLEEP helps to restore the performance back
according to the result.

=========================================================================================
commit/compiler/cpufreq_governor/rootfs/tbox_group/test/testcase:
  adb402cd1461eef6e1a21db4532a3b9e6a6be853/gcc-6/performance/debian-x86_64-2016-08-31.cgz/xps/poll1/will-it-scale

kconfig:
  x86_64-rhel-7.2
  x86_64-rhel-7.2-CONFIG_DEBUG_ATOMIC_SLEEP

 x86_64-rhel-7.2 x86_64-rhel-7.2-CONFIG_DEB
---------------- --------------------------
         %stddev     %change         %stddev
             \          |                \
   5899566 ±  2%     +28.5%    7583094 ±  0%  will-it-scale.per_process_ops
   5121156 ±  0%     +21.1%    6203340 ±  0%  will-it-scale.per_thread_ops
     49191 ±127%     -79.8%       9938 ±  3%  will-it-scale.time.involuntary_context_switches
    588.63 ±  0%      -4.1%     564.27 ±  0%  will-it-scale.time.system_time
    132.53 ±  0%     +18.7%     157.26 ±  0%  will-it-scale.time.user_time
     23063 ±  0%     -92.0%       1846 ±  0%  interrupts.CAL:Function_call_interrupts
     10336 ± 28%     -66.1%       3499 ±  5%  softirqs.NET_RX
    444.00 ±  0%     -24.3%     336.00 ±  0%  vmstat.memory.buff
     49191 ±127%     -79.8%       9938 ±  3%  time.involuntary_context_switches
    132.53 ±  0%     +18.7%     157.26 ±  0%  time.user_time
      4823 ±  1%      -9.9%       4344 ±  0%  proc-vmstat.nr_mapped
      4994 ±  2%     -13.2%       4336 ±  0%  proc-vmstat.nr_shmem
      2265 ±  7%     -71.6%     642.67 ±  4%  proc-vmstat.pgactivate
     61.33 ±  0%      -1.6%      60.33 ±  0%  turbostat.%Busy
     12.34 ±  7%     -98.8%       0.15 ± 17%  turbostat.CPU%c3
      1.29 ±  6%   +1004.7%      14.22 ±  5%  turbostat.CPU%c6
    113064 ±  1%      -9.4%     102395 ±  2%  meminfo.Active
    196087 ±  0%     -16.4%     163999 ±  0%  meminfo.Committed_AS
     19288 ±  1%      -9.9%      17372 ±  0%  meminfo.Mapped
     19983 ±  2%     -13.2%      17348 ±  0%  meminfo.Shmem
     15975 ± 27%     -74.7%       4043 ± 10%  latency_stats.avg.max

Thanks,
Xiaolong

>
>Thanks.
>
>-- 
>Regards/Gruss,
>    Boris.
>
>Good mailing practices for 400: avoid top-posting and trim the reply.

^ permalink raw reply

* Re: [PATCH v1] doc: add template release notes for 17.02
From: Thomas Monjalon @ 2016-11-14 14:19 UTC (permalink / raw)
  To: John McNamara; +Cc: dev, Remy Horton
In-Reply-To: <aead5c8b-c3b8-fdef-6209-d811bdfb84b8@intel.com>

> > Add template release notes for DPDK 17.02 with inline
> > comments and explanations of the various sections.
> >
> > Signed-off-by: John McNamara <john.mcnamara@intel.com>
> 
> Acked-by: Remy Horton <remy.horton@intel.com>

Applied, thanks
We are ready to start a new release cycle.
The version in the master branch is now 17.02-rc0.

^ permalink raw reply

* [U-Boot] [PATCH] socfpga: add support for Terasic DE1-SoC board
From: Anatolij Gustschin @ 2016-11-14 14:17 UTC (permalink / raw)
  To: u-boot
In-Reply-To: <13284026-c271-d273-9b26-10be1497248a@denx.de>

Hi,

On Mon, 14 Nov 2016 15:07:31 +0100
Marek Vasut marex at denx.de wrote:
...
> > +#undef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
> > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION	2  
> 
> Why is this needed ? Just start U-Boot from partition 1 as all the other
> SoCFPGAs do , esp. since this is a devkit, please keep it consistent.

It is not really needed. I used the original Terasic SD-Card,
its raw partition is 2. OK, will remove it.
 
> Looks great otherwise :)

Thanks for review!

--
Anatolij

^ permalink raw reply

* Re: [Ksummit-discuss] Including images on Sphinx documents
From: Mauro Carvalho Chehab @ 2016-11-14 14:16 UTC (permalink / raw)
  To: Jonathan Corbet; +Cc: linux-doc, linux-kernel, ksummit-discuss, linux-media
In-Reply-To: <20161113140027.2fbe0946@lwn.net>

Em Sun, 13 Nov 2016 14:00:27 -0700
Jonathan Corbet <corbet@lwn.net> escreveu:

> On Mon, 7 Nov 2016 09:46:48 -0200
> Mauro Carvalho Chehab <mchehab@s-opensource.com> wrote:
> 
> > When running LaTeX in interactive mode, building just the media
> > PDF file with:
> > 
> > 	$ cls;make cleandocs; make SPHINXOPTS="-j5" DOCBOOKS="" SPHINXDIRS=media latexdocs 
> > 	$ PDFLATEX=xelatex LATEXOPTS="-interaction=interactive" -C Documentation/output/media/latex
> > 
> > I get this:
> > 
> > 	LaTeX Warning: Hyper reference `uapi/v4l/subdev-formats:bayer-patterns' on page
> > 	 153 undefined on input line 21373.
> > 
> > 	<use  "bayer.png" > [153]
> > 	! Extra alignment tab has been changed to \cr.
> > 	<template> \endtemplate 
> >                         
> > 	l.21429 \unskip}\relax \unskip}
> > 	                               \relax \\
> > 	? 
> > 
> > This patch fixes the issue:
> > 	https://git.linuxtv.org/mchehab/experimental.git/commit/?h=dirty-pdf&id=b709de415f34d77cc121cad95bece9c7ef4d12fd
> > 
> > That means that Sphinx is not generating the right LaTeX output even for
> > (some?) PNG images.  
> 
> So I'm seriously confused.
> 
> I can get that particular message - TeX is complaining about too many
> columns in the table.  But applying your patch (with a suitable bayer.pdf
> provided) does not fix the problem.  Indeed, I can remove the figure with
> the image entirely and still not fix the problem.  Are you sure that the
> patch linked here actually fixed it for you?

There are two patches on the series fixing the column issues for the Bayer
formats table on the /6 patch series.

I guess I got confused with that, because of this warning:

 	LaTeX Warning: Hyper reference `uapi/v4l/subdev-formats:bayer-patterns' on page
 	 153 undefined on input line 21373.

Anyway, you're right: PNG is indeed working fine[1], and the
cross-reference is OK. The issue is just with SVG.

I'll fold it with patch 6/6 and submit a new series.

Sorry for the mess.

[1] I tested now on sphinx 1.4.8 - I was using an older version
before (1.4.5, I guess).

Thanks,
Mauro

[PATCH] docs-rst: Let Sphinx do PNG image conversion

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>

diff --git a/Documentation/media/Makefile b/Documentation/media/Makefile
index 0f08bd8b87ba..297b85c37ab9 100644
--- a/Documentation/media/Makefile
+++ b/Documentation/media/Makefile
@@ -12,17 +12,6 @@ TARGETS := $(addprefix $(BUILDDIR)/, $(FILES))
 
 IMAGES = \
 	typical_media_device.svg \
-	uapi/v4l/fieldseq_tb.png \
-	uapi/v4l/selection.png \
-	uapi/v4l/vbi_hsync.png \
-	uapi/v4l/fieldseq_bt.png \
-	uapi/v4l/crop.png \
-	uapi/v4l/nv12mt.png \
-	uapi/v4l/vbi_525.png \
-	uapi/v4l/nv12mt_example.png \
-	uapi/v4l/vbi_625.png \
-	uapi/v4l/pipeline.png \
-	uapi/v4l/bayer.png \
 	uapi/dvb/dvbstb.svg \
 	uapi/v4l/constraints.svg \
 	uapi/v4l/subdev-image-processing-full.svg \
@@ -37,8 +26,6 @@ cmd = $(echo-cmd) $(cmd_$(1))
 quiet_cmd_genpdf = GENPDF  $2
       cmd_genpdf = convert $2 $3
 
-%.pdf: %.png
-	@$(call cmd,genpdf,$<,$@)
 %.pdf: %.svg
 	@$(call cmd,genpdf,$<,$@)
 
diff --git a/Documentation/media/uapi/v4l/crop.rst b/Documentation/media/uapi/v4l/crop.rst
index 31c5ba5ebd04..578c6f3d20f3 100644
--- a/Documentation/media/uapi/v4l/crop.rst
+++ b/Documentation/media/uapi/v4l/crop.rst
@@ -53,8 +53,8 @@ Cropping Structures
 
 .. _crop-scale:
 
-.. figure::  crop.*
-    :alt:    crop.pdf / crop.png
+.. figure::  crop.png
+    :alt:    crop.png
     :align:  center
 
     Image Cropping, Insertion and Scaling
diff --git a/Documentation/media/uapi/v4l/dev-raw-vbi.rst b/Documentation/media/uapi/v4l/dev-raw-vbi.rst
index fb4d9c4098a0..f81d906137ee 100644
--- a/Documentation/media/uapi/v4l/dev-raw-vbi.rst
+++ b/Documentation/media/uapi/v4l/dev-raw-vbi.rst
@@ -221,8 +221,8 @@ and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does
 
 .. _vbi-hsync:
 
-.. figure::  vbi_hsync.*
-    :alt:    vbi_hsync.pdf / vbi_hsync.png
+.. figure::  vbi_hsync.png
+    :alt:    vbi_hsync.png
     :align:  center
 
     **Figure 4.1. Line synchronization**
@@ -230,8 +230,8 @@ and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does
 
 .. _vbi-525:
 
-.. figure::  vbi_525.*
-    :alt:    vbi_525.pdf / vbi_525.png
+.. figure::  vbi_525.png
+    :alt:    vbi_525.png
     :align:  center
 
     **Figure 4.2. ITU-R 525 line numbering (M/NTSC and M/PAL)**
@@ -240,8 +240,8 @@ and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does
 
 .. _vbi-625:
 
-.. figure::  vbi_625.*
-    :alt:    vbi_625.pdf / vbi_625.png
+.. figure::  vbi_625.png
+    :alt:    vbi_625.png
     :align:  center
 
     **Figure 4.3. ITU-R 625 line numbering**
diff --git a/Documentation/media/uapi/v4l/dev-subdev.rst b/Documentation/media/uapi/v4l/dev-subdev.rst
index b515424b3949..c18e9c5427ee 100644
--- a/Documentation/media/uapi/v4l/dev-subdev.rst
+++ b/Documentation/media/uapi/v4l/dev-subdev.rst
@@ -99,8 +99,8 @@ the video sensor and the host image processing hardware.
 
 .. _pipeline-scaling:
 
-.. figure::  pipeline.*
-    :alt:    pipeline.pdf / pipeline.png
+.. figure::  pipeline.png
+    :alt:    pipeline.png
     :align:  center
 
     Image Format Negotiation on Pipelines
diff --git a/Documentation/media/uapi/v4l/field-order.rst b/Documentation/media/uapi/v4l/field-order.rst
index 26c9a6541493..a7e1b4dae343 100644
--- a/Documentation/media/uapi/v4l/field-order.rst
+++ b/Documentation/media/uapi/v4l/field-order.rst
@@ -141,8 +141,8 @@ enum v4l2_field
 Field Order, Top Field First Transmitted
 ========================================
 
-.. figure::  fieldseq_tb.*
-    :alt:    fieldseq_tb.pdf / fieldseq_tb.png
+.. figure::  fieldseq_tb.png
+    :alt:    fieldseq_tb.png
     :align:  center
 
 
@@ -151,7 +151,7 @@ Field Order, Top Field First Transmitted
 Field Order, Bottom Field First Transmitted
 ===========================================
 
-.. figure::  fieldseq_bt.*
-    :alt:    fieldseq_bt.pdf / fieldseq_bt.png
+.. figure::  fieldseq_bt.png
+    :alt:    fieldseq_bt.png
     :align:  center
 
diff --git a/Documentation/media/uapi/v4l/pixfmt-nv12mt.rst b/Documentation/media/uapi/v4l/pixfmt-nv12mt.rst
index d088c469f880..c8a77bc79f2f 100644
--- a/Documentation/media/uapi/v4l/pixfmt-nv12mt.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-nv12mt.rst
@@ -33,8 +33,8 @@ Layout of macroblocks in memory is presented in the following figure.
 
 .. _nv12mt:
 
-.. figure::  nv12mt.*
-    :alt:    nv12mt.pdf / nv12mt.png
+.. figure::  nv12mt.png
+    :alt:    nv12mt.png
     :align:  center
 
     V4L2_PIX_FMT_NV12MT macroblock Z shape memory layout
@@ -50,8 +50,8 @@ interleaved. Height of the buffer is aligned to 32.
 
 .. _nv12mt_ex:
 
-.. figure::  nv12mt_example.*
-    :alt:    nv12mt_example.pdf / nv12mt_example.png
+.. figure::  nv12mt_example.png
+    :alt:    nv12mt_example.png
     :align:  center
 
     Example V4L2_PIX_FMT_NV12MT memory layout of macroblocks
diff --git a/Documentation/media/uapi/v4l/selection-api-003.rst b/Documentation/media/uapi/v4l/selection-api-003.rst
index c76e2332116b..207349c17ead 100644
--- a/Documentation/media/uapi/v4l/selection-api-003.rst
+++ b/Documentation/media/uapi/v4l/selection-api-003.rst
@@ -7,8 +7,8 @@ Selection targets
 
 .. _sel-targets-capture:
 
-.. figure::  selection.*
-    :alt:    selection.pdf / selection.png
+.. figure::  selection.png
+    :alt:    selection.png
     :align:  center
 
     Cropping and composing targets
diff --git a/Documentation/media/uapi/v4l/subdev-formats.rst b/Documentation/media/uapi/v4l/subdev-formats.rst
index 5053e284265d..2f9c135dfadd 100644
--- a/Documentation/media/uapi/v4l/subdev-formats.rst
+++ b/Documentation/media/uapi/v4l/subdev-formats.rst
@@ -1514,8 +1514,8 @@ be named ``MEDIA_BUS_FMT_SRGGB10_2X8_PADHI_LE``.
 
 .. _bayer-patterns:
 
-.. figure::  bayer.*
-    :alt:    bayer.pdf / bayer.png
+.. figure::  bayer.png
+    :alt:    bayer.png
     :align:  center
 
     **Figure 4.8 Bayer Patterns**

^ permalink raw reply related

* Re: Including images on Sphinx documents
From: Mauro Carvalho Chehab @ 2016-11-14 14:16 UTC (permalink / raw)
  To: Jonathan Corbet
  Cc: Jani Nikula, linux-kernel, linux-media, linux-doc,
	ksummit-discuss
In-Reply-To: <20161113140027.2fbe0946@lwn.net>

Em Sun, 13 Nov 2016 14:00:27 -0700
Jonathan Corbet <corbet@lwn.net> escreveu:

> On Mon, 7 Nov 2016 09:46:48 -0200
> Mauro Carvalho Chehab <mchehab@s-opensource.com> wrote:
> 
> > When running LaTeX in interactive mode, building just the media
> > PDF file with:
> > 
> > 	$ cls;make cleandocs; make SPHINXOPTS="-j5" DOCBOOKS="" SPHINXDIRS=media latexdocs 
> > 	$ PDFLATEX=xelatex LATEXOPTS="-interaction=interactive" -C Documentation/output/media/latex
> > 
> > I get this:
> > 
> > 	LaTeX Warning: Hyper reference `uapi/v4l/subdev-formats:bayer-patterns' on page
> > 	 153 undefined on input line 21373.
> > 
> > 	<use  "bayer.png" > [153]
> > 	! Extra alignment tab has been changed to \cr.
> > 	<template> \endtemplate 
> >                         
> > 	l.21429 \unskip}\relax \unskip}
> > 	                               \relax \\
> > 	? 
> > 
> > This patch fixes the issue:
> > 	https://git.linuxtv.org/mchehab/experimental.git/commit/?h=dirty-pdf&id=b709de415f34d77cc121cad95bece9c7ef4d12fd
> > 
> > That means that Sphinx is not generating the right LaTeX output even for
> > (some?) PNG images.  
> 
> So I'm seriously confused.
> 
> I can get that particular message - TeX is complaining about too many
> columns in the table.  But applying your patch (with a suitable bayer.pdf
> provided) does not fix the problem.  Indeed, I can remove the figure with
> the image entirely and still not fix the problem.  Are you sure that the
> patch linked here actually fixed it for you?

There are two patches on the series fixing the column issues for the Bayer
formats table on the /6 patch series.

I guess I got confused with that, because of this warning:

 	LaTeX Warning: Hyper reference `uapi/v4l/subdev-formats:bayer-patterns' on page
 	 153 undefined on input line 21373.

Anyway, you're right: PNG is indeed working fine[1], and the
cross-reference is OK. The issue is just with SVG.

I'll fold it with patch 6/6 and submit a new series.

Sorry for the mess.

[1] I tested now on sphinx 1.4.8 - I was using an older version
before (1.4.5, I guess).

Thanks,
Mauro

[PATCH] docs-rst: Let Sphinx do PNG image conversion

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>

diff --git a/Documentation/media/Makefile b/Documentation/media/Makefile
index 0f08bd8b87ba..297b85c37ab9 100644
--- a/Documentation/media/Makefile
+++ b/Documentation/media/Makefile
@@ -12,17 +12,6 @@ TARGETS := $(addprefix $(BUILDDIR)/, $(FILES))
 
 IMAGES = \
 	typical_media_device.svg \
-	uapi/v4l/fieldseq_tb.png \
-	uapi/v4l/selection.png \
-	uapi/v4l/vbi_hsync.png \
-	uapi/v4l/fieldseq_bt.png \
-	uapi/v4l/crop.png \
-	uapi/v4l/nv12mt.png \
-	uapi/v4l/vbi_525.png \
-	uapi/v4l/nv12mt_example.png \
-	uapi/v4l/vbi_625.png \
-	uapi/v4l/pipeline.png \
-	uapi/v4l/bayer.png \
 	uapi/dvb/dvbstb.svg \
 	uapi/v4l/constraints.svg \
 	uapi/v4l/subdev-image-processing-full.svg \
@@ -37,8 +26,6 @@ cmd = $(echo-cmd) $(cmd_$(1))
 quiet_cmd_genpdf = GENPDF  $2
       cmd_genpdf = convert $2 $3
 
-%.pdf: %.png
-	@$(call cmd,genpdf,$<,$@)
 %.pdf: %.svg
 	@$(call cmd,genpdf,$<,$@)
 
diff --git a/Documentation/media/uapi/v4l/crop.rst b/Documentation/media/uapi/v4l/crop.rst
index 31c5ba5ebd04..578c6f3d20f3 100644
--- a/Documentation/media/uapi/v4l/crop.rst
+++ b/Documentation/media/uapi/v4l/crop.rst
@@ -53,8 +53,8 @@ Cropping Structures
 
 .. _crop-scale:
 
-.. figure::  crop.*
-    :alt:    crop.pdf / crop.png
+.. figure::  crop.png
+    :alt:    crop.png
     :align:  center
 
     Image Cropping, Insertion and Scaling
diff --git a/Documentation/media/uapi/v4l/dev-raw-vbi.rst b/Documentation/media/uapi/v4l/dev-raw-vbi.rst
index fb4d9c4098a0..f81d906137ee 100644
--- a/Documentation/media/uapi/v4l/dev-raw-vbi.rst
+++ b/Documentation/media/uapi/v4l/dev-raw-vbi.rst
@@ -221,8 +221,8 @@ and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does
 
 .. _vbi-hsync:
 
-.. figure::  vbi_hsync.*
-    :alt:    vbi_hsync.pdf / vbi_hsync.png
+.. figure::  vbi_hsync.png
+    :alt:    vbi_hsync.png
     :align:  center
 
     **Figure 4.1. Line synchronization**
@@ -230,8 +230,8 @@ and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does
 
 .. _vbi-525:
 
-.. figure::  vbi_525.*
-    :alt:    vbi_525.pdf / vbi_525.png
+.. figure::  vbi_525.png
+    :alt:    vbi_525.png
     :align:  center
 
     **Figure 4.2. ITU-R 525 line numbering (M/NTSC and M/PAL)**
@@ -240,8 +240,8 @@ and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does
 
 .. _vbi-625:
 
-.. figure::  vbi_625.*
-    :alt:    vbi_625.pdf / vbi_625.png
+.. figure::  vbi_625.png
+    :alt:    vbi_625.png
     :align:  center
 
     **Figure 4.3. ITU-R 625 line numbering**
diff --git a/Documentation/media/uapi/v4l/dev-subdev.rst b/Documentation/media/uapi/v4l/dev-subdev.rst
index b515424b3949..c18e9c5427ee 100644
--- a/Documentation/media/uapi/v4l/dev-subdev.rst
+++ b/Documentation/media/uapi/v4l/dev-subdev.rst
@@ -99,8 +99,8 @@ the video sensor and the host image processing hardware.
 
 .. _pipeline-scaling:
 
-.. figure::  pipeline.*
-    :alt:    pipeline.pdf / pipeline.png
+.. figure::  pipeline.png
+    :alt:    pipeline.png
     :align:  center
 
     Image Format Negotiation on Pipelines
diff --git a/Documentation/media/uapi/v4l/field-order.rst b/Documentation/media/uapi/v4l/field-order.rst
index 26c9a6541493..a7e1b4dae343 100644
--- a/Documentation/media/uapi/v4l/field-order.rst
+++ b/Documentation/media/uapi/v4l/field-order.rst
@@ -141,8 +141,8 @@ enum v4l2_field
 Field Order, Top Field First Transmitted
 ========================================
 
-.. figure::  fieldseq_tb.*
-    :alt:    fieldseq_tb.pdf / fieldseq_tb.png
+.. figure::  fieldseq_tb.png
+    :alt:    fieldseq_tb.png
     :align:  center
 
 
@@ -151,7 +151,7 @@ Field Order, Top Field First Transmitted
 Field Order, Bottom Field First Transmitted
 ===========================================
 
-.. figure::  fieldseq_bt.*
-    :alt:    fieldseq_bt.pdf / fieldseq_bt.png
+.. figure::  fieldseq_bt.png
+    :alt:    fieldseq_bt.png
     :align:  center
 
diff --git a/Documentation/media/uapi/v4l/pixfmt-nv12mt.rst b/Documentation/media/uapi/v4l/pixfmt-nv12mt.rst
index d088c469f880..c8a77bc79f2f 100644
--- a/Documentation/media/uapi/v4l/pixfmt-nv12mt.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-nv12mt.rst
@@ -33,8 +33,8 @@ Layout of macroblocks in memory is presented in the following figure.
 
 .. _nv12mt:
 
-.. figure::  nv12mt.*
-    :alt:    nv12mt.pdf / nv12mt.png
+.. figure::  nv12mt.png
+    :alt:    nv12mt.png
     :align:  center
 
     V4L2_PIX_FMT_NV12MT macroblock Z shape memory layout
@@ -50,8 +50,8 @@ interleaved. Height of the buffer is aligned to 32.
 
 .. _nv12mt_ex:
 
-.. figure::  nv12mt_example.*
-    :alt:    nv12mt_example.pdf / nv12mt_example.png
+.. figure::  nv12mt_example.png
+    :alt:    nv12mt_example.png
     :align:  center
 
     Example V4L2_PIX_FMT_NV12MT memory layout of macroblocks
diff --git a/Documentation/media/uapi/v4l/selection-api-003.rst b/Documentation/media/uapi/v4l/selection-api-003.rst
index c76e2332116b..207349c17ead 100644
--- a/Documentation/media/uapi/v4l/selection-api-003.rst
+++ b/Documentation/media/uapi/v4l/selection-api-003.rst
@@ -7,8 +7,8 @@ Selection targets
 
 .. _sel-targets-capture:
 
-.. figure::  selection.*
-    :alt:    selection.pdf / selection.png
+.. figure::  selection.png
+    :alt:    selection.png
     :align:  center
 
     Cropping and composing targets
diff --git a/Documentation/media/uapi/v4l/subdev-formats.rst b/Documentation/media/uapi/v4l/subdev-formats.rst
index 5053e284265d..2f9c135dfadd 100644
--- a/Documentation/media/uapi/v4l/subdev-formats.rst
+++ b/Documentation/media/uapi/v4l/subdev-formats.rst
@@ -1514,8 +1514,8 @@ be named ``MEDIA_BUS_FMT_SRGGB10_2X8_PADHI_LE``.
 
 .. _bayer-patterns:
 
-.. figure::  bayer.*
-    :alt:    bayer.pdf / bayer.png
+.. figure::  bayer.png
+    :alt:    bayer.png
     :align:  center
 
     **Figure 4.8 Bayer Patterns**


^ permalink raw reply related

* [PATCH] virtio_ring: fix description of virtqueue_get_buf
From: Felipe Franciosi @ 2016-11-14 14:16 UTC (permalink / raw)
  To: Michael S. Tsirkin, Jason Wang
  Cc: Felipe Franciosi, linux-kernel, virtualization

The device (not the driver) populates the used ring and includes the len
of how much data was written.

Signed-off-by: Felipe Franciosi <felipe@nutanix.com>
---
 drivers/virtio/virtio_ring.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
index 489bfc6..8a0d6a9 100644
--- a/drivers/virtio/virtio_ring.c
+++ b/drivers/virtio/virtio_ring.c
@@ -649,7 +649,7 @@ static inline bool more_used(const struct vring_virtqueue *vq)
  * @vq: the struct virtqueue we're talking about.
  * @len: the length written into the buffer
  *
- * If the driver wrote data into the buffer, @len will be set to the
+ * If the device wrote data into the buffer, @len will be set to the
  * amount written.  This means you don't need to clear the buffer
  * beforehand to ensure there's no data leakage in the case of short
  * writes.
-- 
1.9.4

^ permalink raw reply related

* Re: [PATCH v4 7/8] v4l: Add signal lock status to source change events
From: Devin Heitmueller @ 2016-11-14 14:16 UTC (permalink / raw)
  To: Hans Verkuil
  Cc: Steve Longerbeam, Lars-Peter Clausen, mchehab,
	Linux Media Mailing List, Linux Kernel, Steve Longerbeam,
	Mauro Carvalho Chehab
In-Reply-To: <8ff2fc76-2290-d353-08cd-2aa31c31a19c@xs4all.nl>

> OK, but what can the application do with that event? If the glitch didn't
> affect the video, then it is pointless.
>
> If the lock is lost, then normally you loose video as well. If not, then
> applications are not interested in the event.

What about free running mode (where some decoders delivers blue or
black video with no signal present)?  In that case it might still be
useful to inform the application so it can show a message that says
something like "No Signal".

Devin


-- 
Devin J. Heitmueller - Kernel Labs
http://www.kernellabs.com

^ permalink raw reply

* [PATCH v6 3/3] clocksource: Add clockevent support to NPS400 driver
From: Noam Camus @ 2016-11-14  9:40 UTC (permalink / raw)
  To: robh+dt, mark.rutland, daniel.lezcano
  Cc: tglx, devicetree, linux-kernel, Noam Camus
In-Reply-To: <1479116447-29483-1-git-send-email-noamca@mellanox.com>

From: Noam Camus <noamca@mellanox.com>

Till now we used clockevent from generic ARC driver.
This was enough as long as we worked with simple multicore SoC.
When we are working with multithread SoC each HW thread can be
scheduled to receive timer interrupt using timer mask register.
This patch will provide a way to control clock events per HW thread.

The design idea is that for each core there is dedicated regirtser
(TSI) serving all 16 HW threads.
The register is a bitmask with one bit for each HW thread.
When HW thread wants that next expiration of timer interrupt will
hit it then the proper bit should be set in this dedicated register.
When timer expires all HW threads within this core which their bit
is set at the TSI register will be interrupted.

Driver can be used from device tree by:
compatible = "ezchip,nps400-timer0" <-- for clocksource
compatible = "ezchip,nps400-timer1" <-- for clockevent

Note that name convention for timer0/timer1 was taken from legacy
ARC design. This design is our base before adding HW threads.
For backward compatibility we keep "ezchip,nps400-timer" for clocksource

Signed-off-by: Noam Camus <noamca@mellanox.com>
---
 .../bindings/timer/ezchip,nps400-timer.txt         |   15 --
 .../bindings/timer/ezchip,nps400-timer0.txt        |   17 ++
 .../bindings/timer/ezchip,nps400-timer1.txt        |   15 ++
 drivers/clocksource/timer-nps.c                    |  213 ++++++++++++++++++++
 4 files changed, 245 insertions(+), 15 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/timer/ezchip,nps400-timer.txt
 create mode 100644 Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt
 create mode 100644 Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt

diff --git a/Documentation/devicetree/bindings/timer/ezchip,nps400-timer.txt b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer.txt
deleted file mode 100644
index c8c03d7..0000000
--- a/Documentation/devicetree/bindings/timer/ezchip,nps400-timer.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-NPS Network Processor
-
-Required properties:
-
-- compatible :	should be "ezchip,nps400-timer"
-
-Clocks required for compatible = "ezchip,nps400-timer":
-- clocks : Must contain a single entry describing the clock input
-
-Example:
-
-timer {
-	compatible = "ezchip,nps400-timer";
-	clocks = <&sysclk>;
-};
diff --git a/Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt
new file mode 100644
index 0000000..e3cfce8
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt
@@ -0,0 +1,17 @@
+NPS Network Processor
+
+Required properties:
+
+- compatible :	should be "ezchip,nps400-timer0"
+
+Clocks required for compatible = "ezchip,nps400-timer0":
+- interrupts : The interrupt of the first timer
+- clocks : Must contain a single entry describing the clock input
+
+Example:
+
+timer {
+	compatible = "ezchip,nps400-timer0";
+	interrupts = <3>;
+	clocks = <&sysclk>;
+};
diff --git a/Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt
new file mode 100644
index 0000000..c0ab419
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt
@@ -0,0 +1,15 @@
+NPS Network Processor
+
+Required properties:
+
+- compatible :	should be "ezchip,nps400-timer1"
+
+Clocks required for compatible = "ezchip,nps400-timer1":
+- clocks : Must contain a single entry describing the clock input
+
+Example:
+
+timer {
+	compatible = "ezchip,nps400-timer1";
+	clocks = <&sysclk>;
+};
diff --git a/drivers/clocksource/timer-nps.c b/drivers/clocksource/timer-nps.c
index 0c8e21f..04bb66c 100644
--- a/drivers/clocksource/timer-nps.c
+++ b/drivers/clocksource/timer-nps.c
@@ -111,3 +111,216 @@ static int __init nps_setup_clocksource(struct device_node *node)
 
 CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer",
 		       nps_setup_clocksource);
+CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clk_src, "ezchip,nps400-timer1",
+		       nps_setup_clocksource);
+
+#ifdef CONFIG_EZNPS_MTM_EXT
+#include <soc/nps/mtm.h>
+
+/* Timer related Aux registers */
+#define NPS_REG_TIMER0_TSI	0xFFFFF850
+#define NPS_REG_TIMER0_LIMIT	0x23
+#define NPS_REG_TIMER0_CTRL	0x22
+#define NPS_REG_TIMER0_CNT	0x21
+
+/*
+ * Interrupt Enabled (IE) - re-arm the timer
+ * Not Halted (NH) - is cleared when working with JTAG (for debug)
+ */
+#define TIMER0_CTRL_IE		BIT(0)
+#define TIMER0_CTRL_NH		BIT(1)
+
+static unsigned long nps_timer0_freq;
+static unsigned long nps_timer0_irq;
+
+/*
+ * Arm the timer to interrupt after @cycles
+ */
+static void nps_clkevent_timer_event_setup(unsigned int cycles)
+{
+	write_aux_reg(NPS_REG_TIMER0_LIMIT, cycles);
+	write_aux_reg(NPS_REG_TIMER0_CNT, 0);
+
+	write_aux_reg(NPS_REG_TIMER0_CTRL, TIMER0_CTRL_IE | TIMER0_CTRL_NH);
+}
+
+/*
+ * Clear from TSI the bit for this thread (if not in periodic mode)
+ * If still there are pending HW treads set next timer event
+ */
+static void nps_clkevent_rm_thread(bool remove_thread)
+{
+	unsigned int cflags;
+	unsigned int enabled_threads = 0;
+	int thread;
+
+	hw_schd_save(&cflags);
+
+	enabled_threads = read_aux_reg(NPS_REG_TIMER0_TSI);
+
+	/* remove thread from TSI1 */
+	if (remove_thread) {
+		thread = read_aux_reg(CTOP_AUX_THREAD_ID);
+		enabled_threads &= ~(1 << thread);
+		write_aux_reg(NPS_REG_TIMER0_TSI, enabled_threads);
+	}
+
+	/* Re-arm the timer if needed */
+	if (!enabled_threads)
+		write_aux_reg(NPS_REG_TIMER0_CTRL, TIMER0_CTRL_NH);
+	else
+		write_aux_reg(NPS_REG_TIMER0_CTRL,
+			      TIMER0_CTRL_IE | TIMER0_CTRL_NH);
+
+	hw_schd_restore(cflags);
+}
+
+static void nps_clkevent_add_thread(bool set_event)
+{
+	int thread;
+	unsigned int cflags, enabled_threads;
+
+	hw_schd_save(&cflags);
+
+	/* add thread to TSI1 */
+	thread = read_aux_reg(CTOP_AUX_THREAD_ID);
+	enabled_threads = read_aux_reg(NPS_REG_TIMER0_TSI);
+	enabled_threads |= (1 << thread);
+	write_aux_reg(NPS_REG_TIMER0_TSI, enabled_threads);
+
+	/* set next timer event */
+	if (set_event)
+		write_aux_reg(NPS_REG_TIMER0_CTRL,
+			      TIMER0_CTRL_IE | TIMER0_CTRL_NH);
+
+	hw_schd_restore(cflags);
+}
+
+static int nps_clkevent_set_next_event(unsigned long delta,
+				       struct clock_event_device *dev)
+{
+	nps_clkevent_add_thread(true);
+	enable_percpu_irq(nps_timer0_irq, IRQ_TYPE_NONE);
+
+	return 0;
+}
+
+/*
+ * Whenever anyone tries to change modes, we just mask interrupts
+ * and wait for the next event to get set.
+ */
+static int nps_clkevent_timer_shutdown(struct clock_event_device *dev)
+{
+	disable_percpu_irq(nps_timer0_irq);
+
+	return 0;
+}
+
+/*
+ * For each HW thread set its relevant bit at the TSI register
+ * To arm the timer only thread 0 is needed since it is shared
+ * by all HW threads within same core.
+ */
+static int nps_clkevent_set_periodic(struct clock_event_device *dev)
+{
+	nps_clkevent_add_thread(false);
+	if (read_aux_reg(CTOP_AUX_THREAD_ID) == 0)
+		nps_clkevent_timer_event_setup(nps_timer0_freq / HZ);
+
+	return 0;
+}
+
+static int nps_clkevent_set_oneshot(struct clock_event_device *dev)
+{
+	nps_clkevent_rm_thread(true);
+	nps_clkevent_timer_shutdown(dev);
+
+	return 0;
+}
+
+static DEFINE_PER_CPU(struct clock_event_device, nps_clockevent_device) = {
+	.name				=	"NPS Timer0",
+	.features			=	CLOCK_EVT_FEAT_ONESHOT |
+						CLOCK_EVT_FEAT_PERIODIC,
+	.rating				=	300,
+	.set_next_event			=	nps_clkevent_set_next_event,
+	.set_state_periodic		=	nps_clkevent_set_periodic,
+	.set_state_oneshot		=	nps_clkevent_set_oneshot,
+	.set_state_oneshot_stopped	=	nps_clkevent_timer_shutdown,
+	.set_state_shutdown		=	nps_clkevent_timer_shutdown,
+	.tick_resume			=	nps_clkevent_timer_shutdown,
+};
+
+static irqreturn_t timer_irq_handler(int irq, void *dev_id)
+{
+	struct clock_event_device *evt = dev_id;
+	int irq_reenable = clockevent_state_periodic(evt);
+
+	/* Remove HW thread from TSI only if NOT in periodic state */
+	nps_clkevent_rm_thread(!irq_reenable);
+
+	evt->event_handler(evt);
+
+	return IRQ_HANDLED;
+}
+
+static int nps_timer_starting_cpu(unsigned int cpu)
+{
+	struct clock_event_device *evt = this_cpu_ptr(&nps_clockevent_device);
+
+	evt->cpumask = cpumask_of(smp_processor_id());
+
+	clockevents_config_and_register(evt, nps_timer0_freq, 0, ULONG_MAX);
+	enable_percpu_irq(nps_timer0_irq, IRQ_TYPE_NONE);
+
+	return 0;
+}
+
+static int nps_timer_dying_cpu(unsigned int cpu)
+{
+	disable_percpu_irq(nps_timer0_irq);
+	return 0;
+}
+
+static int __init nps_setup_clockevent(struct device_node *node)
+{
+	struct clk *clk;
+	int ret;
+
+	nps_timer0_irq = irq_of_parse_and_map(node, 0);
+	if (nps_timer0_irq <= 0) {
+		pr_err("clockevent: missing irq");
+		return -EINVAL;
+	}
+
+	ret = nps_get_timer_clk(node, &nps_timer0_freq, &clk);
+	if (ret)
+		return ret;
+
+	/* Needs apriori irq_set_percpu_devid() done in intc map function */
+	ret = request_percpu_irq(nps_timer0_irq, timer_irq_handler,
+				 "Timer0 (per-cpu-tick)",
+				 &nps_clockevent_device);
+	if (ret) {
+		pr_err("Couldn't request irq\n");
+		clk_disable_unprepare(clk);
+		return ret;
+	}
+
+	ret = cpuhp_setup_state(CPUHP_AP_ARC_TIMER_STARTING,
+				"clockevents/nps:starting",
+				nps_timer_starting_cpu,
+				nps_timer_dying_cpu);
+	if (ret) {
+		pr_err("Failed to setup hotplug state");
+		clk_disable_unprepare(clk);
+		free_percpu_irq(nps_timer0_irq, &nps_clockevent_device);
+		return ret;
+	}
+
+	return 0;
+}
+
+CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clk_evt, "ezchip,nps400-timer0",
+		       nps_setup_clockevent);
+#endif /* CONFIG_EZNPS_MTM_EXT */
-- 
1.7.1

^ permalink raw reply related

* Re: [RFC 01/14] SoundWire: Add SoundWire bus driver documentation
From: Charles Keepax @ 2016-11-14 14:15 UTC (permalink / raw)
  To: Hardik Shah
  Cc: alsa-devel, linux-kernel, tiwai, pierre-louis.bossart, broonie,
	lgirdwood, plai, patches.audio, Sanyog Kale
In-Reply-To: <1477053673-16021-2-git-send-email-hardik.t.shah@intel.com>

On Fri, Oct 21, 2016 at 06:10:59PM +0530, Hardik Shah wrote:
> This patch adds summary documentation of SoundWire bus driver support in
> Linux.
> 
> Signed-off-by: Hardik Shah <hardik.t.shah@intel.com>
> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com>
> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
> ---
>  Documentation/sound/alsa/sdw/summary.txt |  253 ++++++++++++++++++++++++++++++
>  1 file changed, 253 insertions(+)
>  create mode 100644 Documentation/sound/alsa/sdw/summary.txt
> 
> diff --git a/Documentation/sound/alsa/sdw/summary.txt b/Documentation/sound/alsa/sdw/summary.txt
> new file mode 100644
> index 0000000..dc62817
> --- /dev/null
> +++ b/Documentation/sound/alsa/sdw/summary.txt
> @@ -0,0 +1,253 @@
<snip>
> +Programming interfaces (SoundWire Master interface Driver)
> +==========================================================
> +
> +SoundWire bus driver supports programming interfaces for the SoundWire
> +Master and SoundWire Slave devices. All the code uses the "sdw" prefix
> +commonly used by SOC designers and 3rd party vendors.
> +
> +Each of the SoundWire Master interface needs to be registered to the Bus
> +driver.  Master interface capabilities also needs to be registered to
> +bus driver since there is no discovery mechanism as a part of SoundWire
> +protocol.
> +
> +The Master interface along with the Master interface capabilities are
> +registered based on board file, DT or ACPI.
> +
> +Following is the API to register the SoundWire Master device.
> +
> +static int my_sdw_register_master()
> +{
> +	struct sdw_master master;
> +	struct sdw_master_capabilities *m_cap;
> +
> +	m_cap = &master.mstr_capabilities;
> +
> +	/*
> +	 * Fill the Master device capability, this is required
> +	 * by bus driver to handle bus configurations.
> +	 */
> +	m_cap->highphy_capable = false;
> +	m_cap->monitor_handover_supported = false;
> +	m_cap->sdw_dp0_supported = 1;
> +	m_cap->num_data_ports = INTEL_SDW_MAX_PORTS;
> +
> +	return snd_sdw_master_add(&master);
> +}
> +
> +Master driver gets registered for controlling the Master device. It
> +provides the callback functions to the bus driver to control the bus in
> +device specific way. Device and Driver binds according to the standard
> +Linux device-driver bind model. Master driver is registered from the
> +driver init code. Below code shows the sample Master driver
> +registration.
> +
> +static struct sdw_master_driver intel_sdw_mstr_driver = {
> +	.driver_type = SDW_DRIVER_TYPE_MASTER,
> +	.driver = {
> +		.name   = "intel_sdw_mstr",
> +		.pm     = &intel_sdw_pm_ops,
> +	},
> +
> +	.probe          = intel_sdw_probe,
> +	.remove         = intel_sdw_remove,
> +	.mstr_ops       = &intel_sdw_master_ops,
> +	.mstr_port_ops = &intel_sdw_master_port_ops,
> +};
> +
> +static int __init intel_sdw_init(void) {
> +	return snd_sdw_master_register_driver(&intel_sdw_mstr_driver);
> +}

Would be good to hear some detail the reasoning for the design
choices here? Normally (I2C/SPI) the master sits on whatever bus
the host uses to talk to the master so often this might be the
platform bus for memory mapped devices, it then creates a bus and
slaves register to that. This also has the nice property that its
easy to create devices that sit behind other buses, for example
here we might want a SoundWire master that sits behind a SPI bus.
But you seem to have gone in the other direction and have the
master sitting on the same bus as the slaves.

> +
> +As shown above Master driver registers itself with  bus using
> +"sdw_mstr_driver_register" API, It registers using set of "mstr_ops" and
> +"mstr_port_ops" callback functions to the bus driver.
> +
> +"mstr_ops" is used by bus driver to control the bus in the hardware
> +specific way. It includes bus control functions such as sending the
> +SoundWire read/write messages on bus. The Bus driver also defines the
> +clock frequency and frameshape allocation needed by active stream and
> +configuration messages that need to be transmitted over the bus, to
> +maximize the bandwidth needed while minimizing the power. The "mstr_ops"
> +structure abstracts the hardware details of the Master from the bus
> +driver for setting up of the clock frequency and frameshape.
> +
> +"mstr_port_ops" is used by bus driver to setup the Port parameters of
> +the Master interface Port. Master interface Port register map is not
> +defined by MIPI specification, so bus driver calls the "mstr_port_ops"
> +call back function to do Port operations like "Port Prepare", "Port
> +Transport params set", "Port enable and disable". The implementation of
> +the Master driver can then perform hardware-specific configurations.

Thanks,
Charles

^ permalink raw reply

* Re: [RFC 01/14] SoundWire: Add SoundWire bus driver documentation
From: Charles Keepax @ 2016-11-14 14:15 UTC (permalink / raw)
  To: Hardik Shah
  Cc: alsa-devel, linux-kernel, tiwai, pierre-louis.bossart, broonie,
	lgirdwood, plai, patches.audio, Sanyog Kale
In-Reply-To: <1477053673-16021-2-git-send-email-hardik.t.shah@intel.com>

On Fri, Oct 21, 2016 at 06:10:59PM +0530, Hardik Shah wrote:
> This patch adds summary documentation of SoundWire bus driver support in
> Linux.
> 
> Signed-off-by: Hardik Shah <hardik.t.shah@intel.com>
> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com>
> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
> ---
>  Documentation/sound/alsa/sdw/summary.txt |  253 ++++++++++++++++++++++++++++++
>  1 file changed, 253 insertions(+)
>  create mode 100644 Documentation/sound/alsa/sdw/summary.txt
> 
> diff --git a/Documentation/sound/alsa/sdw/summary.txt b/Documentation/sound/alsa/sdw/summary.txt
> new file mode 100644
> index 0000000..dc62817
> --- /dev/null
> +++ b/Documentation/sound/alsa/sdw/summary.txt
> @@ -0,0 +1,253 @@
<snip>
> +Programming interfaces (SoundWire Master interface Driver)
> +==========================================================
> +
> +SoundWire bus driver supports programming interfaces for the SoundWire
> +Master and SoundWire Slave devices. All the code uses the "sdw" prefix
> +commonly used by SOC designers and 3rd party vendors.
> +
> +Each of the SoundWire Master interface needs to be registered to the Bus
> +driver.  Master interface capabilities also needs to be registered to
> +bus driver since there is no discovery mechanism as a part of SoundWire
> +protocol.
> +
> +The Master interface along with the Master interface capabilities are
> +registered based on board file, DT or ACPI.
> +
> +Following is the API to register the SoundWire Master device.
> +
> +static int my_sdw_register_master()
> +{
> +	struct sdw_master master;
> +	struct sdw_master_capabilities *m_cap;
> +
> +	m_cap = &master.mstr_capabilities;
> +
> +	/*
> +	 * Fill the Master device capability, this is required
> +	 * by bus driver to handle bus configurations.
> +	 */
> +	m_cap->highphy_capable = false;
> +	m_cap->monitor_handover_supported = false;
> +	m_cap->sdw_dp0_supported = 1;
> +	m_cap->num_data_ports = INTEL_SDW_MAX_PORTS;
> +
> +	return snd_sdw_master_add(&master);
> +}
> +
> +Master driver gets registered for controlling the Master device. It
> +provides the callback functions to the bus driver to control the bus in
> +device specific way. Device and Driver binds according to the standard
> +Linux device-driver bind model. Master driver is registered from the
> +driver init code. Below code shows the sample Master driver
> +registration.
> +
> +static struct sdw_master_driver intel_sdw_mstr_driver = {
> +	.driver_type = SDW_DRIVER_TYPE_MASTER,
> +	.driver = {
> +		.name   = "intel_sdw_mstr",
> +		.pm     = &intel_sdw_pm_ops,
> +	},
> +
> +	.probe          = intel_sdw_probe,
> +	.remove         = intel_sdw_remove,
> +	.mstr_ops       = &intel_sdw_master_ops,
> +	.mstr_port_ops = &intel_sdw_master_port_ops,
> +};
> +
> +static int __init intel_sdw_init(void) {
> +	return snd_sdw_master_register_driver(&intel_sdw_mstr_driver);
> +}

Would be good to hear some detail the reasoning for the design
choices here? Normally (I2C/SPI) the master sits on whatever bus
the host uses to talk to the master so often this might be the
platform bus for memory mapped devices, it then creates a bus and
slaves register to that. This also has the nice property that its
easy to create devices that sit behind other buses, for example
here we might want a SoundWire master that sits behind a SPI bus.
But you seem to have gone in the other direction and have the
master sitting on the same bus as the slaves.

> +
> +As shown above Master driver registers itself with  bus using
> +"sdw_mstr_driver_register" API, It registers using set of "mstr_ops" and
> +"mstr_port_ops" callback functions to the bus driver.
> +
> +"mstr_ops" is used by bus driver to control the bus in the hardware
> +specific way. It includes bus control functions such as sending the
> +SoundWire read/write messages on bus. The Bus driver also defines the
> +clock frequency and frameshape allocation needed by active stream and
> +configuration messages that need to be transmitted over the bus, to
> +maximize the bandwidth needed while minimizing the power. The "mstr_ops"
> +structure abstracts the hardware details of the Master from the bus
> +driver for setting up of the clock frequency and frameshape.
> +
> +"mstr_port_ops" is used by bus driver to setup the Port parameters of
> +the Master interface Port. Master interface Port register map is not
> +defined by MIPI specification, so bus driver calls the "mstr_port_ops"
> +call back function to do Port operations like "Port Prepare", "Port
> +Transport params set", "Port enable and disable". The implementation of
> +the Master driver can then perform hardware-specific configurations.

Thanks,
Charles

^ permalink raw reply

* Re: [PATCH] uvcvideo: Add bayer 16-bit format patterns
From: Sakari Ailus @ 2016-11-14 14:14 UTC (permalink / raw)
  To: Edgar Thier; +Cc: linux-media, laurent.pinchart
In-Reply-To: <87h97achun.fsf@edgarthier.net>

Hi Edgar,

On Mon, Nov 14, 2016 at 02:26:56PM +0100, Edgar Thier wrote:
> From aec97c931cb4b91f91dd0ed38f74d866d4f13347 Mon Sep 17 00:00:00 2001
> From: Edgar Thier <info@edgarthier.net>
> Date: Mon, 14 Nov 2016 14:17:57 +0100
> Subject: [PATCH] uvcvideo: Add bayer 16-bit format patterns
> 
> Add bayer 16-bit GUIDs to uvcvideo and associated them with the
> corresponding V4L2 pixel formats.
> 
> Signed-off-by: Edgar Thier <info@edgarthier.net>
> ---

...

> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> index 4364ce6..6bdf592 100644
> --- a/include/uapi/linux/videodev2.h
> +++ b/include/uapi/linux/videodev2.h
> @@ -605,6 +605,9 @@ struct v4l2_pix_format {
> #define V4L2_PIX_FMT_SGRBG12 v4l2_fourcc('B', 'A', '1', '2') /* 12  GRGR.. BGBG.. */
> #define V4L2_PIX_FMT_SRGGB12 v4l2_fourcc('R', 'G', '1', '2') /* 12  RGRG.. GBGB.. */
> #define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16  BGBG.. GRGR.. */
> +#define V4L2_PIX_FMT_SGBRG16 v4l2_fourcc('G', 'B', '1', '6') /* 16  GBGB.. RGRG.. */
> +#define V4L2_PIX_FMT_SRGGB16 v4l2_fourcc('R', 'G', '1', '6') /* 16  RGRG.. GBGB.. */
> +#define V4L2_PIX_FMT_SGRBG16 v4l2_fourcc('G', 'R', '1', '6') /* 16  GRGR.. BGBG.. */

Thanks for the patch!

Could you rebase your uvcvideo changes on this patch, dropping the framework
changes from yours?

Cc Laurent. Laurent, could you take both of the patches to your tree after
the rebase?

The patch is also available here:

<URL:https://git.linuxtv.org/sailus/media_tree.git/commit/?h=packed12-postponed2&id=c5b60538b33f993109248a642c8e9b74f7d1abd1>


>From c5b60538b33f993109248a642c8e9b74f7d1abd1 Mon Sep 17 00:00:00 2001
From: Sakari Ailus <sakari.ailus@linux.intel.com>
Date: Mon, 27 Jun 2016 16:46:16 +0300
Subject: [PATCH 1/1] v4l: Add 16-bit raw bayer pixel formats

The formats added by this patch are:

	V4L2_PIX_FMT_SBGGR16
	V4L2_PIX_FMT_SGBRG16
	V4L2_PIX_FMT_SGRBG16

V4L2_PIX_FMT_SRGGB16 already existed before the patch. Rework the
documentation to match that of the other sample depths.

Also align the description of V4L2_PIX_FMT_SRGGB16 to match with other
similar formats.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
---
 Documentation/media/uapi/v4l/pixfmt-rgb.rst     |  2 +-
 Documentation/media/uapi/v4l/pixfmt-sbggr16.rst | 62 ----------------------
 Documentation/media/uapi/v4l/pixfmt-srggb16.rst | 69 +++++++++++++++++++++++++
 drivers/media/v4l2-core/v4l2-ioctl.c            |  5 +-
 include/uapi/linux/videodev2.h                  |  3 ++
 5 files changed, 77 insertions(+), 64 deletions(-)
 delete mode 100644 Documentation/media/uapi/v4l/pixfmt-sbggr16.rst
 create mode 100644 Documentation/media/uapi/v4l/pixfmt-srggb16.rst

diff --git a/Documentation/media/uapi/v4l/pixfmt-rgb.rst b/Documentation/media/uapi/v4l/pixfmt-rgb.rst
index 9cc9808..b0f3513 100644
--- a/Documentation/media/uapi/v4l/pixfmt-rgb.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-rgb.rst
@@ -12,9 +12,9 @@ RGB Formats
 
     pixfmt-packed-rgb
     pixfmt-srggb8
-    pixfmt-sbggr16
     pixfmt-srggb10
     pixfmt-srggb10p
     pixfmt-srggb10alaw8
     pixfmt-srggb10dpcm8
     pixfmt-srggb12
+    pixfmt-srggb16
diff --git a/Documentation/media/uapi/v4l/pixfmt-sbggr16.rst b/Documentation/media/uapi/v4l/pixfmt-sbggr16.rst
deleted file mode 100644
index 6f7f327..0000000
--- a/Documentation/media/uapi/v4l/pixfmt-sbggr16.rst
+++ /dev/null
@@ -1,62 +0,0 @@
-.. -*- coding: utf-8; mode: rst -*-
-
-.. _V4L2-PIX-FMT-SBGGR16:
-
-*****************************
-V4L2_PIX_FMT_SBGGR16 ('BYR2')
-*****************************
-
-Bayer RGB format
-
-
-Description
-===========
-
-This format is similar to
-:ref:`V4L2_PIX_FMT_SBGGR8 <V4L2-PIX-FMT-SBGGR8>`, except each pixel
-has a depth of 16 bits. The least significant byte is stored at lower
-memory addresses (little-endian).
-
-**Byte Order.**
-Each cell is one byte.
-
-.. flat-table::
-    :header-rows:  0
-    :stub-columns: 0
-
-    * - start + 0:
-      - B\ :sub:`00low`
-      - B\ :sub:`00high`
-      - G\ :sub:`01low`
-      - G\ :sub:`01high`
-      - B\ :sub:`02low`
-      - B\ :sub:`02high`
-      - G\ :sub:`03low`
-      - G\ :sub:`03high`
-    * - start + 8:
-      - G\ :sub:`10low`
-      - G\ :sub:`10high`
-      - R\ :sub:`11low`
-      - R\ :sub:`11high`
-      - G\ :sub:`12low`
-      - G\ :sub:`12high`
-      - R\ :sub:`13low`
-      - R\ :sub:`13high`
-    * - start + 16:
-      - B\ :sub:`20low`
-      - B\ :sub:`20high`
-      - G\ :sub:`21low`
-      - G\ :sub:`21high`
-      - B\ :sub:`22low`
-      - B\ :sub:`22high`
-      - G\ :sub:`23low`
-      - G\ :sub:`23high`
-    * - start + 24:
-      - G\ :sub:`30low`
-      - G\ :sub:`30high`
-      - R\ :sub:`31low`
-      - R\ :sub:`31high`
-      - G\ :sub:`32low`
-      - G\ :sub:`32high`
-      - R\ :sub:`33low`
-      - R\ :sub:`33high`
diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb16.rst b/Documentation/media/uapi/v4l/pixfmt-srggb16.rst
new file mode 100644
index 0000000..06facc9
--- /dev/null
+++ b/Documentation/media/uapi/v4l/pixfmt-srggb16.rst
@@ -0,0 +1,69 @@
+.. -*- coding: utf-8; mode: rst -*-
+
+.. _V4L2-PIX-FMT-SRGGB16:
+.. _v4l2-pix-fmt-sbggr16:
+.. _v4l2-pix-fmt-sgbrg16:
+.. _v4l2-pix-fmt-sgrbg16:
+
+
+***************************************************************************************************************************
+V4L2_PIX_FMT_SRGGB16 ('RG16'), V4L2_PIX_FMT_SGRBG16 ('GR16'), V4L2_PIX_FMT_SGBRG16 ('GB16'), V4L2_PIX_FMT_SBGGR16 ('BYR2'),
+***************************************************************************************************************************
+
+
+16-bit Bayer formats
+
+
+Description
+===========
+
+These four pixel formats are raw sRGB / Bayer formats with 16 bits per
+sample. Each sample is stored in a 16-bit word. Each n-pixel row contains
+n/2 green samples and n/2 blue or red samples, with alternating red and blue
+rows. Bytes are stored in memory in little endian order. They are
+conventionally described as GRGR... BGBG..., RGRG... GBGB..., etc. Below is
+an example of one of these formats:
+
+**Byte Order.**
+Each cell is one byte.
+
+.. flat-table::
+    :header-rows:  0
+    :stub-columns: 0
+
+    * - start + 0:
+      - B\ :sub:`00low`
+      - B\ :sub:`00high`
+      - G\ :sub:`01low`
+      - G\ :sub:`01high`
+      - B\ :sub:`02low`
+      - B\ :sub:`02high`
+      - G\ :sub:`03low`
+      - G\ :sub:`03high`
+    * - start + 8:
+      - G\ :sub:`10low`
+      - G\ :sub:`10high`
+      - R\ :sub:`11low`
+      - R\ :sub:`11high`
+      - G\ :sub:`12low`
+      - G\ :sub:`12high`
+      - R\ :sub:`13low`
+      - R\ :sub:`13high`
+    * - start + 16:
+      - B\ :sub:`20low`
+      - B\ :sub:`20high`
+      - G\ :sub:`21low`
+      - G\ :sub:`21high`
+      - B\ :sub:`22low`
+      - B\ :sub:`22high`
+      - G\ :sub:`23low`
+      - G\ :sub:`23high`
+    * - start + 24:
+      - G\ :sub:`30low`
+      - G\ :sub:`30high`
+      - R\ :sub:`31low`
+      - R\ :sub:`31high`
+      - G\ :sub:`32low`
+      - G\ :sub:`32high`
+      - R\ :sub:`33low`
+      - R\ :sub:`33high`
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index 181381d..61d2d65 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1191,7 +1191,10 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
 	case V4L2_PIX_FMT_SGBRG10DPCM8:	descr = "8-bit Bayer GBGB/RGRG (DPCM)"; break;
 	case V4L2_PIX_FMT_SGRBG10DPCM8:	descr = "8-bit Bayer GRGR/BGBG (DPCM)"; break;
 	case V4L2_PIX_FMT_SRGGB10DPCM8:	descr = "8-bit Bayer RGRG/GBGB (DPCM)"; break;
-	case V4L2_PIX_FMT_SBGGR16:	descr = "16-bit Bayer BGBG/GRGR (Exp.)"; break;
+	case V4L2_PIX_FMT_SBGGR16:	descr = "16-bit Bayer BGBG/GRGR"; break;
+	case V4L2_PIX_FMT_SGBRG16:	descr = "16-bit Bayer GBGB/RGRG"; break;
+	case V4L2_PIX_FMT_SGRBG16:	descr = "16-bit Bayer GRGR/BGBG"; break;
+	case V4L2_PIX_FMT_SRGGB16:	descr = "16-bit Bayer RGRG/GBGB"; break;
 	case V4L2_PIX_FMT_SN9C20X_I420:	descr = "GSPCA SN9C20X I420"; break;
 	case V4L2_PIX_FMT_SPCA501:	descr = "GSPCA SPCA501"; break;
 	case V4L2_PIX_FMT_SPCA505:	descr = "GSPCA SPCA505"; break;
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 4364ce6..ba352b6 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -605,6 +605,9 @@ struct v4l2_pix_format {
 #define V4L2_PIX_FMT_SGRBG12 v4l2_fourcc('B', 'A', '1', '2') /* 12  GRGR.. BGBG.. */
 #define V4L2_PIX_FMT_SRGGB12 v4l2_fourcc('R', 'G', '1', '2') /* 12  RGRG.. GBGB.. */
 #define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16  BGBG.. GRGR.. */
+#define V4L2_PIX_FMT_SGBRG16 v4l2_fourcc('G', 'B', '1', '6') /* 16  GBGB.. RGRG.. */
+#define V4L2_PIX_FMT_SGRBG16 v4l2_fourcc('G', 'R', '1', '6') /* 16  GRGR.. BGBG.. */
+#define V4L2_PIX_FMT_SRGGB16 v4l2_fourcc('R', 'G', '1', '6') /* 16  RGRG.. GBGB.. */
 
 /* HSV formats */
 #define V4L2_PIX_FMT_HSV24 v4l2_fourcc('H', 'S', 'V', '3')
-- 
2.1.4

-- 
Kind regards,

Sakari Ailus
e-mail: sakari.ailus@iki.fi	XMPP: sailus@retiisi.org.uk

^ permalink raw reply related

* [U-Boot] [PATCH] Do not force master mode on unaffected PHY's
From: Olliver Schinagl @ 2016-11-14 14:13 UTC (permalink / raw)
  To: u-boot
In-Reply-To: <0792b907-2f11-8114-8b25-2fd35e8c6ffd@redhat.com>

Hans,


On 14-11-16 15:13, Hans de Goede wrote:
> Hi,
>
> On 14-11-16 15:11, Olliver Schinagl wrote:
>> Hey Hans,
>>
>>
>> On 14-11-16 12:26, Hans de Goede wrote:
>>> Hi,
>>>
>>> On 08-11-16 17:38, Olliver Schinagl wrote:
>>>> The current implementation to force the PHY into master mode is to 
>>>> have a
>>>> define which affects all realtek PHY's. This is not needed as the 
>>>> problem
>>>> only exists in the RTL8211C chips. Let us thus turn this into a 
>>>> quirk flag
>>>> instead.
>>>
>>> Series looks good to me:
>>>
>>> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
>> Thanks, but keep your eye on the thread. I'm working on a v3 where 
>> i'm pulling the eeprom stuff out of the sunxi stuff, and in the 
>> net-uclass layer!
>
> Erm, this is another series :)
Ah poop. You are right! Sorry :)
>
> Regards,
>
> Hans

^ permalink raw reply

* [U-Boot] [PATCH] Do not force master mode on unaffected PHY's
From: Hans de Goede @ 2016-11-14 14:13 UTC (permalink / raw)
  To: u-boot
In-Reply-To: <cee96de2-bc22-8838-80ba-7491f2e6480e@schinagl.nl>

Hi,

On 14-11-16 15:11, Olliver Schinagl wrote:
> Hey Hans,
>
>
> On 14-11-16 12:26, Hans de Goede wrote:
>> Hi,
>>
>> On 08-11-16 17:38, Olliver Schinagl wrote:
>>> The current implementation to force the PHY into master mode is to have a
>>> define which affects all realtek PHY's. This is not needed as the problem
>>> only exists in the RTL8211C chips. Let us thus turn this into a quirk flag
>>> instead.
>>
>> Series looks good to me:
>>
>> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
> Thanks, but keep your eye on the thread. I'm working on a v3 where i'm pulling the eeprom stuff out of the sunxi stuff, and in the net-uclass layer!

Erm, this is another series :)

Regards,

Hans

^ permalink raw reply

* Re: [PATCH 1/1] usb: chipidea: move the lock initialization to core file
From: Greg KH @ 2016-11-14 14:13 UTC (permalink / raw)
  To: Peter Chen; +Cc: linux-usb, #v4 . 1+
In-Reply-To: <1477878940-24719-1-git-send-email-peter.chen@nxp.com>

On Mon, Oct 31, 2016 at 09:55:40AM +0800, Peter Chen wrote:
> This can fix below dump when the lock is accessed at host
> mode due to it is not initialized.
> 
> root@imx6qdlsolo:~# cat /sys/kernel/debug/ci_hdrc.1/port_test
> [  929.904518] INFO: trying to register non-static key.
> [  929.909536] the code is fine but needs lockdep annotation.
> [  929.915043] turning off the locking correctness validator.
> [  929.920567] CPU: 0 PID: 687 Comm: cat Not tainted 4.9.0-rc1-00064-g903de10 #1155
> [  929.927987] Hardware name: Freescale i.MX6 Ultralite (Device Tree)
> [  929.934189] Backtrace:
> [  929.936719] [<c010c460>] (dump_backtrace) from [<c010c658>] (show_stack+0x18/0x1c)
> [  929.944312]  r7:de47a000[  929.946690]  r6:60000193
>  r5:00000000[  929.950322]  r4:c0e2346c
>  [  929.952883]
>  [  929.954413] [<c010c640>] (show_stack) from [<c03f5aa4>] (dump_stack+0xb4/0xe8)
> [  929.961675] [<c03f59f0>] (dump_stack) from [<c016d73c>] (register_lock_class+0x4fc/0x56c)
> [  929.969871]  r10:c0e23564[  929.972335]  r9:de47be70
>  r8:c163f444[  929.975967]  r7:ddcd4024
>   r6:00000000[  929.979598]  r5:00000000
>   [  929.982158]  r4:00000000[  929.984534]  r3:00000001
>   [  929.987092]
>   [  929.988622] [<c016d240>] (register_lock_class) from [<c0171340>] (__lock_acquire+0x80/0x10f0)
> [  929.997166]  r10:c0e23564[  929.999632]  r9:de47be70
>  r8:ddcd4024[  930.003265]  r7:c163f444
>   r6:ddec3c00[  930.006898]  r5:60000193
>   [  930.009458]  r4:00000000[  930.011832]
>   [  930.013368] [<c01712c0>] (__lock_acquire) from [<c017276c>] (lock_acquire+0x74/0x94)
> [  930.021129]  r10:00000001[  930.023594]  r9:de47be70
>  r8:de47bf80[  930.027225]  r7:00000001
>   r6:00000001[  930.030857]  r5:60000193
>   [  930.033417]  r4:00000000[  930.035791]
>   [  930.037329] [<c01726f8>] (lock_acquire) from [<c096c324>] (_raw_spin_lock_irqsave+0x40/0x54)
> [  930.045787]  r7:dddb3c80[  930.048163]  r6:c062a468
>  r5:20000113[  930.051795]  r4:ddcd4014
>  [  930.054354]
>  [  930.055885] [<c096c2e4>] (_raw_spin_lock_irqsave) from [<c062a468>] (ci_port_test_show+0x2c/0x70)
> [  930.064776]  r6:ddd930c0[  930.067153]  r5:ddcd4010
>  r4:ddcd4014[  930.070783]
>  [  930.072329] [<c062a43c>] (ci_port_test_show) from [<c0249084>] (seq_read+0x1ac/0x4f8)
> [  930.080179]  r9:de47be70[  930.082555]  r8:de47bf80
>  r7:dddb3c80[  930.086188]  r6:00000001
>   r5:00000000[  930.089820]  r4:ddd930c0
>   [  930.092404] [<c0248ed8>] (seq_read) from [<c039ebdc>] (full_proxy_read+0x54/0x6c)
> [  930.099907]  r10:00000000[  930.102372]  r9:c0a6ad70
>  r8:de47bf80[  930.106004]  r7:00020000
>   r6:b6dd1000[  930.109636]  r5:dddb3c80
>   [  930.112197]  r4:c0248ed8[  930.114572]
>   [  930.116110] [<c039eb88>] (full_proxy_read) from [<c021efd8>] (__vfs_read+0x34/0x118)
> [  930.123872]  r9:de47a000[  930.126250]  r8:c0107fc4
>  r7:00020000[  930.129883]  r6:de47bf80
>   r5:c039eb88[  930.133515]  r4:dddb3c80
>   [  930.136091] [<c021efa4>] (__vfs_read) from [<c021ff10>] (vfs_read+0x8c/0x11c)
> [  930.143247]  r9:de47a000[  930.145625]  r8:c0107fc4
>  r7:de47bf80[  930.149259]  r6:b6dd1000
>   r5:dddb3c80[  930.152891]  r4:00020000
>   [  930.155469] [<c021fe84>] (vfs_read) from [<c0220d8c>] (SyS_read+0x4c/0xa8)
> [  930.162363]  r8:c0107fc4[  930.164741]  r7:00020000
>  r6:b6dd1000[  930.168373]  r5:dddb3c80
>   r4:dddb3c80[  930.172001]
>   [  930.173540] [<c0220d40>] (SyS_read) from [<c0107e20>] (ret_fast_syscall+0x0/0x1c)
> [  930.181041]  r7:00000003[  930.183419]  r6:b6dd1000
>  r5:00020000[  930.187051]  r4:00020000
>  [  930.189611]
>  mode = 0

Clean up the dump please :(

^ permalink raw reply

* Re: gnome-shell is frozen upon wakeup from DPMS (bisected)
From: Max Staudt @ 2016-11-14 14:12 UTC (permalink / raw)
  To: Michel Dänzer
  Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
In-Reply-To: <0c0ae77d-fb23-0cdb-161b-c57f41327ad1-otUistvHUpPR7s880joybQ@public.gmane.org>

On 11/14/2016 02:46 AM, Michel Dänzer wrote:
> On 11/11/16 02:21 AM, Max Staudt wrote:
>> Hi,
>>
>> I have bisected a commit in v4.6 that fixes a freeze of the screen on
>> DPMS sleep:
>>
>> 777e3cbc791f131806d9bf24b3325637c7fc228d drm/radeon: Switch to drm_vblank_on/off
>>
>>
>> When running 'xset dpms force off' in a GNOME session (I tested this on
>> openSUSE Leap 42.2), sometimes the screen will freeze, sometimes it will
>> not. It may take several tries.
>>
>> When it does freeze, the mouse can still be used, but clicking anything
>> will (seem to?) have no effect. Typing in an open terminal still works,
>> albeit the screen will still be frozen. Run "xterm" and the screen will
>> unfreeze. Running "xlogo" does not unfreeze it.
> 
> Does this still happen with current xf86-video-ati Git master?


Hmm, good idea!


I bisected this, and the problem goes away in this xf86-video-ati commit:

1181b9c582f10b6c523e4b2988e2ce87ecf3d367 Enable DRI3 by default when building for Xorg >= 1.18.3


I tested this on Kabini.


So... what about DRI2?



Max

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply

* [bug report] bnx2x: Separate VF and PF logic
From: Dan Carpenter @ 2016-11-14 14:12 UTC (permalink / raw)
  To: kernel-janitors

Hello Ariel Elior,

The patch ad5afc89365e: "bnx2x: Separate VF and PF logic" from Jan 1,
2013, leads to the following static checker warning:

	drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c:2944 bnx2x_nic_load()
	warn: 'rc' can be either negative or positive

drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
  2797  
  2798          /* setup rss */
  2799          rc = bnx2x_init_rss(bp);
  2800          if (rc) {
  2801                  BNX2X_ERR("PF RSS init failed\n");
  2802                  LOAD_ERROR_EXIT(bp, load_error3);
  2803          }
  2804  

The warning heuristic here is to complain if negative and positive
values are treated the same.  This code is very confusing.  For example,
the comments for bnx2x_queue_state_change() says it returns a positive
EBUSY but it does not.

But my main concern is bnx2x_setup_rss(), it either returns a negative
value or it returns 1.  My understanding is that both of those returns
are treated as an error on line 2800 in the code above so it can't
possibly work.

regards,
dan carpenter

^ permalink raw reply

* [U-Boot] [PATCH 3/7] sunxi: Enable UBI and NAND support
From: Maxime Ripard @ 2016-11-14 14:12 UTC (permalink / raw)
  To: u-boot
In-Reply-To: <49cb76e1-cd3c-c912-8acf-74e98377f199@redhat.com>

On Mon, Nov 14, 2016 at 12:18:06PM +0100, Hans de Goede wrote:
> >  #ifdef CONFIG_SPL_SPI_SUNXI
> > @@ -143,7 +157,14 @@
> >  #define CONFIG_GENERIC_MMC
> >  #define CONFIG_MMC_SUNXI
> >  #define CONFIG_MMC_SUNXI_SLOT		0
> > -#define CONFIG_ENV_IS_IN_MMC
> > +#endif
> > +
> > +#if defined(CONFIG_ENV_IS_IN_NAND)
> > +#define CONFIG_ENV_OFFSET			0xc00000
> > +#define CONFIG_ENV_SIZE				0x400000
> > +#elif defined(CONFIG_ENV_IS_IN_MMC)
> > +#define CONFIG_ENV_OFFSET			(544 << 10) /* (8 + 24 + 512) KiB */
> > +#define CONFIG_ENV_SIZE				(128 << 10) /* 128 KiB */
> >  #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
> >  #endif

Oh, and this part is broken. It relies on the fact that all board
define ENV_IS_IN_MMC (which they should), while obviously they
don't. I'm not exactly sure about what the proper fix would be.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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