* Re: [PATCH v2 0/2] Add GPIO level-sensitive interrupt support
From: Alexandre Torgue @ 2020-02-20 13:09 UTC (permalink / raw)
To: Marek Vasut, Thomas Gleixner, Jason Cooper, Marc Zyngier,
Linus Walleij
Cc: linux-arm-kernel, linux-kernel, linux-gpio
In-Reply-To: <38e7cf57-2f89-7615-0841-316355a9102f@denx.de>
Hi Marek
On 2/19/20 6:24 PM, Marek Vasut wrote:
> On 2/19/20 10:20 AM, Alexandre Torgue wrote:
> Hi,
> [...]
>>>>>> This series adds the possibility to handle gpio interrupts on level.
>>>>>>
>>>>>> GPIO hardware block is directly linked to EXTI block but EXTI handles
>>>>>> external interrupts only on edge. To be able to handle GPIO
>>>>>> interrupt on
>>>>>> level a "hack" is done in gpio irq chip: parent interrupt (exti irq
>>>>>> chip)
>>>>>> is retriggered following interrupt type and gpio line value.
>>>>>>
>>>>>> In exti irq chip, retrigger ops function is added.
>>>>>
>>>>> btw. this might be unrelated, but is it possible to have e.g. gpioC2
>>>>> set
>>>>> as trigger-level-low and gpioD2 set as trigger-edge-falling ? It seems
>>>>> 8eb2dfee9fb1 ("pinctrl: stm32: add lock mechanism for irqmux
>>>>> selection")
>>>>> prevents that.
>>>>>
>>>>
>>>> No it's not possible. Each gpio line doesn't have a dedicated Exti line
>>>> Each Exti line is muxing between gpio banks.
>>>
>>> OK, that confirms my assumption.
>>>
>>>> Mapping is done as following:
>>>>
>>>> EXTI0 = A0 or B0 or C0 .... or Z0 : selected by Mux
>>>> EXTI1 = A1 or B1 or C1 ....or Z1 : selected by Mux
>>>> EXTI2 = A2 or B2 or C2 ....or Z2 : selected by Mux
>>>> ...
>>>
>>> Is it at least possible to have IRQs of the same type on the same exti
>>> line? E.g. gpioA2 of trigger-edge-falling and gpioB2
>>> trigger-edge-falling ?
>>>
>>
>> Sorry I don't catch your point. If you already succeed to get gpioA2,
>> then you will failed to get gpioB2 but looking at function call stack we
>> could get an other issue.
>
> Considering the EXTI line limitations, I'd like to know what kind of IRQ
> input configuration is allowed/valid and what kind of configuration is
> not valid.
As a mux is used to select which GPIO[A..Z]_X has to be mapped on exti_X
line, only one GPIO can be used on the EXTI line.
For example, on EXTI2 you could map either gpioa2 or gpiob2 or
....gpioz2 but not gpioa2 and gpiob2 in the same time.
>
>> Lets take example where you succeed to get gpioa2 as interrupt (using
>> interrupt bindings) and now you try to do the same for gpiob2, you will
>> have (roughly):
>>
>> stm32_gpio_irq_request_resources (for gpiob2) --> succeed
>>
>> stm32_gpio_set_type
>> |
>> |--> stm32_exti_set_type type -> change exti line 2 trigger registers
>> with gpiob2 binding.
>>
>> stm32_gpio_domain_activate --> failed as exti line2 is already used
>> by gpioa2.
>>
>> So as stm32_gpio_set_type is called before checking than exti line is
>> available, type could be changed and behavior of gpioa2 interrupt broken.
>>
>> Solution would be to move the exti line mux check from
>> stm32_gpio_domain_activate to stm32_gpio_irq_request_resources callback.
>
> So the hardware does support using both gpioA2 and gpioB2 as an
> interrupt source, for different drivers, if they are of the same
> interrupt type. Except the current implementation does not permit that.
>
No hardware doesn't allow it for reason explain above.
> If the interrupt types are different, that is not supported by the hardware.
>
> Correct ?
>
^ permalink raw reply
* Re: [PATCH v5 01/10] capabilities: introduce CAP_PERFMON to kernel and user space
From: Alexey Budankov @ 2020-02-20 13:05 UTC (permalink / raw)
To: Thomas Gleixner, Stephen Smalley, Serge Hallyn, James Morris
Cc: Mark Rutland, Song Liu, Peter Zijlstra,
joonas.lahtinen@linux.intel.com, Will Deacon, Alexei Starovoitov,
Lionel Landwerlin, Paul Mackerras, Jiri Olsa, Alexei Starovoitov,
Andi Kleen, Igor Lubashev, Alexander Shishkin, Ingo Molnar,
oprofile-list, linux-arm-kernel, Robert Richter,
selinux@vger.kernel.org, intel-gfx@lists.freedesktop.org,
jani.nikula@linux.intel.com, Arnaldo Carvalho de Melo,
rodrigo.vivi@intel.com, Namhyung Kim, Stephane Eranian,
linux-parisc@vger.kernel.org, linux-kernel, Andy Lutomirski,
linux-perf-users@vger.kernel.org,
linux-security-module@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <7d6f4210-423f-e454-3910-9f8e17dff1aa@linux.intel.com>
On 07.02.2020 16:39, Alexey Budankov wrote:
>
> On 07.02.2020 14:38, Thomas Gleixner wrote:
>> Alexey Budankov <alexey.budankov@linux.intel.com> writes:
>>> On 22.01.2020 17:25, Alexey Budankov wrote:
>>>> On 22.01.2020 17:07, Stephen Smalley wrote:
>>>>>> It keeps the implementation simple and readable. The implementation is more
>>>>>> performant in the sense of calling the API - one capable() call for CAP_PERFMON
>>>>>> privileged process.
>>>>>>
>>>>>> Yes, it bloats audit log for CAP_SYS_ADMIN privileged and unprivileged processes,
>>>>>> but this bloating also advertises and leverages using more secure CAP_PERFMON
>>>>>> based approach to use perf_event_open system call.
>>>>>
>>>>> I can live with that. We just need to document that when you see
>>>>> both a CAP_PERFMON and a CAP_SYS_ADMIN audit message for a process,
>>>>> try only allowing CAP_PERFMON first and see if that resolves the
>>>>> issue. We have a similar issue with CAP_DAC_READ_SEARCH versus
>>>>> CAP_DAC_OVERRIDE.
>>>>
>>>> perf security [1] document can be updated, at least, to align and document
>>>> this audit logging specifics.
>>>
>>> And I plan to update the document right after this patch set is accepted.
>>> Feel free to let me know of the places in the kernel docs that also
>>> require update w.r.t CAP_PERFMON extension.
>>
>> The documentation update wants be part of the patch set and not planned
>> to be done _after_ the patch set is merged.
>
> Well, accepted. It is going to make patches #11 and beyond.
Patches #11 and #12 of v7 [1] contain information on CAP_PERFMON intention and usage.
Patch for man-pages [2] extends perf_event_open.2 documentation.
Thanks,
Alexey
---
[1] https://lore.kernel.org/lkml/c8de937a-0b3a-7147-f5ef-69f467e87a13@linux.intel.com/
[2] https://lore.kernel.org/lkml/18d1083d-efe5-f5f8-c531-d142c0e5c1a8@linux.intel.com/
^ permalink raw reply
* [igt-dev] [PATCH i-g-t v2 2/2] tests/i915_pm_dc: psr required only for dc*-psr tests
From: Anshuman Gupta @ 2020-02-20 13:00 UTC (permalink / raw)
To: igt-dev
In-Reply-To: <20200220130041.24141-1-anshuman.gupta@intel.com>
DPMS igt tests were skipping for non-psr panels due to
psr_sink_support sink check added to igt_fixture() at
commit <6cbe6af372a01be63121056679d540436ffd0b64>.
DPMS dc state igt test don't require psr_sink_support, as it
validates DC states with all display being DPMS off.
Removing the psr sink check from igt_fixture and adding
it only for dc*- psr tests.
v2:
- Adding psr sink check to dc3co and moving ahead it
in dc5/6 psr tests. [Jose]
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
tests/i915/i915_pm_dc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tests/i915/i915_pm_dc.c b/tests/i915/i915_pm_dc.c
index fc6faa16..dcaf82f8 100644
--- a/tests/i915/i915_pm_dc.c
+++ b/tests/i915/i915_pm_dc.c
@@ -398,7 +398,6 @@ int main(int argc, char *argv[])
igt_require(igt_setup_runtime_pm(data.drm_fd));
igt_require(igt_pm_dmc_loaded(data.debugfs_fd));
igt_display_require(&data.display, data.drm_fd);
- igt_require(psr_sink_support(data.debugfs_fd, PSR_MODE_1));
/* Make sure our Kernel supports MSR and the module is loaded */
igt_require(igt_kmod_load("msr", NULL) == 0);
@@ -410,12 +409,14 @@ int main(int argc, char *argv[])
igt_describe("In this test we make sure that system enters DC3CO "
"when PSR2 is active and system is in SLEEP state");
igt_subtest("dc3co-vpb-simulation") {
+ igt_require(psr_sink_support(data.debugfs_fd, PSR_MODE_2));
test_dc3co_vpb_simulation(&data);
}
igt_describe("This test validates display engine entry to DC5 state "
"while PSR is active");
igt_subtest("dc5-psr") {
+ igt_require(psr_sink_support(data.debugfs_fd, PSR_MODE_1));
data.op_psr_mode = PSR_MODE_1;
psr_enable(data.debugfs_fd, data.op_psr_mode);
test_dc_state_psr(&data, CHECK_DC5);
@@ -424,6 +425,7 @@ int main(int argc, char *argv[])
igt_describe("This test validates display engine entry to DC6 state "
"while PSR is active");
igt_subtest("dc6-psr") {
+ igt_require(psr_sink_support(data.debugfs_fd, PSR_MODE_1));
data.op_psr_mode = PSR_MODE_1;
psr_enable(data.debugfs_fd, data.op_psr_mode);
igt_require_f(igt_pm_pc8_plus_residencies_enabled(data.msr_fd),
--
2.24.0
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related
* [igt-dev] [PATCH i-g-t v2 1/2] tests/i915_pm_dc: Dump power_domain_info on DC test failures
From: Anshuman Gupta @ 2020-02-20 13:00 UTC (permalink / raw)
To: igt-dev
In-Reply-To: <20200220130041.24141-1-anshuman.gupta@intel.com>
Dump i915_power_domain_info debugfs attribute on DC state
test failures, it will help to identify culprit, which
causes non zero refcount for "DC off" power well.
v2:
- Fix the mem leak. [Jose]
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
tests/i915/i915_pm_dc.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/tests/i915/i915_pm_dc.c b/tests/i915/i915_pm_dc.c
index afcc10bc..fc6faa16 100644
--- a/tests/i915/i915_pm_dc.c
+++ b/tests/i915/i915_pm_dc.c
@@ -39,6 +39,10 @@
#define CHECK_DC6 (1 << 1)
#define CHECK_DC3CO (1 << 2)
+#define PWR_DOMAIN_INFO "i915_power_domain_info"
+
+char *pwr_dmn_info;
+
typedef struct {
double r, g, b;
} color_t;
@@ -210,7 +214,8 @@ static void check_dc_counter(int debugfs_fd, int dc_flag, uint32_t prev_dc_count
snprintf(tmp, sizeof(tmp), "%s", dc_flag & CHECK_DC3CO ? "DC3CO" :
(dc_flag & CHECK_DC5 ? "DC5" : "DC6"));
igt_assert_f(dc_state_wait_entry(debugfs_fd, dc_flag, prev_dc_count),
- "%s state is not achieved\n", tmp);
+ "%s state is not achieved\n%s:\n%s\n", tmp, PWR_DOMAIN_INFO,
+ pwr_dmn_info = igt_sysfs_get(debugfs_fd, PWR_DOMAIN_INFO));
}
static void setup_videoplayback(data_t *data)
@@ -441,6 +446,8 @@ int main(int argc, char *argv[])
}
igt_fixture {
+ if (pwr_dmn_info)
+ free(pwr_dmn_info);
close(data.debugfs_fd);
close(data.msr_fd);
display_fini(&data);
--
2.24.0
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related
* [igt-dev] [PATCH i-g-t v2 0/2] DC states IGT misc
From: Anshuman Gupta @ 2020-02-20 13:00 UTC (permalink / raw)
To: igt-dev
Anshuman Gupta (2):
tests/i915_pm_dc: Dump power_domain_info on DC test failures
tests/i915_pm_dc: psr required only for dc*-psr tests
tests/i915/i915_pm_dc.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
--
2.24.0
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply
* [PATCH v3 03/20] exec: Let qemu_ram_*() functions take a const pointer argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Anthony Perard,
xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/exec/cpu-common.h | 6 +++---
include/sysemu/xen-mapcache.h | 4 ++--
exec.c | 8 ++++----
hw/i386/xen/xen-mapcache.c | 2 +-
4 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 81753bbb34..05ac1a5d69 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -48,11 +48,11 @@ typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr);
void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
/* This should not be used by devices. */
-ram_addr_t qemu_ram_addr_from_host(void *ptr);
+ram_addr_t qemu_ram_addr_from_host(const void *ptr);
RAMBlock *qemu_ram_block_by_name(const char *name);
-RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
+RAMBlock *qemu_ram_block_from_host(const void *ptr, bool round_offset,
ram_addr_t *offset);
-ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host);
+ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, const void *host);
void qemu_ram_set_idstr(RAMBlock *block, const char *name, DeviceState *dev);
void qemu_ram_unset_idstr(RAMBlock *block);
const char *qemu_ram_get_idstr(RAMBlock *rb);
diff --git a/include/sysemu/xen-mapcache.h b/include/sysemu/xen-mapcache.h
index c8e7c2f6cf..81e9aa2fa6 100644
--- a/include/sysemu/xen-mapcache.h
+++ b/include/sysemu/xen-mapcache.h
@@ -19,7 +19,7 @@ void xen_map_cache_init(phys_offset_to_gaddr_t f,
void *opaque);
uint8_t *xen_map_cache(hwaddr phys_addr, hwaddr size,
uint8_t lock, bool dma);
-ram_addr_t xen_ram_addr_from_mapcache(void *ptr);
+ram_addr_t xen_ram_addr_from_mapcache(const void *ptr);
void xen_invalidate_map_cache_entry(uint8_t *buffer);
void xen_invalidate_map_cache(void);
uint8_t *xen_replace_cache_entry(hwaddr old_phys_addr,
@@ -40,7 +40,7 @@ static inline uint8_t *xen_map_cache(hwaddr phys_addr,
abort();
}
-static inline ram_addr_t xen_ram_addr_from_mapcache(void *ptr)
+static inline ram_addr_t xen_ram_addr_from_mapcache(const void *ptr)
{
abort();
}
diff --git a/exec.c b/exec.c
index 8e9cc3b47c..02b4e6ea41 100644
--- a/exec.c
+++ b/exec.c
@@ -2614,7 +2614,7 @@ static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr,
}
/* Return the offset of a hostpointer within a ramblock */
-ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host)
+ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, const void *host)
{
ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host;
assert((uintptr_t)host >= (uintptr_t)rb->host);
@@ -2640,11 +2640,11 @@ ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host)
* pointer, such as a reference to the region that includes the incoming
* ram_addr_t.
*/
-RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
+RAMBlock *qemu_ram_block_from_host(const void *ptr, bool round_offset,
ram_addr_t *offset)
{
RAMBlock *block;
- uint8_t *host = ptr;
+ const uint8_t *host = ptr;
if (xen_enabled()) {
ram_addr_t ram_addr;
@@ -2705,7 +2705,7 @@ RAMBlock *qemu_ram_block_by_name(const char *name)
/* Some of the softmmu routines need to translate from a host pointer
(typically a TLB entry) back to a ram offset. */
-ram_addr_t qemu_ram_addr_from_host(void *ptr)
+ram_addr_t qemu_ram_addr_from_host(const void *ptr)
{
RAMBlock *block;
ram_addr_t offset;
diff --git a/hw/i386/xen/xen-mapcache.c b/hw/i386/xen/xen-mapcache.c
index 5b120ed44b..432ad3354d 100644
--- a/hw/i386/xen/xen-mapcache.c
+++ b/hw/i386/xen/xen-mapcache.c
@@ -363,7 +363,7 @@ uint8_t *xen_map_cache(hwaddr phys_addr, hwaddr size,
return p;
}
-ram_addr_t xen_ram_addr_from_mapcache(void *ptr)
+ram_addr_t xen_ram_addr_from_mapcache(const void *ptr)
{
MapCacheEntry *entry = NULL;
MapCacheRev *reventry;
--
2.21.1
^ permalink raw reply related
* Re: Re: [RFC PATCH 0/5] Removing support for 32bit KVM/arm host
From: Bartlomiej Zolnierkiewicz @ 2020-02-20 13:08 UTC (permalink / raw)
To: Marc Zyngier; +Cc: Daniel Golle, linux-arm-kernel, Marek Szyprowski
In-Reply-To: <20200219083113.52c1a8fb@why>
Hi Marc,
On 2/19/20 9:31 AM, Marc Zyngier wrote:
> On Tue, 18 Feb 2020 22:37:12 +0100
> Daniel Golle <daniel@makrotopia.org> wrote:
>
> Daniel,
>
> Please keep people on cc, it helps with the discussion.
>
>>> Message-ID: <20200210141324.21090-1-maz@kernel.org>
>>>
>>> KVM/arm was merged just over 7 years ago, and has lived a very quiet
>>> life so far. It mostly works if you're prepared to deal with its
>>> limitations, it has been a good prototype for the arm64 version,
>>> but it suffers a few problems:
>>>
>>> - It is incomplete (no debug support, no PMU)
>>> - It hasn't followed any of the architectural evolutions
>>> - It has zero users (I don't count myself here)
>>
>> Not true. At least I'm using KVM on CortexA7 (sun7i aka. Allwinner A20)
>> and it has been quite useful until now (running low memory footprint
>> OpenWrt-based guests on yocto/OpenEmbedded host)
>
> OK, so we have a user!
We have also started using it recently (as described by Marek in
https://lore.kernel.org/linux-arm-kernel/621a0a92-6432-6c3e-cb69-0b601764fa69@samsung.com/#t
).
>>> - It is more and more getting in the way of new arm64 developments
>>
>> Can you elaborate more on how it is getting in the way? Just in terms
>> of effort to maintain the necessary abstractions or does something
>> really block ARM64 KVM support?
>
> Useless abstractions are indeed one of the problems. Essentially,
> KVM/arm has become a pile of empty stubs that are added to make the
> thing compile. This doesn't bode well for the future.
>
> The other aspect is that new features appearing on arm64 (nested virt,
> enclaves, and potentially some more) are tearing the code-base apart,
> and doing so while keeping 32bit alive and kicking would be a
> challenge. I'm not saying it is impossible, just that it is hard, and
> for very little gain, specially given that *nobody* contributes to the
> port.
I have very basic knowledge of virt/kvm/arm/ codebase (so my question
may be quite stupid) but wouldn't it be possible to split the codebase
into legacy virt/kvm/arm32/ and virt/kvm/arm64/ parts (this would cause
some code duplication but at the same time would stop 32bit port from
blocking new developments for 64bit one)?
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
>>> So here it is: unless someone screams and shows that they rely on
>>> KVM/arm to be maintained upsteam, I'll remove 32bit host support
>>> form the tree. One of the reasons that makes me confident nobody is
>>> using it is that I never receive *any* bug report. Yes, it is perfect.
>>> But if you depend on KVM/arm being available in mainline, please shout.
>>
>> I cetainly don't depend on it, meaning I'd have to replace hardware
>> worth less than $100 in the near future, that's not too bad.
>> And yes, it has just been working perfectly ;)
>
> I'm really glad it works well. Note that it isn't like we are taking it
> away from you. 5.6 will still have it, and I will still maintain it as
> part of the stable tree. It is just that I've come to the sad
> conclusion that as a community, we need to move on.
>
> M.
>
> PS: and if you find a decent, reliable machine to replace your A20,
> please let me know. All the arm64 SBCs I've seen are utter crap
> compared to my Cubietruck...
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v3 02/20] hw: Remove unnecessary cast when calling dma_memory_read()
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Anthony Perard,
xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
Since its introduction in commit d86a77f8abb, dma_memory_read()
always accepted void pointer argument. Remove the unnecessary
casts.
This commit was produced with the included Coccinelle script
scripts/coccinelle/exec_rw_const.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
scripts/coccinelle/exec_rw_const.cocci | 15 +++++++++++++++
hw/arm/smmu-common.c | 3 +--
hw/arm/smmuv3.c | 10 ++++------
hw/sd/sdhci.c | 15 +++++----------
4 files changed, 25 insertions(+), 18 deletions(-)
create mode 100644 scripts/coccinelle/exec_rw_const.cocci
diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci
new file mode 100644
index 0000000000..a0054f009d
--- /dev/null
+++ b/scripts/coccinelle/exec_rw_const.cocci
@@ -0,0 +1,15 @@
+// Usage:
+// spatch --sp-file scripts/coccinelle/exec_rw_const.cocci --dir . --in-place
+
+// Remove useless cast
+@@
+expression E1, E2, E3, E4;
+type T;
+@@
+(
+- dma_memory_read(E1, E2, (T *)E3, E4)
++ dma_memory_read(E1, E2, E3, E4)
+|
+- dma_memory_write(E1, E2, (T *)E3, E4)
++ dma_memory_write(E1, E2, E3, E4)
+)
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index 23eb117041..0f2573f004 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -74,8 +74,7 @@ static int get_pte(dma_addr_t baseaddr, uint32_t index, uint64_t *pte,
dma_addr_t addr = baseaddr + index * sizeof(*pte);
/* TODO: guarantee 64-bit single-copy atomicity */
- ret = dma_memory_read(&address_space_memory, addr,
- (uint8_t *)pte, sizeof(*pte));
+ ret = dma_memory_read(&address_space_memory, addr, pte, sizeof(*pte));
if (ret != MEMTX_OK) {
info->type = SMMU_PTW_ERR_WALK_EABT;
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 8b5f157dc7..57a79df55b 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -279,8 +279,7 @@ static int smmu_get_ste(SMMUv3State *s, dma_addr_t addr, STE *buf,
trace_smmuv3_get_ste(addr);
/* TODO: guarantee 64-bit single-copy atomicity */
- ret = dma_memory_read(&address_space_memory, addr,
- (void *)buf, sizeof(*buf));
+ ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf));
if (ret != MEMTX_OK) {
qemu_log_mask(LOG_GUEST_ERROR,
"Cannot fetch pte at address=0x%"PRIx64"\n", addr);
@@ -301,8 +300,7 @@ static int smmu_get_cd(SMMUv3State *s, STE *ste, uint32_t ssid,
trace_smmuv3_get_cd(addr);
/* TODO: guarantee 64-bit single-copy atomicity */
- ret = dma_memory_read(&address_space_memory, addr,
- (void *)buf, sizeof(*buf));
+ ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf));
if (ret != MEMTX_OK) {
qemu_log_mask(LOG_GUEST_ERROR,
"Cannot fetch pte at address=0x%"PRIx64"\n", addr);
@@ -406,8 +404,8 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste,
l2_ste_offset = sid & ((1 << s->sid_split) - 1);
l1ptr = (dma_addr_t)(strtab_base + l1_ste_offset * sizeof(l1std));
/* TODO: guarantee 64-bit single-copy atomicity */
- ret = dma_memory_read(&address_space_memory, l1ptr,
- (uint8_t *)&l1std, sizeof(l1std));
+ ret = dma_memory_read(&address_space_memory, l1ptr, &l1std,
+ sizeof(l1std));
if (ret != MEMTX_OK) {
qemu_log_mask(LOG_GUEST_ERROR,
"Could not read L1PTR at 0X%"PRIx64"\n", l1ptr);
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 69dc3e6b90..d5abdaad41 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -701,8 +701,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
hwaddr entry_addr = (hwaddr)s->admasysaddr;
switch (SDHC_DMA_TYPE(s->hostctl1)) {
case SDHC_CTRL_ADMA2_32:
- dma_memory_read(s->dma_as, entry_addr, (uint8_t *)&adma2,
- sizeof(adma2));
+ dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2));
adma2 = le64_to_cpu(adma2);
/* The spec does not specify endianness of descriptor table.
* We currently assume that it is LE.
@@ -713,8 +712,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
dscr->incr = 8;
break;
case SDHC_CTRL_ADMA1_32:
- dma_memory_read(s->dma_as, entry_addr, (uint8_t *)&adma1,
- sizeof(adma1));
+ dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1));
adma1 = le32_to_cpu(adma1);
dscr->addr = (hwaddr)(adma1 & 0xFFFFF000);
dscr->attr = (uint8_t)extract32(adma1, 0, 7);
@@ -726,13 +724,10 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
}
break;
case SDHC_CTRL_ADMA2_64:
- dma_memory_read(s->dma_as, entry_addr,
- (uint8_t *)(&dscr->attr), 1);
- dma_memory_read(s->dma_as, entry_addr + 2,
- (uint8_t *)(&dscr->length), 2);
+ dma_memory_read(s->dma_as, entry_addr, (&dscr->attr), 1);
+ dma_memory_read(s->dma_as, entry_addr + 2, (&dscr->length), 2);
dscr->length = le16_to_cpu(dscr->length);
- dma_memory_read(s->dma_as, entry_addr + 4,
- (uint8_t *)(&dscr->addr), 8);
+ dma_memory_read(s->dma_as, entry_addr + 4, (&dscr->addr), 8);
dscr->addr = le64_to_cpu(dscr->addr);
dscr->attr &= (uint8_t) ~0xC0;
dscr->incr = 12;
--
2.21.1
^ permalink raw reply related
* [PATCH v3 00/20] global exec/memory/dma APIs cleanup
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Anthony Perard,
xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
This series is inspired from Peter Maydel cleanup patch:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg680625.html
- Convert 'is_write' argument to boolean
- Use void pointer for blob buffer
- Remove unnecessary casts (Stefan Weil)
- Replace [API]_rw() by [API]_read/write() when is_write is constant
Supersedes: <20200218112457.22712-1-peter.maydell@linaro.org>
Peter Maydell (1):
Avoid address_space_rw() with a constant is_write argument
Philippe Mathieu-Daudé (19):
scripts/git.orderfile: Display Cocci scripts before code modifications
hw: Remove unnecessary cast when calling dma_memory_read()
exec: Let qemu_ram_*() functions take a const pointer argument
exec: Rename ram_ptr variable
exec: Let flatview API take void pointer arguments
exec: Let the address_space API use void pointer arguments
hw/net: Avoid casting non-const pointer, use address_space_write()
Remove unnecessary cast when using the address_space API
exec: Let the cpu_[physical]_memory API use void pointer arguments
Remove unnecessary cast when using the cpu_[physical]_memory API
hw/ide/internal: Remove unused DMARestartFunc typedef
hw/ide: Let the DMAIntFunc prototype use a boolean 'is_write' argument
hw/virtio: Let virtqueue_map_iovec() use a boolean 'is_write' argument
hw/virtio: Let vhost_memory_map() use a boolean 'is_write' argument
exec: Let address_space_unmap() use a boolean 'is_write' argument
Let address_space_rw() calls pass a boolean 'is_write' argument
exec: Let cpu_[physical]_memory API use a boolean 'is_write' argument
Let cpu_[physical]_memory() calls pass a boolean 'is_write' argument
Avoid cpu_physical_memory_rw() with a constant is_write argument
scripts/coccinelle/exec_rw_const.cocci | 103 +++++++++++++++++++++++++
include/exec/cpu-all.h | 2 +-
include/exec/cpu-common.h | 18 ++---
include/exec/memory.h | 16 ++--
include/hw/ide/internal.h | 3 +-
include/sysemu/xen-mapcache.h | 4 +-
target/i386/hvf/vmx.h | 7 +-
accel/kvm/kvm-all.c | 6 +-
dma-helpers.c | 4 +-
exec.c | 75 +++++++++---------
hw/arm/boot.c | 6 +-
hw/arm/smmu-common.c | 3 +-
hw/arm/smmuv3.c | 10 +--
hw/display/exynos4210_fimd.c | 3 +-
hw/display/milkymist-tmu2.c | 8 +-
hw/display/omap_dss.c | 2 +-
hw/display/omap_lcdc.c | 10 +--
hw/display/ramfb.c | 2 +-
hw/dma/etraxfs_dma.c | 25 +++---
hw/dma/rc4030.c | 10 +--
hw/dma/xlnx-zdma.c | 11 +--
hw/i386/xen/xen-mapcache.c | 2 +-
hw/ide/ahci.c | 2 +-
hw/ide/core.c | 2 +-
hw/ide/macio.c | 2 +-
hw/ide/pci.c | 2 +-
hw/misc/pc-testdev.c | 2 +-
hw/net/cadence_gem.c | 21 +++--
hw/net/dp8393x.c | 70 +++++++++--------
hw/net/i82596.c | 25 +++---
hw/net/lasi_i82596.c | 5 +-
hw/nvram/spapr_nvram.c | 4 +-
hw/ppc/pnv_lpc.c | 8 +-
hw/ppc/ppc440_uc.c | 6 +-
hw/ppc/spapr_hcall.c | 4 +-
hw/s390x/css.c | 12 +--
hw/s390x/ipl.c | 2 +-
hw/s390x/s390-pci-bus.c | 2 +-
hw/s390x/virtio-ccw.c | 2 +-
hw/scsi/vmw_pvscsi.c | 8 +-
hw/sd/sdhci.c | 15 ++--
hw/virtio/vhost.c | 8 +-
hw/virtio/virtio.c | 7 +-
hw/xen/xen_pt_graphics.c | 2 +-
qtest.c | 52 ++++++-------
target/i386/hax-all.c | 6 +-
target/i386/hvf/x86_mmu.c | 12 +--
target/i386/whpx-all.c | 2 +-
target/s390x/excp_helper.c | 2 +-
target/s390x/helper.c | 6 +-
target/s390x/mmu_helper.c | 2 +-
scripts/git.orderfile | 3 +
52 files changed, 360 insertions(+), 266 deletions(-)
create mode 100644 scripts/coccinelle/exec_rw_const.cocci
--
2.21.1
^ permalink raw reply
* [PATCH v3 01/20] scripts/git.orderfile: Display Cocci scripts before code modifications
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Anthony Perard,
xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
When we use a Coccinelle semantic script to do automatic
code modifications, it makes sense to look at the semantic
patch first.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
scripts/git.orderfile | 3 +++
1 file changed, 3 insertions(+)
diff --git a/scripts/git.orderfile b/scripts/git.orderfile
index 1f747b583a..7cf22e0bf5 100644
--- a/scripts/git.orderfile
+++ b/scripts/git.orderfile
@@ -22,6 +22,9 @@ Makefile*
qapi/*.json
qga/*.json
+# semantic patches
+*.cocci
+
# headers
*.h
--
2.21.1
^ permalink raw reply related
* [Xen-devel] [PATCH v3 19/20] Let cpu_[physical]_memory() calls pass a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Marcel Apfelbaum,
Anthony Perard, xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
Use an explicit boolean type.
This commit was produced with the included Coccinelle script
scripts/coccinelle/exec_rw_const.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
scripts/coccinelle/exec_rw_const.cocci | 14 ++++++++++++++
include/exec/cpu-common.h | 4 ++--
hw/display/exynos4210_fimd.c | 3 ++-
hw/display/milkymist-tmu2.c | 8 ++++----
hw/display/omap_dss.c | 2 +-
hw/display/ramfb.c | 2 +-
hw/misc/pc-testdev.c | 2 +-
hw/nvram/spapr_nvram.c | 4 ++--
hw/ppc/ppc440_uc.c | 6 ++++--
hw/ppc/spapr_hcall.c | 4 ++--
hw/s390x/ipl.c | 2 +-
hw/s390x/s390-pci-bus.c | 2 +-
hw/s390x/virtio-ccw.c | 2 +-
hw/xen/xen_pt_graphics.c | 2 +-
target/i386/hax-all.c | 4 ++--
target/s390x/excp_helper.c | 2 +-
target/s390x/helper.c | 6 +++---
17 files changed, 43 insertions(+), 26 deletions(-)
diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci
index ee98ce988e..54b1cab8cd 100644
--- a/scripts/coccinelle/exec_rw_const.cocci
+++ b/scripts/coccinelle/exec_rw_const.cocci
@@ -11,6 +11,20 @@ expression E1, E2, E3, E4, E5;
|
- address_space_rw(E1, E2, E3, E4, E5, 1)
+ address_space_rw(E1, E2, E3, E4, E5, true)
+|
+
+- cpu_physical_memory_rw(E1, E2, E3, 0)
++ cpu_physical_memory_rw(E1, E2, E3, false)
+|
+- cpu_physical_memory_rw(E1, E2, E3, 1)
++ cpu_physical_memory_rw(E1, E2, E3, true)
+|
+
+- cpu_physical_memory_map(E1, E2, 0)
++ cpu_physical_memory_map(E1, E2, false)
+|
+- cpu_physical_memory_map(E1, E2, 1)
++ cpu_physical_memory_map(E1, E2, true)
)
// Use address_space_write instead of casting to non-const
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 6bfe201779..e7fd5781ea 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -74,12 +74,12 @@ void cpu_physical_memory_rw(hwaddr addr, void *buf,
static inline void cpu_physical_memory_read(hwaddr addr,
void *buf, hwaddr len)
{
- cpu_physical_memory_rw(addr, buf, len, 0);
+ cpu_physical_memory_rw(addr, buf, len, false);
}
static inline void cpu_physical_memory_write(hwaddr addr,
const void *buf, hwaddr len)
{
- cpu_physical_memory_rw(addr, (void *)buf, len, 1);
+ cpu_physical_memory_rw(addr, (void *)buf, len, true);
}
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c
index c1071ecd46..ec6776680e 100644
--- a/hw/display/exynos4210_fimd.c
+++ b/hw/display/exynos4210_fimd.c
@@ -1164,7 +1164,8 @@ static void fimd_update_memory_section(Exynos4210fimdState *s, unsigned win)
goto error_return;
}
- w->host_fb_addr = cpu_physical_memory_map(fb_start_addr, &fb_mapped_len, 0);
+ w->host_fb_addr = cpu_physical_memory_map(fb_start_addr, &fb_mapped_len,
+ false);
if (!w->host_fb_addr) {
DPRINT_ERROR("Failed to map window %u framebuffer\n", win);
goto error_return;
diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c
index 199f1227e7..513c0d5bab 100644
--- a/hw/display/milkymist-tmu2.c
+++ b/hw/display/milkymist-tmu2.c
@@ -218,7 +218,7 @@ static void tmu2_start(MilkymistTMU2State *s)
glGenTextures(1, &texture);
glBindTexture(GL_TEXTURE_2D, texture);
fb_len = 2ULL * s->regs[R_TEXHRES] * s->regs[R_TEXVRES];
- fb = cpu_physical_memory_map(s->regs[R_TEXFBUF], &fb_len, 0);
+ fb = cpu_physical_memory_map(s->regs[R_TEXFBUF], &fb_len, false);
if (fb == NULL) {
glDeleteTextures(1, &texture);
glXMakeContextCurrent(s->dpy, None, None, NULL);
@@ -262,7 +262,7 @@ static void tmu2_start(MilkymistTMU2State *s)
/* Read the QEMU dest. framebuffer into the OpenGL framebuffer */
fb_len = 2ULL * s->regs[R_DSTHRES] * s->regs[R_DSTVRES];
- fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, 0);
+ fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, false);
if (fb == NULL) {
glDeleteTextures(1, &texture);
glXMakeContextCurrent(s->dpy, None, None, NULL);
@@ -281,7 +281,7 @@ static void tmu2_start(MilkymistTMU2State *s)
/* Map the texture */
mesh_len = MESH_MAXSIZE*MESH_MAXSIZE*sizeof(struct vertex);
- mesh = cpu_physical_memory_map(s->regs[R_VERTICESADDR], &mesh_len, 0);
+ mesh = cpu_physical_memory_map(s->regs[R_VERTICESADDR], &mesh_len, false);
if (mesh == NULL) {
glDeleteTextures(1, &texture);
glXMakeContextCurrent(s->dpy, None, None, NULL);
@@ -298,7 +298,7 @@ static void tmu2_start(MilkymistTMU2State *s)
/* Write back the OpenGL framebuffer to the QEMU framebuffer */
fb_len = 2ULL * s->regs[R_DSTHRES] * s->regs[R_DSTVRES];
- fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, 1);
+ fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, true);
if (fb == NULL) {
glDeleteTextures(1, &texture);
glXMakeContextCurrent(s->dpy, None, None, NULL);
diff --git a/hw/display/omap_dss.c b/hw/display/omap_dss.c
index 637aae8d39..32dc0d6aa7 100644
--- a/hw/display/omap_dss.c
+++ b/hw/display/omap_dss.c
@@ -632,7 +632,7 @@ static void omap_rfbi_transfer_start(struct omap_dss_s *s)
len = s->rfbi.pixels * 2;
data_addr = s->dispc.l[0].addr[0];
- data = cpu_physical_memory_map(data_addr, &len, 0);
+ data = cpu_physical_memory_map(data_addr, &len, false);
if (data && len != s->rfbi.pixels * 2) {
cpu_physical_memory_unmap(data, len, 0, 0);
data = NULL;
diff --git a/hw/display/ramfb.c b/hw/display/ramfb.c
index cd94940223..7ba07c80f6 100644
--- a/hw/display/ramfb.c
+++ b/hw/display/ramfb.c
@@ -57,7 +57,7 @@ static DisplaySurface *ramfb_create_display_surface(int width, int height,
}
size = (hwaddr)linesize * height;
- data = cpu_physical_memory_map(addr, &size, 0);
+ data = cpu_physical_memory_map(addr, &size, false);
if (size != (hwaddr)linesize * height) {
cpu_physical_memory_unmap(data, size, 0, 0);
return NULL;
diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c
index 0fb84ddc6b..8aa8e6549f 100644
--- a/hw/misc/pc-testdev.c
+++ b/hw/misc/pc-testdev.c
@@ -125,7 +125,7 @@ static void test_flush_page_write(void *opaque, hwaddr addr, uint64_t data,
unsigned len)
{
hwaddr page = 4096;
- void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0);
+ void *a = cpu_physical_memory_map(data & ~0xffful, &page, false);
/* We might not be able to get the full page, only mprotect what we actually
have mapped */
diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c
index 877ddef7b9..15d08281d4 100644
--- a/hw/nvram/spapr_nvram.c
+++ b/hw/nvram/spapr_nvram.c
@@ -89,7 +89,7 @@ static void rtas_nvram_fetch(PowerPCCPU *cpu, SpaprMachineState *spapr,
assert(nvram->buf);
- membuf = cpu_physical_memory_map(buffer, &len, 1);
+ membuf = cpu_physical_memory_map(buffer, &len, true);
memcpy(membuf, nvram->buf + offset, len);
cpu_physical_memory_unmap(membuf, len, 1, len);
@@ -127,7 +127,7 @@ static void rtas_nvram_store(PowerPCCPU *cpu, SpaprMachineState *spapr,
return;
}
- membuf = cpu_physical_memory_map(buffer, &len, 0);
+ membuf = cpu_physical_memory_map(buffer, &len, false);
alen = len;
if (nvram->blk) {
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 1a6a8fac22..d5ea962249 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -909,8 +909,10 @@ static void dcr_write_dma(void *opaque, int dcrn, uint32_t val)
sidx = didx = 0;
width = 1 << ((val & DMA0_CR_PW) >> 25);
- rptr = cpu_physical_memory_map(dma->ch[chnl].sa, &rlen, 0);
- wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen, 1);
+ rptr = cpu_physical_memory_map(dma->ch[chnl].sa, &rlen,
+ false);
+ wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen,
+ true);
if (rptr && wptr) {
if (!(val & DMA0_CR_DEC) &&
val & DMA0_CR_SAI && val & DMA0_CR_DAI) {
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index b8bb66b5c0..caf55ab044 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -832,7 +832,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr,
if (!is_ram_address(spapr, dst) || (dst & ~TARGET_PAGE_MASK) != 0) {
return H_PARAMETER;
}
- pdst = cpu_physical_memory_map(dst, &len, 1);
+ pdst = cpu_physical_memory_map(dst, &len, true);
if (!pdst || len != TARGET_PAGE_SIZE) {
return H_PARAMETER;
}
@@ -843,7 +843,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr,
ret = H_PARAMETER;
goto unmap_out;
}
- psrc = cpu_physical_memory_map(src, &len, 0);
+ psrc = cpu_physical_memory_map(src, &len, false);
if (!psrc || len != TARGET_PAGE_SIZE) {
ret = H_PARAMETER;
goto unmap_out;
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index 7773499d7f..0817874b48 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -626,7 +626,7 @@ static void s390_ipl_prepare_qipl(S390CPU *cpu)
uint8_t *addr;
uint64_t len = 4096;
- addr = cpu_physical_memory_map(cpu->env.psa, &len, 1);
+ addr = cpu_physical_memory_map(cpu->env.psa, &len, true);
if (!addr || len < QIPL_ADDRESS + sizeof(QemuIplParameters)) {
error_report("Cannot set QEMU IPL parameters");
return;
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 7c6a2b3c63..ed8be124da 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -641,7 +641,7 @@ static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set)
hwaddr len = 1;
uint8_t *ind_addr;
- ind_addr = cpu_physical_memory_map(ind_loc, &len, 1);
+ ind_addr = cpu_physical_memory_map(ind_loc, &len, true);
if (!ind_addr) {
s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0);
return -1;
diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c
index 13f57e7b67..50cf95b781 100644
--- a/hw/s390x/virtio-ccw.c
+++ b/hw/s390x/virtio-ccw.c
@@ -790,7 +790,7 @@ static uint8_t virtio_set_ind_atomic(SubchDev *sch, uint64_t ind_loc,
hwaddr len = 1;
uint8_t *ind_addr;
- ind_addr = cpu_physical_memory_map(ind_loc, &len, 1);
+ ind_addr = cpu_physical_memory_map(ind_loc, &len, true);
if (!ind_addr) {
error_report("%s(%x.%x.%04x): unable to access indicator",
__func__, sch->cssid, sch->ssid, sch->schid);
diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c
index b69732729b..b11e4e0546 100644
--- a/hw/xen/xen_pt_graphics.c
+++ b/hw/xen/xen_pt_graphics.c
@@ -222,7 +222,7 @@ void xen_pt_setup_vga(XenPCIPassthroughState *s, XenHostPCIDevice *dev,
}
/* Currently we fixed this address as a primary for legacy BIOS. */
- cpu_physical_memory_rw(0xc0000, bios, bios_size, 1);
+ cpu_physical_memory_rw(0xc0000, bios, bios_size, true);
}
uint32_t igd_read_opregion(XenPCIPassthroughState *s)
diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c
index a9cc51e6ce..38936d7af6 100644
--- a/target/i386/hax-all.c
+++ b/target/i386/hax-all.c
@@ -376,8 +376,8 @@ static int hax_handle_fastmmio(CPUArchState *env, struct hax_fastmmio *hft)
* hft->direction == 2: gpa ==> gpa2
*/
uint64_t value;
- cpu_physical_memory_rw(hft->gpa, &value, hft->size, 0);
- cpu_physical_memory_rw(hft->gpa2, &value, hft->size, 1);
+ cpu_physical_memory_rw(hft->gpa, &value, hft->size, false);
+ cpu_physical_memory_rw(hft->gpa2, &value, hft->size, true);
}
return 0;
diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c
index 1e9d6f20c1..3b58d10df3 100644
--- a/target/s390x/excp_helper.c
+++ b/target/s390x/excp_helper.c
@@ -393,7 +393,7 @@ static int mchk_store_vregs(CPUS390XState *env, uint64_t mcesao)
MchkExtSaveArea *sa;
int i;
- sa = cpu_physical_memory_map(mcesao, &len, 1);
+ sa = cpu_physical_memory_map(mcesao, &len, true);
if (!sa) {
return -EFAULT;
}
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index a3a49164e4..b810ad431e 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -151,7 +151,7 @@ LowCore *cpu_map_lowcore(CPUS390XState *env)
LowCore *lowcore;
hwaddr len = sizeof(LowCore);
- lowcore = cpu_physical_memory_map(env->psa, &len, 1);
+ lowcore = cpu_physical_memory_map(env->psa, &len, true);
if (len < sizeof(LowCore)) {
cpu_abort(env_cpu(env), "Could not map lowcore\n");
@@ -246,7 +246,7 @@ int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch)
hwaddr len = sizeof(*sa);
int i;
- sa = cpu_physical_memory_map(addr, &len, 1);
+ sa = cpu_physical_memory_map(addr, &len, true);
if (!sa) {
return -EFAULT;
}
@@ -298,7 +298,7 @@ int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len)
hwaddr save = len;
int i;
- sa = cpu_physical_memory_map(addr, &save, 1);
+ sa = cpu_physical_memory_map(addr, &save, true);
if (!sa) {
return -EFAULT;
}
--
2.21.1
_______________________________________________
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Xen-devel@lists.xenproject.org
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^ permalink raw reply related
* [Xen-devel] [PATCH v3 17/20] Avoid address_space_rw() with a constant is_write argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Alistair Francis, Gerd Hoffmann, Edgar E. Iglesias,
Edgar E . Iglesias, Stefano Stabellini, Matthew Rosato,
qemu-block, David Hildenbrand, Halil Pasic, Christian Borntraeger,
Hervé Poussineau, Marcel Apfelbaum, Anthony Perard,
xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
From: Peter Maydell <peter.maydell@linaro.org>
The address_space_rw() function allows either reads or writes
depending on the is_write argument passed to it; this is useful
when the direction of the access is determined programmatically
(as for instance when handling the KVM_EXIT_MMIO exit reason).
Under the hood it just calls either address_space_write() or
address_space_read_full().
We also use it a lot with a constant is_write argument, though,
which has two issues:
* when reading "address_space_rw(..., 1)" this is less
immediately clear to the reader as being a write than
"address_space_write(...)"
* calling address_space_rw() bypasses the optimization
in address_space_read() that fast-paths reads of a
fixed length
This commit was produced with the included Coccinelle script
scripts/coccinelle/exec_rw_const.cocci.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20200218112457.22712-1-peter.maydell@linaro.org>
[PMD: Update macvm_set_cr0() reported by Laurent Vivier]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
scripts/coccinelle/exec_rw_const.cocci | 13 +++++
target/i386/hvf/vmx.h | 7 ++-
accel/kvm/kvm-all.c | 6 +--
dma-helpers.c | 4 +-
exec.c | 4 +-
hw/dma/xlnx-zdma.c | 11 ++--
hw/net/dp8393x.c | 70 ++++++++++++++------------
hw/net/i82596.c | 22 ++++----
hw/net/lasi_i82596.c | 5 +-
hw/ppc/pnv_lpc.c | 8 +--
hw/s390x/css.c | 12 ++---
qtest.c | 52 +++++++++----------
target/i386/hvf/x86_mmu.c | 12 ++---
13 files changed, 119 insertions(+), 107 deletions(-)
diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci
index 98cb06f09f..ee98ce988e 100644
--- a/scripts/coccinelle/exec_rw_const.cocci
+++ b/scripts/coccinelle/exec_rw_const.cocci
@@ -27,6 +27,19 @@ expression E1, E2, E3, E4;
+ address_space_write(E1, E2, E3, V, E4)
)
+// Avoid uses of address_space_rw() with a constant is_write argument.
+@@
+expression E1, E2, E3, E4, E5;
+symbol true, false;
+@@
+(
+- address_space_rw(E1, E2, E3, E4, E5, false)
++ address_space_read(E1, E2, E3, E4, E5)
+|
+- address_space_rw(E1, E2, E3, E4, E5, true)
++ address_space_write(E1, E2, E3, E4, E5)
+)
+
// Remove useless cast
@@
expression E1, E2, E3, E4, E5, E6;
diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index 19af029133..03d2c79b9c 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -125,10 +125,9 @@ static inline void macvm_set_cr0(hv_vcpuid_t vcpu, uint64_t cr0)
if ((cr0 & CR0_PG) && (rvmcs(vcpu, VMCS_GUEST_CR4) & CR4_PAE) &&
!(efer & MSR_EFER_LME)) {
- address_space_rw(&address_space_memory,
- rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f,
- MEMTXATTRS_UNSPECIFIED,
- pdpte, 32, false);
+ address_space_read(&address_space_memory,
+ rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f,
+ MEMTXATTRS_UNSPECIFIED, pdpte, 32);
/* Only set PDPTE when appropriate. */
for (i = 0; i < 4; i++) {
wvmcs(vcpu, VMCS_GUEST_PDPTE0 + i * 2, pdpte[i]);
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index c111312dfd..0cfe6fd8de 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -2178,9 +2178,9 @@ void kvm_flush_coalesced_mmio_buffer(void)
ent = &ring->coalesced_mmio[ring->first];
if (ent->pio == 1) {
- address_space_rw(&address_space_io, ent->phys_addr,
- MEMTXATTRS_UNSPECIFIED, ent->data,
- ent->len, true);
+ address_space_write(&address_space_io, ent->phys_addr,
+ MEMTXATTRS_UNSPECIFIED, ent->data,
+ ent->len);
} else {
cpu_physical_memory_write(ent->phys_addr, ent->data, ent->len);
}
diff --git a/dma-helpers.c b/dma-helpers.c
index d3871dc61e..e8a26e81e1 100644
--- a/dma-helpers.c
+++ b/dma-helpers.c
@@ -28,8 +28,8 @@ int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
memset(fillbuf, c, FILLBUF_SIZE);
while (len > 0) {
l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
- error |= address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
- fillbuf, l, true);
+ error |= address_space_write(as, addr, MEMTXATTRS_UNSPECIFIED,
+ fillbuf, l);
len -= l;
addr += l;
}
diff --git a/exec.c b/exec.c
index 73c3bcfa40..b79919a4f7 100644
--- a/exec.c
+++ b/exec.c
@@ -3815,8 +3815,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr,
attrs, buf, l);
} else {
- address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf,
- l, false);
+ address_space_read(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf,
+ l);
}
len -= l;
buf += l;
diff --git a/hw/dma/xlnx-zdma.c b/hw/dma/xlnx-zdma.c
index 683abbe53f..1c1b142293 100644
--- a/hw/dma/xlnx-zdma.c
+++ b/hw/dma/xlnx-zdma.c
@@ -311,8 +311,7 @@ static bool zdma_load_descriptor(XlnxZDMA *s, uint64_t addr, void *buf)
return false;
}
- address_space_rw(s->dma_as, addr, s->attr,
- buf, sizeof(XlnxZDMADescr), false);
+ address_space_read(s->dma_as, addr, s->attr, buf, sizeof(XlnxZDMADescr));
return true;
}
@@ -364,7 +363,7 @@ static uint64_t zdma_update_descr_addr(XlnxZDMA *s, bool type,
} else {
addr = zdma_get_regaddr64(s, basereg);
addr += sizeof(s->dsc_dst);
- address_space_rw(s->dma_as, addr, s->attr, &next, 8, false);
+ address_space_read(s->dma_as, addr, s->attr, &next, 8);
zdma_put_regaddr64(s, basereg, next);
}
return next;
@@ -416,8 +415,7 @@ static void zdma_write_dst(XlnxZDMA *s, uint8_t *buf, uint32_t len)
}
}
- address_space_rw(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen,
- true);
+ address_space_write(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen);
if (burst_type == AXI_BURST_INCR) {
s->dsc_dst.addr += dlen;
}
@@ -493,8 +491,7 @@ static void zdma_process_descr(XlnxZDMA *s)
len = s->cfg.bus_width / 8;
}
} else {
- address_space_rw(s->dma_as, src_addr, s->attr, s->buf, len,
- false);
+ address_space_read(s->dma_as, src_addr, s->attr, s->buf, len);
if (burst_type == AXI_BURST_INCR) {
src_addr += len;
}
diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index b4363e3186..70451934ae 100644
--- a/hw/net/dp8393x.c
+++ b/hw/net/dp8393x.c
@@ -275,8 +275,8 @@ static void dp8393x_do_load_cam(dp8393xState *s)
while (s->regs[SONIC_CDC] & 0x1f) {
/* Fill current entry */
- address_space_rw(&s->as, dp8393x_cdp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as, dp8393x_cdp(s),
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff;
s->cam[index][1] = dp8393x_get(s, width, 1) >> 8;
s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff;
@@ -293,8 +293,8 @@ static void dp8393x_do_load_cam(dp8393xState *s)
}
/* Read CAM enable */
- address_space_rw(&s->as, dp8393x_cdp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as, dp8393x_cdp(s),
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
s->regs[SONIC_CE] = dp8393x_get(s, width, 0);
DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]);
@@ -311,8 +311,8 @@ static void dp8393x_do_read_rra(dp8393xState *s)
/* Read memory */
width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
size = sizeof(uint16_t) * 4 * width;
- address_space_rw(&s->as, dp8393x_rrp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as, dp8393x_rrp(s),
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
/* Update SONIC registers */
s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0);
@@ -426,8 +426,8 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
size = sizeof(uint16_t) * 6 * width;
s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA];
DPRINTF("Transmit packet at %08x\n", dp8393x_ttda(s));
- address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width,
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
tx_len = 0;
/* Update registers */
@@ -451,18 +451,19 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
if (tx_len + len > sizeof(s->tx_buffer)) {
len = sizeof(s->tx_buffer) - tx_len;
}
- address_space_rw(&s->as, dp8393x_tsa(s),
- MEMTXATTRS_UNSPECIFIED,
- &s->tx_buffer[tx_len], len, false);
+ address_space_read(&s->as, dp8393x_tsa(s), MEMTXATTRS_UNSPECIFIED,
+ &s->tx_buffer[tx_len], len);
tx_len += len;
i++;
if (i != s->regs[SONIC_TFC]) {
/* Read next fragment details */
size = sizeof(uint16_t) * 3 * width;
- address_space_rw(&s->as,
- dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as,
+ dp8393x_ttda(s)
+ + sizeof(uint16_t) * width * (4 + 3 * i),
+ MEMTXATTRS_UNSPECIFIED, s->data,
+ size);
s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0);
s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1);
s->regs[SONIC_TFS] = dp8393x_get(s, width, 2);
@@ -495,18 +496,18 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
dp8393x_put(s, width, 0,
s->regs[SONIC_TCR] & 0x0fff); /* status */
size = sizeof(uint16_t) * width;
- address_space_rw(&s->as,
- dp8393x_ttda(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, true);
+ address_space_write(&s->as, dp8393x_ttda(s),
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) {
/* Read footer of packet */
size = sizeof(uint16_t) * width;
- address_space_rw(&s->as,
- dp8393x_ttda(s) +
- sizeof(uint16_t) *
- (4 + 3 * s->regs[SONIC_TFC]) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as,
+ dp8393x_ttda(s)
+ + sizeof(uint16_t) * width
+ * (4 + 3 * s->regs[SONIC_TFC]),
+ MEMTXATTRS_UNSPECIFIED, s->data,
+ size);
s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0) & ~0x1;
if (dp8393x_get(s, width, 0) & 0x1) {
/* EOL detected */
@@ -768,8 +769,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
/* Are we still in resource exhaustion? */
size = sizeof(uint16_t) * 1 * width;
address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width;
- address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED,
- s->data, size, false);
+ address_space_read(&s->as, address, MEMTXATTRS_UNSPECIFIED,
+ s->data, size);
if (dp8393x_get(s, width, 0) & 0x1) {
/* Still EOL ; stop reception */
return -1;
@@ -788,10 +789,11 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
/* Put packet into RBA */
DPRINTF("Receive packet at %08x\n", dp8393x_crba(s));
address = dp8393x_crba(s);
- address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, buf, rx_len);
+ address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED,
+ buf, rx_len);
address += rx_len;
- address_space_rw(&s->as, address,
- MEMTXATTRS_UNSPECIFIED, &checksum, 4, true);
+ address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED,
+ &checksum, 4);
rx_len += 4;
s->regs[SONIC_CRBA1] = address >> 16;
s->regs[SONIC_CRBA0] = address & 0xffff;
@@ -819,13 +821,15 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
dp8393x_put(s, width, 3, s->regs[SONIC_TRBA1]); /* pkt_ptr1 */
dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */
size = sizeof(uint16_t) * 5 * width;
- address_space_rw(&s->as, dp8393x_crda(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, true);
+ address_space_write(&s->as, dp8393x_crda(s),
+ MEMTXATTRS_UNSPECIFIED,
+ s->data, size);
/* Move to next descriptor */
size = sizeof(uint16_t) * width;
- address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 5 * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as,
+ dp8393x_crda(s) + sizeof(uint16_t) * 5 * width,
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0);
if (s->regs[SONIC_LLFA] & 0x1) {
/* EOL detected */
@@ -838,8 +842,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
offset += sizeof(uint16_t);
}
s->data[0] = 0;
- address_space_rw(&s->as, offset, MEMTXATTRS_UNSPECIFIED,
- s->data, sizeof(uint16_t), true);
+ address_space_write(&s->as, offset, MEMTXATTRS_UNSPECIFIED,
+ s->data, sizeof(uint16_t));
s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA];
s->regs[SONIC_ISR] |= SONIC_ISR_PKTRX;
s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) | (((s->regs[SONIC_RSC] & 0x00ff) + 1) & 0x00ff);
diff --git a/hw/net/i82596.c b/hw/net/i82596.c
index 11537f72d1..fe9f2390a9 100644
--- a/hw/net/i82596.c
+++ b/hw/net/i82596.c
@@ -148,8 +148,8 @@ static void i82596_transmit(I82596State *s, uint32_t addr)
if (s->nic && len) {
assert(len <= sizeof(s->tx_buffer));
- address_space_rw(&address_space_memory, tba,
- MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, false);
+ address_space_read(&address_space_memory, tba,
+ MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len);
DBG(PRINT_PKTHDR("Send", &s->tx_buffer));
DBG(printf("Sending %d bytes\n", len));
qemu_send_packet(qemu_get_queue(s->nic), s->tx_buffer, len);
@@ -172,8 +172,8 @@ static void set_individual_address(I82596State *s, uint32_t addr)
nc = qemu_get_queue(s->nic);
m = s->conf.macaddr.a;
- address_space_rw(&address_space_memory, addr + 8,
- MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, false);
+ address_space_read(&address_space_memory, addr + 8,
+ MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN);
qemu_format_nic_info_str(nc, m);
trace_i82596_new_mac(nc->info_str);
}
@@ -190,9 +190,8 @@ static void set_multicast_list(I82596State *s, uint32_t addr)
}
for (i = 0; i < mc_count; i++) {
uint8_t multicast_addr[ETH_ALEN];
- address_space_rw(&address_space_memory,
- addr + i * ETH_ALEN, MEMTXATTRS_UNSPECIFIED,
- multicast_addr, ETH_ALEN, false);
+ address_space_read(&address_space_memory, addr + i * ETH_ALEN,
+ MEMTXATTRS_UNSPECIFIED, multicast_addr, ETH_ALEN);
DBG(printf("Add multicast entry " MAC_FMT "\n",
MAC_ARG(multicast_addr)));
unsigned mcast_idx = (net_crc32(multicast_addr, ETH_ALEN) &
@@ -260,9 +259,8 @@ static void command_loop(I82596State *s)
byte_cnt = MAX(byte_cnt, 4);
byte_cnt = MIN(byte_cnt, sizeof(s->config));
/* copy byte_cnt max. */
- address_space_rw(&address_space_memory, s->cmd_p + 8,
- MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt,
- false);
+ address_space_read(&address_space_memory, s->cmd_p + 8,
+ MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt);
/* config byte according to page 35ff */
s->config[2] &= 0x82; /* mask valid bits */
s->config[2] |= 0x40;
@@ -647,8 +645,8 @@ ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t sz)
buf += num;
len -= num;
if (len == 0) { /* copy crc */
- address_space_rw(&address_space_memory, rba - 4,
- MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, true);
+ address_space_write(&address_space_memory, rba - 4,
+ MEMTXATTRS_UNSPECIFIED, crc_ptr, 4);
}
num |= 0x4000; /* set F BIT */
diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c
index 8bff419378..52637a562d 100644
--- a/hw/net/lasi_i82596.c
+++ b/hw/net/lasi_i82596.c
@@ -55,8 +55,9 @@ static void lasi_82596_mem_write(void *opaque, hwaddr addr,
* Provided for SeaBIOS only. Write MAC of Network card to addr @val.
* Needed for the PDC_LAN_STATION_ID_READ PDC call.
*/
- address_space_rw(&address_space_memory, val, MEMTXATTRS_UNSPECIFIED,
- d->state.conf.macaddr.a, ETH_ALEN, true);
+ address_space_write(&address_space_memory, val,
+ MEMTXATTRS_UNSPECIFIED, d->state.conf.macaddr.a,
+ ETH_ALEN);
break;
}
}
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
index 5989d723c5..f150deca34 100644
--- a/hw/ppc/pnv_lpc.c
+++ b/hw/ppc/pnv_lpc.c
@@ -238,16 +238,16 @@ static bool opb_read(PnvLpcController *lpc, uint32_t addr, uint8_t *data,
int sz)
{
/* XXX Handle access size limits and FW read caching here */
- return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED,
- data, sz, false);
+ return !address_space_read(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED,
+ data, sz);
}
static bool opb_write(PnvLpcController *lpc, uint32_t addr, uint8_t *data,
int sz)
{
/* XXX Handle access size limits here */
- return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED,
- data, sz, true);
+ return !address_space_write(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED,
+ data, sz);
}
#define ECCB_CTL_READ PPC_BIT(15)
diff --git a/hw/s390x/css.c b/hw/s390x/css.c
index f27f8c45a5..5d8e08667e 100644
--- a/hw/s390x/css.c
+++ b/hw/s390x/css.c
@@ -874,18 +874,18 @@ static inline int ida_read_next_idaw(CcwDataStream *cds)
if (idaw_addr & 0x07 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {
return -EINVAL; /* channel program check */
}
- ret = address_space_rw(&address_space_memory, idaw_addr,
- MEMTXATTRS_UNSPECIFIED, &idaw.fmt2,
- sizeof(idaw.fmt2), false);
+ ret = address_space_read(&address_space_memory, idaw_addr,
+ MEMTXATTRS_UNSPECIFIED, &idaw.fmt2,
+ sizeof(idaw.fmt2));
cds->cda = be64_to_cpu(idaw.fmt2);
} else {
idaw_addr = cds->cda_orig + sizeof(idaw.fmt1) * cds->at_idaw;
if (idaw_addr & 0x03 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {
return -EINVAL; /* channel program check */
}
- ret = address_space_rw(&address_space_memory, idaw_addr,
- MEMTXATTRS_UNSPECIFIED, &idaw.fmt1,
- sizeof(idaw.fmt1), false);
+ ret = address_space_read(&address_space_memory, idaw_addr,
+ MEMTXATTRS_UNSPECIFIED, &idaw.fmt1,
+ sizeof(idaw.fmt1));
cds->cda = be64_to_cpu(idaw.fmt1);
if (cds->cda & 0x80000000) {
return -EINVAL; /* channel program check */
diff --git a/qtest.c b/qtest.c
index 65e33b80e3..dcb57498ad 100644
--- a/qtest.c
+++ b/qtest.c
@@ -429,23 +429,23 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
if (words[0][5] == 'b') {
uint8_t data = value;
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 1, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 1);
} else if (words[0][5] == 'w') {
uint16_t data = value;
tswap16s(&data);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 2, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 2);
} else if (words[0][5] == 'l') {
uint32_t data = value;
tswap32s(&data);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 4, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 4);
} else if (words[0][5] == 'q') {
uint64_t data = value;
tswap64s(&data);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 8, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 8);
}
qtest_send_prefix(chr);
qtest_send(chr, "OK\n");
@@ -463,22 +463,22 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
if (words[0][4] == 'b') {
uint8_t data;
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 1, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 1);
value = data;
} else if (words[0][4] == 'w') {
uint16_t data;
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 2, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 2);
value = tswap16(data);
} else if (words[0][4] == 'l') {
uint32_t data;
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 4, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 4);
value = tswap32(data);
} else if (words[0][4] == 'q') {
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &value, 8, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &value, 8);
tswap64s(&value);
}
qtest_send_prefix(chr);
@@ -498,8 +498,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
g_assert(len);
data = g_malloc(len);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- data, len, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+ len);
enc = g_malloc(2 * len + 1);
for (i = 0; i < len; i++) {
@@ -524,8 +524,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
g_assert(ret == 0);
data = g_malloc(len);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- data, len, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+ len);
b64_data = g_base64_encode(data, len);
qtest_send_prefix(chr);
qtest_sendf(chr, "OK %s\n", b64_data);
@@ -559,8 +559,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
data[i] = 0;
}
}
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- data, len, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+ len);
g_free(data);
qtest_send_prefix(chr);
@@ -582,8 +582,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
if (len) {
data = g_malloc(len);
memset(data, pattern, len);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- data, len, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ data, len);
g_free(data);
}
@@ -616,8 +616,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
out_len = MIN(out_len, len);
}
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- data, len, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+ len);
qtest_send_prefix(chr);
qtest_send(chr, "OK\n");
diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c
index 451dcc983a..65d4603dbf 100644
--- a/target/i386/hvf/x86_mmu.c
+++ b/target/i386/hvf/x86_mmu.c
@@ -88,8 +88,8 @@ static bool get_pt_entry(struct CPUState *cpu, struct gpt_translation *pt,
}
index = gpt_entry(pt->gva, level, pae);
- address_space_rw(&address_space_memory, gpa + index * pte_size(pae),
- MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), false);
+ address_space_read(&address_space_memory, gpa + index * pte_size(pae),
+ MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae));
pt->pte[level - 1] = pte;
@@ -238,8 +238,8 @@ void vmx_write_mem(struct CPUState *cpu, target_ulong gva, void *data, int bytes
if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
} else {
- address_space_rw(&address_space_memory, gpa,
- MEMTXATTRS_UNSPECIFIED, data, copy, true);
+ address_space_write(&address_space_memory, gpa,
+ MEMTXATTRS_UNSPECIFIED, data, copy);
}
bytes -= copy;
@@ -259,8 +259,8 @@ void vmx_read_mem(struct CPUState *cpu, void *data, target_ulong gva, int bytes)
if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
}
- address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
- data, copy, false);
+ address_space_read(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
+ data, copy);
bytes -= copy;
gva += copy;
--
2.21.1
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Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related
* Re: [PATCH v5 01/10] capabilities: introduce CAP_PERFMON to kernel and user space
From: Alexey Budankov @ 2020-02-20 13:05 UTC (permalink / raw)
To: Thomas Gleixner, Stephen Smalley, Serge Hallyn, James Morris
Cc: Mark Rutland, Song Liu, Peter Zijlstra, benh@kernel.crashing.org,
joonas.lahtinen@linux.intel.com, Will Deacon, Alexei Starovoitov,
Lionel Landwerlin, Paul Mackerras, Jiri Olsa, Alexei Starovoitov,
Andi Kleen, Michael Ellerman, Igor Lubashev, Alexander Shishkin,
Ingo Molnar, oprofile-list, linux-arm-kernel, Robert Richter,
selinux@vger.kernel.org, intel-gfx@lists.freedesktop.org,
jani.nikula@linux.intel.com, Arnaldo Carvalho de Melo,
rodrigo.vivi@intel.com, Namhyung Kim, Stephane Eranian,
linux-parisc@vger.kernel.org, linux-kernel, Andy Lutomirski,
linux-perf-users@vger.kernel.org,
linux-security-module@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <7d6f4210-423f-e454-3910-9f8e17dff1aa@linux.intel.com>
On 07.02.2020 16:39, Alexey Budankov wrote:
>
> On 07.02.2020 14:38, Thomas Gleixner wrote:
>> Alexey Budankov <alexey.budankov@linux.intel.com> writes:
>>> On 22.01.2020 17:25, Alexey Budankov wrote:
>>>> On 22.01.2020 17:07, Stephen Smalley wrote:
>>>>>> It keeps the implementation simple and readable. The implementation is more
>>>>>> performant in the sense of calling the API - one capable() call for CAP_PERFMON
>>>>>> privileged process.
>>>>>>
>>>>>> Yes, it bloats audit log for CAP_SYS_ADMIN privileged and unprivileged processes,
>>>>>> but this bloating also advertises and leverages using more secure CAP_PERFMON
>>>>>> based approach to use perf_event_open system call.
>>>>>
>>>>> I can live with that. We just need to document that when you see
>>>>> both a CAP_PERFMON and a CAP_SYS_ADMIN audit message for a process,
>>>>> try only allowing CAP_PERFMON first and see if that resolves the
>>>>> issue. We have a similar issue with CAP_DAC_READ_SEARCH versus
>>>>> CAP_DAC_OVERRIDE.
>>>>
>>>> perf security [1] document can be updated, at least, to align and document
>>>> this audit logging specifics.
>>>
>>> And I plan to update the document right after this patch set is accepted.
>>> Feel free to let me know of the places in the kernel docs that also
>>> require update w.r.t CAP_PERFMON extension.
>>
>> The documentation update wants be part of the patch set and not planned
>> to be done _after_ the patch set is merged.
>
> Well, accepted. It is going to make patches #11 and beyond.
Patches #11 and #12 of v7 [1] contain information on CAP_PERFMON intention and usage.
Patch for man-pages [2] extends perf_event_open.2 documentation.
Thanks,
Alexey
---
[1] https://lore.kernel.org/lkml/c8de937a-0b3a-7147-f5ef-69f467e87a13@linux.intel.com/
[2] https://lore.kernel.org/lkml/18d1083d-efe5-f5f8-c531-d142c0e5c1a8@linux.intel.com/
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [Xen-devel] [PATCH v3 18/20] exec: Let cpu_[physical]_memory API use a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Marcel Apfelbaum,
Anthony Perard, xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
The 'is_write' argument is either 0 or 1.
Convert it to a boolean type.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/exec/cpu-all.h | 2 +-
include/exec/cpu-common.h | 6 +++---
exec.c | 10 +++++-----
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 49e96caa3f..49384bb66a 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -388,7 +388,7 @@ void dump_opcount_info(void);
#endif /* !CONFIG_USER_ONLY */
int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
- void *ptr, target_ulong len, int is_write);
+ void *ptr, target_ulong len, bool is_write);
int cpu_exec(CPUState *cpu);
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 165f8fb621..6bfe201779 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -70,7 +70,7 @@ size_t qemu_ram_pagesize(RAMBlock *block);
size_t qemu_ram_pagesize_largest(void);
void cpu_physical_memory_rw(hwaddr addr, void *buf,
- hwaddr len, int is_write);
+ hwaddr len, bool is_write);
static inline void cpu_physical_memory_read(hwaddr addr,
void *buf, hwaddr len)
{
@@ -83,9 +83,9 @@ static inline void cpu_physical_memory_write(hwaddr addr,
}
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
- int is_write);
+ bool is_write);
void cpu_physical_memory_unmap(void *buffer, hwaddr len,
- int is_write, hwaddr access_len);
+ bool is_write, hwaddr access_len);
void cpu_register_map_client(QEMUBH *bh);
void cpu_unregister_map_client(QEMUBH *bh);
diff --git a/exec.c b/exec.c
index b79919a4f7..6c39b43155 100644
--- a/exec.c
+++ b/exec.c
@@ -3019,7 +3019,7 @@ MemoryRegion *get_system_io(void)
/* physical memory access (slow version, mainly for debug) */
#if defined(CONFIG_USER_ONLY)
int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
- void *ptr, target_ulong len, int is_write)
+ void *ptr, target_ulong len, bool is_write)
{
int flags;
target_ulong l, page;
@@ -3313,7 +3313,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
}
void cpu_physical_memory_rw(hwaddr addr, void *buf,
- hwaddr len, int is_write)
+ hwaddr len, bool is_write)
{
address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
buf, len, is_write);
@@ -3632,14 +3632,14 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
- int is_write)
+ bool is_write)
{
return address_space_map(&address_space_memory, addr, plen, is_write,
MEMTXATTRS_UNSPECIFIED);
}
void cpu_physical_memory_unmap(void *buffer, hwaddr len,
- int is_write, hwaddr access_len)
+ bool is_write, hwaddr access_len)
{
return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
}
@@ -3790,7 +3790,7 @@ address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
/* virtual memory access for debug (includes writing to ROM) */
int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
- void *ptr, target_ulong len, int is_write)
+ void *ptr, target_ulong len, bool is_write)
{
hwaddr phys_addr;
target_ulong l, page;
--
2.21.1
_______________________________________________
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Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related
* [Xen-devel] [PATCH v3 16/20] Let address_space_rw() calls pass a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Marcel Apfelbaum,
Anthony Perard, xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
Since its introduction in commit ac1970fbe8, address_space_rw()
takes a boolean 'is_write' argument. Fix the codebase by using
an explicit boolean type.
This commit was produced with the included Coccinelle script
scripts/coccinelle/exec_rw_const.
Inspired-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
scripts/coccinelle/exec_rw_const.cocci | 12 ++++++++++++
target/i386/hvf/vmx.h | 2 +-
exec.c | 4 ++--
hw/net/dp8393x.c | 27 +++++++++++++-------------
hw/net/i82596.c | 11 ++++++-----
hw/net/lasi_i82596.c | 4 ++--
target/i386/hvf/x86_mmu.c | 8 ++++----
7 files changed, 41 insertions(+), 27 deletions(-)
diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci
index 70cf52d58e..98cb06f09f 100644
--- a/scripts/coccinelle/exec_rw_const.cocci
+++ b/scripts/coccinelle/exec_rw_const.cocci
@@ -1,6 +1,18 @@
// Usage:
// spatch --sp-file scripts/coccinelle/exec_rw_const.cocci --dir . --in-place
+// Convert to boolean
+@@
+expression E1, E2, E3, E4, E5;
+@@
+(
+- address_space_rw(E1, E2, E3, E4, E5, 0)
++ address_space_rw(E1, E2, E3, E4, E5, false)
+|
+- address_space_rw(E1, E2, E3, E4, E5, 1)
++ address_space_rw(E1, E2, E3, E4, E5, true)
+)
+
// Use address_space_write instead of casting to non-const
@@
type T;
diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index a115ca1782..19af029133 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -128,7 +128,7 @@ static inline void macvm_set_cr0(hv_vcpuid_t vcpu, uint64_t cr0)
address_space_rw(&address_space_memory,
rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f,
MEMTXATTRS_UNSPECIFIED,
- pdpte, 32, 0);
+ pdpte, 32, false);
/* Only set PDPTE when appropriate. */
for (i = 0; i < 4; i++) {
wvmcs(vcpu, VMCS_GUEST_PDPTE0 + i * 2, pdpte[i]);
diff --git a/exec.c b/exec.c
index 16974d4f4b..73c3bcfa40 100644
--- a/exec.c
+++ b/exec.c
@@ -3815,8 +3815,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr,
attrs, buf, l);
} else {
- address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
- attrs, buf, l, 0);
+ address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf,
+ l, false);
}
len -= l;
buf += l;
diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index b461101ceb..b4363e3186 100644
--- a/hw/net/dp8393x.c
+++ b/hw/net/dp8393x.c
@@ -276,7 +276,7 @@ static void dp8393x_do_load_cam(dp8393xState *s)
while (s->regs[SONIC_CDC] & 0x1f) {
/* Fill current entry */
address_space_rw(&s->as, dp8393x_cdp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff;
s->cam[index][1] = dp8393x_get(s, width, 1) >> 8;
s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff;
@@ -294,7 +294,7 @@ static void dp8393x_do_load_cam(dp8393xState *s)
/* Read CAM enable */
address_space_rw(&s->as, dp8393x_cdp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
s->regs[SONIC_CE] = dp8393x_get(s, width, 0);
DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]);
@@ -312,7 +312,7 @@ static void dp8393x_do_read_rra(dp8393xState *s)
width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
size = sizeof(uint16_t) * 4 * width;
address_space_rw(&s->as, dp8393x_rrp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
/* Update SONIC registers */
s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0);
@@ -427,7 +427,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA];
DPRINTF("Transmit packet at %08x\n", dp8393x_ttda(s));
address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
tx_len = 0;
/* Update registers */
@@ -452,7 +452,8 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
len = sizeof(s->tx_buffer) - tx_len;
}
address_space_rw(&s->as, dp8393x_tsa(s),
- MEMTXATTRS_UNSPECIFIED, &s->tx_buffer[tx_len], len, 0);
+ MEMTXATTRS_UNSPECIFIED,
+ &s->tx_buffer[tx_len], len, false);
tx_len += len;
i++;
@@ -461,7 +462,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
size = sizeof(uint16_t) * 3 * width;
address_space_rw(&s->as,
dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0);
s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1);
s->regs[SONIC_TFS] = dp8393x_get(s, width, 2);
@@ -496,7 +497,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
size = sizeof(uint16_t) * width;
address_space_rw(&s->as,
dp8393x_ttda(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, 1);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, true);
if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) {
/* Read footer of packet */
@@ -505,7 +506,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
dp8393x_ttda(s) +
sizeof(uint16_t) *
(4 + 3 * s->regs[SONIC_TFC]) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0) & ~0x1;
if (dp8393x_get(s, width, 0) & 0x1) {
/* EOL detected */
@@ -768,7 +769,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
size = sizeof(uint16_t) * 1 * width;
address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width;
address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED,
- s->data, size, 0);
+ s->data, size, false);
if (dp8393x_get(s, width, 0) & 0x1) {
/* Still EOL ; stop reception */
return -1;
@@ -790,7 +791,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, buf, rx_len);
address += rx_len;
address_space_rw(&s->as, address,
- MEMTXATTRS_UNSPECIFIED, &checksum, 4, 1);
+ MEMTXATTRS_UNSPECIFIED, &checksum, 4, true);
rx_len += 4;
s->regs[SONIC_CRBA1] = address >> 16;
s->regs[SONIC_CRBA0] = address & 0xffff;
@@ -819,12 +820,12 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */
size = sizeof(uint16_t) * 5 * width;
address_space_rw(&s->as, dp8393x_crda(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, 1);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, true);
/* Move to next descriptor */
size = sizeof(uint16_t) * width;
address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 5 * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0);
if (s->regs[SONIC_LLFA] & 0x1) {
/* EOL detected */
@@ -838,7 +839,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
}
s->data[0] = 0;
address_space_rw(&s->as, offset, MEMTXATTRS_UNSPECIFIED,
- s->data, sizeof(uint16_t), 1);
+ s->data, sizeof(uint16_t), true);
s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA];
s->regs[SONIC_ISR] |= SONIC_ISR_PKTRX;
s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) | (((s->regs[SONIC_RSC] & 0x00ff) + 1) & 0x00ff);
diff --git a/hw/net/i82596.c b/hw/net/i82596.c
index a292984e06..11537f72d1 100644
--- a/hw/net/i82596.c
+++ b/hw/net/i82596.c
@@ -149,7 +149,7 @@ static void i82596_transmit(I82596State *s, uint32_t addr)
if (s->nic && len) {
assert(len <= sizeof(s->tx_buffer));
address_space_rw(&address_space_memory, tba,
- MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, 0);
+ MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, false);
DBG(PRINT_PKTHDR("Send", &s->tx_buffer));
DBG(printf("Sending %d bytes\n", len));
qemu_send_packet(qemu_get_queue(s->nic), s->tx_buffer, len);
@@ -173,7 +173,7 @@ static void set_individual_address(I82596State *s, uint32_t addr)
nc = qemu_get_queue(s->nic);
m = s->conf.macaddr.a;
address_space_rw(&address_space_memory, addr + 8,
- MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, 0);
+ MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, false);
qemu_format_nic_info_str(nc, m);
trace_i82596_new_mac(nc->info_str);
}
@@ -192,7 +192,7 @@ static void set_multicast_list(I82596State *s, uint32_t addr)
uint8_t multicast_addr[ETH_ALEN];
address_space_rw(&address_space_memory,
addr + i * ETH_ALEN, MEMTXATTRS_UNSPECIFIED,
- multicast_addr, ETH_ALEN, 0);
+ multicast_addr, ETH_ALEN, false);
DBG(printf("Add multicast entry " MAC_FMT "\n",
MAC_ARG(multicast_addr)));
unsigned mcast_idx = (net_crc32(multicast_addr, ETH_ALEN) &
@@ -261,7 +261,8 @@ static void command_loop(I82596State *s)
byte_cnt = MIN(byte_cnt, sizeof(s->config));
/* copy byte_cnt max. */
address_space_rw(&address_space_memory, s->cmd_p + 8,
- MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt, 0);
+ MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt,
+ false);
/* config byte according to page 35ff */
s->config[2] &= 0x82; /* mask valid bits */
s->config[2] |= 0x40;
@@ -647,7 +648,7 @@ ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t sz)
len -= num;
if (len == 0) { /* copy crc */
address_space_rw(&address_space_memory, rba - 4,
- MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, 1);
+ MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, true);
}
num |= 0x4000; /* set F BIT */
diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c
index 427b3fbf70..8bff419378 100644
--- a/hw/net/lasi_i82596.c
+++ b/hw/net/lasi_i82596.c
@@ -55,8 +55,8 @@ static void lasi_82596_mem_write(void *opaque, hwaddr addr,
* Provided for SeaBIOS only. Write MAC of Network card to addr @val.
* Needed for the PDC_LAN_STATION_ID_READ PDC call.
*/
- address_space_rw(&address_space_memory, val,
- MEMTXATTRS_UNSPECIFIED, d->state.conf.macaddr.a, ETH_ALEN, 1);
+ address_space_rw(&address_space_memory, val, MEMTXATTRS_UNSPECIFIED,
+ d->state.conf.macaddr.a, ETH_ALEN, true);
break;
}
}
diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c
index 6a620643c1..451dcc983a 100644
--- a/target/i386/hvf/x86_mmu.c
+++ b/target/i386/hvf/x86_mmu.c
@@ -89,7 +89,7 @@ static bool get_pt_entry(struct CPUState *cpu, struct gpt_translation *pt,
index = gpt_entry(pt->gva, level, pae);
address_space_rw(&address_space_memory, gpa + index * pte_size(pae),
- MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), 0);
+ MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), false);
pt->pte[level - 1] = pte;
@@ -238,8 +238,8 @@ void vmx_write_mem(struct CPUState *cpu, target_ulong gva, void *data, int bytes
if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
} else {
- address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
- data, copy, 1);
+ address_space_rw(&address_space_memory, gpa,
+ MEMTXATTRS_UNSPECIFIED, data, copy, true);
}
bytes -= copy;
@@ -260,7 +260,7 @@ void vmx_read_mem(struct CPUState *cpu, void *data, target_ulong gva, int bytes)
VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
}
address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
- data, copy, 0);
+ data, copy, false);
bytes -= copy;
gva += copy;
--
2.21.1
_______________________________________________
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Xen-devel@lists.xenproject.org
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^ permalink raw reply related
* [PATCH v3 19/20] Let cpu_[physical]_memory() calls pass a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Edgar E. Iglesias, Anthony Perard, Fam Zheng,
Hervé Poussineau, Philippe Mathieu-Daudé, kvm,
Laurent Vivier, Thomas Huth, Stefan Weil, Eric Auger, Halil Pasic,
Marcel Apfelbaum, qemu-s390x, Aleksandar Rikalo, David Gibson,
Michael Walle, qemu-ppc, Gerd Hoffmann, Cornelia Huck, qemu-arm,
Alistair Francis, qemu-block, Cédric Le Goater, Jason Wang,
xen-devel, Christian Borntraeger, Dmitry Fleytman, Matthew Rosato,
Eduardo Habkost, Richard Henderson, Michael S. Tsirkin,
David Hildenbrand, Paolo Bonzini, Stefano Stabellini,
Igor Mitsyanko, Paul Durrant, Richard Henderson, John Snow
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
Use an explicit boolean type.
This commit was produced with the included Coccinelle script
scripts/coccinelle/exec_rw_const.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
scripts/coccinelle/exec_rw_const.cocci | 14 ++++++++++++++
include/exec/cpu-common.h | 4 ++--
hw/display/exynos4210_fimd.c | 3 ++-
hw/display/milkymist-tmu2.c | 8 ++++----
hw/display/omap_dss.c | 2 +-
hw/display/ramfb.c | 2 +-
hw/misc/pc-testdev.c | 2 +-
hw/nvram/spapr_nvram.c | 4 ++--
hw/ppc/ppc440_uc.c | 6 ++++--
hw/ppc/spapr_hcall.c | 4 ++--
hw/s390x/ipl.c | 2 +-
hw/s390x/s390-pci-bus.c | 2 +-
hw/s390x/virtio-ccw.c | 2 +-
hw/xen/xen_pt_graphics.c | 2 +-
target/i386/hax-all.c | 4 ++--
target/s390x/excp_helper.c | 2 +-
target/s390x/helper.c | 6 +++---
17 files changed, 43 insertions(+), 26 deletions(-)
diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci
index ee98ce988e..54b1cab8cd 100644
--- a/scripts/coccinelle/exec_rw_const.cocci
+++ b/scripts/coccinelle/exec_rw_const.cocci
@@ -11,6 +11,20 @@ expression E1, E2, E3, E4, E5;
|
- address_space_rw(E1, E2, E3, E4, E5, 1)
+ address_space_rw(E1, E2, E3, E4, E5, true)
+|
+
+- cpu_physical_memory_rw(E1, E2, E3, 0)
++ cpu_physical_memory_rw(E1, E2, E3, false)
+|
+- cpu_physical_memory_rw(E1, E2, E3, 1)
++ cpu_physical_memory_rw(E1, E2, E3, true)
+|
+
+- cpu_physical_memory_map(E1, E2, 0)
++ cpu_physical_memory_map(E1, E2, false)
+|
+- cpu_physical_memory_map(E1, E2, 1)
++ cpu_physical_memory_map(E1, E2, true)
)
// Use address_space_write instead of casting to non-const
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 6bfe201779..e7fd5781ea 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -74,12 +74,12 @@ void cpu_physical_memory_rw(hwaddr addr, void *buf,
static inline void cpu_physical_memory_read(hwaddr addr,
void *buf, hwaddr len)
{
- cpu_physical_memory_rw(addr, buf, len, 0);
+ cpu_physical_memory_rw(addr, buf, len, false);
}
static inline void cpu_physical_memory_write(hwaddr addr,
const void *buf, hwaddr len)
{
- cpu_physical_memory_rw(addr, (void *)buf, len, 1);
+ cpu_physical_memory_rw(addr, (void *)buf, len, true);
}
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c
index c1071ecd46..ec6776680e 100644
--- a/hw/display/exynos4210_fimd.c
+++ b/hw/display/exynos4210_fimd.c
@@ -1164,7 +1164,8 @@ static void fimd_update_memory_section(Exynos4210fimdState *s, unsigned win)
goto error_return;
}
- w->host_fb_addr = cpu_physical_memory_map(fb_start_addr, &fb_mapped_len, 0);
+ w->host_fb_addr = cpu_physical_memory_map(fb_start_addr, &fb_mapped_len,
+ false);
if (!w->host_fb_addr) {
DPRINT_ERROR("Failed to map window %u framebuffer\n", win);
goto error_return;
diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c
index 199f1227e7..513c0d5bab 100644
--- a/hw/display/milkymist-tmu2.c
+++ b/hw/display/milkymist-tmu2.c
@@ -218,7 +218,7 @@ static void tmu2_start(MilkymistTMU2State *s)
glGenTextures(1, &texture);
glBindTexture(GL_TEXTURE_2D, texture);
fb_len = 2ULL * s->regs[R_TEXHRES] * s->regs[R_TEXVRES];
- fb = cpu_physical_memory_map(s->regs[R_TEXFBUF], &fb_len, 0);
+ fb = cpu_physical_memory_map(s->regs[R_TEXFBUF], &fb_len, false);
if (fb == NULL) {
glDeleteTextures(1, &texture);
glXMakeContextCurrent(s->dpy, None, None, NULL);
@@ -262,7 +262,7 @@ static void tmu2_start(MilkymistTMU2State *s)
/* Read the QEMU dest. framebuffer into the OpenGL framebuffer */
fb_len = 2ULL * s->regs[R_DSTHRES] * s->regs[R_DSTVRES];
- fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, 0);
+ fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, false);
if (fb == NULL) {
glDeleteTextures(1, &texture);
glXMakeContextCurrent(s->dpy, None, None, NULL);
@@ -281,7 +281,7 @@ static void tmu2_start(MilkymistTMU2State *s)
/* Map the texture */
mesh_len = MESH_MAXSIZE*MESH_MAXSIZE*sizeof(struct vertex);
- mesh = cpu_physical_memory_map(s->regs[R_VERTICESADDR], &mesh_len, 0);
+ mesh = cpu_physical_memory_map(s->regs[R_VERTICESADDR], &mesh_len, false);
if (mesh == NULL) {
glDeleteTextures(1, &texture);
glXMakeContextCurrent(s->dpy, None, None, NULL);
@@ -298,7 +298,7 @@ static void tmu2_start(MilkymistTMU2State *s)
/* Write back the OpenGL framebuffer to the QEMU framebuffer */
fb_len = 2ULL * s->regs[R_DSTHRES] * s->regs[R_DSTVRES];
- fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, 1);
+ fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, true);
if (fb == NULL) {
glDeleteTextures(1, &texture);
glXMakeContextCurrent(s->dpy, None, None, NULL);
diff --git a/hw/display/omap_dss.c b/hw/display/omap_dss.c
index 637aae8d39..32dc0d6aa7 100644
--- a/hw/display/omap_dss.c
+++ b/hw/display/omap_dss.c
@@ -632,7 +632,7 @@ static void omap_rfbi_transfer_start(struct omap_dss_s *s)
len = s->rfbi.pixels * 2;
data_addr = s->dispc.l[0].addr[0];
- data = cpu_physical_memory_map(data_addr, &len, 0);
+ data = cpu_physical_memory_map(data_addr, &len, false);
if (data && len != s->rfbi.pixels * 2) {
cpu_physical_memory_unmap(data, len, 0, 0);
data = NULL;
diff --git a/hw/display/ramfb.c b/hw/display/ramfb.c
index cd94940223..7ba07c80f6 100644
--- a/hw/display/ramfb.c
+++ b/hw/display/ramfb.c
@@ -57,7 +57,7 @@ static DisplaySurface *ramfb_create_display_surface(int width, int height,
}
size = (hwaddr)linesize * height;
- data = cpu_physical_memory_map(addr, &size, 0);
+ data = cpu_physical_memory_map(addr, &size, false);
if (size != (hwaddr)linesize * height) {
cpu_physical_memory_unmap(data, size, 0, 0);
return NULL;
diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c
index 0fb84ddc6b..8aa8e6549f 100644
--- a/hw/misc/pc-testdev.c
+++ b/hw/misc/pc-testdev.c
@@ -125,7 +125,7 @@ static void test_flush_page_write(void *opaque, hwaddr addr, uint64_t data,
unsigned len)
{
hwaddr page = 4096;
- void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0);
+ void *a = cpu_physical_memory_map(data & ~0xffful, &page, false);
/* We might not be able to get the full page, only mprotect what we actually
have mapped */
diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c
index 877ddef7b9..15d08281d4 100644
--- a/hw/nvram/spapr_nvram.c
+++ b/hw/nvram/spapr_nvram.c
@@ -89,7 +89,7 @@ static void rtas_nvram_fetch(PowerPCCPU *cpu, SpaprMachineState *spapr,
assert(nvram->buf);
- membuf = cpu_physical_memory_map(buffer, &len, 1);
+ membuf = cpu_physical_memory_map(buffer, &len, true);
memcpy(membuf, nvram->buf + offset, len);
cpu_physical_memory_unmap(membuf, len, 1, len);
@@ -127,7 +127,7 @@ static void rtas_nvram_store(PowerPCCPU *cpu, SpaprMachineState *spapr,
return;
}
- membuf = cpu_physical_memory_map(buffer, &len, 0);
+ membuf = cpu_physical_memory_map(buffer, &len, false);
alen = len;
if (nvram->blk) {
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 1a6a8fac22..d5ea962249 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -909,8 +909,10 @@ static void dcr_write_dma(void *opaque, int dcrn, uint32_t val)
sidx = didx = 0;
width = 1 << ((val & DMA0_CR_PW) >> 25);
- rptr = cpu_physical_memory_map(dma->ch[chnl].sa, &rlen, 0);
- wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen, 1);
+ rptr = cpu_physical_memory_map(dma->ch[chnl].sa, &rlen,
+ false);
+ wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen,
+ true);
if (rptr && wptr) {
if (!(val & DMA0_CR_DEC) &&
val & DMA0_CR_SAI && val & DMA0_CR_DAI) {
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index b8bb66b5c0..caf55ab044 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -832,7 +832,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr,
if (!is_ram_address(spapr, dst) || (dst & ~TARGET_PAGE_MASK) != 0) {
return H_PARAMETER;
}
- pdst = cpu_physical_memory_map(dst, &len, 1);
+ pdst = cpu_physical_memory_map(dst, &len, true);
if (!pdst || len != TARGET_PAGE_SIZE) {
return H_PARAMETER;
}
@@ -843,7 +843,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr,
ret = H_PARAMETER;
goto unmap_out;
}
- psrc = cpu_physical_memory_map(src, &len, 0);
+ psrc = cpu_physical_memory_map(src, &len, false);
if (!psrc || len != TARGET_PAGE_SIZE) {
ret = H_PARAMETER;
goto unmap_out;
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index 7773499d7f..0817874b48 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -626,7 +626,7 @@ static void s390_ipl_prepare_qipl(S390CPU *cpu)
uint8_t *addr;
uint64_t len = 4096;
- addr = cpu_physical_memory_map(cpu->env.psa, &len, 1);
+ addr = cpu_physical_memory_map(cpu->env.psa, &len, true);
if (!addr || len < QIPL_ADDRESS + sizeof(QemuIplParameters)) {
error_report("Cannot set QEMU IPL parameters");
return;
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 7c6a2b3c63..ed8be124da 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -641,7 +641,7 @@ static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set)
hwaddr len = 1;
uint8_t *ind_addr;
- ind_addr = cpu_physical_memory_map(ind_loc, &len, 1);
+ ind_addr = cpu_physical_memory_map(ind_loc, &len, true);
if (!ind_addr) {
s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0);
return -1;
diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c
index 13f57e7b67..50cf95b781 100644
--- a/hw/s390x/virtio-ccw.c
+++ b/hw/s390x/virtio-ccw.c
@@ -790,7 +790,7 @@ static uint8_t virtio_set_ind_atomic(SubchDev *sch, uint64_t ind_loc,
hwaddr len = 1;
uint8_t *ind_addr;
- ind_addr = cpu_physical_memory_map(ind_loc, &len, 1);
+ ind_addr = cpu_physical_memory_map(ind_loc, &len, true);
if (!ind_addr) {
error_report("%s(%x.%x.%04x): unable to access indicator",
__func__, sch->cssid, sch->ssid, sch->schid);
diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c
index b69732729b..b11e4e0546 100644
--- a/hw/xen/xen_pt_graphics.c
+++ b/hw/xen/xen_pt_graphics.c
@@ -222,7 +222,7 @@ void xen_pt_setup_vga(XenPCIPassthroughState *s, XenHostPCIDevice *dev,
}
/* Currently we fixed this address as a primary for legacy BIOS. */
- cpu_physical_memory_rw(0xc0000, bios, bios_size, 1);
+ cpu_physical_memory_rw(0xc0000, bios, bios_size, true);
}
uint32_t igd_read_opregion(XenPCIPassthroughState *s)
diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c
index a9cc51e6ce..38936d7af6 100644
--- a/target/i386/hax-all.c
+++ b/target/i386/hax-all.c
@@ -376,8 +376,8 @@ static int hax_handle_fastmmio(CPUArchState *env, struct hax_fastmmio *hft)
* hft->direction == 2: gpa ==> gpa2
*/
uint64_t value;
- cpu_physical_memory_rw(hft->gpa, &value, hft->size, 0);
- cpu_physical_memory_rw(hft->gpa2, &value, hft->size, 1);
+ cpu_physical_memory_rw(hft->gpa, &value, hft->size, false);
+ cpu_physical_memory_rw(hft->gpa2, &value, hft->size, true);
}
return 0;
diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c
index 1e9d6f20c1..3b58d10df3 100644
--- a/target/s390x/excp_helper.c
+++ b/target/s390x/excp_helper.c
@@ -393,7 +393,7 @@ static int mchk_store_vregs(CPUS390XState *env, uint64_t mcesao)
MchkExtSaveArea *sa;
int i;
- sa = cpu_physical_memory_map(mcesao, &len, 1);
+ sa = cpu_physical_memory_map(mcesao, &len, true);
if (!sa) {
return -EFAULT;
}
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index a3a49164e4..b810ad431e 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -151,7 +151,7 @@ LowCore *cpu_map_lowcore(CPUS390XState *env)
LowCore *lowcore;
hwaddr len = sizeof(LowCore);
- lowcore = cpu_physical_memory_map(env->psa, &len, 1);
+ lowcore = cpu_physical_memory_map(env->psa, &len, true);
if (len < sizeof(LowCore)) {
cpu_abort(env_cpu(env), "Could not map lowcore\n");
@@ -246,7 +246,7 @@ int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch)
hwaddr len = sizeof(*sa);
int i;
- sa = cpu_physical_memory_map(addr, &len, 1);
+ sa = cpu_physical_memory_map(addr, &len, true);
if (!sa) {
return -EFAULT;
}
@@ -298,7 +298,7 @@ int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len)
hwaddr save = len;
int i;
- sa = cpu_physical_memory_map(addr, &save, 1);
+ sa = cpu_physical_memory_map(addr, &save, true);
if (!sa) {
return -EFAULT;
}
--
2.21.1
^ permalink raw reply related
* [Xen-devel] [PATCH v3 11/20] hw/ide/internal: Remove unused DMARestartFunc typedef
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Marcel Apfelbaum,
Anthony Perard, xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
The IDE DMA restart callback has been removed in commit fe09c7c9f0.
Fixes: fe09c7c9f0
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/ide/internal.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h
index 52ec197da0..ce766ac485 100644
--- a/include/hw/ide/internal.h
+++ b/include/hw/ide/internal.h
@@ -326,7 +326,6 @@ typedef int DMAIntFunc(IDEDMA *, int);
typedef int32_t DMAInt32Func(IDEDMA *, int32_t len);
typedef void DMAu32Func(IDEDMA *, uint32_t);
typedef void DMAStopFunc(IDEDMA *, bool);
-typedef void DMARestartFunc(void *, int, RunState);
struct unreported_events {
bool eject_request;
--
2.21.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related
* [PATCH v3 17/20] Avoid address_space_rw() with a constant is_write argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Edgar E. Iglesias, Anthony Perard, Fam Zheng,
Hervé Poussineau, Philippe Mathieu-Daudé, kvm,
Laurent Vivier, Thomas Huth, Stefan Weil, Eric Auger, Halil Pasic,
Marcel Apfelbaum, qemu-s390x, Aleksandar Rikalo, David Gibson,
Michael Walle, qemu-ppc, Gerd Hoffmann, Cornelia Huck, qemu-arm,
Alistair Francis, qemu-block, Cédric Le Goater, Jason Wang,
xen-devel, Christian Borntraeger, Dmitry Fleytman, Matthew Rosato,
Eduardo Habkost, Richard Henderson, Michael S. Tsirkin,
David Hildenbrand, Paolo Bonzini, Stefano Stabellini,
Igor Mitsyanko, Paul Durrant, Richard Henderson, John Snow,
Edgar E . Iglesias, Alistair Francis
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
From: Peter Maydell <peter.maydell@linaro.org>
The address_space_rw() function allows either reads or writes
depending on the is_write argument passed to it; this is useful
when the direction of the access is determined programmatically
(as for instance when handling the KVM_EXIT_MMIO exit reason).
Under the hood it just calls either address_space_write() or
address_space_read_full().
We also use it a lot with a constant is_write argument, though,
which has two issues:
* when reading "address_space_rw(..., 1)" this is less
immediately clear to the reader as being a write than
"address_space_write(...)"
* calling address_space_rw() bypasses the optimization
in address_space_read() that fast-paths reads of a
fixed length
This commit was produced with the included Coccinelle script
scripts/coccinelle/exec_rw_const.cocci.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20200218112457.22712-1-peter.maydell@linaro.org>
[PMD: Update macvm_set_cr0() reported by Laurent Vivier]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
scripts/coccinelle/exec_rw_const.cocci | 13 +++++
target/i386/hvf/vmx.h | 7 ++-
accel/kvm/kvm-all.c | 6 +--
dma-helpers.c | 4 +-
exec.c | 4 +-
hw/dma/xlnx-zdma.c | 11 ++--
hw/net/dp8393x.c | 70 ++++++++++++++------------
hw/net/i82596.c | 22 ++++----
hw/net/lasi_i82596.c | 5 +-
hw/ppc/pnv_lpc.c | 8 +--
hw/s390x/css.c | 12 ++---
qtest.c | 52 +++++++++----------
target/i386/hvf/x86_mmu.c | 12 ++---
13 files changed, 119 insertions(+), 107 deletions(-)
diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci
index 98cb06f09f..ee98ce988e 100644
--- a/scripts/coccinelle/exec_rw_const.cocci
+++ b/scripts/coccinelle/exec_rw_const.cocci
@@ -27,6 +27,19 @@ expression E1, E2, E3, E4;
+ address_space_write(E1, E2, E3, V, E4)
)
+// Avoid uses of address_space_rw() with a constant is_write argument.
+@@
+expression E1, E2, E3, E4, E5;
+symbol true, false;
+@@
+(
+- address_space_rw(E1, E2, E3, E4, E5, false)
++ address_space_read(E1, E2, E3, E4, E5)
+|
+- address_space_rw(E1, E2, E3, E4, E5, true)
++ address_space_write(E1, E2, E3, E4, E5)
+)
+
// Remove useless cast
@@
expression E1, E2, E3, E4, E5, E6;
diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index 19af029133..03d2c79b9c 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -125,10 +125,9 @@ static inline void macvm_set_cr0(hv_vcpuid_t vcpu, uint64_t cr0)
if ((cr0 & CR0_PG) && (rvmcs(vcpu, VMCS_GUEST_CR4) & CR4_PAE) &&
!(efer & MSR_EFER_LME)) {
- address_space_rw(&address_space_memory,
- rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f,
- MEMTXATTRS_UNSPECIFIED,
- pdpte, 32, false);
+ address_space_read(&address_space_memory,
+ rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f,
+ MEMTXATTRS_UNSPECIFIED, pdpte, 32);
/* Only set PDPTE when appropriate. */
for (i = 0; i < 4; i++) {
wvmcs(vcpu, VMCS_GUEST_PDPTE0 + i * 2, pdpte[i]);
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index c111312dfd..0cfe6fd8de 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -2178,9 +2178,9 @@ void kvm_flush_coalesced_mmio_buffer(void)
ent = &ring->coalesced_mmio[ring->first];
if (ent->pio == 1) {
- address_space_rw(&address_space_io, ent->phys_addr,
- MEMTXATTRS_UNSPECIFIED, ent->data,
- ent->len, true);
+ address_space_write(&address_space_io, ent->phys_addr,
+ MEMTXATTRS_UNSPECIFIED, ent->data,
+ ent->len);
} else {
cpu_physical_memory_write(ent->phys_addr, ent->data, ent->len);
}
diff --git a/dma-helpers.c b/dma-helpers.c
index d3871dc61e..e8a26e81e1 100644
--- a/dma-helpers.c
+++ b/dma-helpers.c
@@ -28,8 +28,8 @@ int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
memset(fillbuf, c, FILLBUF_SIZE);
while (len > 0) {
l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
- error |= address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
- fillbuf, l, true);
+ error |= address_space_write(as, addr, MEMTXATTRS_UNSPECIFIED,
+ fillbuf, l);
len -= l;
addr += l;
}
diff --git a/exec.c b/exec.c
index 73c3bcfa40..b79919a4f7 100644
--- a/exec.c
+++ b/exec.c
@@ -3815,8 +3815,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr,
attrs, buf, l);
} else {
- address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf,
- l, false);
+ address_space_read(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf,
+ l);
}
len -= l;
buf += l;
diff --git a/hw/dma/xlnx-zdma.c b/hw/dma/xlnx-zdma.c
index 683abbe53f..1c1b142293 100644
--- a/hw/dma/xlnx-zdma.c
+++ b/hw/dma/xlnx-zdma.c
@@ -311,8 +311,7 @@ static bool zdma_load_descriptor(XlnxZDMA *s, uint64_t addr, void *buf)
return false;
}
- address_space_rw(s->dma_as, addr, s->attr,
- buf, sizeof(XlnxZDMADescr), false);
+ address_space_read(s->dma_as, addr, s->attr, buf, sizeof(XlnxZDMADescr));
return true;
}
@@ -364,7 +363,7 @@ static uint64_t zdma_update_descr_addr(XlnxZDMA *s, bool type,
} else {
addr = zdma_get_regaddr64(s, basereg);
addr += sizeof(s->dsc_dst);
- address_space_rw(s->dma_as, addr, s->attr, &next, 8, false);
+ address_space_read(s->dma_as, addr, s->attr, &next, 8);
zdma_put_regaddr64(s, basereg, next);
}
return next;
@@ -416,8 +415,7 @@ static void zdma_write_dst(XlnxZDMA *s, uint8_t *buf, uint32_t len)
}
}
- address_space_rw(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen,
- true);
+ address_space_write(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen);
if (burst_type == AXI_BURST_INCR) {
s->dsc_dst.addr += dlen;
}
@@ -493,8 +491,7 @@ static void zdma_process_descr(XlnxZDMA *s)
len = s->cfg.bus_width / 8;
}
} else {
- address_space_rw(s->dma_as, src_addr, s->attr, s->buf, len,
- false);
+ address_space_read(s->dma_as, src_addr, s->attr, s->buf, len);
if (burst_type == AXI_BURST_INCR) {
src_addr += len;
}
diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index b4363e3186..70451934ae 100644
--- a/hw/net/dp8393x.c
+++ b/hw/net/dp8393x.c
@@ -275,8 +275,8 @@ static void dp8393x_do_load_cam(dp8393xState *s)
while (s->regs[SONIC_CDC] & 0x1f) {
/* Fill current entry */
- address_space_rw(&s->as, dp8393x_cdp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as, dp8393x_cdp(s),
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff;
s->cam[index][1] = dp8393x_get(s, width, 1) >> 8;
s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff;
@@ -293,8 +293,8 @@ static void dp8393x_do_load_cam(dp8393xState *s)
}
/* Read CAM enable */
- address_space_rw(&s->as, dp8393x_cdp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as, dp8393x_cdp(s),
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
s->regs[SONIC_CE] = dp8393x_get(s, width, 0);
DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]);
@@ -311,8 +311,8 @@ static void dp8393x_do_read_rra(dp8393xState *s)
/* Read memory */
width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
size = sizeof(uint16_t) * 4 * width;
- address_space_rw(&s->as, dp8393x_rrp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as, dp8393x_rrp(s),
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
/* Update SONIC registers */
s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0);
@@ -426,8 +426,8 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
size = sizeof(uint16_t) * 6 * width;
s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA];
DPRINTF("Transmit packet at %08x\n", dp8393x_ttda(s));
- address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width,
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
tx_len = 0;
/* Update registers */
@@ -451,18 +451,19 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
if (tx_len + len > sizeof(s->tx_buffer)) {
len = sizeof(s->tx_buffer) - tx_len;
}
- address_space_rw(&s->as, dp8393x_tsa(s),
- MEMTXATTRS_UNSPECIFIED,
- &s->tx_buffer[tx_len], len, false);
+ address_space_read(&s->as, dp8393x_tsa(s), MEMTXATTRS_UNSPECIFIED,
+ &s->tx_buffer[tx_len], len);
tx_len += len;
i++;
if (i != s->regs[SONIC_TFC]) {
/* Read next fragment details */
size = sizeof(uint16_t) * 3 * width;
- address_space_rw(&s->as,
- dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as,
+ dp8393x_ttda(s)
+ + sizeof(uint16_t) * width * (4 + 3 * i),
+ MEMTXATTRS_UNSPECIFIED, s->data,
+ size);
s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0);
s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1);
s->regs[SONIC_TFS] = dp8393x_get(s, width, 2);
@@ -495,18 +496,18 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
dp8393x_put(s, width, 0,
s->regs[SONIC_TCR] & 0x0fff); /* status */
size = sizeof(uint16_t) * width;
- address_space_rw(&s->as,
- dp8393x_ttda(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, true);
+ address_space_write(&s->as, dp8393x_ttda(s),
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) {
/* Read footer of packet */
size = sizeof(uint16_t) * width;
- address_space_rw(&s->as,
- dp8393x_ttda(s) +
- sizeof(uint16_t) *
- (4 + 3 * s->regs[SONIC_TFC]) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as,
+ dp8393x_ttda(s)
+ + sizeof(uint16_t) * width
+ * (4 + 3 * s->regs[SONIC_TFC]),
+ MEMTXATTRS_UNSPECIFIED, s->data,
+ size);
s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0) & ~0x1;
if (dp8393x_get(s, width, 0) & 0x1) {
/* EOL detected */
@@ -768,8 +769,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
/* Are we still in resource exhaustion? */
size = sizeof(uint16_t) * 1 * width;
address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width;
- address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED,
- s->data, size, false);
+ address_space_read(&s->as, address, MEMTXATTRS_UNSPECIFIED,
+ s->data, size);
if (dp8393x_get(s, width, 0) & 0x1) {
/* Still EOL ; stop reception */
return -1;
@@ -788,10 +789,11 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
/* Put packet into RBA */
DPRINTF("Receive packet at %08x\n", dp8393x_crba(s));
address = dp8393x_crba(s);
- address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, buf, rx_len);
+ address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED,
+ buf, rx_len);
address += rx_len;
- address_space_rw(&s->as, address,
- MEMTXATTRS_UNSPECIFIED, &checksum, 4, true);
+ address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED,
+ &checksum, 4);
rx_len += 4;
s->regs[SONIC_CRBA1] = address >> 16;
s->regs[SONIC_CRBA0] = address & 0xffff;
@@ -819,13 +821,15 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
dp8393x_put(s, width, 3, s->regs[SONIC_TRBA1]); /* pkt_ptr1 */
dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */
size = sizeof(uint16_t) * 5 * width;
- address_space_rw(&s->as, dp8393x_crda(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, true);
+ address_space_write(&s->as, dp8393x_crda(s),
+ MEMTXATTRS_UNSPECIFIED,
+ s->data, size);
/* Move to next descriptor */
size = sizeof(uint16_t) * width;
- address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 5 * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, false);
+ address_space_read(&s->as,
+ dp8393x_crda(s) + sizeof(uint16_t) * 5 * width,
+ MEMTXATTRS_UNSPECIFIED, s->data, size);
s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0);
if (s->regs[SONIC_LLFA] & 0x1) {
/* EOL detected */
@@ -838,8 +842,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
offset += sizeof(uint16_t);
}
s->data[0] = 0;
- address_space_rw(&s->as, offset, MEMTXATTRS_UNSPECIFIED,
- s->data, sizeof(uint16_t), true);
+ address_space_write(&s->as, offset, MEMTXATTRS_UNSPECIFIED,
+ s->data, sizeof(uint16_t));
s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA];
s->regs[SONIC_ISR] |= SONIC_ISR_PKTRX;
s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) | (((s->regs[SONIC_RSC] & 0x00ff) + 1) & 0x00ff);
diff --git a/hw/net/i82596.c b/hw/net/i82596.c
index 11537f72d1..fe9f2390a9 100644
--- a/hw/net/i82596.c
+++ b/hw/net/i82596.c
@@ -148,8 +148,8 @@ static void i82596_transmit(I82596State *s, uint32_t addr)
if (s->nic && len) {
assert(len <= sizeof(s->tx_buffer));
- address_space_rw(&address_space_memory, tba,
- MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, false);
+ address_space_read(&address_space_memory, tba,
+ MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len);
DBG(PRINT_PKTHDR("Send", &s->tx_buffer));
DBG(printf("Sending %d bytes\n", len));
qemu_send_packet(qemu_get_queue(s->nic), s->tx_buffer, len);
@@ -172,8 +172,8 @@ static void set_individual_address(I82596State *s, uint32_t addr)
nc = qemu_get_queue(s->nic);
m = s->conf.macaddr.a;
- address_space_rw(&address_space_memory, addr + 8,
- MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, false);
+ address_space_read(&address_space_memory, addr + 8,
+ MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN);
qemu_format_nic_info_str(nc, m);
trace_i82596_new_mac(nc->info_str);
}
@@ -190,9 +190,8 @@ static void set_multicast_list(I82596State *s, uint32_t addr)
}
for (i = 0; i < mc_count; i++) {
uint8_t multicast_addr[ETH_ALEN];
- address_space_rw(&address_space_memory,
- addr + i * ETH_ALEN, MEMTXATTRS_UNSPECIFIED,
- multicast_addr, ETH_ALEN, false);
+ address_space_read(&address_space_memory, addr + i * ETH_ALEN,
+ MEMTXATTRS_UNSPECIFIED, multicast_addr, ETH_ALEN);
DBG(printf("Add multicast entry " MAC_FMT "\n",
MAC_ARG(multicast_addr)));
unsigned mcast_idx = (net_crc32(multicast_addr, ETH_ALEN) &
@@ -260,9 +259,8 @@ static void command_loop(I82596State *s)
byte_cnt = MAX(byte_cnt, 4);
byte_cnt = MIN(byte_cnt, sizeof(s->config));
/* copy byte_cnt max. */
- address_space_rw(&address_space_memory, s->cmd_p + 8,
- MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt,
- false);
+ address_space_read(&address_space_memory, s->cmd_p + 8,
+ MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt);
/* config byte according to page 35ff */
s->config[2] &= 0x82; /* mask valid bits */
s->config[2] |= 0x40;
@@ -647,8 +645,8 @@ ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t sz)
buf += num;
len -= num;
if (len == 0) { /* copy crc */
- address_space_rw(&address_space_memory, rba - 4,
- MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, true);
+ address_space_write(&address_space_memory, rba - 4,
+ MEMTXATTRS_UNSPECIFIED, crc_ptr, 4);
}
num |= 0x4000; /* set F BIT */
diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c
index 8bff419378..52637a562d 100644
--- a/hw/net/lasi_i82596.c
+++ b/hw/net/lasi_i82596.c
@@ -55,8 +55,9 @@ static void lasi_82596_mem_write(void *opaque, hwaddr addr,
* Provided for SeaBIOS only. Write MAC of Network card to addr @val.
* Needed for the PDC_LAN_STATION_ID_READ PDC call.
*/
- address_space_rw(&address_space_memory, val, MEMTXATTRS_UNSPECIFIED,
- d->state.conf.macaddr.a, ETH_ALEN, true);
+ address_space_write(&address_space_memory, val,
+ MEMTXATTRS_UNSPECIFIED, d->state.conf.macaddr.a,
+ ETH_ALEN);
break;
}
}
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
index 5989d723c5..f150deca34 100644
--- a/hw/ppc/pnv_lpc.c
+++ b/hw/ppc/pnv_lpc.c
@@ -238,16 +238,16 @@ static bool opb_read(PnvLpcController *lpc, uint32_t addr, uint8_t *data,
int sz)
{
/* XXX Handle access size limits and FW read caching here */
- return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED,
- data, sz, false);
+ return !address_space_read(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED,
+ data, sz);
}
static bool opb_write(PnvLpcController *lpc, uint32_t addr, uint8_t *data,
int sz)
{
/* XXX Handle access size limits here */
- return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED,
- data, sz, true);
+ return !address_space_write(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED,
+ data, sz);
}
#define ECCB_CTL_READ PPC_BIT(15)
diff --git a/hw/s390x/css.c b/hw/s390x/css.c
index f27f8c45a5..5d8e08667e 100644
--- a/hw/s390x/css.c
+++ b/hw/s390x/css.c
@@ -874,18 +874,18 @@ static inline int ida_read_next_idaw(CcwDataStream *cds)
if (idaw_addr & 0x07 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {
return -EINVAL; /* channel program check */
}
- ret = address_space_rw(&address_space_memory, idaw_addr,
- MEMTXATTRS_UNSPECIFIED, &idaw.fmt2,
- sizeof(idaw.fmt2), false);
+ ret = address_space_read(&address_space_memory, idaw_addr,
+ MEMTXATTRS_UNSPECIFIED, &idaw.fmt2,
+ sizeof(idaw.fmt2));
cds->cda = be64_to_cpu(idaw.fmt2);
} else {
idaw_addr = cds->cda_orig + sizeof(idaw.fmt1) * cds->at_idaw;
if (idaw_addr & 0x03 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {
return -EINVAL; /* channel program check */
}
- ret = address_space_rw(&address_space_memory, idaw_addr,
- MEMTXATTRS_UNSPECIFIED, &idaw.fmt1,
- sizeof(idaw.fmt1), false);
+ ret = address_space_read(&address_space_memory, idaw_addr,
+ MEMTXATTRS_UNSPECIFIED, &idaw.fmt1,
+ sizeof(idaw.fmt1));
cds->cda = be64_to_cpu(idaw.fmt1);
if (cds->cda & 0x80000000) {
return -EINVAL; /* channel program check */
diff --git a/qtest.c b/qtest.c
index 65e33b80e3..dcb57498ad 100644
--- a/qtest.c
+++ b/qtest.c
@@ -429,23 +429,23 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
if (words[0][5] == 'b') {
uint8_t data = value;
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 1, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 1);
} else if (words[0][5] == 'w') {
uint16_t data = value;
tswap16s(&data);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 2, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 2);
} else if (words[0][5] == 'l') {
uint32_t data = value;
tswap32s(&data);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 4, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 4);
} else if (words[0][5] == 'q') {
uint64_t data = value;
tswap64s(&data);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 8, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 8);
}
qtest_send_prefix(chr);
qtest_send(chr, "OK\n");
@@ -463,22 +463,22 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
if (words[0][4] == 'b') {
uint8_t data;
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 1, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 1);
value = data;
} else if (words[0][4] == 'w') {
uint16_t data;
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 2, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 2);
value = tswap16(data);
} else if (words[0][4] == 'l') {
uint32_t data;
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &data, 4, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &data, 4);
value = tswap32(data);
} else if (words[0][4] == 'q') {
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- &value, 8, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ &value, 8);
tswap64s(&value);
}
qtest_send_prefix(chr);
@@ -498,8 +498,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
g_assert(len);
data = g_malloc(len);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- data, len, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+ len);
enc = g_malloc(2 * len + 1);
for (i = 0; i < len; i++) {
@@ -524,8 +524,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
g_assert(ret == 0);
data = g_malloc(len);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- data, len, false);
+ address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+ len);
b64_data = g_base64_encode(data, len);
qtest_send_prefix(chr);
qtest_sendf(chr, "OK %s\n", b64_data);
@@ -559,8 +559,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
data[i] = 0;
}
}
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- data, len, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+ len);
g_free(data);
qtest_send_prefix(chr);
@@ -582,8 +582,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
if (len) {
data = g_malloc(len);
memset(data, pattern, len);
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- data, len, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+ data, len);
g_free(data);
}
@@ -616,8 +616,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
out_len = MIN(out_len, len);
}
- address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
- data, len, true);
+ address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+ len);
qtest_send_prefix(chr);
qtest_send(chr, "OK\n");
diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c
index 451dcc983a..65d4603dbf 100644
--- a/target/i386/hvf/x86_mmu.c
+++ b/target/i386/hvf/x86_mmu.c
@@ -88,8 +88,8 @@ static bool get_pt_entry(struct CPUState *cpu, struct gpt_translation *pt,
}
index = gpt_entry(pt->gva, level, pae);
- address_space_rw(&address_space_memory, gpa + index * pte_size(pae),
- MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), false);
+ address_space_read(&address_space_memory, gpa + index * pte_size(pae),
+ MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae));
pt->pte[level - 1] = pte;
@@ -238,8 +238,8 @@ void vmx_write_mem(struct CPUState *cpu, target_ulong gva, void *data, int bytes
if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
} else {
- address_space_rw(&address_space_memory, gpa,
- MEMTXATTRS_UNSPECIFIED, data, copy, true);
+ address_space_write(&address_space_memory, gpa,
+ MEMTXATTRS_UNSPECIFIED, data, copy);
}
bytes -= copy;
@@ -259,8 +259,8 @@ void vmx_read_mem(struct CPUState *cpu, void *data, target_ulong gva, int bytes)
if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
}
- address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
- data, copy, false);
+ address_space_read(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
+ data, copy);
bytes -= copy;
gva += copy;
--
2.21.1
^ permalink raw reply related
* [PATCH v3 18/20] exec: Let cpu_[physical]_memory API use a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Edgar E. Iglesias, Anthony Perard, Fam Zheng,
Hervé Poussineau, Philippe Mathieu-Daudé, kvm,
Laurent Vivier, Thomas Huth, Stefan Weil, Eric Auger, Halil Pasic,
Marcel Apfelbaum, qemu-s390x, Aleksandar Rikalo, David Gibson,
Michael Walle, qemu-ppc, Gerd Hoffmann, Cornelia Huck, qemu-arm,
Alistair Francis, qemu-block, Cédric Le Goater, Jason Wang,
xen-devel, Christian Borntraeger, Dmitry Fleytman, Matthew Rosato,
Eduardo Habkost, Richard Henderson, Michael S. Tsirkin,
David Hildenbrand, Paolo Bonzini, Stefano Stabellini,
Igor Mitsyanko, Paul Durrant, Richard Henderson, John Snow
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
The 'is_write' argument is either 0 or 1.
Convert it to a boolean type.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/exec/cpu-all.h | 2 +-
include/exec/cpu-common.h | 6 +++---
exec.c | 10 +++++-----
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 49e96caa3f..49384bb66a 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -388,7 +388,7 @@ void dump_opcount_info(void);
#endif /* !CONFIG_USER_ONLY */
int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
- void *ptr, target_ulong len, int is_write);
+ void *ptr, target_ulong len, bool is_write);
int cpu_exec(CPUState *cpu);
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 165f8fb621..6bfe201779 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -70,7 +70,7 @@ size_t qemu_ram_pagesize(RAMBlock *block);
size_t qemu_ram_pagesize_largest(void);
void cpu_physical_memory_rw(hwaddr addr, void *buf,
- hwaddr len, int is_write);
+ hwaddr len, bool is_write);
static inline void cpu_physical_memory_read(hwaddr addr,
void *buf, hwaddr len)
{
@@ -83,9 +83,9 @@ static inline void cpu_physical_memory_write(hwaddr addr,
}
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
- int is_write);
+ bool is_write);
void cpu_physical_memory_unmap(void *buffer, hwaddr len,
- int is_write, hwaddr access_len);
+ bool is_write, hwaddr access_len);
void cpu_register_map_client(QEMUBH *bh);
void cpu_unregister_map_client(QEMUBH *bh);
diff --git a/exec.c b/exec.c
index b79919a4f7..6c39b43155 100644
--- a/exec.c
+++ b/exec.c
@@ -3019,7 +3019,7 @@ MemoryRegion *get_system_io(void)
/* physical memory access (slow version, mainly for debug) */
#if defined(CONFIG_USER_ONLY)
int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
- void *ptr, target_ulong len, int is_write)
+ void *ptr, target_ulong len, bool is_write)
{
int flags;
target_ulong l, page;
@@ -3313,7 +3313,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
}
void cpu_physical_memory_rw(hwaddr addr, void *buf,
- hwaddr len, int is_write)
+ hwaddr len, bool is_write)
{
address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
buf, len, is_write);
@@ -3632,14 +3632,14 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
- int is_write)
+ bool is_write)
{
return address_space_map(&address_space_memory, addr, plen, is_write,
MEMTXATTRS_UNSPECIFIED);
}
void cpu_physical_memory_unmap(void *buffer, hwaddr len,
- int is_write, hwaddr access_len)
+ bool is_write, hwaddr access_len)
{
return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
}
@@ -3790,7 +3790,7 @@ address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
/* virtual memory access for debug (includes writing to ROM) */
int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
- void *ptr, target_ulong len, int is_write)
+ void *ptr, target_ulong len, bool is_write)
{
hwaddr phys_addr;
target_ulong l, page;
--
2.21.1
^ permalink raw reply related
* [Xen-devel] [PATCH v3 15/20] exec: Let address_space_unmap() use a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Marcel Apfelbaum,
Anthony Perard, xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
The 'is_write' argument is either 0 or 1.
Convert it to a boolean type.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/exec/memory.h | 2 +-
exec.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index afee185eae..1614d9a02c 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -2329,7 +2329,7 @@ void *address_space_map(AddressSpace *as, hwaddr addr,
* @is_write: indicates the transfer direction
*/
void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
- int is_write, hwaddr access_len);
+ bool is_write, hwaddr access_len);
/* Internal functions, part of the implementation of address_space_read. */
diff --git a/exec.c b/exec.c
index 01437be691..16974d4f4b 100644
--- a/exec.c
+++ b/exec.c
@@ -3598,11 +3598,11 @@ void *address_space_map(AddressSpace *as,
}
/* Unmaps a memory region previously mapped by address_space_map().
- * Will also mark the memory as dirty if is_write == 1. access_len gives
+ * Will also mark the memory as dirty if is_write is true. access_len gives
* the amount of memory that was actually read or written by the caller.
*/
void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
- int is_write, hwaddr access_len)
+ bool is_write, hwaddr access_len)
{
if (buffer != bounce.buffer) {
MemoryRegion *mr;
--
2.21.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related
* [Xen-devel] [PATCH v3 14/20] hw/virtio: Let vhost_memory_map() use a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Marcel Apfelbaum,
Anthony Perard, xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
The 'is_write' argument is either 0 or 1.
Convert it to a boolean type.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/virtio/vhost.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c
index 9edfadc81d..0d226dae10 100644
--- a/hw/virtio/vhost.c
+++ b/hw/virtio/vhost.c
@@ -294,7 +294,7 @@ static int vhost_dev_has_iommu(struct vhost_dev *dev)
}
static void *vhost_memory_map(struct vhost_dev *dev, hwaddr addr,
- hwaddr *plen, int is_write)
+ hwaddr *plen, bool is_write)
{
if (!vhost_dev_has_iommu(dev)) {
return cpu_physical_memory_map(addr, plen, is_write);
@@ -1012,21 +1012,21 @@ static int vhost_virtqueue_start(struct vhost_dev *dev,
vq->desc_size = s = l = virtio_queue_get_desc_size(vdev, idx);
vq->desc_phys = a;
- vq->desc = vhost_memory_map(dev, a, &l, 0);
+ vq->desc = vhost_memory_map(dev, a, &l, false);
if (!vq->desc || l != s) {
r = -ENOMEM;
goto fail_alloc_desc;
}
vq->avail_size = s = l = virtio_queue_get_avail_size(vdev, idx);
vq->avail_phys = a = virtio_queue_get_avail_addr(vdev, idx);
- vq->avail = vhost_memory_map(dev, a, &l, 0);
+ vq->avail = vhost_memory_map(dev, a, &l, false);
if (!vq->avail || l != s) {
r = -ENOMEM;
goto fail_alloc_avail;
}
vq->used_size = s = l = virtio_queue_get_used_size(vdev, idx);
vq->used_phys = a = virtio_queue_get_used_addr(vdev, idx);
- vq->used = vhost_memory_map(dev, a, &l, 1);
+ vq->used = vhost_memory_map(dev, a, &l, true);
if (!vq->used || l != s) {
r = -ENOMEM;
goto fail_alloc_used;
--
2.21.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related
* [PATCH v3 16/20] Let address_space_rw() calls pass a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Edgar E. Iglesias, Anthony Perard, Fam Zheng,
Hervé Poussineau, Philippe Mathieu-Daudé, kvm,
Laurent Vivier, Thomas Huth, Stefan Weil, Eric Auger, Halil Pasic,
Marcel Apfelbaum, qemu-s390x, Aleksandar Rikalo, David Gibson,
Michael Walle, qemu-ppc, Gerd Hoffmann, Cornelia Huck, qemu-arm,
Alistair Francis, qemu-block, Cédric Le Goater, Jason Wang,
xen-devel, Christian Borntraeger, Dmitry Fleytman, Matthew Rosato,
Eduardo Habkost, Richard Henderson, Michael S. Tsirkin,
David Hildenbrand, Paolo Bonzini, Stefano Stabellini,
Igor Mitsyanko, Paul Durrant, Richard Henderson, John Snow
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
Since its introduction in commit ac1970fbe8, address_space_rw()
takes a boolean 'is_write' argument. Fix the codebase by using
an explicit boolean type.
This commit was produced with the included Coccinelle script
scripts/coccinelle/exec_rw_const.
Inspired-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
scripts/coccinelle/exec_rw_const.cocci | 12 ++++++++++++
target/i386/hvf/vmx.h | 2 +-
exec.c | 4 ++--
hw/net/dp8393x.c | 27 +++++++++++++-------------
hw/net/i82596.c | 11 ++++++-----
hw/net/lasi_i82596.c | 4 ++--
target/i386/hvf/x86_mmu.c | 8 ++++----
7 files changed, 41 insertions(+), 27 deletions(-)
diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci
index 70cf52d58e..98cb06f09f 100644
--- a/scripts/coccinelle/exec_rw_const.cocci
+++ b/scripts/coccinelle/exec_rw_const.cocci
@@ -1,6 +1,18 @@
// Usage:
// spatch --sp-file scripts/coccinelle/exec_rw_const.cocci --dir . --in-place
+// Convert to boolean
+@@
+expression E1, E2, E3, E4, E5;
+@@
+(
+- address_space_rw(E1, E2, E3, E4, E5, 0)
++ address_space_rw(E1, E2, E3, E4, E5, false)
+|
+- address_space_rw(E1, E2, E3, E4, E5, 1)
++ address_space_rw(E1, E2, E3, E4, E5, true)
+)
+
// Use address_space_write instead of casting to non-const
@@
type T;
diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index a115ca1782..19af029133 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -128,7 +128,7 @@ static inline void macvm_set_cr0(hv_vcpuid_t vcpu, uint64_t cr0)
address_space_rw(&address_space_memory,
rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f,
MEMTXATTRS_UNSPECIFIED,
- pdpte, 32, 0);
+ pdpte, 32, false);
/* Only set PDPTE when appropriate. */
for (i = 0; i < 4; i++) {
wvmcs(vcpu, VMCS_GUEST_PDPTE0 + i * 2, pdpte[i]);
diff --git a/exec.c b/exec.c
index 16974d4f4b..73c3bcfa40 100644
--- a/exec.c
+++ b/exec.c
@@ -3815,8 +3815,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr,
attrs, buf, l);
} else {
- address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
- attrs, buf, l, 0);
+ address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf,
+ l, false);
}
len -= l;
buf += l;
diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index b461101ceb..b4363e3186 100644
--- a/hw/net/dp8393x.c
+++ b/hw/net/dp8393x.c
@@ -276,7 +276,7 @@ static void dp8393x_do_load_cam(dp8393xState *s)
while (s->regs[SONIC_CDC] & 0x1f) {
/* Fill current entry */
address_space_rw(&s->as, dp8393x_cdp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff;
s->cam[index][1] = dp8393x_get(s, width, 1) >> 8;
s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff;
@@ -294,7 +294,7 @@ static void dp8393x_do_load_cam(dp8393xState *s)
/* Read CAM enable */
address_space_rw(&s->as, dp8393x_cdp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
s->regs[SONIC_CE] = dp8393x_get(s, width, 0);
DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]);
@@ -312,7 +312,7 @@ static void dp8393x_do_read_rra(dp8393xState *s)
width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
size = sizeof(uint16_t) * 4 * width;
address_space_rw(&s->as, dp8393x_rrp(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
/* Update SONIC registers */
s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0);
@@ -427,7 +427,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA];
DPRINTF("Transmit packet at %08x\n", dp8393x_ttda(s));
address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
tx_len = 0;
/* Update registers */
@@ -452,7 +452,8 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
len = sizeof(s->tx_buffer) - tx_len;
}
address_space_rw(&s->as, dp8393x_tsa(s),
- MEMTXATTRS_UNSPECIFIED, &s->tx_buffer[tx_len], len, 0);
+ MEMTXATTRS_UNSPECIFIED,
+ &s->tx_buffer[tx_len], len, false);
tx_len += len;
i++;
@@ -461,7 +462,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
size = sizeof(uint16_t) * 3 * width;
address_space_rw(&s->as,
dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0);
s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1);
s->regs[SONIC_TFS] = dp8393x_get(s, width, 2);
@@ -496,7 +497,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
size = sizeof(uint16_t) * width;
address_space_rw(&s->as,
dp8393x_ttda(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, 1);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, true);
if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) {
/* Read footer of packet */
@@ -505,7 +506,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
dp8393x_ttda(s) +
sizeof(uint16_t) *
(4 + 3 * s->regs[SONIC_TFC]) * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0) & ~0x1;
if (dp8393x_get(s, width, 0) & 0x1) {
/* EOL detected */
@@ -768,7 +769,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
size = sizeof(uint16_t) * 1 * width;
address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width;
address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED,
- s->data, size, 0);
+ s->data, size, false);
if (dp8393x_get(s, width, 0) & 0x1) {
/* Still EOL ; stop reception */
return -1;
@@ -790,7 +791,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, buf, rx_len);
address += rx_len;
address_space_rw(&s->as, address,
- MEMTXATTRS_UNSPECIFIED, &checksum, 4, 1);
+ MEMTXATTRS_UNSPECIFIED, &checksum, 4, true);
rx_len += 4;
s->regs[SONIC_CRBA1] = address >> 16;
s->regs[SONIC_CRBA0] = address & 0xffff;
@@ -819,12 +820,12 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */
size = sizeof(uint16_t) * 5 * width;
address_space_rw(&s->as, dp8393x_crda(s),
- MEMTXATTRS_UNSPECIFIED, s->data, size, 1);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, true);
/* Move to next descriptor */
size = sizeof(uint16_t) * width;
address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 5 * width,
- MEMTXATTRS_UNSPECIFIED, s->data, size, 0);
+ MEMTXATTRS_UNSPECIFIED, s->data, size, false);
s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0);
if (s->regs[SONIC_LLFA] & 0x1) {
/* EOL detected */
@@ -838,7 +839,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
}
s->data[0] = 0;
address_space_rw(&s->as, offset, MEMTXATTRS_UNSPECIFIED,
- s->data, sizeof(uint16_t), 1);
+ s->data, sizeof(uint16_t), true);
s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA];
s->regs[SONIC_ISR] |= SONIC_ISR_PKTRX;
s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) | (((s->regs[SONIC_RSC] & 0x00ff) + 1) & 0x00ff);
diff --git a/hw/net/i82596.c b/hw/net/i82596.c
index a292984e06..11537f72d1 100644
--- a/hw/net/i82596.c
+++ b/hw/net/i82596.c
@@ -149,7 +149,7 @@ static void i82596_transmit(I82596State *s, uint32_t addr)
if (s->nic && len) {
assert(len <= sizeof(s->tx_buffer));
address_space_rw(&address_space_memory, tba,
- MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, 0);
+ MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, false);
DBG(PRINT_PKTHDR("Send", &s->tx_buffer));
DBG(printf("Sending %d bytes\n", len));
qemu_send_packet(qemu_get_queue(s->nic), s->tx_buffer, len);
@@ -173,7 +173,7 @@ static void set_individual_address(I82596State *s, uint32_t addr)
nc = qemu_get_queue(s->nic);
m = s->conf.macaddr.a;
address_space_rw(&address_space_memory, addr + 8,
- MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, 0);
+ MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, false);
qemu_format_nic_info_str(nc, m);
trace_i82596_new_mac(nc->info_str);
}
@@ -192,7 +192,7 @@ static void set_multicast_list(I82596State *s, uint32_t addr)
uint8_t multicast_addr[ETH_ALEN];
address_space_rw(&address_space_memory,
addr + i * ETH_ALEN, MEMTXATTRS_UNSPECIFIED,
- multicast_addr, ETH_ALEN, 0);
+ multicast_addr, ETH_ALEN, false);
DBG(printf("Add multicast entry " MAC_FMT "\n",
MAC_ARG(multicast_addr)));
unsigned mcast_idx = (net_crc32(multicast_addr, ETH_ALEN) &
@@ -261,7 +261,8 @@ static void command_loop(I82596State *s)
byte_cnt = MIN(byte_cnt, sizeof(s->config));
/* copy byte_cnt max. */
address_space_rw(&address_space_memory, s->cmd_p + 8,
- MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt, 0);
+ MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt,
+ false);
/* config byte according to page 35ff */
s->config[2] &= 0x82; /* mask valid bits */
s->config[2] |= 0x40;
@@ -647,7 +648,7 @@ ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t sz)
len -= num;
if (len == 0) { /* copy crc */
address_space_rw(&address_space_memory, rba - 4,
- MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, 1);
+ MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, true);
}
num |= 0x4000; /* set F BIT */
diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c
index 427b3fbf70..8bff419378 100644
--- a/hw/net/lasi_i82596.c
+++ b/hw/net/lasi_i82596.c
@@ -55,8 +55,8 @@ static void lasi_82596_mem_write(void *opaque, hwaddr addr,
* Provided for SeaBIOS only. Write MAC of Network card to addr @val.
* Needed for the PDC_LAN_STATION_ID_READ PDC call.
*/
- address_space_rw(&address_space_memory, val,
- MEMTXATTRS_UNSPECIFIED, d->state.conf.macaddr.a, ETH_ALEN, 1);
+ address_space_rw(&address_space_memory, val, MEMTXATTRS_UNSPECIFIED,
+ d->state.conf.macaddr.a, ETH_ALEN, true);
break;
}
}
diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c
index 6a620643c1..451dcc983a 100644
--- a/target/i386/hvf/x86_mmu.c
+++ b/target/i386/hvf/x86_mmu.c
@@ -89,7 +89,7 @@ static bool get_pt_entry(struct CPUState *cpu, struct gpt_translation *pt,
index = gpt_entry(pt->gva, level, pae);
address_space_rw(&address_space_memory, gpa + index * pte_size(pae),
- MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), 0);
+ MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), false);
pt->pte[level - 1] = pte;
@@ -238,8 +238,8 @@ void vmx_write_mem(struct CPUState *cpu, target_ulong gva, void *data, int bytes
if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
} else {
- address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
- data, copy, 1);
+ address_space_rw(&address_space_memory, gpa,
+ MEMTXATTRS_UNSPECIFIED, data, copy, true);
}
bytes -= copy;
@@ -260,7 +260,7 @@ void vmx_read_mem(struct CPUState *cpu, void *data, target_ulong gva, int bytes)
VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
}
address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
- data, copy, 0);
+ data, copy, false);
bytes -= copy;
gva += copy;
--
2.21.1
^ permalink raw reply related
* [Xen-devel] [PATCH v3 13/20] hw/virtio: Let virtqueue_map_iovec() use a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Marcel Apfelbaum,
Anthony Perard, xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
The 'is_write' argument is either 0 or 1.
Convert it to a boolean type.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/virtio/virtio.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index 2c5410e981..9d06dbe3ef 100644
--- a/hw/virtio/virtio.c
+++ b/hw/virtio/virtio.c
@@ -1293,7 +1293,7 @@ static void virtqueue_undo_map_desc(unsigned int out_num, unsigned int in_num,
static void virtqueue_map_iovec(VirtIODevice *vdev, struct iovec *sg,
hwaddr *addr, unsigned int num_sg,
- int is_write)
+ bool is_write)
{
unsigned int i;
hwaddr len;
@@ -1317,8 +1317,9 @@ static void virtqueue_map_iovec(VirtIODevice *vdev, struct iovec *sg,
void virtqueue_map(VirtIODevice *vdev, VirtQueueElement *elem)
{
- virtqueue_map_iovec(vdev, elem->in_sg, elem->in_addr, elem->in_num, 1);
- virtqueue_map_iovec(vdev, elem->out_sg, elem->out_addr, elem->out_num, 0);
+ virtqueue_map_iovec(vdev, elem->in_sg, elem->in_addr, elem->in_num, true);
+ virtqueue_map_iovec(vdev, elem->out_sg, elem->out_addr, elem->out_num,
+ false);
}
static void *virtqueue_alloc_element(size_t sz, unsigned out_num, unsigned in_num)
--
2.21.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related
* [PATCH v3 15/20] exec: Let address_space_unmap() use a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Edgar E. Iglesias, Anthony Perard, Fam Zheng,
Hervé Poussineau, Philippe Mathieu-Daudé, kvm,
Laurent Vivier, Thomas Huth, Stefan Weil, Eric Auger, Halil Pasic,
Marcel Apfelbaum, qemu-s390x, Aleksandar Rikalo, David Gibson,
Michael Walle, qemu-ppc, Gerd Hoffmann, Cornelia Huck, qemu-arm,
Alistair Francis, qemu-block, Cédric Le Goater, Jason Wang,
xen-devel, Christian Borntraeger, Dmitry Fleytman, Matthew Rosato,
Eduardo Habkost, Richard Henderson, Michael S. Tsirkin,
David Hildenbrand, Paolo Bonzini, Stefano Stabellini,
Igor Mitsyanko, Paul Durrant, Richard Henderson, John Snow
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
The 'is_write' argument is either 0 or 1.
Convert it to a boolean type.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/exec/memory.h | 2 +-
exec.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index afee185eae..1614d9a02c 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -2329,7 +2329,7 @@ void *address_space_map(AddressSpace *as, hwaddr addr,
* @is_write: indicates the transfer direction
*/
void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
- int is_write, hwaddr access_len);
+ bool is_write, hwaddr access_len);
/* Internal functions, part of the implementation of address_space_read. */
diff --git a/exec.c b/exec.c
index 01437be691..16974d4f4b 100644
--- a/exec.c
+++ b/exec.c
@@ -3598,11 +3598,11 @@ void *address_space_map(AddressSpace *as,
}
/* Unmaps a memory region previously mapped by address_space_map().
- * Will also mark the memory as dirty if is_write == 1. access_len gives
+ * Will also mark the memory as dirty if is_write is true. access_len gives
* the amount of memory that was actually read or written by the caller.
*/
void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
- int is_write, hwaddr access_len)
+ bool is_write, hwaddr access_len)
{
if (buffer != bounce.buffer) {
MemoryRegion *mr;
--
2.21.1
^ permalink raw reply related
* [Xen-devel] [PATCH v3 12/20] hw/ide: Let the DMAIntFunc prototype use a boolean 'is_write' argument
From: Philippe Mathieu-Daudé @ 2020-02-20 13:05 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: Fam Zheng, Dmitry Fleytman, kvm, Michael S. Tsirkin, Jason Wang,
Gerd Hoffmann, Edgar E. Iglesias, Stefano Stabellini,
Matthew Rosato, qemu-block, David Hildenbrand, Halil Pasic,
Christian Borntraeger, Hervé Poussineau, Marcel Apfelbaum,
Anthony Perard, xen-devel, Aleksandar Rikalo, Richard Henderson,
Philippe Mathieu-Daudé, Laurent Vivier, Thomas Huth,
Eduardo Habkost, Stefan Weil, Alistair Francis, Richard Henderson,
Paul Durrant, Eric Auger, qemu-s390x, qemu-arm,
Cédric Le Goater, John Snow, David Gibson, Igor Mitsyanko,
Cornelia Huck, Michael Walle, qemu-ppc, Paolo Bonzini
In-Reply-To: <20200220130548.29974-1-philmd@redhat.com>
The 'is_write' argument is either 0 or 1.
Convert it to a boolean type.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/ide/internal.h | 2 +-
hw/dma/rc4030.c | 6 +++---
hw/ide/ahci.c | 2 +-
hw/ide/core.c | 2 +-
hw/ide/macio.c | 2 +-
hw/ide/pci.c | 2 +-
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h
index ce766ac485..1bc1fc73e5 100644
--- a/include/hw/ide/internal.h
+++ b/include/hw/ide/internal.h
@@ -322,7 +322,7 @@ typedef void EndTransferFunc(IDEState *);
typedef void DMAStartFunc(IDEDMA *, IDEState *, BlockCompletionFunc *);
typedef void DMAVoidFunc(IDEDMA *);
-typedef int DMAIntFunc(IDEDMA *, int);
+typedef int DMAIntFunc(IDEDMA *, bool);
typedef int32_t DMAInt32Func(IDEDMA *, int32_t len);
typedef void DMAu32Func(IDEDMA *, uint32_t);
typedef void DMAStopFunc(IDEDMA *, bool);
diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c
index ca0becd756..21e2c360ac 100644
--- a/hw/dma/rc4030.c
+++ b/hw/dma/rc4030.c
@@ -590,7 +590,7 @@ static const VMStateDescription vmstate_rc4030 = {
};
static void rc4030_do_dma(void *opaque, int n, uint8_t *buf,
- int len, int is_write)
+ int len, bool is_write)
{
rc4030State *s = opaque;
hwaddr dma_addr;
@@ -630,13 +630,13 @@ struct rc4030DMAState {
void rc4030_dma_read(void *dma, uint8_t *buf, int len)
{
rc4030_dma s = dma;
- rc4030_do_dma(s->opaque, s->n, buf, len, 0);
+ rc4030_do_dma(s->opaque, s->n, buf, len, false);
}
void rc4030_dma_write(void *dma, uint8_t *buf, int len)
{
rc4030_dma s = dma;
- rc4030_do_dma(s->opaque, s->n, buf, len, 1);
+ rc4030_do_dma(s->opaque, s->n, buf, len, true);
}
static rc4030_dma *rc4030_allocate_dmas(void *opaque, int n)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 68264a22e8..13d91e109a 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -1461,7 +1461,7 @@ static void ahci_commit_buf(IDEDMA *dma, uint32_t tx_bytes)
ad->cur_cmd->status = cpu_to_le32(tx_bytes);
}
-static int ahci_dma_rw_buf(IDEDMA *dma, int is_write)
+static int ahci_dma_rw_buf(IDEDMA *dma, bool is_write)
{
AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma);
IDEState *s = &ad->port.ifs[0];
diff --git a/hw/ide/core.c b/hw/ide/core.c
index 80000eb766..689bb36409 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -2570,7 +2570,7 @@ static void ide_init1(IDEBus *bus, int unit)
ide_sector_write_timer_cb, s);
}
-static int ide_nop_int(IDEDMA *dma, int x)
+static int ide_nop_int(IDEDMA *dma, bool is_write)
{
return 0;
}
diff --git a/hw/ide/macio.c b/hw/ide/macio.c
index 7a8470e921..a9f25e5d02 100644
--- a/hw/ide/macio.c
+++ b/hw/ide/macio.c
@@ -376,7 +376,7 @@ static void macio_ide_reset(DeviceState *dev)
ide_bus_reset(&d->bus);
}
-static int ide_nop_int(IDEDMA *dma, int x)
+static int ide_nop_int(IDEDMA *dma, bool is_write)
{
return 0;
}
diff --git a/hw/ide/pci.c b/hw/ide/pci.c
index cce1da804d..1a6a287e76 100644
--- a/hw/ide/pci.c
+++ b/hw/ide/pci.c
@@ -181,7 +181,7 @@ static int32_t bmdma_prepare_buf(IDEDMA *dma, int32_t limit)
}
/* return 0 if buffer completed */
-static int bmdma_rw_buf(IDEDMA *dma, int is_write)
+static int bmdma_rw_buf(IDEDMA *dma, bool is_write)
{
BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma);
IDEState *s = bmdma_active_if(bm);
--
2.21.1
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