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From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Sung Lee <sung.lee@amd.com>,
	Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	Rodrigo.Siqueira@amd.com, Bhawanpreet.Lakha@amd.com,
	Anthony Koo <Anthony.Koo@amd.com>
Subject: [PATCH 12/19] drm/amd/display: Program self refresh control register on boot
Date: Mon, 16 Mar 2020 09:49:13 -0400	[thread overview]
Message-ID: <20200316134920.2526155-13-Rodrigo.Siqueira@amd.com> (raw)
In-Reply-To: <20200316134920.2526155-1-Rodrigo.Siqueira@amd.com>

From: Sung Lee <sung.lee@amd.com>

[WHY]
In headless boot cases, self refresh control registers are not
programmed on boot. In certain hybrid graphics cases this may cause
cstate entering to get blocked causing a hang.

[HOW]
Program self refresh control register on boot.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 21c7c1b010ec..dad732bb34d5 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -1356,6 +1356,9 @@ void dcn10_init_hw(struct dc *dc)
 	 */
 	if (dcb->funcs->is_accelerated_mode(dcb) || dc->config.power_down_display_on_boot) {
 		hws->funcs.init_pipes(dc, dc->current_state);
+		if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)
+			dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,
+					!dc->res_pool->hubbub->ctx->dc->debug.disable_stutter);
 	}
 
 	for (i = 0; i < res_pool->audio_count; i++) {
-- 
2.25.1

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  parent reply	other threads:[~2020-03-16 13:50 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-16 13:49 [PATCH 00/19] DC Patches March 16th, 2020 Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 01/19] drm/amd/display: update connector->display_info after read edid Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 02/19] drm/amd/display: Fix test pattern color space inconsistency for Linux Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 03/19] drm/amd/display: Remove redundant hdcp display state Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 04/19] drm/amd/display: workaround for HDMI hotplug in DPMSOFF state Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 05/19] drm/amd/display: fix split threshold w/a to work with mpo Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 06/19] drm/amd/display: Pass triplebuffer surface flip flags down to plane state Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 07/19] drm/amd/display: Explicitly disable triplebuffer flips Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 08/19] drm/amd/display: Remove PSR dependency on swizzle mode Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 09/19] drm/amd/display: Set disable_dmcu flag properly per asic Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 10/19] drm/amd/display: Fallback to dmcub for psr when dmcu is disabled Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 11/19] drm/amd/display: remove magic numbers in hdcp_ddc Rodrigo Siqueira
2020-03-16 13:49 ` Rodrigo Siqueira [this message]
2020-03-16 13:49 ` [PATCH 13/19] drm/amd/display: differentiate vsc sdp colorimetry use criteria between MST and SST Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 14/19] drm/amd/display: guard DPPHY_Internal_ctrl Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 15/19] drm/amd/display: combine watermark change and clock change for update clocks Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 16/19] drm/amd/display: Remove connect DIG FE to its BE during timing programming Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 17/19] drm/amd/display: DPP DTO isn't update properly Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 18/19] drm/amd/display: Allocate scratch space for DMUB CW7 Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 19/19] drm/amd/display: add on demand pipe merge logic for dcn2+ Rodrigo Siqueira

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