From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
Rodrigo.Siqueira@amd.com, Hersen Wu <hersenxs.wu@amd.com>,
Bhawanpreet.Lakha@amd.com,
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Subject: [PATCH 06/19] drm/amd/display: Pass triplebuffer surface flip flags down to plane state
Date: Mon, 16 Mar 2020 09:49:07 -0400 [thread overview]
Message-ID: <20200316134920.2526155-7-Rodrigo.Siqueira@amd.com> (raw)
In-Reply-To: <20200316134920.2526155-1-Rodrigo.Siqueira@amd.com>
From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
[Why]
A "dcn20_program_front_end_for_ctx" warning is observed on Renoir.
Since the resource definition doesn't explicitly disable triplebuffer
flips like Navi10 DC actually attempts to go and setup triplebuffering
even when we pass in false to the plane state.
If we hit a full update after triplebuffering has been setup we see the
assertion since we don't expect full updates while performing
triplebuffer flips.
Normally this would get reset back to false whne we pass in the new
plane state, but since we never actually copy the flag when doing
surface updates this doesn't happen.
[How]
Copy the flag onto the plane update based on the requested surface
update state.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 2 ++
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index df285f57fe92..137180ad6a25 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1871,6 +1871,8 @@ static void copy_surface_update_to_plane(
surface->time.index++;
if (surface->time.index >= DC_PLANE_UPDATE_TIMES_MAX)
surface->time.index = 0;
+
+ surface->triplebuffer_flips = srf_update->flip_addr->triplebuffer_flips;
}
if (srf_update->scaling_info) {
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 1e6413a79d47..280b015d10bd 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -872,6 +872,7 @@ struct dc_flip_addrs {
unsigned int flip_timestamp_in_us;
bool flip_immediate;
/* TODO: add flip duration for FreeSync */
+ bool triplebuffer_flips;
};
bool dc_post_update_surfaces_to_stream(
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
next prev parent reply other threads:[~2020-03-16 13:50 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-16 13:49 [PATCH 00/19] DC Patches March 16th, 2020 Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 01/19] drm/amd/display: update connector->display_info after read edid Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 02/19] drm/amd/display: Fix test pattern color space inconsistency for Linux Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 03/19] drm/amd/display: Remove redundant hdcp display state Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 04/19] drm/amd/display: workaround for HDMI hotplug in DPMSOFF state Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 05/19] drm/amd/display: fix split threshold w/a to work with mpo Rodrigo Siqueira
2020-03-16 13:49 ` Rodrigo Siqueira [this message]
2020-03-16 13:49 ` [PATCH 07/19] drm/amd/display: Explicitly disable triplebuffer flips Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 08/19] drm/amd/display: Remove PSR dependency on swizzle mode Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 09/19] drm/amd/display: Set disable_dmcu flag properly per asic Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 10/19] drm/amd/display: Fallback to dmcub for psr when dmcu is disabled Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 11/19] drm/amd/display: remove magic numbers in hdcp_ddc Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 12/19] drm/amd/display: Program self refresh control register on boot Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 13/19] drm/amd/display: differentiate vsc sdp colorimetry use criteria between MST and SST Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 14/19] drm/amd/display: guard DPPHY_Internal_ctrl Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 15/19] drm/amd/display: combine watermark change and clock change for update clocks Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 16/19] drm/amd/display: Remove connect DIG FE to its BE during timing programming Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 17/19] drm/amd/display: DPP DTO isn't update properly Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 18/19] drm/amd/display: Allocate scratch space for DMUB CW7 Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 19/19] drm/amd/display: add on demand pipe merge logic for dcn2+ Rodrigo Siqueira
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200316134920.2526155-7-Rodrigo.Siqueira@amd.com \
--to=rodrigo.siqueira@amd.com \
--cc=Bhawanpreet.Lakha@amd.com \
--cc=Harry.Wentland@amd.com \
--cc=Sunpeng.Li@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=hersenxs.wu@amd.com \
--cc=nicholas.kazlauskas@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox