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From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	Rodrigo.Siqueira@amd.com,
	Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>,
	Yongqiang Sun <yongqiang.sun@amd.com>,
	Bhawanpreet.Lakha@amd.com
Subject: [PATCH 17/19] drm/amd/display: DPP DTO isn't update properly.
Date: Mon, 16 Mar 2020 09:49:18 -0400	[thread overview]
Message-ID: <20200316134920.2526155-18-Rodrigo.Siqueira@amd.com> (raw)
In-Reply-To: <20200316134920.2526155-1-Rodrigo.Siqueira@amd.com>

From: Yongqiang Sun <yongqiang.sun@amd.com>

[Why]
before update dpp DTO, we check dppclks in context to determine it is
changed or not, but dppclks in context will be updated anyways after
flip is done, so compare dppclks in context will always get an equal
result.

[How]
Add pipe dpp clks in dccg and compare values between dccg and context.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 5 ++---
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c            | 2 ++
 drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h                 | 3 ++-
 3 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
index 368d497bc64b..55d09adbf0d9 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
@@ -115,12 +115,11 @@ void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr,
 		dpp_inst = i;
 		dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz;
 
-		prev_dppclk_khz = clk_mgr->base.ctx->dc->current_state->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz;
+		prev_dppclk_khz = clk_mgr->dccg->pipe_dppclk_khz[i];
 
-		if (safe_to_lower || prev_dppclk_khz < dppclk_khz) {
+		if (safe_to_lower || prev_dppclk_khz < dppclk_khz)
 			clk_mgr->dccg->funcs->update_dpp_dto(
 							clk_mgr->dccg, dpp_inst, dppclk_khz);
-		}
 	}
 }
 
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c
index 50bffbfdd394..62cc2651e00c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c
@@ -70,6 +70,8 @@ void dccg2_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk)
 		REG_UPDATE(DPPCLK_DTO_CTRL,
 				DPPCLK_DTO_ENABLE[dpp_inst], 0);
 	}
+
+	dccg->pipe_dppclk_khz[dpp_inst] = req_dppclk;
 }
 
 void dccg2_get_dccg_ref_freq(struct dccg *dccg,
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h
index 05ee5295d2c1..336c80a18175 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h
@@ -27,11 +27,12 @@
 #define __DAL_DCCG_H__
 
 #include "dc_types.h"
+#include "hw_shared.h"
 
 struct dccg {
 	struct dc_context *ctx;
 	const struct dccg_funcs *funcs;
-
+	int pipe_dppclk_khz[MAX_PIPES];
 	int ref_dppclk;
 };
 
-- 
2.25.1

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  parent reply	other threads:[~2020-03-16 13:50 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-16 13:49 [PATCH 00/19] DC Patches March 16th, 2020 Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 01/19] drm/amd/display: update connector->display_info after read edid Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 02/19] drm/amd/display: Fix test pattern color space inconsistency for Linux Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 03/19] drm/amd/display: Remove redundant hdcp display state Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 04/19] drm/amd/display: workaround for HDMI hotplug in DPMSOFF state Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 05/19] drm/amd/display: fix split threshold w/a to work with mpo Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 06/19] drm/amd/display: Pass triplebuffer surface flip flags down to plane state Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 07/19] drm/amd/display: Explicitly disable triplebuffer flips Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 08/19] drm/amd/display: Remove PSR dependency on swizzle mode Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 09/19] drm/amd/display: Set disable_dmcu flag properly per asic Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 10/19] drm/amd/display: Fallback to dmcub for psr when dmcu is disabled Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 11/19] drm/amd/display: remove magic numbers in hdcp_ddc Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 12/19] drm/amd/display: Program self refresh control register on boot Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 13/19] drm/amd/display: differentiate vsc sdp colorimetry use criteria between MST and SST Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 14/19] drm/amd/display: guard DPPHY_Internal_ctrl Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 15/19] drm/amd/display: combine watermark change and clock change for update clocks Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 16/19] drm/amd/display: Remove connect DIG FE to its BE during timing programming Rodrigo Siqueira
2020-03-16 13:49 ` Rodrigo Siqueira [this message]
2020-03-16 13:49 ` [PATCH 18/19] drm/amd/display: Allocate scratch space for DMUB CW7 Rodrigo Siqueira
2020-03-16 13:49 ` [PATCH 19/19] drm/amd/display: add on demand pipe merge logic for dcn2+ Rodrigo Siqueira

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