From: Wayne Lin <Wayne.Lin@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <alexander.deucher@amd.com>, <Harry.Wentland@amd.com>,
<nicholas.kazlauskas@amd.com>, <Rodrigo.Siqueira@amd.com>,
<wayne.lin@amd.com>, <stylon.wang@amd.com>, <jude.shih@amd.com>,
<jimmy.kizito@amd.com>, <meenakshikumar.somasundaram@amd.com>,
Wayne Lin <Wayne.Lin@amd.com>
Subject: [PATCH v2 00/23] USB4 DP tunneling
Date: Tue, 5 Oct 2021 15:51:42 +0800 [thread overview]
Message-ID: <20211005075205.3467938-1-Wayne.Lin@amd.com> (raw)
USB4 runs over USB-C and can tunnels USB3, PCIe and DP protocols.
A USB4 router is responsible for mapping Tunneled Protocol traffic
to USB4 packets and routes packets through the USB4 Fabric.
For this patchset, we have native DisplayPort able to be tunneled
over USB4 Fabric.
E.g.
DP source -> DPIA (DP In Adapter) -> USB4 host router -> USB4 port ->
USB4 device router -> DPOA (DP Out Adapter) -> DPTX -> DP sink
Briefly, there is a CM (Connection Manager) in USB subsystem which
handles relevant USB4 channel configuratons. Our DMCUB is responsible
for interacting with CM to control DPIA to enable Video Path & AUX
Path. Once DPIA gets into Paired state, DP source is then having a
constructed end-to-end path to interact with DP sink as the
conventional way.
From DP Source perspective, the USB4 Fabric and the Adapters are
either totally transparent or act as an LTTPR. Besides, due to
constraints of USB4 protocols, AUX transactions under USB4 now is
handled by DMCUB to meet USB4 protocol requirement.
Changes since v1:
* Give the description of rough working flow of USB4 DP tunneling
---
Jimmy Kizito (14):
drm/amd/display: Update link encoder object creation.
drm/amd/display: Support USB4 dynamic link encoder selection.
drm/amd/display: Support USB4 for display endpoint control path.
drm/amd/display: Support DP tunneling when DPRX detection
drm/amd/display: Update training parameters for DPIA links
drm/amd/display: Support USB4 when DP link training.
drm/amd/display: Implement DPIA training loop
drm/amd/display: Implement DPIA link configuration
drm/amd/display: Implement DPIA clock recovery phase
drm/amd/display: Implement DPIA equalisation phase
drm/amd/display: Implement end of training for hop in DPIA display
path
drm/amd/display: Read USB4 DP tunneling data from DPCD.
drm/amd/display: Fix DIG_HPD_SELECT for USB4 display endpoints.
drm/amd/display: Add debug flags for USB4 DP link training.
Jude Shih (4):
drm/amd/display: Support for SET_CONFIG processing with DMUB
drm/amd/display: Deadlock/HPD Status/Crash Bug Fix
drm/amd/display: Fix USB4 Aux via DMUB terminate unexpectedly
drm/amd/display: USB4 bring up set correct address
Meenakshikumar Somasundaram (5):
drm/amd/display: USB4 DPIA enumeration and AUX Tunneling
drm/amd/display: Support for DMUB HPD and HPD RX interrupt handling
drm/amd/display: Support for SET_CONFIG processing with DMUB
drm/amd/display: Add dpia debug options
drm/amd/display: Fix for access for ddc pin and aux engine.
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 106 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +-
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 17 +-
drivers/gpu/drm/amd/display/dc/Makefile | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 179 +++-
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 81 +-
.../gpu/drm/amd/display/dc/core/dc_link_ddc.c | 9 +-
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 36 +-
.../drm/amd/display/dc/core/dc_link_dpia.c | 945 ++++++++++++++++++
drivers/gpu/drm/amd/display/dc/core/dc_stat.c | 8 +
drivers/gpu/drm/amd/display/dc/dc.h | 22 +
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 31 +
drivers/gpu/drm/amd/display/dc/dc_types.h | 1 +
drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 3 +
.../display/dc/dcn31/dcn31_dio_link_encoder.c | 126 ++-
.../drm/amd/display/dc/dcn31/dcn31_hwseq.c | 6 +
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 7 +
drivers/gpu/drm/amd/display/dc/dm_helpers.h | 5 +
.../gpu/drm/amd/display/dc/inc/core_types.h | 3 +
.../gpu/drm/amd/display/dc/inc/dc_link_ddc.h | 1 +
.../gpu/drm/amd/display/dc/inc/dc_link_dpia.h | 98 ++
drivers/gpu/drm/amd/display/dc/inc/resource.h | 1 +
drivers/gpu/drm/amd/display/dc/os_types.h | 1 +
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 3 +
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 113 ++-
.../gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 1 +
.../drm/amd/display/dmub/src/dmub_srv_stat.c | 16 +
.../gpu/drm/amd/display/include/dal_asic_id.h | 2 +-
28 files changed, 1793 insertions(+), 42 deletions(-)
create mode 100644 drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
create mode 100644 drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h
--
2.25.1
next reply other threads:[~2021-10-05 7:52 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-05 7:51 Wayne Lin [this message]
2021-10-05 7:51 ` [PATCH v2 01/23] drm/amd/display: Update link encoder object creation Wayne Lin
2021-10-05 14:15 ` Harry Wentland
2021-10-05 15:13 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 02/23] drm/amd/display: USB4 DPIA enumeration and AUX Tunneling Wayne Lin
2021-10-05 7:51 ` [PATCH v2 03/23] drm/amd/display: Support for DMUB HPD and HPD RX interrupt handling Wayne Lin
2021-10-05 7:51 ` [PATCH v2 04/23] drm/amd/display: Support USB4 dynamic link encoder selection Wayne Lin
2021-10-05 15:46 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 05/23] drm/amd/display: Support USB4 for display endpoint control path Wayne Lin
2021-10-05 15:50 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 06/23] drm/amd/display: Support DP tunneling when DPRX detection Wayne Lin
2021-10-05 15:57 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 07/23] drm/amd/display: Update training parameters for DPIA links Wayne Lin
2021-10-05 15:58 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 08/23] drm/amd/display: Support USB4 when DP link training Wayne Lin
2021-10-05 15:59 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 09/23] drm/amd/display: Implement DPIA training loop Wayne Lin
2021-10-05 7:51 ` [PATCH v2 10/23] drm/amd/display: Implement DPIA link configuration Wayne Lin
2021-10-05 7:51 ` [PATCH v2 11/23] drm/amd/display: Implement DPIA clock recovery phase Wayne Lin
2021-10-07 10:00 ` Mike Lothian
2021-10-08 8:32 ` Lin, Wayne
2021-10-05 7:51 ` [PATCH v2 12/23] drm/amd/display: Implement DPIA equalisation phase Wayne Lin
2021-10-05 7:51 ` [PATCH v2 13/23] drm/amd/display: Implement end of training for hop in DPIA display path Wayne Lin
2021-10-05 7:51 ` [PATCH v2 14/23] drm/amd/display: Support for SET_CONFIG processing with DMUB Wayne Lin
2021-10-05 7:51 ` [PATCH v2 15/23] drm/amd/display: Read USB4 DP tunneling data from DPCD Wayne Lin
2021-10-05 7:51 ` [PATCH v2 16/23] drm/amd/display: Add dpia debug options Wayne Lin
2021-10-05 7:51 ` [PATCH v2 17/23] drm/amd/display: Support for SET_CONFIG processing with DMUB Wayne Lin
2021-10-05 7:52 ` [PATCH v2 18/23] drm/amd/display: Fix DIG_HPD_SELECT for USB4 display endpoints Wayne Lin
2021-10-05 7:52 ` [PATCH v2 19/23] drm/amd/display: Add debug flags for USB4 DP link training Wayne Lin
2021-10-05 17:10 ` Harry Wentland
2021-10-06 10:14 ` Lin, Wayne
2021-10-06 14:02 ` Harry Wentland
2021-10-07 9:22 ` Lin, Wayne
2021-10-05 7:52 ` [PATCH v2 20/23] drm/amd/display: Fix for access for ddc pin and aux engine Wayne Lin
2021-10-05 7:52 ` [PATCH v2 21/23] drm/amd/display: Deadlock/HPD Status/Crash Bug Fix Wayne Lin
2021-10-05 7:52 ` [PATCH v2 22/23] drm/amd/display: Fix USB4 Aux via DMUB terminate unexpectedly Wayne Lin
2021-10-05 7:52 ` [PATCH v2 23/23] drm/amd/display: USB4 bring up set correct address Wayne Lin
2021-10-05 17:13 ` [PATCH v2 00/23] USB4 DP tunneling Harry Wentland
2021-10-06 10:14 ` Lin, Wayne
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211005075205.3467938-1-Wayne.Lin@amd.com \
--to=wayne.lin@amd.com \
--cc=Harry.Wentland@amd.com \
--cc=Rodrigo.Siqueira@amd.com \
--cc=alexander.deucher@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=jimmy.kizito@amd.com \
--cc=jude.shih@amd.com \
--cc=meenakshikumar.somasundaram@amd.com \
--cc=nicholas.kazlauskas@amd.com \
--cc=stylon.wang@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox