From: Harry Wentland <harry.wentland@amd.com>
To: Wayne Lin <Wayne.Lin@amd.com>, amd-gfx@lists.freedesktop.org
Cc: alexander.deucher@amd.com, nicholas.kazlauskas@amd.com,
Rodrigo.Siqueira@amd.com, stylon.wang@amd.com, jude.shih@amd.com,
jimmy.kizito@amd.com, meenakshikumar.somasundaram@amd.com,
Jun Lei <Jun.Lei@amd.com>
Subject: Re: [PATCH v2 06/23] drm/amd/display: Support DP tunneling when DPRX detection
Date: Tue, 5 Oct 2021 11:57:28 -0400 [thread overview]
Message-ID: <bad6931f-b976-1129-35f9-20be019df900@amd.com> (raw)
In-Reply-To: <20211005075205.3467938-7-Wayne.Lin@amd.com>
On 2021-10-05 03:51, Wayne Lin wrote:
> From: Jimmy Kizito <Jimmy.Kizito@amd.com>
>
> [why & how]
> Add codes for commit "99732e52e7f8 drm/amd/display: Update DPRX detection"
> to support USB4 DP tunneling feature
>
This patch does a few, seemingly unrelated, changes:
1. Add stub for getting tunneling device data
2. Add check for phy_repeater_cnt < 0xff to LTTPR check
3. Add two more bits of information to DPIA links
Does item 2 have potential to change existing LTTPR behavior? If so,
it might be better in a separate patch to ease potential regressions
in the future. Probably not a big deal here, though.
Suggested title: "Add stub to get DPIA tunneling device data"
Suggested description, something like:
1. Add stub for getting tunneling device data
2. Add check for phy_repeater_cnt < 0xff to LTTPR check
3. Add two more bits of information to DPIA links
Harry
> Reviewed-by: Jun Lei <Jun.Lei@amd.com>
> Acked-by: Wayne Lin <Wayne.Lin@amd.com>
> Acked-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
> Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
> ---
> drivers/gpu/drm/amd/display/dc/Makefile | 2 +-
> drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +
> .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 4 ++
> .../drm/amd/display/dc/core/dc_link_dpia.c | 34 +++++++++++++++++
> .../gpu/drm/amd/display/dc/inc/dc_link_dpia.h | 38 +++++++++++++++++++
> 5 files changed, 79 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
> create mode 100644 drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h
>
> diff --git a/drivers/gpu/drm/amd/display/dc/Makefile b/drivers/gpu/drm/amd/display/dc/Makefile
> index 520f58538364..1a0e462bed42 100644
> --- a/drivers/gpu/drm/amd/display/dc/Makefile
> +++ b/drivers/gpu/drm/amd/display/dc/Makefile
> @@ -61,7 +61,7 @@ include $(AMD_DC)
>
> DISPLAY_CORE = dc.o dc_stat.o dc_link.o dc_resource.o dc_hw_sequencer.o dc_sink.o \
> dc_surface.o dc_link_hwss.o dc_link_dp.o dc_link_ddc.o dc_debug.o dc_stream.o \
> -dc_link_enc_cfg.o dc_link_dpcd.o
> +dc_link_enc_cfg.o dc_link_dpia.o dc_link_dpcd.o
>
> ifdef CONFIG_DRM_AMD_DC_DCN
> DISPLAY_CORE += dc_vm_helper.o
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
> index 66182b8c217b..1c397d5551ba 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
> @@ -1726,6 +1726,7 @@ static bool dc_link_construct_dpia(struct dc_link *link,
> /* Dummy Init for linkid */
> link->link_id.type = OBJECT_TYPE_CONNECTOR;
> link->link_id.id = CONNECTOR_ID_DISPLAY_PORT;
> + link->link_id.enum_id = ENUM_ID_1 + init_params->connector_index;
> link->is_internal_display = false;
> link->connector_signal = SIGNAL_TYPE_DISPLAY_PORT;
> LINK_INFO("Connector[%d] description:signal %d\n",
> @@ -1733,6 +1734,7 @@ static bool dc_link_construct_dpia(struct dc_link *link,
> link->connector_signal);
>
> link->ep_type = DISPLAY_ENDPOINT_USB4_DPIA;
> + link->is_dig_mapping_flexible = true;
>
> /* TODO: Initialize link : funcs->link_init */
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> index 4df71d728319..9bc5f49ea2ec 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> @@ -36,6 +36,7 @@
> #include "dpcd_defs.h"
> #include "dc_dmub_srv.h"
> #include "dce/dmub_hw_lock_mgr.h"
> +#include "inc/dc_link_dpia.h"
> #include "inc/link_enc_cfg.h"
>
> /*Travis*/
> @@ -4582,6 +4583,7 @@ bool dp_retrieve_lttpr_cap(struct dc_link *link)
>
> /* Attempt to train in LTTPR transparent mode if repeater count exceeds 8. */
> is_lttpr_present = (dp_convert_to_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt) != 0 &&
> + link->dpcd_caps.lttpr_caps.phy_repeater_cnt < 0xff &&
> link->dpcd_caps.lttpr_caps.max_lane_count > 0 &&
> link->dpcd_caps.lttpr_caps.max_lane_count <= 4 &&
> link->dpcd_caps.lttpr_caps.revision.raw >= 0x14);
> @@ -4630,6 +4632,8 @@ static bool retrieve_link_cap(struct dc_link *link)
> LINK_AUX_DEFAULT_LTTPR_TIMEOUT_PERIOD);
>
> is_lttpr_present = dp_retrieve_lttpr_cap(link);
> + /* Read DP tunneling information. */
> + status = dpcd_get_tunneling_device_data(link);
>
> status = core_link_read_dpcd(link, DP_SET_POWER,
> &dpcd_power_state, sizeof(dpcd_power_state));
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
> new file mode 100644
> index 000000000000..183601e300fe
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
> @@ -0,0 +1,34 @@
> +/*
> + * Copyright 2021 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Authors: AMD
> + *
> + */
> +
> +#include "dc_link_dpia.h"
> +#include "inc/core_status.h"
> +#include "dc_link.h"
> +
> +enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link)
> +{
> + /** @todo Read corresponding DPCD region and update link caps. */
> + return DC_OK;
> +}
> diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h
> new file mode 100644
> index 000000000000..8ed0c9f6414b
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h
> @@ -0,0 +1,38 @@
> +/*
> + * Copyright 2021 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Authors: AMD
> + *
> + */
> +
> +#ifndef __DC_LINK_DPIA_H__
> +#define __DC_LINK_DPIA_H__
> +
> +/* This module implements functionality for training DPIA links. */
> +
> +struct dc_link;
> +
> +/* Read tunneling device capability from DPCD and update link capability
> + * accordingly.
> + */
> +enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link);
> +
> +#endif /* __DC_LINK_DPIA_H__ */
>
next prev parent reply other threads:[~2021-10-05 15:57 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-05 7:51 [PATCH v2 00/23] USB4 DP tunneling Wayne Lin
2021-10-05 7:51 ` [PATCH v2 01/23] drm/amd/display: Update link encoder object creation Wayne Lin
2021-10-05 14:15 ` Harry Wentland
2021-10-05 15:13 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 02/23] drm/amd/display: USB4 DPIA enumeration and AUX Tunneling Wayne Lin
2021-10-05 7:51 ` [PATCH v2 03/23] drm/amd/display: Support for DMUB HPD and HPD RX interrupt handling Wayne Lin
2021-10-05 7:51 ` [PATCH v2 04/23] drm/amd/display: Support USB4 dynamic link encoder selection Wayne Lin
2021-10-05 15:46 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 05/23] drm/amd/display: Support USB4 for display endpoint control path Wayne Lin
2021-10-05 15:50 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 06/23] drm/amd/display: Support DP tunneling when DPRX detection Wayne Lin
2021-10-05 15:57 ` Harry Wentland [this message]
2021-10-05 7:51 ` [PATCH v2 07/23] drm/amd/display: Update training parameters for DPIA links Wayne Lin
2021-10-05 15:58 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 08/23] drm/amd/display: Support USB4 when DP link training Wayne Lin
2021-10-05 15:59 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 09/23] drm/amd/display: Implement DPIA training loop Wayne Lin
2021-10-05 7:51 ` [PATCH v2 10/23] drm/amd/display: Implement DPIA link configuration Wayne Lin
2021-10-05 7:51 ` [PATCH v2 11/23] drm/amd/display: Implement DPIA clock recovery phase Wayne Lin
2021-10-07 10:00 ` Mike Lothian
2021-10-08 8:32 ` Lin, Wayne
2021-10-05 7:51 ` [PATCH v2 12/23] drm/amd/display: Implement DPIA equalisation phase Wayne Lin
2021-10-05 7:51 ` [PATCH v2 13/23] drm/amd/display: Implement end of training for hop in DPIA display path Wayne Lin
2021-10-05 7:51 ` [PATCH v2 14/23] drm/amd/display: Support for SET_CONFIG processing with DMUB Wayne Lin
2021-10-05 7:51 ` [PATCH v2 15/23] drm/amd/display: Read USB4 DP tunneling data from DPCD Wayne Lin
2021-10-05 7:51 ` [PATCH v2 16/23] drm/amd/display: Add dpia debug options Wayne Lin
2021-10-05 7:51 ` [PATCH v2 17/23] drm/amd/display: Support for SET_CONFIG processing with DMUB Wayne Lin
2021-10-05 7:52 ` [PATCH v2 18/23] drm/amd/display: Fix DIG_HPD_SELECT for USB4 display endpoints Wayne Lin
2021-10-05 7:52 ` [PATCH v2 19/23] drm/amd/display: Add debug flags for USB4 DP link training Wayne Lin
2021-10-05 17:10 ` Harry Wentland
2021-10-06 10:14 ` Lin, Wayne
2021-10-06 14:02 ` Harry Wentland
2021-10-07 9:22 ` Lin, Wayne
2021-10-05 7:52 ` [PATCH v2 20/23] drm/amd/display: Fix for access for ddc pin and aux engine Wayne Lin
2021-10-05 7:52 ` [PATCH v2 21/23] drm/amd/display: Deadlock/HPD Status/Crash Bug Fix Wayne Lin
2021-10-05 7:52 ` [PATCH v2 22/23] drm/amd/display: Fix USB4 Aux via DMUB terminate unexpectedly Wayne Lin
2021-10-05 7:52 ` [PATCH v2 23/23] drm/amd/display: USB4 bring up set correct address Wayne Lin
2021-10-05 17:13 ` [PATCH v2 00/23] USB4 DP tunneling Harry Wentland
2021-10-06 10:14 ` Lin, Wayne
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