From: Wayne Lin <Wayne.Lin@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <alexander.deucher@amd.com>, <Harry.Wentland@amd.com>,
<nicholas.kazlauskas@amd.com>, <Rodrigo.Siqueira@amd.com>,
<wayne.lin@amd.com>, <stylon.wang@amd.com>, <jude.shih@amd.com>,
<jimmy.kizito@amd.com>, <meenakshikumar.somasundaram@amd.com>,
Jimmy Kizito <Jimmy.Kizito@amd.com>,
Wayne Lin <Wayne.Lin@amd.com>
Subject: [PATCH v2 20/23] drm/amd/display: Fix for access for ddc pin and aux engine
Date: Tue, 5 Oct 2021 15:52:02 +0800 [thread overview]
Message-ID: <20211005075205.3467938-21-Wayne.Lin@amd.com> (raw)
In-Reply-To: <20211005075205.3467938-1-Wayne.Lin@amd.com>
From: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
[Why & How]
Add codes for commit "b693dfe24d61 drm/amd/display: Fix for null
pointer access for ddc pin and aux engine" to take USB4 feature
into account.
Reviewed-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Acked-by: Wayne Lin <Wayne.Lin@amd.com>
Acked-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 6 +++---
drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c | 6 +++---
drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 3 +++
drivers/gpu/drm/amd/display/dc/irq_types.h | 5 +----
4 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 6b5ddf0a29c1..ca5dc3c168ec 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1709,9 +1709,9 @@ static bool dc_link_construct_dpia(struct dc_link *link,
DC_LOGGER_INIT(dc_ctx->logger);
- /* Initialized dummy hpd and hpd rx */
- link->irq_source_hpd = DC_IRQ_SOURCE_USB4_DMUB_HPD;
- link->irq_source_hpd_rx = DC_IRQ_SOURCE_USB4_DMUB_HPDRX;
+ /* Initialized irq source for hpd and hpd rx */
+ link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
+ link->irq_source_hpd_rx = DC_IRQ_SOURCE_INVALID;
link->link_status.dpcd_caps = &link->dpcd_caps;
link->dc = init_params->dc;
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
index ce15a38c2aea..b8b1fa0d4ae3 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
@@ -230,7 +230,7 @@ static enum dc_status dpcd_set_lt_pattern(struct dc_link *link,
}
status = core_link_write_dpcd(link,
- DP_TRAINING_PATTERN_SET,
+ dpcd_tps_offset,
&dpcd_pattern.raw,
sizeof(dpcd_pattern.raw));
@@ -788,7 +788,7 @@ static enum dc_status dpcd_clear_lt_pattern(struct dc_link *link, uint32_t hop)
((DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE) * (hop - 1));
status = core_link_write_dpcd(link,
- DP_TRAINING_PATTERN_SET,
+ dpcd_tps_offset,
&dpcd_pattern.raw,
sizeof(dpcd_pattern.raw));
@@ -898,7 +898,7 @@ enum link_training_result dc_link_dpia_perform_link_training(struct dc_link *lin
enum link_training_result result;
struct link_training_settings lt_settings;
uint8_t repeater_cnt = 0; /* Number of hops/repeaters in display path. */
- uint8_t repeater_id; /* Current hop. */
+ int8_t repeater_id; /* Current hop. */
/* Configure link as prescribed in link_setting and set LTTPR mode. */
result = dpia_configure_link(link, link_setting, <_settings);
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c
index 5666543f095b..95cb4d7cc76a 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c
@@ -627,6 +627,7 @@ int dce_aux_transfer_dmub_raw(struct ddc_service *ddc,
#define AUX_MAX_I2C_DEFER_RETRIES 7
#define AUX_MAX_INVALID_REPLY_RETRIES 2
#define AUX_MAX_TIMEOUT_RETRIES 3
+#define AUX_DEFER_DELAY_FOR_DPIA 4 /*ms*/
static void dce_aux_log_payload(const char *payload_name,
unsigned char *payload, uint32_t length, uint32_t max_length_to_log)
@@ -772,6 +773,8 @@ bool dce_aux_transfer_with_retries(struct ddc_service *ddc,
/* polling_timeout_period is in us */
if (aux110)
defer_time_in_ms += aux110->polling_timeout_period / 1000;
+ else
+ defer_time_in_ms += AUX_DEFER_DELAY_FOR_DPIA;
++aux_defer_retries;
fallthrough;
case AUX_TRANSACTION_REPLY_I2C_OVER_AUX_DEFER:
diff --git a/drivers/gpu/drm/amd/display/dc/irq_types.h b/drivers/gpu/drm/amd/display/dc/irq_types.h
index 7a9f667d5edb..530c2578db40 100644
--- a/drivers/gpu/drm/amd/display/dc/irq_types.h
+++ b/drivers/gpu/drm/amd/display/dc/irq_types.h
@@ -153,10 +153,7 @@ enum dc_irq_source {
DC_IRQ_SOURCE_DMCUB_OUTBOX,
DC_IRQ_SOURCE_DMCUB_OUTBOX0,
DC_IRQ_SOURCE_DMCUB_GENERAL_DATAOUT,
- DAL_IRQ_SOURCES_NUMBER,
- /* Dummy interrupt source for USB4 HPD & HPD RX */
- DC_IRQ_SOURCE_USB4_DMUB_HPD,
- DC_IRQ_SOURCE_USB4_DMUB_HPDRX,
+ DAL_IRQ_SOURCES_NUMBER
};
enum irq_type
--
2.25.1
next prev parent reply other threads:[~2021-10-05 8:01 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-05 7:51 [PATCH v2 00/23] USB4 DP tunneling Wayne Lin
2021-10-05 7:51 ` [PATCH v2 01/23] drm/amd/display: Update link encoder object creation Wayne Lin
2021-10-05 14:15 ` Harry Wentland
2021-10-05 15:13 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 02/23] drm/amd/display: USB4 DPIA enumeration and AUX Tunneling Wayne Lin
2021-10-05 7:51 ` [PATCH v2 03/23] drm/amd/display: Support for DMUB HPD and HPD RX interrupt handling Wayne Lin
2021-10-05 7:51 ` [PATCH v2 04/23] drm/amd/display: Support USB4 dynamic link encoder selection Wayne Lin
2021-10-05 15:46 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 05/23] drm/amd/display: Support USB4 for display endpoint control path Wayne Lin
2021-10-05 15:50 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 06/23] drm/amd/display: Support DP tunneling when DPRX detection Wayne Lin
2021-10-05 15:57 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 07/23] drm/amd/display: Update training parameters for DPIA links Wayne Lin
2021-10-05 15:58 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 08/23] drm/amd/display: Support USB4 when DP link training Wayne Lin
2021-10-05 15:59 ` Harry Wentland
2021-10-05 7:51 ` [PATCH v2 09/23] drm/amd/display: Implement DPIA training loop Wayne Lin
2021-10-05 7:51 ` [PATCH v2 10/23] drm/amd/display: Implement DPIA link configuration Wayne Lin
2021-10-05 7:51 ` [PATCH v2 11/23] drm/amd/display: Implement DPIA clock recovery phase Wayne Lin
2021-10-07 10:00 ` Mike Lothian
2021-10-08 8:32 ` Lin, Wayne
2021-10-05 7:51 ` [PATCH v2 12/23] drm/amd/display: Implement DPIA equalisation phase Wayne Lin
2021-10-05 7:51 ` [PATCH v2 13/23] drm/amd/display: Implement end of training for hop in DPIA display path Wayne Lin
2021-10-05 7:51 ` [PATCH v2 14/23] drm/amd/display: Support for SET_CONFIG processing with DMUB Wayne Lin
2021-10-05 7:51 ` [PATCH v2 15/23] drm/amd/display: Read USB4 DP tunneling data from DPCD Wayne Lin
2021-10-05 7:51 ` [PATCH v2 16/23] drm/amd/display: Add dpia debug options Wayne Lin
2021-10-05 7:51 ` [PATCH v2 17/23] drm/amd/display: Support for SET_CONFIG processing with DMUB Wayne Lin
2021-10-05 7:52 ` [PATCH v2 18/23] drm/amd/display: Fix DIG_HPD_SELECT for USB4 display endpoints Wayne Lin
2021-10-05 7:52 ` [PATCH v2 19/23] drm/amd/display: Add debug flags for USB4 DP link training Wayne Lin
2021-10-05 17:10 ` Harry Wentland
2021-10-06 10:14 ` Lin, Wayne
2021-10-06 14:02 ` Harry Wentland
2021-10-07 9:22 ` Lin, Wayne
2021-10-05 7:52 ` Wayne Lin [this message]
2021-10-05 7:52 ` [PATCH v2 21/23] drm/amd/display: Deadlock/HPD Status/Crash Bug Fix Wayne Lin
2021-10-05 7:52 ` [PATCH v2 22/23] drm/amd/display: Fix USB4 Aux via DMUB terminate unexpectedly Wayne Lin
2021-10-05 7:52 ` [PATCH v2 23/23] drm/amd/display: USB4 bring up set correct address Wayne Lin
2021-10-05 17:13 ` [PATCH v2 00/23] USB4 DP tunneling Harry Wentland
2021-10-06 10:14 ` Lin, Wayne
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