AMD-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Fangzhi Zuo <Jerry.Zuo@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Harry.Wentland@amd.com>, <Sunpeng.Li@amd.com>,
	<Rodrigo.Siqueira@amd.com>, <Aurabindo.Pillai@amd.com>,
	<roman.li@amd.com>, <wayne.lin@amd.com>,
	<agustin.gutierrez@amd.com>, <chiahsuan.chung@amd.com>,
	<jerry.zuo@amd.com>, Jingwen Zhu <jingwen.zhu@amd.com>,
	Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Subject: [PATCH 11/50] drm/amd/display: avoid disable otg when dig was disabled
Date: Wed, 10 Jul 2024 15:36:28 -0400	[thread overview]
Message-ID: <20240710193707.43754-12-Jerry.Zuo@amd.com> (raw)
In-Reply-To: <20240710193707.43754-1-Jerry.Zuo@amd.com>

From: Jingwen Zhu <jingwen.zhu@amd.com>

[Why]
This is a workaround for an dcn3.1 hang that happens if otg dispclk
is ramped while otg is on and stream enc is off.
But this w/a should not trigger when we have a dig active.

[How]
Avoid disable otg when dig FE/BE FIFO was not switched.

Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Jingwen Zhu <jingwen.zhu@amd.com>
---
 .../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c   | 18 +++++++++++++++---
 .../dc/dio/dcn35/dcn35_dio_stream_encoder.c    |  9 +++++++++
 .../drm/amd/display/dc/inc/hw/stream_encoder.h |  1 +
 3 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
index 70ee0089a20d..248d22b23a6d 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
@@ -120,7 +120,6 @@ static int dcn35_get_active_display_cnt_wa(
 
 	return display_count;
 }
-
 static void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context,
 		bool safe_to_lower, bool disable)
 {
@@ -128,14 +127,27 @@ static void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *
 	int i;
 
 	for (i = 0; i < dc->res_pool->pipe_count; ++i) {
+		struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i];
+		struct pipe_ctx *new_pipe = &context->res_ctx.pipe_ctx[i];
 		struct pipe_ctx *pipe = safe_to_lower
 			? &context->res_ctx.pipe_ctx[i]
 			: &dc->current_state->res_ctx.pipe_ctx[i];
-
+		bool stream_changed_otg_dig_on = false;
 		if (pipe->top_pipe || pipe->prev_odm_pipe)
 			continue;
+		stream_changed_otg_dig_on = old_pipe->stream && new_pipe->stream &&
+		old_pipe->stream != new_pipe->stream &&
+		old_pipe->stream_res.tg == new_pipe->stream_res.tg &&
+		new_pipe->stream->link_enc && !new_pipe->stream->dpms_off &&
+		new_pipe->stream->link->link_enc->funcs->is_dig_enabled &&
+		new_pipe->stream->link->link_enc->funcs->is_dig_enabled(
+		new_pipe->stream->link->link_enc) &&
+		new_pipe->stream_res.stream_enc &&
+		new_pipe->stream_res.stream_enc->funcs->is_fifo_enabled &&
+		new_pipe->stream_res.stream_enc->funcs->is_fifo_enabled(new_pipe->stream_res.stream_enc);
 		if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) ||
-				     !pipe->stream->link_enc)) {
+			!pipe->stream->link_enc) && !stream_changed_otg_dig_on) {
+			/* This w/a should not trigger when we have a dig active */
 			if (disable) {
 				if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->disable_crtc)
 					pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg);
diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c
index 6a179e5ab417..fcc88ef83e6a 100644
--- a/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c
@@ -392,6 +392,14 @@ static void enc35_reset_fifo(struct stream_encoder *enc, bool reset)
 		udelay(10);
 }
 
+static bool enc35_is_fifo_enabled(struct stream_encoder *enc)
+{
+	struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
+	uint32_t reset_val;
+
+	REG_GET(DIG_FIFO_CTRL0, DIG_FIFO_ENABLE, &reset_val);
+	return (reset_val == 0) ? false : true;
+}
 void enc35_disable_fifo(struct stream_encoder *enc)
 {
 	struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
@@ -465,6 +473,7 @@ static const struct stream_encoder_funcs dcn35_str_enc_funcs = {
 	.set_input_mode = enc314_set_dig_input_mode,
 	.enable_fifo = enc35_enable_fifo,
 	.disable_fifo = enc35_disable_fifo,
+	.is_fifo_enabled = enc35_is_fifo_enabled,
 	.map_stream_to_link = enc35_stream_encoder_map_to_link,
 };
 
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
index e5e11c84e9e2..6fe42120738d 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
@@ -271,6 +271,7 @@ struct stream_encoder_funcs {
 		struct stream_encoder *enc, unsigned int pix_per_container);
 	void (*enable_fifo)(struct stream_encoder *enc);
 	void (*disable_fifo)(struct stream_encoder *enc);
+	bool (*is_fifo_enabled)(struct stream_encoder *enc);
 	void (*map_stream_to_link)(struct stream_encoder *enc, uint32_t stream_enc_inst, uint32_t link_enc_inst);
 };
 
-- 
2.34.1


  parent reply	other threads:[~2024-07-10 19:38 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-10 19:36 [PATCH 00/50] DC Patches July 10th, 2024 Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 01/50] drm/amd/display: Disable replay if VRR capability is false Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 02/50] drm/amd/display: Disable HBR audio for DP2 for certain ASICs Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 03/50] drm/amd/display: quality improvements for EASF and ISHARP Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 04/50] drm/amd/display: Don't consider cursor for no plane case in DML1 Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 05/50] drm/amd/display: Added logging for automated DPM testing Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 06/50] drm/amd/display: Replace assert with error message in dp_retrieve_lttpr_cap() Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 07/50] drm/amd/display: Revert "Check HDCP returned status" Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 08/50] drm/amd/display: fix dscclk programming sequence on DCN401 Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 09/50] drm/amd/display: apply vmin optimization even if it doesn't reach vmin level Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 10/50] drm/amd/display: Implement bias and scale pre scl Fangzhi Zuo
2024-07-10 19:36 ` Fangzhi Zuo [this message]
2024-07-10 19:36 ` [PATCH 12/50] drm/amd/display: Add option to allow transition when odm is forced Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 13/50] drm/amd/display: When resync fifo ensure to use correct pipe ctx Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 14/50] drm/amd/display: Disable subvp based on HW cursor requirement Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 15/50] drm/amd/display: Fix DP-DVI dongle hotplug Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 16/50] drm/amd/display: Refactoring OPP Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 17/50] drm/amd/display: Initialize denominators' default to 1 Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 18/50] drm/amd/display: Check null-initialized variables Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 19/50] drm/amd/display: Check phantom_stream before it is used Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 20/50] drm/amd/display: Pass non-null to dcn20_validate_apply_pipe_split_flags Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 21/50] drm/amd/display: Check null pointers before using them Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 22/50] drm/amd/display: Check stream before comparing them Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 23/50] drm/amd/display: Deallocate DML memory if allocation fails Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 24/50] drm/amd/display: Refactoring MMHUBBUB Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 25/50] drm/amd/display: Do 1-to-1 mapping between OPP and DSC in DML2 Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 26/50] drm/amd/display: DML2.1 resynchronization Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 27/50] drm/amd/display: Refactoring MPC Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 28/50] drm/amd/display: Fix VRR cannot enable Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 29/50] drm/amd/display: Re-enable panel replay feature Fangzhi Zuo
2024-07-10 19:47   ` Leo Li
2024-07-10 19:36 ` [PATCH 30/50] drm/amd/display: Add blanked streams override to DML2.1 Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 31/50] drm/amd/display: Calculate ODM width using odm slice rect, not recout Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 32/50] drm/amd/display: Issue with 3 or more mcaches per surface Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 33/50] drm/amd/display: remove dc dependencies from SPL library Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 34/50] drm/amd/display: Add P-State Keepout to dcn401 Global Sync Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 35/50] drm/amd/display: Check link_res->hpo_dp_link_enc before using it Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 36/50] drm/amd/display: Check null pointers before used Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 37/50] drm/amd/display: Check null pointers before multiple uses Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 38/50] drm/amd/display: Increase array size of dummy_boolean Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 39/50] drm/amd/display: add dmcub support check Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 40/50] drm/amd/display: Refactoring DWB related files from dcn30 Files Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 41/50] drm/amd/display: Export additional FAMS2 global configuration options from DML Fangzhi Zuo
2024-07-10 19:36 ` [PATCH 42/50] drm/amd/display: Check stream pointer is initialized before accessing Fangzhi Zuo
2024-07-10 19:37 ` [PATCH 43/50] drm/amd/display: Set Cursor Matrix to bypass instead of Input Plane Fangzhi Zuo
2024-07-10 19:37 ` [PATCH 44/50] drm/amd/display: Add visual confirm for Idle State Fangzhi Zuo
2024-07-10 19:37 ` [PATCH 45/50] drm/amd/display: free bo used for dmub bounding box Fangzhi Zuo
2024-07-10 19:37 ` [PATCH 46/50] drm/amd/display: Remove unnecessary DSC power gating for DCN401 Fangzhi Zuo
2024-07-10 19:37 ` [PATCH 47/50] drm/amd/display: Allow display DCC " Fangzhi Zuo
2024-07-10 19:37 ` [PATCH 48/50] drm/amd/display: improve logic for addition of modifers Fangzhi Zuo
2024-07-10 19:37 ` [PATCH 49/50] drm/amd/display: Remove unused dml2_core_ip_params struct Fangzhi Zuo
2024-07-10 19:37 ` [PATCH 50/50] drm/amd/display: 3.2.292 Fangzhi Zuo
2024-07-12 17:56 ` [PATCH 00/50] DC Patches July 10th, 2024 Wheeler, Daniel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240710193707.43754-12-Jerry.Zuo@amd.com \
    --to=jerry.zuo@amd.com \
    --cc=Aurabindo.Pillai@amd.com \
    --cc=Harry.Wentland@amd.com \
    --cc=Rodrigo.Siqueira@amd.com \
    --cc=Sunpeng.Li@amd.com \
    --cc=agustin.gutierrez@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=chiahsuan.chung@amd.com \
    --cc=jingwen.zhu@amd.com \
    --cc=roman.li@amd.com \
    --cc=wayne.lin@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox